2 * Author: Thomas Ingleby <thomas.c.ingleby@intel.com>
3 * Author: Brendan Le Foll <brendan.le.foll@intel.com>
4 * Copyright (c) 2014 Intel Corporation.
6 * Permission is hereby granted, free of charge, to any person obtaining
7 * a copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sublicense, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice shall be
15 * included in all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
20 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
30 #include "mraa_func.h"
31 #include "mraa_adv_func.h"
34 // Bionic does not implement pthread cancellation API
36 #define HAVE_PTHREAD_CANCEL
39 // general status failures for internal functions
40 #define MRAA_PLATFORM_NO_INIT -3
41 #define MRAA_IO_SETUP_FAILURE -2
42 #define MRAA_NO_SUCH_IO -1
45 * A structure representing a gpio pin.
49 int pin; /**< the pin number, as known to the os. */
50 int phy_pin; /**< pin passed to clean init. -1 none and raw*/
51 int value_fp; /**< the file pointer to the value of the gpio */
52 void (* isr)(void *); /**< the interupt service request */
53 void *isr_args; /**< args return when interupt service request triggered */
54 pthread_t thread_id; /**< the isr handler thread id */
55 int isr_value_fp; /**< the isr file pointer on the value */
56 #ifndef HAVE_PTHREAD_CANCEL
57 int isr_control_pipe[2]; /**< a pipe used to interrupt the isr from polling the value fd*/
59 mraa_boolean_t isr_thread_terminating; /**< is the isr thread being terminated? */
60 mraa_boolean_t owner; /**< If this context originally exported the pin */
61 mraa_result_t (*mmap_write) (mraa_gpio_context dev, int value);
62 int (*mmap_read) (mraa_gpio_context dev);
63 mraa_adv_func_t* advance_func; /**< override function table */
68 * A structure representing a I2C bus
72 int busnum; /**< the bus number of the /dev/i2c-* device */
73 int fh; /**< the file handle to the /dev/i2c-* device */
74 int addr; /**< the address of the i2c slave */
75 unsigned long funcs; /**< /dev/i2c-* device capabilities as per https://www.kernel.org/doc/Documentation/i2c/functionality */
76 void *handle; /**< generic handle for non-standard drivers that don't use file descriptors */
77 mraa_adv_func_t* advance_func; /**< override function table */
82 * A structure representing the SPI device
86 int devfd; /**< File descriptor to SPI Device */
87 uint32_t mode; /**< Spi mode see spidev.h */
88 int clock; /**< clock to run transactions at */
89 mraa_boolean_t lsb; /**< least significant bit mode */
90 unsigned int bpw; /**< Bits per word */
91 mraa_adv_func_t* advance_func; /**< override function table */
96 * A structure representing a PWM pin
100 int pin; /**< the pin number, as known to the os. */
101 int chipid; /**< the chip id, which the pwm resides */
102 int duty_fp; /**< File pointer to duty file */
103 int period; /**< Cache the period to speed up setting duty */
104 mraa_boolean_t owner; /**< Owner of pwm context*/
105 mraa_adv_func_t* advance_func; /**< override function table */
110 * A structure representing a Analog Input Channel
114 unsigned int channel; /**< the channel as on board and ADC module */
115 int adc_in_fp; /**< File Pointer to raw sysfs */
116 int value_bit; /**< 10 bits by default. Can be increased if board */
117 mraa_adv_func_t* advance_func; /**< override function table */
122 * A structure representing a UART device
126 int index; /**< the uart index, as known to the os. */
127 const char* path; /**< the uart device path. */
128 int fd; /**< file descriptor for device. */
129 mraa_adv_func_t* advance_func; /**< override function table */
134 * A structure representing an IIO device
137 int num; /**< IIO device number */
138 char* name; /**< IIO device name */
139 int fp; /**< IIO device in /dev */
140 void (* isr)(char* data); /**< the interupt service request */
141 void *isr_args; /**< args return when interupt service request triggered */
143 pthread_t thread_id; /**< the isr handler thread id */
144 mraa_iio_channel* channels;
149 * A bitfield representing the capabilities of a pin.
153 mraa_boolean_t valid:1; /**< Is the pin valid at all */
154 mraa_boolean_t gpio:1; /**< Is the pin gpio capable */
155 mraa_boolean_t pwm:1; /**< Is the pin pwm capable */
156 mraa_boolean_t fast_gpio:1; /**< Is the pin fast gpio capable */
157 mraa_boolean_t spi:1; /**< Is the pin spi capable */
158 mraa_boolean_t i2c:1; /**< Is the pin i2c capable */
159 mraa_boolean_t aio:1; /**< Is the pin analog input capable */
160 mraa_boolean_t uart:1; /**< Is the pin uart capable */
162 } mraa_pincapabilities_t;
165 * A Structure representing a multiplexer and the required value
169 unsigned int pin; /**< Raw GPIO pin id */
170 unsigned int value; /**< Raw GPIO value */
175 mraa_boolean_t complex_pin:1;
176 mraa_boolean_t output_en:1;
177 mraa_boolean_t output_en_high:1;
178 mraa_boolean_t pullup_en:1;
179 mraa_boolean_t pullup_en_hiz:1;
180 } mraa_pin_cap_complex_t;
184 unsigned int pinmap; /**< sysfs pin */
185 unsigned int parent_id; /** parent chip id */
186 unsigned int mux_total; /** Numfer of muxes needed for operation of pin */
187 mraa_mux_t mux[6]; /** Array holding information about mux */
188 unsigned int output_enable; /** Output Enable GPIO, for level shifting */
189 unsigned int pullup_enable; /** Pull-Up enable GPIO, inputs */
190 mraa_pin_cap_complex_t complex_cap;
196 char mem_dev[32]; /**< Memory device to use /dev/uio0 etc */
197 unsigned int mem_sz; /** Size of memory to map */
198 unsigned int bit_pos; /** Position of value bit */
199 mraa_pin_t gpio; /** GPio context containing none mmap info */
204 * A Structure representing a physical Pin.
208 char name[MRAA_PIN_NAME_SIZE]; /**< Pin's real world name */
209 mraa_pincapabilities_t capabilites; /**< Pin Capabiliites */
210 mraa_pin_t gpio; /**< GPIO structure */
211 mraa_pin_t pwm; /**< PWM structure */
212 mraa_pin_t aio; /**< Anaglog Pin */
213 mraa_mmap_pin_t mmap; /**< GPIO through memory */
214 mraa_pin_t i2c; /**< i2c bus/pin */
215 mraa_pin_t spi; /**< spi bus/pin */
216 mraa_pin_t uart; /**< uart module/pin */
221 * A Structure representing the physical properties of a i2c bus.
225 unsigned int bus_id; /**< ID as exposed in the system */
226 unsigned int scl; /**< i2c SCL */
227 unsigned int sda; /**< i2c SDA */
228 // mraa_drv_api_t drv_type; /**< Driver type */
233 * A Structure representing the physical properties of a spi bus.
237 unsigned int bus_id; /**< The Bus ID as exposed to the system. */
238 unsigned int slave_s; /**< Slave select */
239 mraa_boolean_t three_wire; /**< Is the bus only a three wire system */
240 unsigned int sclk; /**< Serial Clock */
241 unsigned int mosi; /**< Master Out, Slave In. */
242 unsigned int miso; /**< Master In, Slave Out. */
243 unsigned int cs; /**< Chip Select, used when the board is a spi slave */
248 * A Structure representing a uart device.
252 unsigned int index; /**< ID as exposed in the system */
253 int rx; /**< uart rx */
254 int tx; /**< uart tx */
255 const char* device_path; /**< To store "/dev/ttyS1" for example */
260 * A Structure representing a platform/board.
263 typedef struct _board_t {
265 unsigned int phy_pin_count; /**< The Total IO pins on board */
266 unsigned int gpio_count; /**< GPIO Count */
267 unsigned int aio_count; /**< Analog side Count */
268 unsigned int i2c_bus_count; /**< Usable i2c Count */
269 mraa_i2c_bus_t i2c_bus[12]; /**< Array of i2c */
270 unsigned int def_i2c_bus; /**< Position in array of default i2c bus */
271 unsigned int spi_bus_count; /**< Usable spi Count */
272 mraa_spi_bus_t spi_bus[12]; /**< Array of spi */
273 unsigned int def_spi_bus; /**< Position in array of defult spi bus */
274 unsigned int adc_raw; /**< ADC raw bit value */
275 unsigned int adc_supported; /**< ADC supported bit value */
276 unsigned int def_uart_dev; /**< Position in array of defult uart */
277 unsigned int uart_dev_count; /**< Usable spi Count */
278 mraa_uart_dev_t uart_dev[6]; /**< Array of UARTs */
279 mraa_boolean_t no_bus_mux; /**< i2c/spi/adc/pwm/uart bus muxing setup not required */
280 int pwm_default_period; /**< The default PWM period is US */
281 int pwm_max_period; /**< Maximum period in us */
282 int pwm_min_period; /**< Minimum period in us */
283 mraa_platform_t platform_type; /**< Platform type */
284 const char* platform_name; /**< Platform Name pointer */
285 mraa_pininfo_t* pins; /**< Pointer to pin array */
286 mraa_adv_func_t* adv_func; /**< Pointer to advanced function disptach table */
287 struct _board_t* sub_platform; /**< Pointer to sub platform */
288 struct _iio* iio_devices; /**< Pointer to IIO devices */
289 uint8_t iio_device_count; /**< IIO device count */