docs/minnow_max.md

   1 Intel(R) Minnowboard Max               {#minnowmax}
   2 ========================
   3 MinnowBoard MAX is an open hardware embedded board designed with the Intel(R)
   4 Atom(TM) E38xx series SOC (Fromerly Bay Trail).
   5
   6 For product overview and faq see
   7 http://www.minnowboard.org/faq-minnowboard-max/
   8
   9 For technical details see http://www.elinux.org/Minnowboard:MinnowMax
  10
  11 Supported Firmware
  12 ------------------
  13 mraa has only been tested with 64 bit firmware version 0.73 or later.
  14
  15 SPI
  16 ---
  17 For SPI support you need to load the low_speed_spidev kernel module and that
  18 will create the /dev/spidev0.0 device node. Mraa only knows about this one SPI
  19 bus and no other.
  20
  21 Interface notes
  22 ---------------
  23 The low speed I/O connector supported as per table below.  This assumes default
  24 BIOS settings, as they are not dynamcially detected If any changes are mode
  25 (Device Manager -> System Setup -> South Cluster -> LPSS & CSS) them mraa calls
  26 will not behave as expected.
  27
  28 Documentation shows i2c on bus #5, ACPI shows it on bus #6, but driver uses
  29 bus #7.
  30
  31 | MRAA Number | Physical Pin  | Function   | Sysfs GPIO | Notes                |
  32 |-------------|---------------|------------|------------|----------------------|
  33 | 1           | 1             | GND        |            |                      |
  34 | 2           | 2             | GND        |            |                      |
  35 | 3           | 3             | 5v         |            |                      |
  36 | 4           | 4             | 3.3v       |            |                      |
  37 | 5           | 5             | SPI_CS     | 220        | SPI (not supported)  |
  38 | 6           | 6             | UART1_TXD  | 225        | UART1                |
  39 | 7           | 7             | SPI_MISO   | 221        | SPI (not supported)  |
  40 | 8           | 8             | UART1_RXD  | 224        | UART1                |
  41 | 9           | 9             | SPI_MOSI   | 222        | SPI (not supported)  |
  42 | 10          | 10            | UART1_CTS  | 227        | GPIO                 |
  43 | 11          | 11            | SPI_CLK    | 223        | SPI (not supported)  |
  44 | 12          | 12            | UART1_RTS  | 226        | GPIO                 |
  45 | 13          | 13            | I2C_SCL    | 243        | /dev/i2c-7           |
  46 | 14          | 14            | I2S_CLK    | 216        | GPIO                 |
  47 | 15          | 15            | I2C_SDA    | 242        | /dev/i2c-7           |
  48 | 16          | 16            | I2S_FRM    | 217        | GPIO                 |
  49 | 17          | 17            | UART2_TXD  | 229        | UART2                |
  50 | 18          | 18            | I2S_DO     | 219        | GPIO                 |
  51 | 19          | 19            | UART2_RXD  | 228        | UART2                |
  52 | 20          | 20            | I2S_DI     | 218        | GPIO                 |
  53 | 21          | 21            | GPIO_S5_0  |  82        | GPIO                 |
  54 | 22          | 22            | PWM0       | 248        | PWM Chip 0 Channel 0 |
  55 | 23          | 23            | GPIO_S5_1  |  83        | GPIO                 |
  56 | 24          | 24            | PWM1       | 249        | PWM Chip 1 Channel 0 |
  57 | 25          | 25            | S5_4       |  84        | GPIO                 |
  58 | 26          | 26            | IBL_8254   | 208        | GPIO                 |