andy.hu [Fri, 6 Jan 2023 06:08:13 +0000 (06:08 +0000)]
Merge branch 'CR_2828_perf_support_minda' into 'jh7110-5.15.y-devel'
CR_2828 add perf_patch
See merge request sdk/linux!641
minda.chen [Wed, 7 Dec 2022 09:49:23 +0000 (17:49 +0800)]
dts: configs: add perf events config
add 7110 perf support
Signed-off-by: minda.chen <minda.chen@starfivetech.com>
João Mário Domingos [Tue, 16 Nov 2021 15:48:12 +0000 (15:48 +0000)]
RISC-V: Added HiFive Unmatched PMU events
This patch contains all the available events for the HiFive Unmatched performance monitoring unit.
Depends on patch [3], for the base mapfile.csv file.
Signed-off-by: João Mário Domingos <joao.mario@tecnico.ulisboa.pt>
João Mário Domingos [Tue, 16 Nov 2021 15:48:11 +0000 (15:48 +0000)]
RISC-V: Added generic pmu-events mapfile
The pmu-events now supports custom events for RISC-V, plus the cycle,
time and instret events were defined.
Signed-off-by: João Mário Domingos <joao.mario@tecnico.ulisboa.pt>
João Mário Domingos [Tue, 16 Nov 2021 15:48:10 +0000 (15:48 +0000)]
RISC-V: Support CPUID for risc-v in perf
This patch creates the header.c file for the risc-v architecture and introduces support for
PMU identification through sysfs.
It is now possible to configure pmu-events in risc-v.
Depends on patch [1], that introduces the id sysfs file.
Signed-off-by: João Mário Domingos <joao.mario@tecnico.ulisboa.pt>
Signed-off-by: minda.chen <minda.chen@starfivetech.com>
João Mário Domingos [Tue, 16 Nov 2021 15:48:09 +0000 (15:48 +0000)]
RISC-V: Create unique identification for SoC PMU
The SBI PMU platform driver did not provide any identification for
perf events matching. This patch introduces a new sysfs file inside the
platform device (soc:pmu/id) for pmu identification.
The identification is a 64-bit value generated as:
[63-32]: mvendorid;
[31]: marchid[MSB];
[30-16]: marchid[15-0];
[15-0]: mimpid[15MSBs];
The CSRs are detailed in the RISC-V privileged spec [1].
The marchid is split in MSB + 15LSBs, due to the MSB being used for
open-source architecture identification.
[1] https://github.com/riscv/riscv-isa-manual
Signed-off-by: João Mário Domingos <joao.mario@tecnico.ulisboa.pt>
Atish Patra [Wed, 8 Sep 2021 20:01:07 +0000 (13:01 -0700)]
MAINTAINERS: Add entry for RISC-V PMU drivers
Add myself and Anup as maintainer for RISC-V PMU drivers.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Atish Patra [Wed, 26 May 2021 00:51:35 +0000 (17:51 -0700)]
Documentation: riscv: Remove the old documentation
The existing pmu documentation describes the limitation of perf
infrastructure in RISC-V ISA and limited feature set of perf in RISC-V.
However, SBI PMU extension and sscofpmf extension(ISA extension) allows to
implement most of the required features of perf. Remove the old
documentation which is not accurate anymore.
Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Atish Patra [Fri, 27 Aug 2021 22:03:43 +0000 (15:03 -0700)]
RISC-V: Add sscofpmf extension support
The sscofpmf extension allows counter overflow and filtering for
programmable counters. Enable the perf driver to handle the overflow
interrupt. The overflow interrupt is a hart local interrupt.
Thus, per cpu overflow interrupts are setup as a child under the root
INTC irq domain.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Atish Patra [Thu, 24 Mar 2022 08:20:57 +0000 (16:20 +0800)]
RISC-V: Improve /proc/cpuinfo output for ISA extensions
Currently, the /proc/cpuinfo outputs the entire riscv,isa string which
is not ideal when we have multiple ISA extensions present in the ISA
string. Some of them may not be enabled in kernel as well.
Parse only the enabled ISA extension and print them in a separate row.
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Atish Patra [Wed, 9 Feb 2022 07:46:07 +0000 (23:46 -0800)]
RISC-V: Do no continue isa string parsing without correct XLEN
The isa string should begin with either rv64 or rv32. Otherwise, it is
an incorrect isa string. Currently, the string parsing continues even if
it doesnot begin with current XLEN.
Fix this by checking if it found "rv64" or "rv32" in the beginning.
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Atish Patra [Tue, 8 Feb 2022 22:58:38 +0000 (14:58 -0800)]
RISC-V: Implement multi-letter ISA extension probing framework
Multi-letter extensions can be probed using exising
riscv_isa_extension_available API now. It doesn't support versioning
right now as there is no use case for it.
Individual extension specific implementation will be added during
each extension support.
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Tsukasa OI [Sat, 12 Feb 2022 06:30:01 +0000 (15:30 +0900)]
RISC-V: Extract multi-letter extension names from "riscv, isa"
Currently, there is no usage for version numbers in extensions as
any ratified non base ISA extension will always at v1.0.
Extract the extension names in place for future parsing.
Tested-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Tsukasa OI <research_trasio@irq.a4lg.com>
[Improved commit text and comments]
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Tsukasa OI [Sat, 12 Feb 2022 06:30:00 +0000 (15:30 +0900)]
RISC-V: Minimal parser for "riscv, isa" strings
Current hart ISA ("riscv,isa") parser don't correctly parse:
1. Multi-letter extensions
2. Version numbers
All ISA extensions ratified recently has multi-letter extensions
(except 'H'). The current "riscv,isa" parser that is easily confused
by multi-letter extensions and "p" in version numbers can be a huge
problem for adding new extensions through the device tree.
Leaving it would create incompatible hacks and would make "riscv,isa"
value unreliable.
This commit implements minimal parser for "riscv,isa" strings. With this,
we can safely ignore multi-letter extensions and version numbers.
[Improved commit text and fixed a bug around 's' in base extension]
Signed-off-by: Atish Patra <atishp@rivosinc.com>
[Fixed workaround for QEMU]
Signed-off-by: Tsukasa OI <research_trasio@irq.a4lg.com>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Tsukasa OI [Sat, 12 Feb 2022 06:29:59 +0000 (15:29 +0900)]
RISC-V: Correctly print supported extensions
This commit replaces BITS_PER_LONG with number of alphabet letters.
Current ISA pretty-printing code expects extension 'a' (bit 0) through
'z' (bit 25). Although bit 26 and higher is not currently used (thus never
cause an issue in practice), it will be an annoying problem if we start to
use those in the future.
This commit disables printing high bits for now.
Reviewed-by: Anup Patel <anup@brainfault.org>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Tsukasa OI <research_trasio@irq.a4lg.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Atish Patra [Wed, 17 Mar 2021 23:54:14 +0000 (16:54 -0700)]
RISC-V: Add perf platform driver based on SBI PMU extension
RISC-V SBI specification added a PMU extension that allows to configure
start/stop any pmu counter. The RISC-V perf can use most of the generic
perf features except interrupt overflow and event filtering based on
privilege mode which will be added in future.
It also allows to monitor a handful of firmware counters that can provide
insights into firmware activity during a performance analysis.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Atish Patra [Thu, 24 Mar 2022 09:04:38 +0000 (17:04 +0800)]
RISC-V: Add RISC-V SBI PMU extension definitions
This patch adds all the definitions defined by the SBI PMU extension.
Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Atish Patra [Wed, 17 Mar 2021 23:31:46 +0000 (16:31 -0700)]
RISC-V: Add a simple platform driver for RISC-V legacy perf
The old RISC-V perf implementation allowed counting of only
cycle/instruction counters using perf. Restore that feature by implementing
a simple platform driver under a separate config to provide backward
compatibility. Any existing software stack will continue to work as it is.
However, it provides an easy way out in future where we can remove the
legacy driver.
Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Atish Patra [Wed, 17 Mar 2021 23:18:17 +0000 (16:18 -0700)]
RISC-V: Add a perf core library for pmu drivers
Implement a perf core library that can support all the essential perf
features in future. It can also accommodate any type of PMU implementation
in future. Currently, both SBI based perf driver and legacy driver
implemented uses the library. Most of the common perf functionalities
are kept in this core library wile PMU specific driver can implement PMU
specific features. For example, the SBI specific functionality will be
implemented in the SBI specific driver.
Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Atish Patra [Wed, 17 Mar 2021 22:52:47 +0000 (15:52 -0700)]
RISC-V: Add CSR encodings for all HPMCOUNTERS
Linux kernel can directly read these counters as the HPMCOUNTERS CSRs are
accessible in S-mode.
Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Atish Patra [Wed, 17 Mar 2021 22:36:30 +0000 (15:36 -0700)]
RISC-V: Remove the current perf implementation
The current perf implementation in RISC-V is not very useful as it can not
count any events other than cycle/instructions. Moreover, perf record
can not be used or the events can not be started or stopped.
Remove the implementation now for a better platform driver in future
that will implement most of the missing functionality.
Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
andy.hu [Thu, 29 Dec 2022 04:29:17 +0000 (04:29 +0000)]
Merge branch 'CR_2861_ts_515_changhuang.liang' into 'jh7110-5.15.y-devel'
CR_2861_ts_515_changhuang.liang input: touchscreen: Add tinker_ft5406 driver support
See merge request sdk/linux!654
andy.hu [Thu, 29 Dec 2022 03:12:40 +0000 (03:12 +0000)]
Merge branch 'CR_2933_MMC_515_william.qiu' into 'jh7110-5.15.y-devel'
CR_2933_515 riscv: dts: mmc: delete mmc1 config
See merge request sdk/linux!651
andy.hu [Thu, 29 Dec 2022 03:11:05 +0000 (03:11 +0000)]
Merge branch 'CR_2951_515_ac101_compile_Xingyu.Wu' into 'jh7110-5.15.y-devel'
CR_2951_515_ac101_compile_Xingyu.Wu
See merge request sdk/linux!655
Changhuang Liang [Thu, 22 Dec 2022 08:07:23 +0000 (16:07 +0800)]
input: touchscreen: tinker_ft5406: Fixed show more error log bug
Fixed show more error log bug when not attach the touchscreen.
Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
Changhuang Liang [Thu, 22 Dec 2022 02:59:23 +0000 (10:59 +0800)]
riscv: defconfig: Enable touchscreen
Enable touchscreen TINKER FT5406
Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
Xingyu Wu [Thu, 22 Dec 2022 07:00:48 +0000 (15:00 +0800)]
sound: codecs: ac101: Fixed warning when compiling
Removed the useless part and fixed warning.
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
Changhuang Liang [Thu, 22 Dec 2022 02:57:08 +0000 (10:57 +0800)]
riscv: dts: starfive: Add tinker_ft5406 touchscreen node
Add tinker_ft5406 touchscreen node.
Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
Changhuang Liang [Thu, 22 Dec 2022 02:31:15 +0000 (10:31 +0800)]
input: touchscreen: tinker_ft5406: Add open&close ioctl
Add open&close ioctl.
Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
Changhuang Liang [Wed, 21 Dec 2022 08:20:04 +0000 (16:20 +0800)]
input: touchscreen: Add tinker_ft5406 driver support
Add tinker_ft5406 driver support
Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
William Qiu [Tue, 20 Dec 2022 10:56:59 +0000 (18:56 +0800)]
riscv: dts: mmc: delete mmc1 config
delete mmc1 config, default use mmc0
Signed-off-by: William Qiu <william.qiu@starfivetech.com>
andy.hu [Mon, 19 Dec 2022 04:02:54 +0000 (04:02 +0000)]
Merge branch 'CR_2868_515_evb_rgb2hdmi_shengyang.chen' into 'jh7110-5.15.y-devel'
CR_2868: riscv: linux: vout: fix rgb2hdmi display problem
See merge request sdk/linux!639
andy.hu [Mon, 19 Dec 2022 04:00:26 +0000 (04:00 +0000)]
Merge branch 'CR_2069_515_evb_cusor_keith.zhao' into 'jh7110-5.15.y-devel'
CR_2069: riscv: linux: vout: fix cusor problem
See merge request sdk/linux!647
andy.hu [Mon, 19 Dec 2022 03:55:01 +0000 (03:55 +0000)]
Merge branch 'CR_2888_515_clocktree_pll0_Xingyu.Wu' into 'jh7110-5.15.y-devel'
CR_2888_515_clocktree_pll0_Xingyu.Wu
See merge request sdk/linux!644
andy.hu [Mon, 19 Dec 2022 03:52:06 +0000 (03:52 +0000)]
Merge branch 'CR_2871_MMC_515_william.qiu' into 'jh7110-5.15.y-devel'
CR_2871riscv: dts: mmc:modify mmc1 config
See merge request sdk/linux!643
andy.hu [Mon, 19 Dec 2022 03:49:44 +0000 (03:49 +0000)]
Merge branch 'CR_2865_RNG_jiajie.ho' into 'jh7110-5.15.y-devel'
CR_2865: hwrng: Reworked driver for speed performance and efficiency
See merge request sdk/linux!640
shengyang.chen [Fri, 16 Dec 2022 08:15:39 +0000 (16:15 +0800)]
riscv: linux: vout: fix cusor problem
fix cusor bluring problem of debian
Signed-off-by: keith <keith.zhao@starfivetech.com>
William Qiu [Thu, 15 Dec 2022 09:03:28 +0000 (17:03 +0800)]
riscv: dts: mmc:modify mmc1 config
modify mmc1 config
Signed-off-by: William Qiu <william.qiu@starfivetech.com>
Xingyu Wu [Thu, 15 Dec 2022 06:48:40 +0000 (14:48 +0800)]
clk: starfive: pll: Remove high frequency of PLL0
Remove high frequency of PLL0 and make sure PLL0 max frequency is 1.5GHz.
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
Xingyu Wu [Thu, 15 Dec 2022 06:17:59 +0000 (14:17 +0800)]
clk: starfive: Change divider value of cpu_core clock
Change divider value to make sure the frequency is half of PLL0.
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
Jia Jie Ho [Wed, 14 Dec 2022 06:14:39 +0000 (14:14 +0800)]
CR_2865: hwrng: Reworked driver for speed performance and efficiency
Changes:
1. Reseed during init only, not for every read.
2. Completion struct for irqreturn for better efficiency.
3. Add module_param for reseed operations based on request counter
and/or timer countdown.
4. Removed unused macros and steps.
Signed-off-by: Jia Jie Ho <jiajie.ho@starfivetech.com>
shengyang.chen [Wed, 14 Dec 2022 02:46:19 +0000 (10:46 +0800)]
riscv: linux: vout: fix rgb2hdmi display problem
fix problem of rgb2hdmi without display in first test
Signed-off-by: shengyang.chen<shengyang.chen@starfivetech.com>
andy.hu [Fri, 9 Dec 2022 04:49:48 +0000 (04:49 +0000)]
Merge branch 'CR_2822_PCIE_Kevin.xie' into 'jh7110-5.15.y-devel'
CR 2822 riscv: configs: Add port bus driver for PCIe switch.
See merge request sdk/linux!633
andy.hu [Fri, 9 Dec 2022 04:46:38 +0000 (04:46 +0000)]
Merge branch 'CR_2796_515_sound_card_Xingyu.Wu' into 'jh7110-5.15.y-devel'
CR_2796_515_sound_card_Xingyu.Wu
See merge request sdk/linux!631
andy.hu [Fri, 9 Dec 2022 04:45:04 +0000 (04:45 +0000)]
Merge branch 'CR_2789_refresh_uboot/spl_under_kernel_5.15_ziv.xu' into 'jh7110-5.15.y-devel'
CR_2789_refresh_uboot/spl_under_kernel_5.15_ziv.xu
See merge request sdk/linux!635
Xingyu Wu [Tue, 22 Nov 2022 03:42:34 +0000 (11:42 +0800)]
sound:starfive:Move playback and capture driver as slave to starfive I2S
Move playback and capture driver as slave from snps I2S merge to starfive I2S.
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
ziv.xu [Fri, 2 Dec 2022 09:26:19 +0000 (17:26 +0800)]
riscv:jh7110.dtsi: add uboot and spl partition on qspi node
add uboot and spl partition on qspi node
Signed-off-by: ziv.xu <ziv.xu@starfive.com>
Kevin.xie [Wed, 7 Dec 2022 06:20:16 +0000 (14:20 +0800)]
riscv: configs: Add port bus driver for PCIe switch.
Verified on JH7110EVB with ASMedia EV Board (asm1806 version).
Signed-off-by: Kevin.xie <kevin.xie@starfivetech.com>
Xingyu Wu [Tue, 6 Dec 2022 03:19:51 +0000 (11:19 +0800)]
riscv: dts: starfive: jh7110: Add multiple sound cards
Add multiple sound cards to let one device corresponds to
one sound card.
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
Andy Hu [Tue, 6 Dec 2022 10:43:31 +0000 (18:43 +0800)]
e24: xrp: remove from Kconfig and Makefile
since run git filter-repo, then need to remove from Kconfig and
Makefile
Signed-off-by: Andy Hu <andy.hu@starfivetech.com>
andy.hu [Thu, 1 Dec 2022 10:52:21 +0000 (10:52 +0000)]
Merge branch 'CR_2650_PWM_hal.feng' into 'jh7110-5.15.y-devel'
CR 2650 PWM hal.feng
See merge request sdk/linux!626
andy.hu [Thu, 1 Dec 2022 10:37:13 +0000 (10:37 +0000)]
Merge branch 'CR_2653_QSPI_5.15_ziv.xu' into 'jh7110-5.15.y-devel'
CR 2653 QSPI 5.15 ziv.xu
See merge request sdk/linux!612
andy.hu [Thu, 1 Dec 2022 10:35:43 +0000 (10:35 +0000)]
Merge branch 'CR_2752_CPUfreq_515_mason.huo' into 'jh7110-5.15.y-devel'
CR_2752 riscv: dts: Change cpu vdd per stress test
See merge request sdk/linux!624
Hal Feng [Wed, 30 Nov 2022 07:15:11 +0000 (15:15 +0800)]
pwm: starfive: Use pm_runtime functions to disable clock when the device being removed
So this can avoid disabling the pwm clock again when
the pwm device is suspended and being removed.
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
mason.huo [Mon, 28 Nov 2022 01:14:51 +0000 (09:14 +0800)]
riscv: dts: Change cpu vdd per stress test
andy.hu [Fri, 25 Nov 2022 12:56:08 +0000 (12:56 +0000)]
Merge branch 'CR_2651_spi_dtbo_reload_faild_5.15_ziv.xu' into 'jh7110-5.15.y-devel'
CR_2651_spi_dtbo_reload_faild_5.15_ziv.xu
See merge request sdk/linux!619
andy.hu [Fri, 25 Nov 2022 10:31:21 +0000 (10:31 +0000)]
Merge branch 'CR_2463_PCIE_Kevin.xie' into 'jh7110-5.15.y-devel'
CR 2463 drivers: nvme: Add precheck and delay for CQE pending status.
See merge request sdk/linux!621
Kevin.xie [Thu, 24 Nov 2022 08:59:12 +0000 (16:59 +0800)]
drivers: nvme: Add precheck and delay for CQE pending status.
To workaroud the NVMe I/O timeout problem in bootup S10udev case
which caused by the CQE update lantancy.
Signed-off-by: Kevin.xie <kevin.xie@starfivetech.com>
ziv.xu [Wed, 23 Nov 2022 06:53:58 +0000 (14:53 +0800)]
spi-pl022-starfive:fix the problem of spi overlay reload
fix the problem of spi overlay reload
Signed-off-by: ziv.xu <ziv.xu@starfive.com>
ziv.xu [Tue, 15 Nov 2022 01:50:09 +0000 (09:50 +0800)]
driver:spi-cadence-quadspi: enable qspi
enable qspi
Signed-off-by: ziv.xu <ziv.xu@starfive.com>
andy.hu [Thu, 17 Nov 2022 09:18:17 +0000 (09:18 +0000)]
Merge branch 'CR_2429_spi_error_of_freq-5.15_ziv.xu' into 'jh7110-5.15.y-devel'
CR 2429 spi error of freq 5.15 ziv.xu
See merge request sdk/linux!603
andy.hu [Thu, 17 Nov 2022 09:12:03 +0000 (09:12 +0000)]
Merge branch 'CR_2661_V4L2_Kevin.xie' into 'jh7110-5.15.y-devel'
CR 2661 v4l2_driver: vin: Add skip frames for isp control.
See merge request sdk/linux!610
andy.hu [Thu, 17 Nov 2022 09:08:34 +0000 (09:08 +0000)]
Merge branch 'CR_2434_imx219_515_changhuang.liang' into 'jh7110-5.15.y-devel'
CR_2434_imx219_515_changhuang.liang media: v4l2_driver: Supplement the missing runtime pm get ops on more than once stream_on cases.
See merge request sdk/linux!595
andy.hu [Thu, 17 Nov 2022 07:10:11 +0000 (07:10 +0000)]
Merge branch 'CR_2642_PCIe_Kevin.xie' into 'jh7110-5.15.y-devel'
CR 2642 drivers: pci: Set PCIe PCI standard configuration ID.
See merge request sdk/linux!613
andy.hu [Thu, 17 Nov 2022 07:02:36 +0000 (07:02 +0000)]
Merge branch 'CR_2583_fix_usb_resume_hub_minda' into 'jh7110-5.15.y-devel'
CR_2583 USB: core: Fix bug in resuming hub's handling of wakeup requests
See merge request sdk/linux!600
andy.hu [Thu, 17 Nov 2022 06:53:09 +0000 (06:53 +0000)]
Merge branch 'CR_2588_515_watchdog_timeleft_Xingyu.Wu' into 'jh7110-5.15.y-devel'
CR_2588_515_watchdog_timeleft_Xingyu.Wu
See merge request sdk/linux!597
andy.hu [Thu, 17 Nov 2022 06:51:07 +0000 (06:51 +0000)]
Merge branch 'CR_2621_CPUIDLE_mason.huo' into 'jh7110-5.15.y-devel'
CR_2621 riscv: dts: Remove unsupported cpuidle state
See merge request sdk/linux!608
andy.hu [Thu, 17 Nov 2022 06:48:28 +0000 (06:48 +0000)]
Merge branch 'CR_2435_hibernation-for-main_5.15_vout_shengyang.chen' into 'jh7110-5.15.y-devel'
CR_2435: clk:starfive:vout:Add runtime and system pm && riscv:linux:drm: Add runtime and system pm
See merge request sdk/linux!596
Kevin.xie [Tue, 15 Nov 2022 09:27:32 +0000 (17:27 +0800)]
drivers: pci: Set PCIe PCI standard configuration ID.
Class - PCI-to-PCI bridge.
Revision - 2.
Signed-off-by: Kevin.xie <kevin.xie@starfivetech.com>
Kevin.xie [Tue, 15 Nov 2022 06:04:20 +0000 (14:04 +0800)]
v4l2_driver: vin: Add skip frames for isp control.
The duration of extra isp control skip frames are fixed to 1 second.
Signed-off-by: Kevin.xie <kevin.xie@starfivetech.com>
ziv.xu [Tue, 15 Nov 2022 08:06:06 +0000 (16:06 +0800)]
starfive:defconfig: modify defconfig to enable qspi
modify defconfig to enable qspi
Signed-off-by: ziv.xu <ziv.xu@starfive.com>
Xingyu Wu [Thu, 10 Nov 2022 09:02:38 +0000 (17:02 +0800)]
drm:verisilicon:hdmi-audio:Adjust when to configure registers
Adjust when to configure registers before HDMI suspend.
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
Xingyu Wu [Tue, 8 Nov 2022 14:04:07 +0000 (22:04 +0800)]
dma:dw:Add stg_axi clock and reset of noc_bus
Add 'JH7110_NOC_BUS_CLK_STG_AXI' clock and
'RSTN_U0_NOC_BUS_STG_AXI_N' reset.
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
shengyang.chen [Wed, 9 Nov 2022 02:15:19 +0000 (10:15 +0800)]
riscv:linux:drm : fix vout pm bug
fix display problem of hdmi sys pm
Signed-off-by: shengyang.chen<shengyang.chen@starfivetech.com>
shengyang.chen [Fri, 4 Nov 2022 10:17:52 +0000 (18:17 +0800)]
riscv:linux:drm: fix double display bug
fix double display bug
Signed-off-by: shengyang.chen<shengyang.chen@starfivetech.com>
shengyang.chen [Fri, 4 Nov 2022 10:17:06 +0000 (18:17 +0800)]
linux:dts:starfive: remove some useless port of vout dts
fix double display bug
remove some useless port of vout dts
Signed-off-by: shengyang.chen<shengyang.chen@starfivetech.com>
shengyang.chen [Wed, 2 Nov 2022 03:35:47 +0000 (11:35 +0800)]
riscv:linux:drm: Add basic runtime and system pm support for vout
Add basic runtime and system pm support for vout
remove some useless clk/rst function and calling in vs_dc.c
improve vout driver structure
Signed-off-by: shengyang.chen<shengyang.chen@starfivetech.com>
shengyang.chen [Wed, 2 Nov 2022 03:34:32 +0000 (11:34 +0800)]
linux:dts:starfive: Add pm support for vout dts
Add pm support for vout dts
remove some useless port of vout dts
Signed-off-by: shengyang.chen<shengyang.chen@starfivetech.com>
Xingyu Wu [Tue, 8 Nov 2022 13:53:31 +0000 (21:53 +0800)]
clk:starfive:vout:Add parent about disp_apb clk
Clock "u0_pclk_mux_func_pclk" is the parent of "disp_apb" clock.
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
Xingyu Wu [Wed, 19 Oct 2022 09:06:17 +0000 (17:06 +0800)]
clk:starfive:vout:Add runtime and system pm
Add runtime and system pm in vout clock tree driver.
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
ziv.xu [Thu, 10 Nov 2022 08:13:19 +0000 (16:13 +0800)]
spi-pl022-starfive.c: prompt warning when frequency does not surpport
prompt warning when frequency does not surpport
Signed-off-by: ziv.xu <ziv.xu@starfive.com>
mason.huo [Fri, 11 Nov 2022 02:13:04 +0000 (10:13 +0800)]
riscv: dts: Remove unsupported cpuidle state
The cpuidle state1 is also implemented in sbi with
WFI C state, but it cause audio play failed.
Remove the cpuidle state1.
Signed-off-by: mason.huo <mason.huo@starfivetech.com>
Alan Stern [Sat, 1 Jan 2022 19:52:14 +0000 (14:52 -0500)]
USB: core: Fix bug in resuming hub's handling of wakeup requests
Bugzilla #213839 reports a 7-port hub that doesn't work properly when
devices are plugged into some of the ports; the kernel goes into an
unending disconnect/reinitialize loop as shown in the bug report.
This "7-port hub" comprises two four-port hubs with one plugged into
the other; the failures occur when a device is plugged into one of the
downstream hub's ports. (These hubs have other problems too. For
example, they bill themselves as USB-2.0 compliant but they only run
at full speed.)
It turns out that the failures are caused by bugs in both the kernel
and the hub. The hub's bug is that it reports a different
bmAttributes value in its configuration descriptor following a remote
wakeup (0xe0 before, 0xc0 after -- the wakeup-support bit has
changed).
The kernel's bug is inside the hub driver's resume handler. When
hub_activate() sees that one of the hub's downstream ports got a
wakeup request from a child device, it notes this fact by setting the
corresponding bit in the hub->change_bits variable. But this variable
is meant for connection changes, not wakeup events; setting it causes
the driver to believe the downstream port has been disconnected and
then connected again (in addition to having received a wakeup
request).
Because of this, the hub driver then tries to check whether the device
currently plugged into the downstream port is the same as the device
that had been attached there before. Normally this check succeeds and
wakeup handling continues with no harm done (which is why the bug
remained undetected until now). But with these dodgy hubs, the check
fails because the config descriptor has changed. This causes the hub
driver to reinitialize the child device, leading to the
disconnect/reinitialize loop described in the bug report.
The proper way to note reception of a downstream wakeup request is
to set a bit in the hub->event_bits variable instead of
hub->change_bits. That way the hub driver will realize that something
has happened to the port but will not think the port and child device
have been disconnected. This patch makes that change.
Cc: <stable@vger.kernel.org>
Tested-by: Jonathan McDowell <noodles@earth.li>
Signed-off-by: Alan Stern <stern@rowland.harvard.edu>
Link: https://lore.kernel.org/r/YdCw7nSfWYPKWQoD@rowland.harvard.edu
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: minda.chen <minda.chen@starfivetech.com>
Xingyu Wu [Wed, 9 Nov 2022 06:34:14 +0000 (14:34 +0800)]
watchdog: starfive: Get timeleft correctly
Use flag to count timeleft and the flag is base on
reading register instead of interrupt handler function.
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
andy.hu [Wed, 9 Nov 2022 11:22:58 +0000 (11:22 +0000)]
Merge branch 'CR_2553_ytphy_515_samin.guo' into 'jh7110-5.15.y-devel'
CR_2553: 515: Use ytphy_link_change_notify to detect link changes by yt8521/YT8531.
See merge request sdk/linux!592
Samin Guo [Fri, 4 Nov 2022 01:42:40 +0000 (09:42 +0800)]
net:phy:motorcomm: Fix the problem that phytool cannot be used by YT8531
phy_read_status should not judge the auto negotiation speed, which
will cause 0x1e to be frequently modified.
JH7110B In different speed modes, the tx_inverted needs to be
dynamically updated to match the timming.
known issue:
Function yt8521_read_status, it will be executed once per second.
Can read and write ext reg (0xa001/a002/a003). This may causes the ext value
read by the phytool always is 0.
$ phytool write eth0/0/0x1e 0xa001
$ phytool read eth0/0/0x1f
0000
To avoid this problem, you can read 0x1f as fast as possible after
writing 0x1e.
$ phytool write eth0/0/0x1e 0xa001; phytool read eth0/0/0x1f
0x8160
Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
Kevin.xie [Tue, 8 Nov 2022 08:37:45 +0000 (16:37 +0800)]
media: v4l2_driver: Supplement the missing runtime pm get ops on more than once stream_on cases.
For example, if we run stf_isp_ctrl & v4l2test at the same time,
s_stream for sensor will be called twice,
so that rpm should be got twice too.
Signed-off-by: Kevin.xie <kevin.xie@starfivetech.com>
andy.hu [Wed, 2 Nov 2022 09:52:16 +0000 (09:52 +0000)]
Merge branch 'CR_2517_sec_jiajie.ho' into 'jh7110-5.15.y-devel'
CR_2517_515:crypto:starfive: Fix "Unbalanced pm_runtime_enable!" warning
See merge request sdk/linux!583
andy.hu [Wed, 2 Nov 2022 09:45:57 +0000 (09:45 +0000)]
Merge branch 'CR_2522_ECO_EVB_515_samin.guo' into 'jh7110-5.15.y-devel'
CR_2522:support gmac with jh7110B-evb
See merge request sdk/linux!585
andy.hu [Wed, 2 Nov 2022 09:40:20 +0000 (09:40 +0000)]
Merge branch 'CR_2395_I2C_hal.feng' into 'jh7110-5.15.y-devel'
CR_2395_I2C_hal.feng
See merge request sdk/linux!581
andy.hu [Wed, 2 Nov 2022 09:37:53 +0000 (09:37 +0000)]
Merge branch 'CR_2498_spi_without_dma_devel_5.15_ziv.xu' into 'jh7110-5.15.y-devel'
CR 2498 spi without dma devel 5.15 ziv.xu
See merge request sdk/linux!582
Samin Guo [Tue, 1 Nov 2022 12:09:36 +0000 (20:09 +0800)]
dts:satrfive:jh7110: default support jh7110A gmac0
default support jh7110A gmac0
Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
Samin Guo [Tue, 1 Nov 2022 12:04:52 +0000 (20:04 +0800)]
net:phy:motorcomm: support yt8521 inverted
jh7110B need yt8521 inverted.
Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
Samin Guo [Tue, 1 Nov 2022 11:03:46 +0000 (19:03 +0800)]
net:phy:motorcomm: support modifying RGMII_TX_CLK delay train from dts
support use original or inverted RGMII_TX_CLK delay train.
10M/100M/1000M can be configured independently.
tx_inverted_xx = val;
for example:
&gmac0 {
#address-cells = <1>;
#size-cells = <0>;
phy0: ethernet-phy@0 {
tx_inverted_10 = <0>;
tx_inverted_100 = <1>;
tx_inverted_1000 = <1>;
};
};
0: original (default)
1: inverted
Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
Jia Jie Ho [Tue, 1 Nov 2022 06:40:42 +0000 (14:40 +0800)]
CR_2517:crypto:starfive: Fix "Unbalanced pm_runtime_enable!" warning
Crypto driver will probe multiple times waiting for
DMA to be ready, each time calling pm_runtime_enable().
Only call pm_runtime_enable() when it's not already enabled.
Signed-off-by: Jia Jie Ho <jiajie.ho@starfivetech.com>
ziv.xu [Tue, 1 Nov 2022 06:12:21 +0000 (14:12 +0800)]
spi-pl022-starfive.c: make spi work without dma
make spi work without dma
Signed-off-by: ziv.xu <ziv.xu@starfive.com>
Hal Feng [Mon, 31 Oct 2022 05:52:18 +0000 (13:52 +0800)]
clk: starfive: Keep the clock apb0 enabled always
This solves crush problem of i2c runtime pm and
prevents some aon modules from working abnormally.
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Hal Feng [Mon, 31 Oct 2022 05:46:12 +0000 (13:46 +0800)]
Revert "i2c: designware: Descend startup priority"
This reverts commit
ef0fec210073c298598ab9a27e362e002dc0bf0b.
Then we keep the clock apb0 enabled always to fix crush
problem of i2c runtime pm.
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
andy.hu [Fri, 28 Oct 2022 03:39:02 +0000 (03:39 +0000)]
Merge branch 'CR_2412_515_Clocktree_PLL1_Xingyu.Wu' into 'jh7110-5.15.y-devel'
CR_2412_515_Clocktree_PLL1_Xingyu.Wu
See merge request sdk/linux!553
andy.hu [Fri, 28 Oct 2022 03:38:26 +0000 (03:38 +0000)]
Merge branch 'CR_2440_515_Clocktree_1.5G_Xingyu.Wu' into 'jh7110-5.15.y-devel'
CR_2440_515_Clocktree_1.5G_Xingyu.Wu
See merge request sdk/linux!564