Siva Durga Prasad Paladugu [Wed, 21 Sep 2016 06:15:05 +0000 (11:45 +0530)]
ARM64: zynqmp: Add support for SD1 with level shifters bootmode
Add support for SD1 with level shifters bootmode.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 1 Sep 2016 09:27:32 +0000 (11:27 +0200)]
ARM64: zynqmp: Record board name as serial number for DFU/FASTBOOT
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Soren Brinkmann [Thu, 29 Sep 2016 18:44:41 +0000 (11:44 -0700)]
ARM64: zynqmp: Adjust to new SMC interface to get silicon version
The new FW interface returns the IDCODE and version register, leaving
extracting bitfields to the caller.
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Tue, 18 Oct 2016 14:10:25 +0000 (16:10 +0200)]
ARM: zynq: Add support for Zynq 7000S 7007s/7012s/7014s devices
Zynq 7000S (Single A9 core) devices is using different ID code.
This patch adds this new codes and assign them.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Siva Durga Prasad Paladugu [Mon, 16 May 2016 10:01:38 +0000 (15:31 +0530)]
net: zynq_gem: Correct SGMII enable bit setting
Correct the SGMII enable bit position to 27 instead
of 31.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Siva Durga Prasad Paladugu [Mon, 16 May 2016 10:01:37 +0000 (15:31 +0530)]
net: zynq_gem: Modify the nwcfg bit definitions
Modify the nwcfg bit definitions to have 32-bit
by removing the extra nibble.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Siva Durga Prasad Paladugu [Thu, 25 Aug 2016 10:30:04 +0000 (16:00 +0530)]
nand: arasan_nfc: Clear ecc on bit while sending read command
Clear ecc ON bit while sending read command as all types
of read command(like reading spare) doesnt need ECC to be
enabled. It has been anyway taken care in other places
whereever required using arasan_nand_enable_ecc().
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Wed, 26 Oct 2016 08:49:37 +0000 (10:49 +0200)]
zynq: nand: Runtime detection of nand buswidth through slcr
This patch adds support to check the buswidth on nand flash
at runtime based on nand MIO configurations done by FSBL.
User needs to correctly configure the MIO's based on the
buswidth supported by the nand flash which is present on the board.
Added nand8 and nand16 @periph names on slcr driver.
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Siva Durga Prasad Paladugu [Tue, 27 Sep 2016 05:25:47 +0000 (10:55 +0530)]
zynq: nand: Enable Nand flash controller driver a zynq board
Enable zynq Nand flash controller driver for a zynq ZC770
XM011(dc2) board.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Siva Durga Prasad Paladugu [Tue, 27 Sep 2016 05:25:46 +0000 (10:55 +0530)]
mtd: nand: zynq_nand: Add nand driver support for zynq
Add nand flash controller driver support for zynq SoC.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Mike Looijmans [Fri, 30 Sep 2016 06:13:13 +0000 (08:13 +0200)]
ARM: zynq: Add support for the topic-miami system-on-modules and carrier boards
The topic-miami SoMs contain a Zynq xc7z015 or xc7z030 SoC, 1GB DDR3L RAM,
32MB QSPI NOR flash and 256MB NAND flash.
The topic-miamiplus SoMs contain a Zynq xc7z035, xc7z045 or xc7z100 SoC,
2x 1GB DDR3L RAM, 64MB dual-parallel QSPI flash, clock sources
and a fan controller.
The "Florida" carrier boards add SD, USB, ethernet and other interfaces.
Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Mike Looijmans [Wed, 28 Sep 2016 05:46:30 +0000 (07:46 +0200)]
ARM: zynq: Make SYS_VENDOR configurable
Add a string description for SYS_VENDOR to allow configuring boards from
other vendors than just "xilinx".
Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Fri, 21 Oct 2016 11:16:13 +0000 (13:16 +0200)]
tools: mkimage: Check if file is regular file
Current Makefile.spl passes -R parameter which is not empty
and pointing to ./ folder.
"./tools/mkimage -T zynqmpimage -R ./"" -d spl/u-boot-spl.bin
spl/boot.bin"
That's why mkimage is trying to parse ./ file and generate
register init which is wrong.
Check that passed filename is regular file. If not do not work with it.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Mike Looijmans [Tue, 20 Sep 2016 09:37:24 +0000 (11:37 +0200)]
tools: mkimage: Add support for initialization table for Zynq and ZynqMP
The Zynq/ZynqMP boot.bin file contains a region for register initialization
data. Filling in proper values in this table can reduce boot time
(e.g. about 50ms faster on QSPI boot) and also reduce the size of
the SPL binary.
The table is a simple text file with register+data on each line. Other
lines are simply skipped. The file can be passed to mkimage using the
"-R" parameter.
It is recommended to add reg init file to board folder.
For example:
CONFIG_BOOT_INIT_FILE="board/xilinx/zynqmp/xilinx_zynqmp_zcu102/reg.int
Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Tom Rini [Mon, 14 Nov 2016 16:27:11 +0000 (11:27 -0500)]
Prepare v2016.11
Signed-off-by: Tom Rini <trini@konsulko.com>
Hans de Goede [Mon, 14 Nov 2016 11:53:25 +0000 (12:53 +0100)]
MAINTAINERS: mark sunxi status as Orphan
Ian has not had any time for sunxi for some time now and I'm
in the same situation now, so I'm stepping down as sunxi
custodian and marking the sunxi support as Orphan.
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Chen-Yu Tsai <wens@csie.org>
Cc: Ian Campbell <ijc@hellion.org.uk>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Stefan Roese [Sat, 12 Nov 2016 09:32:38 +0000 (10:32 +0100)]
video: bmp: Fix compilation errors with CONFIG_BMP_xxBPP enabled
Compiling the 'bmp' command with DM and having one of the following macros
enabled:
CONFIG_BMP_16BPP, CONFIG_BMP_24BPP ONFIG_BMP_32BPP
generates this error:
drivers/video/video_bmp.c: In function ‘video_bmp_display’:
drivers/video/video_bmp.c:315:22: error: ‘lcd_line_length’ undeclared (first use in this function)
fb -= width * 2 + lcd_line_length;
^
This patch moves to using the correct variable instead and enables the
'bmp' command for DM again.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Anatolij Gustschin <agust@denx.de>
Marek Vasut [Sat, 12 Nov 2016 15:28:40 +0000 (16:28 +0100)]
net: write enetaddr down to hardware on env_callback
If mac-address is changed using "setenv ethaddr ...." command the new
mac-adress also must be written into the responsible ethernet driver.
This fixes the legacy ethernet handling.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Hannes Schmelzer <oe5hpm@oevsv.at>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Vignesh R [Sat, 5 Nov 2016 10:35:16 +0000 (16:05 +0530)]
spi: ti_qspi: Fix baudrate divider calculation
Fix the divider calculation logic to choose a value so that the
resulting baudrate is either equal to or closest possible baudrate less
than the requested value. While at that, cleanup ti_spi_set_speed().
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Vignesh R [Sat, 5 Nov 2016 10:35:15 +0000 (16:05 +0530)]
ARM: dts: dra7xx: Update spi-max-frequency for qspi slave node
Update the spi-max-frequency property of m25p80 flash slave to match
that of TI QSPI controller node, so that QSPI operations happen at
maximum supported frequency of 76.8MHz.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Lokesh Vutla [Thu, 3 Nov 2016 10:05:02 +0000 (15:35 +0530)]
ARM: k2g: Update PLL Multiplier and divider values
Only a certain set of PLLM/D values are recommended to configure the DDR
at the required speeds for a given clock input frequency. Updating these
values as specified in Data Sheet[1] Table 5-18
[1] http://www.ti.com/lit/ds/symlink/66ak2g02.pdf
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Lokesh Vutla [Thu, 3 Nov 2016 10:02:51 +0000 (15:32 +0530)]
ARM: keystone2: PLL: Enable glitch free initialization sequence
Update the PLL initialization sequence to avoid glitches while
programming. User guide for the same is available at[1].
[1] http://www.ti.com/lit/ug/sprugv2h/sprugv2h.pdf
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Keerthy [Sat, 29 Oct 2016 09:49:10 +0000 (15:19 +0530)]
arm: Set TTB XN bit in case DCACHE_OFF for LPAE mode
While we setup the mmu initially we mark set_section_dcache with
DCACHE_OFF flag. In case of non-LPAE mode the DCACHE_OFF macro
is rightly defined with TTB_SECT_XN_MASK set so as to mark all the
4GB XN. In case of LPAE mode XN(Execute-never) bit is not set with
DCACHE_OFF. Hence XN bit is not set by default for DCACHE_OFF which
keeps all the regions execute okay and this leads to random speculative
fetches in random memory regions which was eventually caught by kernel
omap-l3-noc driver.
Fix this to mark the regions as XN by default.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Keerthy [Sat, 29 Oct 2016 09:49:09 +0000 (15:19 +0530)]
arm: print the cache config option in hex instead of decimal
Printing the option value in hex makes it more comprehensible.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Diego Dorta [Thu, 10 Nov 2016 17:05:37 +0000 (15:05 -0200)]
mx6ull_14x14_evk: Add README file
Add a README file to help users getting started with the board.
Signed-off-by: Diego Dorta <diego.dorta@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Fabien Parent [Thu, 10 Nov 2016 16:16:35 +0000 (17:16 +0100)]
davinci: omapl138_lcdk: keep booting even when MAC address is invalid
If the MAC address specified on the EEPROM is invalid (multicast or
zero address), then u-boot fails to boot. Having a bad MAC address
in the EEPROM should not prevent the system from booting.
This commit changes the error path to just print an error messages
in case of bad MAC address.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Alex G [Wed, 9 Nov 2016 04:48:44 +0000 (20:48 -0800)]
board: am335x/mux: Do not hang when encountering a bad EEPROM
In most cases, the SPL and u-boot.img will be on the same boot media.
Since the SPL was loaded by the boot rom, the pinmux will already have
been configured for this media. This, the board will still be able to
boot successfully, or at least reach the u-boot console, where more
recovery options are available.
I've encountered this on a beaglebone black with a corrupted EEPROM.
Removing this check allowed the board to boot successfully. I've also
seen this on EVM-based boards with an unprogrammed EEPROM. On those
boards, for some reason there were no UART messages. This made it look
as if the SOC was dead.
Remove the hang(), as it is not a fatal error. Also reformat the error
message to be clearer as to the cause. The original message made it
appear as if the wrong binary was being loaded.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Ladislav Michl [Fri, 4 Nov 2016 11:59:46 +0000 (12:59 +0100)]
igep00x0: add Hynix timings
Tested on IGEPv2 with Micron MT29F4G16ABBDA3W and
Hynix H27S4G6F2DKA-BM
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Reviewed-by: Javier Martinez Canillas <javier@samsung.com>
Tested-by: Javier Martinez Canillas <javier@samsung.com>
Ladislav Michl [Fri, 4 Nov 2016 11:57:27 +0000 (12:57 +0100)]
igep00x0: consolidate defconfigs
Defconfigs should remain the same except CONFIG_SYS_EXTRA_OPTIONS.
Drop NAND specific defconfig as flash type is runtime detected.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Reviewed-by: Javier Martinez Canillas <javier@samsung.com>
Ladislav Michl [Fri, 4 Nov 2016 11:55:21 +0000 (12:55 +0100)]
igep00x0: disable CONFIG_DISPLAY_BOARDINFO
As a single U-Boot binary can now run on various board modifications,
drop CONFIG_DISPLAY_BOARDINFO as it prints flash memory information
too early to give us chance to easily detect it. Also saves few bytes
as a bonus.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Reviewed-by: Javier Martinez Canillas <javier@samsung.com>
Tested-by: Javier Martinez Canillas <javier@samsung.com>
Andre Przywara [Thu, 10 Nov 2016 12:13:23 +0000 (12:13 +0000)]
tools: fix mksunxiboot build for tools-all target
Commit
fed329aebe3a ("tools: add mksunxiboot to tools-all target") added
mksunxiboot to the tools-all target, but used the CONFIG_SUNXI symbol
to enable its build. Now commit
aec9a0f19f64 ("sunxi: Rename CONFIG_SUNXI
to CONFIG_ARCH_SUNXI"), merged before that, renamed that symbol, so that
the first patch basically gets ineffective.
Adjust the symbol name in tools/Makefile to make it build again.
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tom Rini [Tue, 8 Nov 2016 15:36:57 +0000 (10:36 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-tegra
Stephen Warren [Wed, 19 Oct 2016 21:18:47 +0000 (15:18 -0600)]
ARM: tegra186: call secure monitor for all cache-wide ops
An SMC call is required for all cache-wide operations on Tegra186. This
patch implements the two missing hooks now that U-Boot supports them, and
fixes the mapping of "hook name" to SMC call code.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Stephen Warren [Wed, 19 Oct 2016 21:18:46 +0000 (15:18 -0600)]
armv8: add hooks for all cache-wide operations
SoC-specific logic may be required for all forms of cache-wide
operations; invalidate and flush of both dcache and icache (note that
only 3 of the 4 possible combinations make sense, since the icache never
contains dirty lines). This patch adds an optional hook for all
implemented cache-wide operations, and renames the one existing hook to
better represent exactly which operation it is implementing. A dummy
no-op implementation of each hook is provided.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Stephen Warren [Wed, 19 Oct 2016 21:18:45 +0000 (15:18 -0600)]
ARM: tegra: translate __asm_flush_l3_cache to assembly
When performing a cache disable function, code must not access DRAM.
That is because when the cache is disabled, it will be bypassed and all
loads and stores will be serviced by RAM. This prevents accessing any
dirty data in the cache. In turn, this means the stack cannot be
used, since that is in RAM. To guarantee that code doesn't use RAM (and
in particular the stack) __asm_flush_l3_cache() must be manually
implemented in assembly, rather than implemented in C since the compiler
won't know not to touch RAM.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Stephen Warren [Wed, 19 Oct 2016 21:18:44 +0000 (15:18 -0600)]
ARM: tegra: ensure nvtboot_boot_x0 alignment
nvtboot_boot_x0 is a 64-bit variable and hence must be 64-bit aligned.
So far this has happened by accident! Fix the code so this is guaranteed.
This fixes the following build error:
... relocation truncated to fit: R_AARCH64_LDST64_ABS_LO12_NC
against symbol `nvtboot_boot_x0' ...
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Tom Rini [Mon, 7 Nov 2016 18:16:00 +0000 (13:16 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-net
Siva Durga Prasad Paladugu [Wed, 2 Nov 2016 11:52:13 +0000 (12:52 +0100)]
net: use random ethernet address if invalid and not zero
Use random ethernet address if the ethernet address found
is invalid, not zero and config for random address
is defined.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Chris Packham [Mon, 31 Oct 2016 21:48:32 +0000 (10:48 +1300)]
net: mvgbe: Fix build error with CONFIG_PHYLIB
Commit
5a49f17481bb ("net: mii: Use spatch to update miiphy_register")
updated the mvgbe implementation of smi_reg_read/smi_reg_write. Prior to
that change mvgbe_phy_read and mvgbe_phy_write where used as wrappers to
satisfy the phylib APIs. Because these functions weren't updated in that
commit build errors where triggered when CONFIG_PHYLIB was enabled.
Fix these build errors by removing mvgbe_phy_read and mvgbe_phy_write
and using smi_reg_read/smi_reg_write directly.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Ash Charles [Fri, 21 Oct 2016 21:31:33 +0000 (17:31 -0400)]
net: phy: micrel: center FLP burst timing at 16ms
Like [1], reset the FLP burst timing for the KSZ9031 to the 16ms
specified by the IEEE802.3 standard from the chip's default of 8ms.
For more details, see the "Auto-Negotiation Timing" section of the
KSZ9031RNX datasheet.
[1] https://patchwork.kernel.org/patch/6558371/
Signed-off-by: Ash Charles <ash.charles@savoirfairelinux.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Stephen Warren [Mon, 12 Sep 2016 17:51:15 +0000 (11:51 -0600)]
ARM: tegra: enable Ethernet on p2771-0000
Enable the Ethernet device in DT, provide board-specific configuration,
and enable the driver in Kconfig.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Stephen Warren [Mon, 12 Sep 2016 17:51:14 +0000 (11:51 -0600)]
ARM: tegra: add DWC EQoS (ethernet) to Tegra186 DT
Tegra186 includes a Synopsys DWC EQoS (Ethernet) device. Add this to the
Tegra186 SoC DT so that boards can make use of it.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Stephen Warren [Mon, 12 Sep 2016 17:51:13 +0000 (11:51 -0600)]
ARM: tegra: configure Ethernet address on Tegra186
On Tegra186, the bootloader which runs before U-Boot passes the Ethernet
MAC address to U-Boot using device tree. Extract this value and write it
to the environment, so that the Ethernet uclass picks it up and uses it
for the built-in Ethernet device.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Stephen Warren [Mon, 12 Sep 2016 17:51:12 +0000 (11:51 -0600)]
ARM: tegra: add SoC-level hook for board_late_init()
Extend the Tegra186 implementation of board_late_init() to call a per-SoC
"hook" function. This will allow SoC-specific (rather than Tegra-wide)
functionality to be implemented without the core Tegra code needing to be
aware of the details. While board186.c is currently only used for
Tegra186, it should be applicable to any other future SoC, and perhaps its
simple design could be back-ported to older SoCs in the future too.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Stephen Warren [Fri, 21 Oct 2016 20:46:47 +0000 (14:46 -0600)]
net: add driver for Synopsys Ethernet QoS device
This driver supports the Synopsys Designware Ethernet QoS (Quality of
Service) a/k/a eqos IP block, which is a different design than the HW
supported by the existing designware.c driver. The IP supports many
options for bus type, clocking/reset structure, and feature list. This
driver currently supports the specific configuration used in NVIDIA's
Tegra186 chip, but should be extensible to other combinations quite
easily, as explained in the source.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org> # V1
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Stephen Warren [Fri, 21 Oct 2016 20:46:46 +0000 (14:46 -0600)]
dt: net: add DWC EQoS binding
The Synopsys DWC EQoS is a configurable Ethernet MAC/DMA IP block which
supports multiple options for bus type, clocking and reset structure, and
feature list.
This patch imports the binding from the Linux kernel, including my V3
patch to extend the binding to cover the Tegra186, which is applied for
next-
20160912. So far, my changes have been acked by Lars Persson, the
original author of the binding.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Fabio Estevam [Tue, 1 Nov 2016 16:58:16 +0000 (14:58 -0200)]
wandboard: Make Ethernet functional again
Since commit
ce412b79e7255770 ("drivers: net: phy: atheros: add separate
config for AR8031") ethernet does not work on mx6sabresd.
This commit correctly assigns ar8031_config() as the configuration
function for AR8031 in the same way as done in the Linux kernel.
However, on wandboard design we need some additional configuration,
such as enabling the 125 MHz AR8031 output that needs to be done
in the board file.
This also aligns with the same method that the kernel performs
the AR8031 fixup in arch/arm/mach-imx/mach-imx6q.c.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Tomeu Vizoso [Fri, 4 Nov 2016 13:22:15 +0000 (14:22 +0100)]
mkimage: Allow including a ramdisk in FIT auto mode
Adds -i option that allows specifying a ramdisk file to be added to the
FIT image when we are using the automatic FIT mode (no ITS file).
This makes adding Depthcharge support to LAVA much more convenient, as
no additional configuration files need to be kept around in the machine
that dispatches jobs to the boards.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Matt Hart <matthew.hart@linaro.org>
Cc: Neil Williams <codehelp@debian.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Sat, 5 Nov 2016 23:34:49 +0000 (19:34 -0400)]
travis-ci: Try harder to build all ARM targets
The way that we have things broken down currently allows for some
combinations of vendor or CPU to not be built. To fix this, create a
new catch-all job that excludes everything we've built elsewhere. For
the sake of simplicity we are allowing for the possibility of some
overlap between the vendor-based jobs and the CPU-based jobs. While
we're in here, make a failed build provide the summary of failure.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 5 Nov 2016 02:59:45 +0000 (22:59 -0400)]
buildman: Fix building based on 'options' field
The README for buildman says that we can use any field in boards.cfg to
decide what to build. However, we were not saving the options field
correctly.
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Simon Glass <sjg@chromium.org>
Fabio Estevam [Mon, 24 Oct 2016 12:22:06 +0000 (10:22 -0200)]
mx6sabresd: Make Ethernet functional again
Since commit
ce412b79e7255770 ("drivers: net: phy: atheros: add separate
config for AR8031") ethernet does not work on mx6sabresd.
This commit correctly assigns ar8031_config() as the configuration
function for AR8031 in the same way as done in the Linux kernel.
However, on mx6sabresd design we need some additional configuration,
such as enabling the 125 MHz AR8031 output that needs to be done
in the board file.
This also aligns with the same method that the kernel performs
the AR8031 fixup in arch/arm/mach-imx/mach-imx6q.c.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Jagan Teki [Sat, 29 Oct 2016 19:44:31 +0000 (01:14 +0530)]
engicam: icorem6: Fix config files
Config file names on MAINTAINERS and README in
board/engicam/icorem6 seems to be wrong, hence fixed the same.
Cc: Stefano Babic <sbabic@denx.de>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Andre Przywara [Thu, 3 Nov 2016 00:56:25 +0000 (00:56 +0000)]
armv8: define get_ticks() for the ARMv8 Generic Timer
For 64-bit ARM systems we provide just a timer_read_counter()
implementation and rely on the generic non-uclass get_ticks() function
in lib/time.c to call the former.
However this function is actually not 64-bit safe, as it assumes a
"long" to be 32-bit. Beside the fact that the resulting uint64_t
isn't bigger than "long" on 64-bit architectures and thus combining two
counters makes no sense, we get all kind of weird results when we try
to OR in the high value shifted by _32_ bits.
So let's avoid that function at all and provide a straight forward
get_ticks() implementation for ARMv8, which also is in line with ARMv7.
This fixes occasional immediate time-out expiration issues I see on the
Pine64 board. The root cause of this needs to be investigated, but this
fix looks like the right thing anyway.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Andre Przywara [Thu, 3 Nov 2016 01:01:50 +0000 (01:01 +0000)]
doc: update README.arm64
This file apparently hasn't seen an update in a while, so just sync
it with reality.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Peng Fan [Fri, 4 Nov 2016 02:33:15 +0000 (10:33 +0800)]
tools: imximage: check return value when open the plugin file
Check return value when open the plugin file.
Coverity report:
** CID 153926: Error handling issues (NEGATIVE_RETURNS)
/tools/imximage.c: 542 in copy_plugin_code()
ifd = open(plugin_file, O_RDONLY|O_BINARY);
>>> CID 153926: Error handling issues (NEGATIVE_RETURNS)
>>> "ifd" is passed to a parameter that cannot be negative.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Reported-by: Coverity (CID: 153926)
Reviewed-by: Tom Rini <trini@konsulko.com>
Simon Glass [Mon, 31 Oct 2016 16:21:09 +0000 (10:21 -0600)]
image: Protect against overflow in unknown_msg()
Coverity complains that this can overflow. If we later increase the size
of one of the strings in the table, it could happen.
Adjust the code to protect against this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Coverity (CID: 150964)
Marcel Ziswiler [Fri, 28 Oct 2016 20:50:23 +0000 (22:50 +0200)]
colibri_pxa270: drop lzma support for space reason
As the upcoming driver model integration takes up some more precious flash
space first make sure to drop expensive LZMA support.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Tom Rini [Thu, 3 Nov 2016 11:09:42 +0000 (07:09 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-usb
Patrick Delaunay [Fri, 28 Oct 2016 07:44:26 +0000 (09:44 +0200)]
dfu: align array in dfu_get_dev_type with enum dfu_device_type
Signed-off-by: Patrick Delaunay <patrick.delaunay73@gmail.com>
Michal Simek [Tue, 30 Aug 2016 13:32:17 +0000 (15:32 +0200)]
cmd: dfu: Add error handling for board_usb_init
board_usb_init() can failed and error should be handled properly.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Tom Rini [Wed, 2 Nov 2016 13:41:20 +0000 (09:41 -0400)]
Merge git://git.denx.de/u-boot-rockchip
Tom Rini [Mon, 31 Oct 2016 20:36:10 +0000 (16:36 -0400)]
Prepare v2016.11-rc3
Signed-off-by: Tom Rini <trini@konsulko.com>
Jelle van der Waa [Sun, 30 Oct 2016 16:30:30 +0000 (17:30 +0100)]
README: fix typo candiate -> candidate
Signed-off-by: Jelle van der Waa <jelle@vdwaa.nl>
Tom Rini [Sat, 29 Oct 2016 21:11:17 +0000 (17:11 -0400)]
travis.yml: Add in uniphier as a job, modify aarch64 builds a bit
- Add in system aarch64-linux-gnu toolchain
- Now that all VMs will have aarch64 available, don't exclude them from
other jobs but instead exclude them from the catch-all aarch64 build
- Add JOB= to the Freescale/ARM build to be clear about what it does.
- Add uniphier as a stand-alone job
Signed-off-by: Tom Rini <trini@konsulko.com>
Simon Glass [Thu, 27 Oct 2016 23:54:03 +0000 (17:54 -0600)]
mkimage: Fix missing free() in show_valid_options()
The allocated memory should be freed. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Coverity (CID: 150963)
Reviewed-by: Tom Rini <trini@konsulko.com>
Chris Packham [Tue, 25 Oct 2016 07:22:48 +0000 (20:22 +1300)]
cmd: load: align cache flush
Prevent cache misalignment message by ensuring that a whole cache line
is flushed.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Vagrant Cascadian [Mon, 24 Oct 2016 03:45:19 +0000 (20:45 -0700)]
Fix spelling of "resetting".
Cover-Letter: Fixes several spelling errors for the words "resetting",
"extended", "occur", and "multiple".
Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Vagrant Cascadian [Mon, 24 Oct 2016 03:45:18 +0000 (20:45 -0700)]
Fix spelling of "extended".
Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Vagrant Cascadian [Mon, 24 Oct 2016 03:45:17 +0000 (20:45 -0700)]
Fix spelling of "occur".
Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
Acked-by: Angelo Dureghello <angelo@sysam.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
Vagrant Cascadian [Mon, 24 Oct 2016 03:45:16 +0000 (20:45 -0700)]
Fix spelling of "multiple".
Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Adam Ford [Sun, 23 Oct 2016 12:39:01 +0000 (07:39 -0500)]
omap3logic: Fix Auto detect Logic PD Models
The autodetect feature doesn't allow users to specify the device tree.
This fix will make it only autodetect if 'fdtimage' is not defined.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Adam Ford [Sat, 15 Oct 2016 13:16:27 +0000 (08:16 -0500)]
OMAP3: omap3_logic: Add scripts to boot over network.
Not all networks have a DHCP server configured properly, so these
scripts make it easier to boot in that scenario.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Adam Ford [Sat, 15 Oct 2016 11:23:11 +0000 (06:23 -0500)]
OMAP3: omap3_logic: Remove LCD preboot info
The LCD isn't supported in U-Boot and the LCD is now configured in
the device tree, so this code is pointless.
V2: Eliminiate erroneous newline.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Nishanth Menon [Tue, 11 Oct 2016 17:39:05 +0000 (12:39 -0500)]
ti: common: board_detect: Return a valid empty string for un-initialized eeprom
Current logic for query of revision, board_name, config returns
NULL. Users of these functions do a direct strncmp to compare.
Unfortunately, as per conventions require two valid strings to compare
against and the current implementation causes a crash when compared
with NULL.
We'd still like to maintain the simplistic usage of these APIs instead
of redundant if (string) res=strncmp(fn(),"cmp",n); flowing all over
the place.
Hence, since the version, name and config is already pre-initialized
with empty string, just dont check for invalid header in the first
place and return the empty string to the caller.
Reported-by: Brad Griffis <bgriffis@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Correct was'nt -> wasn't typo]
Signed-off-by: Tom Rini <trini@konsulko.com>
Nishanth Menon [Tue, 11 Oct 2016 17:39:04 +0000 (12:39 -0500)]
ti: common: board_detect: Setup initial default value for config as well
config should have been initialized along with others as defaults.
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Nishanth Menon [Tue, 11 Oct 2016 17:39:03 +0000 (12:39 -0500)]
ti: common: board_detect: Replace hardcoded value with macro
We should have used TI_DEAD_EEPROM_MAGIC in the first place.
Fixes:
d3b98a9eb941 ("ti: common: dra7: Add standard access for board description EEPROM")
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Alexander von Gernler [Fri, 7 Oct 2016 17:44:14 +0000 (19:44 +0200)]
cosmetic: Fix indentation in README
Signed-off-by: Alexander von Gernler <grunk@pestilenz.org>
Kever Yang [Sat, 8 Oct 2016 07:23:38 +0000 (15:23 +0800)]
rk3288: kconfig: remove duplicate definition of SPL_MMC_SUPPORT
SPL_MMC_SUPPORT defined in rockchip top level Kconfig instead of
inside rk3288 and default to disable if ROCKCHIP_SPL_BACK_TO_BROM
defined.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Jacob Chen [Sat, 8 Oct 2016 05:47:42 +0000 (13:47 +0800)]
rockchip: doc: add GPT partition layout
A simple introduction.
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Jacob Chen [Sat, 8 Oct 2016 05:47:41 +0000 (13:47 +0800)]
rockchip: use rockchip linux partitions layout
Unify the partitions of each chip then it will be more easy for us to
write scripts, tools or guides for rockchip chips.
Those extra partitions mostly are used to be compatible with our
internal loaders (such as miniloader which was same as spl, or
android loader then we can support dual boot)
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Fri, 7 Oct 2016 09:47:59 +0000 (17:47 +0800)]
dts: rk3288: remove node in dmc which not need anymore
Since we implement the dram capacity auto detect, we don't
need to set the channel number and sdram-channel in dts.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Tested-by: Vagrant Cascadian <vagrant@debian.org>
Kever Yang [Fri, 7 Oct 2016 09:47:58 +0000 (17:47 +0800)]
rk3288: sdram: auto-detect the capacity
Add support for rk3288 dram capacity auto detect, support DDR3 and
LPDDR3, DDR2 is not supported.
The program will automatically detect:
- channel number
- rank number
- column address number
- row address number
The dts file do not need to describe those info after apply this patch.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Simon Glass <sjg@chromium.org>
Tested-by: Vagrant Cascadian <vagrant@debian.org>
Tested-by: Vagrant Cascadian <vagrant@debian.org>
Kever Yang [Fri, 7 Oct 2016 09:47:57 +0000 (17:47 +0800)]
rk3288: config change for enable dram capacity auto-detect.
Enable ROCKCHIP_SPL_BACK_TO_BROM and disable CONFIG_SPL_MMC_SUPPORT
to save memory in order to enable add source code for dram capacity
auto-detect.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Fri, 7 Oct 2016 08:05:45 +0000 (16:05 +0800)]
evb-rk3399: config: set emmc as default boot dev
rk3399 has two mmc dev controller:
mmc 0: SD card;
mmc 1: EMMC
U-Boot will scan the mmc boot device configured by CONFIG_SYS_MMC_ENV_DEV,
since evb has emmc on board, let's set the EMMC as default.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Fri, 7 Oct 2016 07:59:49 +0000 (15:59 +0800)]
rk3288: fix reg address for GRF_SOC_CON2
The GRF base address is missing, fix it.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Fri, 7 Oct 2016 07:56:16 +0000 (15:56 +0800)]
rk3399: disable the clock multiplier support when SoC init
The Clock Multiplier in rk3399 EMMC programmable clock generator
is broken, we can remove its support from SoC GRF register.
Without this patch, rk3399 emmc driver is not work after below patch
applied:
6dffdbc mmc: sdhci: Add the programmable clock mode support
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Simon Glass [Sun, 2 Oct 2016 02:04:52 +0000 (20:04 -0600)]
rockchip: rk3288: Move rockchip_get_cru() out of the driver
This function is called from outside the driver. It should be placed into
common SoC code. Move it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Simon Glass [Sun, 2 Oct 2016 02:04:51 +0000 (20:04 -0600)]
rockchip: rk3399: Move rockchip_get_cru() out of the driver
This function is called from outside the driver. It should be placed into
common SoC code. Move it.
Also rename the driver symbol to be more consistent with the other rockchip
clock drivers.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Simon Glass [Sun, 2 Oct 2016 02:04:50 +0000 (20:04 -0600)]
rockchip: rk3036: Move rockchip_get_cru() out of the driver
This function is called from outside the driver. It should be placed into
common SoC code. Move it.
Also rename the driver symbol to be more consistent with the other rockchip
clock drivers.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jacob Chen [Tue, 27 Sep 2016 07:48:45 +0000 (15:48 +0800)]
clk: rk3399: fix rockchip_get_cru
clk_rk3399 is driver name, not device name
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Sandy Patterson [Mon, 11 Jul 2016 17:38:52 +0000 (13:38 -0400)]
rockchip: RK3288 needs fdt and initrd below 256M now
I am not sure why this limit is changing. But my kernel
doesn't load when it's above 256. This was testing on the
rock2 board.
Signed-off-by: Sandy Patterson <apatterson@sightlogix.com>
Updated commit subject:
Signed-off-by: Simon Glass <sjg@chromium.org>
Tom Rini [Sun, 30 Oct 2016 12:12:00 +0000 (08:12 -0400)]
Merge branch 'sun9i-a80-spl' of git.denx.de/u-boot-sunxi
Tom Rini [Sun, 30 Oct 2016 12:11:50 +0000 (08:11 -0400)]
Merge branch 'master' of git.denx.de/u-boot-sunxi
Chen-Yu Tsai [Fri, 28 Oct 2016 10:21:38 +0000 (18:21 +0800)]
sunxi: Add support for Cubieboard4
The Cubieboard4 is an A80 SoC based development board from Cubietech.
This board has a UART port, 4 USB host ports, a USB 3.0 OTG connector,
HDMI and VGA outputs, a micro SD slot, 8G eMMC flash, 2G DRAM, a WiFi/BT
combo chip, headphone and microphone jacks, IR receiver, and GPIO headers.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Stefan Brüns [Sat, 29 Oct 2016 10:23:18 +0000 (12:23 +0200)]
tools: add mksunxiboot to tools-all target
mksunxiboot is useful outside of u-boot, it is e.g. used by sunxi-tools.
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Chen-Yu Tsai [Fri, 28 Oct 2016 10:21:37 +0000 (18:21 +0800)]
sunxi: Enable SPL support for A80 Optimus board
The A80 Optimus Board was launched with the Allwinner A80 SoC.
It was jointly developed by Allwinner and Merrii.
This board has a UART port, a JTAG connector, 2 USB host ports, a USB
3.0 OTG connector, an HDMI output, a micro SD slot, 16G eMMC flash,
2G DRAM, a camera sensor interface, a WiFi/BT combo chip, a headphone
jack, IR receiver, and additional GPIO headers.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
[hdegoede@redhat.com: update existing Merrii_A80_Optimus_defconfig
instead of adding a new defconfig]
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Amit Singh Tomar [Fri, 21 Oct 2016 01:24:30 +0000 (02:24 +0100)]
sunxi: A64: enable USB support
Mostly by adding MACH_SUN50I to some existing #ifdefs enable support
for the the HCI0 USB host controller on the A64.
Fix up some minor 64-bit hiccups on the way.
Add the bare minimum DT bits to the A64 .dtsi and enable the controllers
and the PHY on the Pine64.
This is limited to the first USB controller at the moment, which is
connected to the lower USB socket on the Pine64 board.
[Andre: remove unneeded defines, enable OHCI, add commit message]
Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Chen-Yu Tsai [Fri, 28 Oct 2016 10:21:36 +0000 (18:21 +0800)]
sunxi: Add default zq value for sun9i (A80)
Both the A80 Optimus board and the Cubieboard 4 use a zq value of
4145117, or 0x3f3fdd.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Stefan Mavrodiev [Sat, 29 Oct 2016 12:34:07 +0000 (14:34 +0200)]
sunxi: Update DRAM clock for Olimex A20 boards
Originally dram clock was set to 480MHz, but this behaves
unstable. To improve stability the clock is reduced to 384MHz
Signed-off-by: Stefan Mavrodiev <stefan.mavrodiev@gmail.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Chen-Yu Tsai [Fri, 28 Oct 2016 10:21:35 +0000 (18:21 +0800)]
sunxi: Add support for SID e-fuses on sun9i
The A80 has SID e-fuses. Like other newer SoCs, the actual e-fuses
are at an offset of 0x200 within the SID address space.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>