Simon Glass [Thu, 13 Dec 2012 20:48:47 +0000 (20:48 +0000)]
ppc: Move mpc83xx clock fields to arch_global_data
Move al mpc83xx fields into arch_global_data and tidy up. Also indent
the nested #ifdef for clarity.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 13 Dec 2012 20:48:46 +0000 (20:48 +0000)]
ppc: Move clock fields to arch_global_data
Move vco_out, cpm_clk, scc_clk, brg_clk into arch_global_data and tidy
up. Leave pci_clk on its own since this should really depend only on
CONFIG_PCI and not any particular chip type.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 13 Dec 2012 20:48:45 +0000 (20:48 +0000)]
ppc: Remove extra pci_clk fields from global_data
PPC has several of these fields, selected by chip type, although only one
is ever compiled in.
Instead, use a single field. It would be nice if this could be selected
by CONFIG_PCI, but some chips (e.g. mpc5xxx) use pci_clk even when
CONFIG_PCI is not enabled.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 13 Dec 2012 20:48:44 +0000 (20:48 +0000)]
ppc: Move brg_clk to arch_global_data
Move this field into arch_global_data and tidy up.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 13 Dec 2012 20:48:43 +0000 (20:48 +0000)]
x86: Remove reset_status, relocoff from global_data
These fields are not used on x86, so punt them.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 13 Dec 2012 20:48:41 +0000 (20:48 +0000)]
x86: Move gd_addr into arch_global_data
Move this field into arch_global_data and tidy up.
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Add arch/x86/cpu/cpu.c changes after Graeme's comments]
Signed-off-by: Tom Rini <trini@ti.com>
Simon Glass [Thu, 13 Dec 2012 20:48:42 +0000 (20:48 +0000)]
x86: Set up the global data pointer in C instead of asm
We currently assume that the global data pointer is at the start of
struct global_data. We want to remove this restriction, and it is
easiest to do this in C.
Remove the asm code and add equivalent code in C.
This idea was proposed by Graeme Russ here:
http://patchwork.ozlabs.org/patch/199741/
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Apply Graeme Russ' comments
http://patchwork.ozlabs.org/patch/206305/ here, re-order]
Signed-off-by: Tom Rini <trini@ti.com>
Simon Glass [Thu, 13 Dec 2012 20:48:40 +0000 (20:48 +0000)]
x86: Remove gdt_addr from arch_global_data
Remove this unused field.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 13 Dec 2012 20:48:39 +0000 (20:48 +0000)]
arm: Move tlb_addr and tlb_size to arch_global_data
Move these fields into arch_global_data and tidy up.
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Address tlb_size in this patch as well]
Signed-off-by: Tom Rini <trini@ti.com>
Simon Glass [Thu, 13 Dec 2012 20:48:38 +0000 (20:48 +0000)]
nds32: Drop tlb_addr from global data
This field doesn't appear to be used for anything important, so drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 13 Dec 2012 20:48:37 +0000 (20:48 +0000)]
ixp: Move timestamp to arch_global_data
Move this field into arch_global_data and tidy up.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 13 Dec 2012 20:48:36 +0000 (20:48 +0000)]
arm: Move timer_reset_value to arch_global_data
Move this field into arch_global_data and tidy up.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 13 Dec 2012 20:48:35 +0000 (20:48 +0000)]
arm: Move lastinc to arch_global_data
Move this field into arch_global_data and tidy up.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 13 Dec 2012 20:48:34 +0000 (20:48 +0000)]
arm: Move tbl to arch_global_data
Move this field into arch_global_data and tidy up.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 13 Dec 2012 20:48:33 +0000 (20:48 +0000)]
arm: Move tbu to arch_global_data
Move this field into arch_global_data and tidy up.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 13 Dec 2012 20:48:32 +0000 (20:48 +0000)]
arm: Move timer_rate_hz into arch_global_data
Move this field into arch_global_data and tidy up.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 13 Dec 2012 20:48:31 +0000 (20:48 +0000)]
at91: Move at91 global data into arch_global_data
Move these fields into arch_global_data.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 13 Dec 2012 20:48:30 +0000 (20:48 +0000)]
Add architecture-specific global data
We plan to move architecture-specific data into a separate structure so
that we can make the rest of it common.
As a first step, create struct arch_global_data to hold these fields.
Initially it is empty.
This patch applies to all archs at once. I can split it if this is really
a pain.
Signed-off-by: Simon Glass <sjg@chromium.org>
Marek Vasut [Fri, 11 Jan 2013 03:35:48 +0000 (03:35 +0000)]
vfat: Fix mkcksum argument sizes
In case a function argument is known/fixed size array in C, the argument is
still decoyed as pointer instead ( T f(U n[k]) ~= T fn(U *n) ) and therefore
calling sizeof on the function argument will result in the size of the pointer,
not the size of the array.
The VFAT code contains such a bug, this patch fixes it.
Reported-by: Aaron Williams <Aaron.Williams@cavium.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <tom.rini@gmail.com>
Cc: Aaron Williams <Aaron.Williams@cavium.com>
Tested-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Lucas Stach [Tue, 22 Jan 2013 00:15:49 +0000 (00:15 +0000)]
arm: fix CONFIG_DELAY_ENVIRONMENT to act like it claims in the README
No one expects to end up in a delayed environment if
CONFIG_DELAY_ENVIRONMENT isn't defined.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Allen Martin <amartin@nvidia.com>
Tom Rini [Thu, 31 Jan 2013 00:26:38 +0000 (19:26 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-mips
Gabor Juhos [Wed, 30 Jan 2013 04:31:58 +0000 (04:31 +0000)]
MIPS: qi_lb60: remove custom u-boot.lds script
Remove the board specific linker script. It is not
needed anymore, the unified MIPS linker script can
be used instead.
The qi_lb60 target produces a slightly different
image after the change than before. The value of
'num_got_entries' symbol is different:
@@ -49,7 +49,7 @@
801000b4:
80122d00 lb s2,11520(zero)
801000b8:
80123500 lb s2,13568(zero)
801000bc:
80123ef8 lb s2,16120(zero)
-
801000c0:
00000139 0x139
+
801000c0:
00000136 tne zero,zero,0x4
801000c4 <in_ram>:
801000c4:
8d0bfffc lw t3,-4(t0)
This is caused by the different placement of the
'__got_start' and '__got_end' symbols between the
board specific scrip and the unified script.
board specific script:
__got_start = .;
.got : { *(.got) }
__got_end = .;
unified script:
.got : {
__got_start = .;
*(.got)
__got_end = .;
}
Despite this difference, the resulting images are
functionally identical.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Cc: Xiangfu Liu <xiangfu@openmobilefree.net>
Gabor Juhos [Wed, 30 Jan 2013 04:31:57 +0000 (04:31 +0000)]
MIPS: dbau1x00: remove custom u-boot.lds script
Remove the board specific linker script. It is not
needed anymore, the unified MIPS linker script can
be used instead.
All dbau1x00 targets are producing identical binary
images after the change than before.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Gabor Juhos [Wed, 30 Jan 2013 04:31:56 +0000 (04:31 +0000)]
MIPS: incaip: remove custom u-boot.lds script
Remove the board specific linker script. It is not
needed anymore, the unified MIPS linker script can
be used instead.
All incaip targets are producing identical binary
images after the change than before.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Cc: Wolfgang Denk <wd@denx.de>
Gabor Juhos [Wed, 30 Jan 2013 04:31:55 +0000 (04:31 +0000)]
MIPS: vct: remove custom u-boot.lds script
Remove the board specific linker script. It is not
needed anymore, the unified MIPS linker script can
be used instead.
All vct targets are producing identical binary
images after the change than before.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Acked-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Gabor Juhos [Wed, 30 Jan 2013 04:31:54 +0000 (04:31 +0000)]
MIPS: pb1x00: remove custom u-boot.lds script
Remove the board specific linker script. It is not
needed anymore, the unified MIPS linker script can
be used instead.
All pb1x00 targets are producing identical binary
images after the change than before.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Gabor Juhos [Wed, 30 Jan 2013 04:31:53 +0000 (04:31 +0000)]
MIPS: qemu-mips: use the unified u-boot.lds script
Remove the board specific linker script. It is not
needed anymore, the unified MIPS linker script can
be used instead.
All qemu_mips targets are producing identical binary
images after the change than before.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Gabor Juhos [Wed, 30 Jan 2013 04:31:52 +0000 (04:31 +0000)]
MIPS: add unified u-boot.lds file
The patch adds an unified linker script file which
can be used for all currently supported MIPS targets.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Xiangfu Liu <xiangfu@openmobilefree.net>
Acked-by: Stefan Roese <sr@denx.de>
Gabor Juhos [Wed, 30 Jan 2013 02:22:51 +0000 (02:22 +0000)]
MIPS: remove OUTPUT_FORMAT from linker scripts
The OUTPUT_FORMAT command in linker scripts
was always misused due to some endianess and
toolchain problems.
Use GCC flags to ensure proper output format,
and get rid of the OUTPUT_FORMAT commands in
the board specific u-boot.lds files.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Xiangfu Liu <xiangfu@openmobilefree.net>
Gabor Juhos [Wed, 30 Jan 2013 04:51:06 +0000 (04:51 +0000)]
MIPS: xburst: simplify relocation offset calculation
The current code uses four instructions and a
temporary register to calculate the relocation
offset and to adjust the gp register.
The relocation offset can be calculated directly
from the CONFIG_SYS_MONITOR_BASE constant and from
the destination address. The resulting offset can
be used to adjust the gp pointer.
This approach makes the code a bit simpler because
it needs two instructions only.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Cc: Xiangfu Liu <xiangfu@openmobilefree.net>
Gabor Juhos [Wed, 30 Jan 2013 04:56:37 +0000 (04:56 +0000)]
MIPS: simplify relocated _G_O_T_ address calculation
The difference between the address of the original
and the relocated _GLOBAL_OFFSET_TABLE_ is always
the same as the relocation offset.
The relocation offset is already computed and it is
available in the 's1/t6' register. Use that to adjust
the relocated _G_O_T_ address, instead of calculating
the offset again from the _gp value.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Cc: Xiangfu Liu <xiangfu@openmobilefree.net>
Andy Fleming [Thu, 24 Jan 2013 07:55:11 +0000 (01:55 -0600)]
corenet: Disable video on P2020DS
The P2020DS build had grown too large, and video support isn't enabled
in almost any other Freescale board. Disabling it allows us to keep
building, and provides options for reenabling it later.
Signed-off-by: Andy Fleming <afleming@freescale.com>
Prabhakar Kushwaha [Wed, 23 Jan 2013 17:59:37 +0000 (17:59 +0000)]
board/common: Add support for QIXIS read/write using i2c
QIXIS FPGA is accessable via both i2c and flash controller.
Only flash controller access is supported.
Add support of i2c based access. It is quite useful in the scenario
where either flash controller path is broken or not present.
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Shengzhou Liu [Wed, 23 Jan 2013 19:56:23 +0000 (19:56 +0000)]
powerpc/t4240: Adding workaround errata A-005871
When CoreNet Fabric (CCF) internal resources are consumed by the cores,
inbound SRIO messaging traffic through RMan can put the device into a
deadlock condition.
This errata workaround forces internal resources to be reserved for
upstream transactions. This ensures resources exist on the device for
upstream transactions and removes the deadlock condition.
The Workaround is for the T4240 silicon rev 1.0.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Vakul Garg [Wed, 23 Jan 2013 22:52:31 +0000 (22:52 +0000)]
powerpc/mpc85xx: Add property 'fsl, sec-era' in device tree node 'crypto'
If property 'fsl,sec-era' is already present, it is updated.
This property is required so that applications can ascertain which
descriptor commands are supported on a particular CAAM version.
Signed-off-by: Vakul Garg <vakul@freescale.com>
Cc: Andy Fleming <afleming@gmail.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Anatolij Gustschin [Mon, 21 Jan 2013 23:50:27 +0000 (23:50 +0000)]
mpc8xxx: fix DDR init value to use CONFIG_MEM_INIT_VALUE
Configuring custom memory init value using CONFIG_MEM_INIT_VALUE in
the board config file doesn't work and memory is always initialized
to the value 0xdeadbeef. Only use this default value if a board doesn't
define CONFIG_MEM_INIT_VALUE.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Andy Fleming <afleming@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Scott Wood [Fri, 18 Jan 2013 15:45:58 +0000 (15:45 +0000)]
powerpc/mpc85xx: add support for MMUv2 page sizes
e6500 implements MMUv2 and supports power-of-2 page sizes rather than
power-of-4. Add support for such pages.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Prabhakar Kushwaha [Mon, 14 Jan 2013 18:26:57 +0000 (18:26 +0000)]
powerpc/85xx: Add BSC9132QDS support
BSC9132QDS is a Freescale reference design board for BSC9132 SoC.
BSC9132 SOC is an integrated device that targets the evolving Microcell,
Picocell, and Enterprise-Femto base station market subsegments.
It combines Power Architecture e500v2 and DSP StarCore SC3850 core
technologies with MAPLE-B2F baseband acceleration processing elements.
BSC9132QDS Overview
--------------------
2Gbyte DDR3 (on board DDR), Dual Ranki
32Mbyte 16bit NOR flash
128Mbyte 2K page size NAND Flash
256 Kbit M24256 I2C EEPROM
128 Mbit SPI Flash memory
SD slot
USB-ULPI
eTSEC1: Connected to SGMII PHY
eTSEC2: Connected to SGMII PHY
PCIe
CPRI
SerDes
I2C RTC
DUART interface: supports one UARTs up to 115200 bps for console display
Apart from the above it also consists various peripherals to support DSP
functionalities.
This patch adds support for mainly Power side functionalities and peripherals
Signed-off-by: Naveen Burmi <NaveenBurmi@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Prabhakar Kushwaha [Wed, 23 Jan 2013 17:59:57 +0000 (17:59 +0000)]
powerpc/mpc85xx: Add BSC9132/BSC9232 processor support
The BSC9132 is a highly integrated device that targets the evolving
Microcell, Picocell, and Enterprise-Femto base station market subsegments.
The BSC9132 device combines Power Architecture e500 and DSP StarCore SC3850
core technologies with MAPLE-B2P baseband acceleration processing elements
to address the need for a high performance, low cost, integrated solution
that handles all required processing layers without the need for an
external device except for an RF transceiver or, in a Micro base station
configuration, a host device that handles the L3/L4 and handover between
sectors.
The BSC9132 SoC includes the following function and features:
- Power Architecture subsystem including two e500 processors with
512-Kbyte shared L2 cache
- Two StarCore SC3850 DSP subsystems, each with a 512-Kbyte private L2
cache
- 32 Kbyte of shared M3 memory
- The Multi Accelerator Platform Engine for Pico BaseStation Baseband
Processing (MAPLE-B2P)
- Two DDR3/3L memory interfaces with 32-bit data width (40 bits including
ECC), up to 1333 MHz data rate
- Dedicated security engine featuring trusted boot
- Two DMA controllers
- OCNDMA with four bidirectional channels
- SysDMA with sixteen bidirectional channels
- Interfaces
- Four-lane SerDes PHY
- PCI Express controller complies with the PEX Specification-Rev 2.0
- Two Common Public Radio Interface (CPRI) controller lanes
- High-speed USB 2.0 host and device controller with ULPI interface
- Enhanced secure digital (SD/MMC) host controller (eSDHC)
- Antenna interface controller (AIC), supporting four industry
standard JESD207/four custom ADI RF interfaces
- ADI lanes support both full duplex FDD support & half duplex TDD
- Universal Subscriber Identity Module (USIM) interface that
facilitates communication to SIM cards or Eurochip pre-paid phone
cards
- Two DUART, two eSPI, and two I2C controllers
- Integrated Flash memory controller (IFC)
- GPIO
- Sixteen 32-bit timers
Signed-off-by: Naveen Burmi <NaveenBurmi@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
James Yang [Mon, 7 Jan 2013 14:01:03 +0000 (14:01 +0000)]
powerpc/mpc8xxxx: FSL DDR debugger auto run of stored commands
This patch adds the ability for the FSL DDR interactive debugger to
automatically run the sequence of commands stored in the ddr_interactive
environment variable. Commands are separated using ';'.
ddr_interactive=compute; edit c0 d0 dimmparms caslat_X 0x3FC0; go
Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
James Yang [Fri, 4 Jan 2013 08:14:03 +0000 (08:14 +0000)]
README.fsl-ddr typos and update to reflect hotkey
Documentation fix to README.fsl-ddr to fix typos and
to reflect use of 'd' hotkey to enter the FSL DDR debugger.
Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
James Yang [Fri, 4 Jan 2013 08:14:02 +0000 (08:14 +0000)]
Add copy command to FSL DDR interactive
Add copy command which allows copying of DIMM/controller settings.
This saves tedious retyping of parameters for each identical DIMM
or controller.
Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
James Yang [Fri, 4 Jan 2013 08:14:01 +0000 (08:14 +0000)]
Fix data stage name matching issue
This fix allows the name of the stage to be specifed after the
controler and DIMM is specified. Prior to this fix, if the
data stage name is not the first entry on the command line,
the operation is applied to all controller and DIMMs.
Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
James Yang [Fri, 4 Jan 2013 08:14:00 +0000 (08:14 +0000)]
Move DDR command parsing to separate function
Move the FSL DDR prompt command parsing to a separate function
so that it can be reused.
Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
York Sun [Fri, 4 Jan 2013 08:13:59 +0000 (08:13 +0000)]
powerpc/mpc8xxx: Enable entering DDR debugging by key press
Using environmental variable "ddr_interactive" to activate interactive DDR
debugging seomtiems is not enough. For example, after updating SPD with a
valid but wrong image, u-boot won't come up due to wrong DDR configuration.
By enabling key press method, we can enter debug mode to have a chance to
boot without using other tools to recover the board.
CONFIG_FSL_DDR_INTERACTIVE needs to be defined in header file. To enter the
debug mode by key press, press key 'd' shortly after reset, like one would
do to abort auto booting. It is fixed to lower case 'd' at this moment.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Valentin Longchamp [Fri, 4 Jan 2013 04:06:17 +0000 (04:06 +0000)]
powerpc/p2041: set RCW and PBI files for .pbl build or P2041RDB
In order to be able to build a u-boot.pbl image, both the
CONFIG_PBLPBI_CONFIG and CONFIG_PBLRCW_CONFIG variables have to be
defined.
This patch sets these two files for the P2041RDB board.
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Valentin Longchamp [Fri, 4 Jan 2013 04:06:16 +0000 (04:06 +0000)]
powerpc/p2041: add RCW file for P2041RDB
All the dev boards of Freescale's QorIQ family have a RCW that is
supported by the u-boot.pbl build target. This patch adds one for the
P2041 dev board.
This RCW is suitable for the RAMBOOT_PBL scenarios and was tested on the
P2041RDB booting from the eSPI NOR Flash (P2041RDB_SPIFLASH config).
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Prabhakar Kushwaha [Sun, 23 Dec 2012 19:26:03 +0000 (19:26 +0000)]
powerpc/t4240qds: Print FPGA detail version
Qixis FPGA has tag data contains image name and build date.
It is helpful to identify the FPGA image precisely.
Signed-off-by: York Sun <yorksun@freescale.com>
Acked-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Shaveta Leekha [Sun, 23 Dec 2012 19:25:50 +0000 (19:25 +0000)]
powerpc/t4240qds: Add support to dump switch settings on t4240qds board
This function is called by "qixis_reset switch" command and
switch settings are calculated from qixis FPGA registers.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Shaveta Leekha [Sun, 23 Dec 2012 19:25:42 +0000 (19:25 +0000)]
powerpc/b4860qds: Add support to dump switch settings on b4860qds board
This function is called by "qixis_reset switch" command
and switch settings are calculated from FPGA/qixis registers.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Shaveta Leekha [Sun, 23 Dec 2012 19:25:35 +0000 (19:25 +0000)]
powerpc/qixis: enable qixis dump command and add switch dumping command
Remove #ifdef so that "qixis dump" command is always available
Add "qixis_reset switch" command to dump switch settings
Qixis doesn't have 1:1 switch mapping. We need to reverse engineer from
registers to figure out switch settings. Not all bits are available.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
York Sun [Sun, 23 Dec 2012 19:25:27 +0000 (19:25 +0000)]
powerpc/b4860qds: Added Support for B4860QDS
B4860QDS is a high-performance computing evaluation, development and
test platform supporting the B4860 QorIQ Power Architecture processor.
B4860QDS Overview
------------------
- DDRC1: Ten separate DDR3 parts of 16-bit to support 72-bit (ECC) at 1866MT/s,
ECC, 4 GB of memory in two ranks of 2 GB.
- DDRC2: Five separate DDR3 parts of 16-bit to support 72-bit (ECC) at 1866MT/s, ECC, 2 GB of memory. Single rank.
- SerDes 1 multiplexing: Two Vitesse (transmit and receive path) cross-point
16x16 switch VSC3316
- SerDes 2 multiplexing: Two Vitesse (transmit and receive path) cross-point
8x8 switch VSC3308
- USB 2.0 ULPI PHY USB3315 by SMSC supports USB port in host mode.
- B4860 UART port is available over USB-to-UART translator USB2SER or over
RS232 flat cable.
- A Vitesse dual SGMII phy VSC8662 links the B4860 SGMII lines to 2xRJ-45 copper
connectors for Stand-alone mode and to the 1000Base-X over AMC MicroTCA
connector ports 0 and 2 for AMC mode.
- The B4860 configuration may be loaded from nine bits coded reset
configuration reset source. The RCW source is set by appropriate
DIP-switches:
- 16-bit NOR Flash / PROMJet
- QIXIS 8-bit NOR Flash Emulator
- 8-bit NAND Flash
- 24-bit SPI Flash
- Long address I2C EEPROM
- Available debug interfaces are:
- On-board eCWTAP controller with ETH and USB I/F
- JTAG/COP 16-pin header for any external TAP controller
- External JTAG source over AMC to support B2B configuration
- 70-pin Aurora debug connector
- QIXIS (FPGA) logic:
- 2 KB internal memory space including
- IDT840NT4 clock synthesizer provides B4860 essential clocks : SYSCLK,
DDRCLK1, 2 and RTCCLK.
- Two 8T49N222A SerDes ref clock devices support two SerDes port clocks
- total four refclk, including CPRI clock scheme
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Sandeep Singh <Sandeep@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Prabhakar Kushwaha [Sun, 23 Dec 2012 19:25:18 +0000 (19:25 +0000)]
powerpc/mpc85xx:Fix Core cluster configuration loop
Different personalities/derivatives of SoC may have reduced cluster. But it is
not necessary for last valid DCFG_CCSR_TP_CLUSTER register to have
DCFG_CCSR_TP_CLUSTER[EOC] bit set to represent "End of Clusters".
EOC bit can still be set in last DCFG_CCSR_TP_CLUSTER register of orignal SoC
which may not be valid for the personality.
So add initiator type check to find valid cluster.
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Prabhakar Kushwaha [Sun, 23 Dec 2012 19:24:47 +0000 (19:24 +0000)]
board/freescale/common:Add support of QTAG register
QIXIS FPGA's QIXIS Tag Access register (QTAG) defines TAG, VER, DATE, IMAGE
fields. These fields have FPGA build version, image name and build date
information.
Add support to parse these fields to have complete FPGA image information.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Poonam Aggrwal [Sun, 23 Dec 2012 19:24:16 +0000 (19:24 +0000)]
powerpc/mpc85xx:Add support of B4420 SoC
B4420 is a reduced personality of B4860 with fewer core/clusters(both SC3900
and e6500), fewer DDR controllers, fewer serdes lanes, fewer SGMII interfaces and
reduced target frequencies.
Key differences between B4860 and B4420
----------------------------------------
B4420 has:
1. Fewer e6500 cores: 1 cluster with 2 e6500 cores
2. Fewer SC3900 cores/clusters: 1 cluster with 2 SC3900 cores per cluster.
3. Single DDRC
4. 2X 4 lane serdes
5. 3 SGMII interfaces
6. no sRIO
7. no 10G
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Poonam Aggrwal [Sun, 23 Dec 2012 19:22:33 +0000 (19:22 +0000)]
powerpc/mpc85xx: Few updates for B4860 cpu changes
- Added some more serdes1 and serdes2 combinations
serdes1= 0x2c, 0x2d, 0x2e
serdes2= 0x7a, 0x8d, 0x98
- Updated Number of DDR controllers to 2.
- Added FMAN file for B4860, drivers/net/fm/b4860.c
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Sandeep Singh <Sandeep@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Hongtao Jia [Thu, 20 Dec 2012 19:39:53 +0000 (19:39 +0000)]
powerpc/mpc8544ds: Add USB controller support for MPC8544DS
USB controller in uboot is a required feature for MPC8544DS. Without this
support there is no 'usb' command in uboot.
Signed-off-by: Jia Hongtao <B38951@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Hongtao Jia [Thu, 20 Dec 2012 19:36:12 +0000 (19:36 +0000)]
powerpc/mpc8572ds: Enable bank interleaving to cs0+cs1 for dual-rank DIMMs
The controller interleaving only takes the usable memory mapped to cs0. In
the case of bank interleaving not enabled, only half of dual-rank DIMM will
be used.
For single-rank DIMM bank interleaving will be auto disabled.
Signed-off-by: Jia Hongtao <B38951@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
York Sun [Wed, 19 Dec 2012 17:23:05 +0000 (17:23 +0000)]
powerpc/t4240qds: Update IFC timing for NOR flash
Relax parameters to give address latching more time to setup.
Tighten parameters to make it overall faster.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Prabhakar Kushwaha [Tue, 18 Dec 2012 17:23:19 +0000 (17:23 +0000)]
boards/T4240qds:Fix IFC AMASK init as per FPGA register space
T4240QDS's QIXIS FPGA has 4k register space size and IFC controller's
Address Mask Registers is initialised 64K size.
So Fix the Address Mask Register initilisation as 4K
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Prabhakar Kushwaha [Tue, 18 Dec 2012 00:15:45 +0000 (00:15 +0000)]
board/T4240qds:Fix TLB and LAW size of NAND flash
The internal SRAM of Freescale's IFC NAND machine is of 64K and controller's
Address Mask Registers is initialised with the same.
So Update TLB and LAW size of NAND flash accordingly.
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
York Sun [Fri, 14 Dec 2012 06:21:58 +0000 (06:21 +0000)]
powerpc/mpc85xx: Reserve default boot page
The boot page in memory is already reserved so OS won't overwrite.
As long as the boot page translation is active, the default boot page
also needs to be reserved in case the memory is 4GB or more.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Timur Tabi [Wed, 12 Dec 2012 11:07:12 +0000 (11:07 +0000)]
powerpc/t4qds: move VSC3316 config data from t4qds.h to t4qds.c
Static variables should be defined in C files, not header files, because
otherwise every C file that #includes the header file will generate a
duplicate of the variables. Since the vsc3316_xxx[] arrays are only
used by t4qds.c anyway, just put the variables there.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Shaohui Xie [Mon, 3 Dec 2012 21:36:32 +0000 (21:36 +0000)]
powerpc/p2041: move Lanes mux to board early init
Lanes mux currently is configured in eth.c when initializing FMAN ethernet
ports, but SRIO and PCIe also need lanes mux, so we move the lanes mux to
p2041rdb.c which implements a board-specific initialization and will be
called at early stage.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Tom Rini [Tue, 29 Jan 2013 20:36:27 +0000 (15:36 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-i2c
Tom Rini [Tue, 29 Jan 2013 20:36:23 +0000 (15:36 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-mpc83xx
Michael Jones [Wed, 16 Jan 2013 00:44:29 +0000 (00:44 +0000)]
Remove unused CONFIG_SYS_I2C_BUS[_SELECT]
"CONFIG_SYS_I2C_BUS" and "CONFIG_SYS_I2C_BUS_SELECT" don't appear anywhere
outside of config files.
Signed-off-by: Michael Jones <michael.jones@matrix-vision.de>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Marek Vasut [Sun, 16 Dec 2012 02:48:16 +0000 (02:48 +0000)]
i2c: mxs: Staticize the functions in the driver
The local functions in the mxs i2c driver are not marked static, make it so.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Gabor Juhos [Thu, 24 Jan 2013 06:27:55 +0000 (06:27 +0000)]
MIPS: start.S: don't save flush_cache parameters in advance
Saving the parameters in advance unnecessarily complicates
the code. The destination address is already saved in the
's2' register, and that register is not clobbered by the
copy loop. The size of the copied data can be computed
after the copy loop is done.
Change the code to compute the size parameter right
before calling flush_cache, and set the destination
address parameter in the delay slot of the actuall
call.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Gabor Juhos [Thu, 24 Jan 2013 06:27:54 +0000 (06:27 +0000)]
MIPS: start.S: simplify relocation offset calculation
The current code uses four instructions and a
temporary register to calculate the relocation
offset and to adjust the gp register.
The relocation offset can be calculated directly
from the CONFIG_SYS_MONITOR_BASE constant and from
the destination address. The resulting offset can
be used to adjust the gp pointer.
This approach makes the code a bit simpler because
it needs two instructions only.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Gabor Juhos [Thu, 24 Jan 2013 06:27:53 +0000 (06:27 +0000)]
MIPS: start.S: save reused arguments earlier in relocate_code
Save the reused parameters at the beginning
of the 'relocate_code' function. This makes
the function a bit more readable.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Gabor Juhos [Thu, 24 Jan 2013 06:27:52 +0000 (06:27 +0000)]
MIPS: start.S: set sp register directly
The current code uses two instructions to load
the stack pointer into the 'sp' register.
This results in the following assembly code:
468:
3c088040 lui t0,0x8040
46c:
251d0000 addiu sp,t0,0
The first instuction loads the stack pointer into
the 't0' register then the value of the 'sp' register
is computed by adding zero to the value of the 't0'
register. The same issue present on the 64-bit version
as well:
56c:
3c0c8040 lui t0,0x8040
570:
659d0000 daddiu sp,t0,0
Change the code to load the stack pointer directly
into the 'sp' register. The generated code is functionally
equivalent to the previous version but it is simpler.
32-bit:
468:
3c1d8040 lui sp,0x8040
64-bit:
56c:
3c1d8040 lui sp,0x8040
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Gabor Juhos [Thu, 24 Jan 2013 06:27:51 +0000 (06:27 +0000)]
MIPS: start.S: fix boundary check in relocate_code
The loop code copies more data with one than
necessary due to the 'ble' instuction. Use the
'blt' instruction instead to fix that.
Due to the lack of suitable hardware the Xburst
specific code is compile tested only. However the
change is quite obvious.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Gabor Juhos [Wed, 16 Jan 2013 03:05:01 +0000 (03:05 +0000)]
MIPS: start{, 64}.S: fill branch delay slots with NOP instructions
The romReserved and romExcHandle handlers are
accessed by a branch instruction however the
delay slots of those instructions are not filled.
Because the start.S uses the 'noreorder' directive,
the assembler will not fill the delay slots either,
and leads to the following assembly code:
0000056c <romReserved>:
56c:
1000ffff b 56c <romReserved>
00000570 <romExcHandle>:
570:
1000ffff b 570 <romExcHandle>
In the resulting code, the second branch instruction
is placed into the delay slot of the first branch
instruction, which is not allowed on the MIPS
architecture.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Gabor Juhos [Wed, 16 Jan 2013 02:39:23 +0000 (02:39 +0000)]
MIPS: convert IO port accessor functions to 'static inline'
The currently used 'extern inline' directive causes
the following compiler warnings if CONFIG_SWAP_IO_SPACE
is defined:
<...>/include/asm/io.h:345:1: warning: '__fswab32' is static but used in inline function '__outlc_p' which is not static [enabled by default]
<...>/include/asm/io.h:345:1: warning: '__fswab32' is static but used in inline function '__outl_p' which is not static [enabled by default]
<...>/include/asm/io.h:345:1: warning: '__fswab32' is static but used in inline function '__outlc' which is not static [enabled by default]
<...>/include/asm/io.h:345:1: warning: '__fswab32' is static but used in inline function '__outl' which is not static [enabled by default]
<...>/include/asm/io.h:344:1: warning: '__fswab16' is static but used in inline function '__outwc_p' which is not static [enabled by default]
<...>/include/asm/io.h:344:1: warning: '__fswab16' is static but used in inline function '__outw_p' which is not static [enabled by default]
<...>/include/asm/io.h:344:1: warning: '__fswab16' is static but used in inline function '__outwc' which is not static [enabled by default]
<...>/include/asm/io.h:344:1: warning: '__fswab16' is static but used in inline function '__outw' which is not static [enabled by default]
<...>/include/asm/io.h:341:1: warning: '__fswab32' is static but used in inline function '__inlc_p' which is not static [enabled by default]
<...>/include/asm/io.h:341:1: warning: '__fswab32' is static but used in inline function '__inl_p' which is not static [enabled by default]
<...>/include/asm/io.h:341:1: warning: '__fswab32' is static but used in inline function '__inlc' which is not static [enabled by default]
<...>/include/asm/io.h:341:1: warning: '__fswab32' is static but used in inline function '__inl' which is not static [enabled by default]
<...>/include/asm/io.h:340:1: warning: '__fswab16' is static but used in inline function '__inwc_p' which is not static [enabled by default]
<...>/include/asm/io.h:340:1: warning: '__fswab16' is static but used in inline function '__inw_p' which is not static [enabled by default]
<...>/include/asm/io.h:340:1: warning: '__fswab16' is static but used in inline function '__inwc' which is not static [enabled by default]
<...>/include/asm/io.h:340:1: warning: '__fswab16' is static but used in inline function '__inw' which is not static [enabled by default]
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Gabor Juhos [Wed, 16 Jan 2013 02:39:22 +0000 (02:39 +0000)]
MIPS: use inline directive for __in*s functions
All other IO accessor functions are using the
'inline' directive. Use that also for the __in*s
to make it consistent with the other variants.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Kim Phillips [Thu, 17 Jan 2013 00:34:09 +0000 (18:34 -0600)]
Merge remote-tracking branch 'mpc83xx/next'
Daniel Schwierzeck [Sat, 12 Jan 2013 18:09:11 +0000 (19:09 +0100)]
README.mips: update known issues and TODOs
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Daniel Schwierzeck [Sat, 12 Jan 2013 17:58:54 +0000 (18:58 +0100)]
README.qemu-mips: move README file from board to doc directory
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Daniel Schwierzeck [Tue, 8 Jan 2013 16:51:11 +0000 (17:51 +0100)]
MIPS: qemu-mips: update and fix example usage in README
By now U-Boot supports Qemu MIPS for little and big endian
as well as 32 bit and 64 bit. Update and fix the example usage
in the README to reflect this.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Gabor Juhos [Tue, 8 Jan 2013 02:22:51 +0000 (02:22 +0000)]
MIPS: qemu-mips: add '-M mips' switch to the example usage command
Using the example command from the README file does
not work as expected. qemu shows a text similar to
the one below and it hangs.
$ qemu-system-mips -L . -nographic
Could not open option rom 'pxe-pcnet.rom': No such file or directory
qemu-system-mips: pci_add_option_rom: failed to find romfile "vgabios-cirrus.bin"
qemu: terminating on signal 15 from pid 19726
This happens because qemu emulates a Malta board by
default if the machine type is not defined explicitely
on the command line.
For a working test, the '-M mips' switch is required:
$ qemu-system-mips -M mips -L . -nographic
Could not open option rom 'vgabios.bin': No such file or directory
U-Boot 2013.01-rc2-00132-g1e8e648-dirty (Jan 08 2013 - 09:06:42)
Board: Qemu -M mips CPU: 24Kf proc_id=0x19300
DRAM: 128 MiB
## Unknown flash on Bank 1 - Size = 0x00000000 = 0 MB
Flash: 0 Bytes
*** Warning - bad CRC, using default environment
In: serial
Out: serial
Err: serial
Net: NE2000
Hit any key to stop autoboot: 0
qemu-mips #
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Cc: Vlad Lungu <vlad.lungu@windriver.com>
Gabor Juhos [Tue, 8 Jan 2013 02:22:50 +0000 (02:22 +0000)]
MIPS: qemu-mips: fix a typo in README
The 'Limitations & comments' section refers to the
'-m mips' switch which is not valid. The '-m' switch
can be used for setting the virtual RAM size:
$qemu-system-mips --help | grep '^-m '
-m megs set virtual RAM size to megs MB [default=128]
$
The correct switch for specifying the machine type is '-M'.
Fix the text to refer to that.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Cc: Vlad Lungu <vlad.lungu@windriver.com>
Gabor Juhos [Mon, 7 Jan 2013 02:53:42 +0000 (02:53 +0000)]
MIPS: bootm.c: add support for 'prep' and 'go' subcommands
The bootm command supports subcommands since long time
however those subcommands are not yet usable on MIPS.
The patch is based on the ARM implementation, and it adds
support for the 'prep' and 'go' subcommands only.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Gabor Juhos [Mon, 7 Jan 2013 02:53:41 +0000 (02:53 +0000)]
MIPS: bootm.c: separate environment initialization
Move the environment initialization code into a
separate function. This make the code reusable
for bootm subcommands.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Gabor Juhos [Mon, 7 Jan 2013 02:53:40 +0000 (02:53 +0000)]
MIPS: bootm.c: separate linux jump code
Move the actual jump code into a separate function.
This make the code reusable for bootm subcommands.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Gabor Juhos [Sun, 6 Jan 2013 00:54:20 +0000 (00:54 +0000)]
MIPS: bootm.c: use debug macro to print debug message
The '## Transferring control ...' message is printed
only if DEBUG is enabled. Get rid of the 'ifdef DEBUG'
statement and use the debug macro instead.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Tom Rini [Tue, 15 Jan 2013 21:47:42 +0000 (14:47 -0700)]
Prepare v2013.01
Signed-off-by: Tom Rini <trini@ti.com>
Łukasz Dałek [Sat, 12 Jan 2013 11:39:27 +0000 (11:39 +0000)]
pxa: Save lr register in relocate_code function
When u-boot is compiled for PXA25x processor, pxa/start.S is calling
cpu_init_crit by BL instruction. BL is overwriting lr register so
relocate_code is going into infinite loop. This patch preservs lr
register in r12 before calling cpu_init_crit and after function returns
restores it.
Signed-off-by: Lukasz Dalek <luk0104@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
Tom Rini [Mon, 14 Jan 2013 22:41:38 +0000 (15:41 -0700)]
Merge branch 'master' of git://git.denx.de/u-boot-video
Tom Rini [Mon, 14 Jan 2013 22:30:31 +0000 (15:30 -0700)]
Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-staging
Peter Meerwald [Mon, 19 Nov 2012 23:13:04 +0000 (23:13 +0000)]
twl4030: fix 'could could' in error messages
Signed-off-by: Peter Meerwald <p.meerwald@bct-electronic.com>
Tom Rini [Mon, 14 Jan 2013 20:10:07 +0000 (13:10 -0700)]
watchdog.h: Move hw_watchdog_init prototype to end, guard
In commit abbab70 we added a prototype for hw_watchdog_init, in a
Freescale i.MX watchdog driver. We did not however guard it with an
__ASSEMBLY__ check and broke some platforms. Move this to the end of
the file with other prototypes and guard it.
Signed-off-by: Tom Rini <trini@ti.com>
Wolfgang Denk [Thu, 3 Jan 2013 00:43:59 +0000 (00:43 +0000)]
VIDEO: better document the correct use of CONFIG_FB_ADDR
Signed-off-by: Wolfgang Denk <wd@denx.de>
cc: Anatolij Gustschin <agust@denx.de>
Nikita Kiryanov [Thu, 20 Dec 2012 00:52:34 +0000 (00:52 +0000)]
lcd: restore ability to display 8 bpp BMPs on 16 bpp LCDs
Commit
fb6a9aab7ae78c (LCD: display 32bpp decompressed bitmap image)
broke the check that allowed U-Boot to display 8 bpp BMPs on a 16
bpp LCD screen, effectively turning this feature off.
Restore this feature by changing the check back to the same meaning
it originally had.
To avoid future confusion, the check has also been rephrased to make
its meaning clear.
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Albert ARIBAUD [Mon, 14 Jan 2013 16:00:02 +0000 (17:00 +0100)]
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
Albert ARIBAUD [Mon, 14 Jan 2013 14:21:00 +0000 (15:21 +0100)]
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
Ajay Kumar [Sun, 13 Jan 2013 23:32:16 +0000 (23:32 +0000)]
video: exynos_fb: Make a call to draw_logo only when CONFIG_CMD_BMP is selected
Previously, the call to draw_logo() was happening irrespective
of whether we have selected logo or LCD console.
With this patch we call draw_logo() only when CONFIG_CMD_BMP is selected.
This would even fix the following compilation warning:
exynos_fb.c: In function 'draw_logo':
exynos_fb.c:74:8: warning: variable 'addr' set but not used
[-Wunused-but-set-variable]
exynos_fb.c:73:9: warning: variable 'y' set but not used
[-Wunused-but-set-variable]
exynos_fb.c:73:6: warning: variable 'x' set but not used
[-Wunused-but-set-variable]
Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Ajay Kumar [Sun, 13 Jan 2013 23:32:15 +0000 (23:32 +0000)]
video: exynos_dp: Remove unused variable disp_info
Remove unused variable disp_info to fix the following compilation warning:
exynos_dp.c: In function 'exynos_init_dp':
exynos_dp.c:860:23: warning: variable 'disp_info' set but not used
[-Wunused-but-set-variable]
Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Rajeshwari Shinde [Sun, 13 Jan 2013 19:49:36 +0000 (19:49 +0000)]
I2C: S3C24X0: Resolve build error for VCMA9
This patch resolves the following build errors for I2C driver in
VCMA9:
In file included from s3c24x0_i2c.c:40:0:
s3c24x0_i2c.h:38:17: error: field 'id' has incomplete type
s3c24x0_i2c.c:70:39: error: 'CONFIG_MAX_I2C_NUM' undeclared here (not
in a function) s3c24x0_i2c.c:70:31: warning: 'i2c_bus' defined but
not used [-Wunused-variable] s3c24x0_i2c.c:72:12: warning:
'i2c_busses' defined but not used [-Wunused-variable]
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Fabio Estevam [Wed, 9 Jan 2013 04:55:09 +0000 (04:55 +0000)]
mx51evk: Add DVI output support
Add DVI output support and make it the default video output.
Currently the CLAA WVGA panel is supported, but this panel has to be purchased
separately, so using the DVI output as the default would allow more people to
try the splash screen feature on a mx51evk.
If someone still wants to use the CLAA WVGA, just set the panel variable as:
set panel claa
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>