Use the right parameters to initialize bit rate context

Reported-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Don't advertise CBR for MPEG-2 encoding

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Fix vp8 partition offset set error

Signed-off-by: Zhong Li <zhong.li@intel.com>

Fix vp8 p frame decode error issue.

Signed-off-by: Zhong Li <zhong.li@intel.com>

vp8 dec: fix when bool_coder_ctx.count is 0

bool_coder_ctx.count is remaining bits,
hw requires used-bits-count: 8-bool_coder_ctx.count, range [0,7]
update offset and partition_size[0] as well

Signed-off-by: Zhao Halley <halley.zhao@intel.com>

vp8 dec: follows va_dec_vp8.h update

    key_frame:0 means an intra frame
    bool_coder_ctx.count is the remaining bits in bool_coder_ctx.value, range[0,7)
    slice_data_offset/macroblock_offset update

Signed-off-by: Zhao Halley <halley.zhao@intel.com>

Remove the unnecessary sorting to simplify the DPB buffer management

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Complain the warning instead of assert fault when slice picture is not found in DPB for decoder

This is to fix the bug https://bugs.freedesktop.org/show_bug.cgi?id=72660

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

VPP: Correct return value of vpp gpe functions

Signed-off-by: Li Xiaowei <xiaowei.a.li@intel.com>

Remove the whitespace following trailing backslash in a Makefile.am

src/shaders/post_processing/gen8/Makefile.am:31: whitespace following trailing backslash
src/shaders/post_processing/gen8/Makefile.am:32: whitespace following trailing backslash

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

VPP: Enable sharpening feature on BDW

Signed-off-by: Li Xiaowei <xiaowei.a.li@intel.com>

VPP: Refine code for sharpening on Haswell

Signed-off-by: Li Xiaowei <xiaowei.a.li@intel.com>

VEBOX/bdw: set downsample method

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

VEBOX/bdw: DW0-DW8 are used for dndi parameters in VEBOX_DNDI_STATE

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Add one environment variable to check the benchmark of decoding/vaPutsurface

The swap_buffer callback will wait for the completion of buffer swap, which
will affect the benchmark test of decoding/vaPutSurface.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Render/BDW: Align each offset with 64 bytes

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Render/BDW: Initialize the blend_state for rendering

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Render/HSW: Fix the bug caused by merging code

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Update the MFX_AVC_IMAGE_STATE to follow the spec

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Fix the incorrect MV upper bound setting of MFC_IND_OBJ_BASE_ADDRESS_STAE for encoding on gen8

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Fix the wrong VPP initialization function for Dn/DI on Ivybridge

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Add the VPP shader of conversion between YUY2 and YUY2 on BDW

Signed-off-by: Zhao Yakui <yakui.zhao2intel.com>

Use the pp_null_initialize function for the unsupported VPP on BDW

The Dn/DI will be implemented by using VEBOX and doesn't use the VPP shader any more.
So the corresponding VPP shader should use the pp_null_initialize hook function.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Fix the error for the VPP conversion of NV12->NV12 on BDW

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Use the correct sub-context for VPP on BDW to avoid the NULL pointer

The structure of sub-context is updated for VPP in the commit of
4faf6bf47f8e4e2fe587e3bb6a004340edd59c4c. So BDW should update the correct
sub-context.Otherwise the segment fault will be triggered.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Add the support of querying the surface attributes on BDW

Otherwise the user-space application doesn't query which surfaceformat is
supported by the libva-vappi driver on BDW.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Fix the wrong pitch of surface for Video post-processing on BDW

Now the object surface already contains the pitch after the object surface
structure is reworked in the commit f886f24eaaacba9544fa5f6405b7382c686f3a1f.
So it is unnecessary to calculate the pitch based on the width.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Follow the spec to make the VPP media pipeline work in 48-bit addressing mode

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Fix the error of offset calculation for encoding on BDW

Currently although the encoding can work well, the offset in the internal
object is calculated incorrectly. So fix it to avoid the potential issue.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

VPP/bdw: Fix the initialize function used for NV12 to NV12

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Add the ring supported for bdw vpp filters

Signed-off-by: Zhong Li <zhong.li@intel.com>

Fix a bug of vp8 quant index calculation error

Signed-off-by: Zhong Li <zhong.li@intel.com>

Remove the unused function of gen7_pp_rgbx_avs_initialize

This is not used any more after it uses the same gen7_pp_plx_avs_initialize
function for RGBX input on Ivy/Haswell.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Configure VPP parameter for RGBX input so that Haswell/Ivy uses the same gen7_pp_plx_avs_initialize

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Update the supported render target format and pixel format for JPEG on BDW

This is picked up from the commit a90e80fb7fde114535ab5e9be74d973117def138
on Ivy/Haswell. Otherwise the JPEG on BDW can't work as expected.

Signed-off-by: Xiang Haihao <haihao.xiang@intel.com>
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Add the support of color BT709/SMPTE240M for color-space conversion on BDW

This is picked up from that on Haswell/Ivybridge.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Add the support of brightness/contrast/hue/saturation for BDW rendering

This is picked up from the commit 04ecb6e79f4382d96eb5d4b51733049d420f592a

Signed-off-by: Xiang Haihao <haihao.xiang@intel.com>
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Fix the error in render shader for subpicture

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Fix the error in render shader for BDW

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Explicitly declare the color blend operation for subpicture on BDW

Without this it still can work. This is only human-readable.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Fix the incorrect setting for subpicture on BDW

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

BDW encoding reuses aux_batchbuffer instead of allocating another new buffer

This is picked up from that on Haswell/Ivybridge.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Calculate required space of batch buffer to avoid buffer overflow in encoding on BDW

The required size is based on the number of macroblocks and slice parameter.
Then it can avoid that too large buffer is allocated or possible overflow.
This is picked up from that on Haswell/Ivybridge.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Handle the aux_batchbuffer correctly for H264 encoding on Haswell

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Follow spec to update the URB entry/size setting for encoding on Haswell/BDW

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Rendering/bdw: fix push constant buffer for PS

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

BDW doesn't support H.264 Baseline profile

The similar fix to f765987

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Follow the spec to make the 3D pipeline work in 48-bit addressing mode

Signed-off-by: Xiang Haihao <haihao.xiang@intel.com>
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

follow the spec to fill the Vertex URB entry on BDW

Signed-off-by: Xiang Haihao <haihao.xiang@intel.com>
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Add the missing 3D pipeline command for rendering on BDW

Signed-off-by: Xiang Haihao <haihao.xiang@intel.com>
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Follow the spec to restrict the max number of PS thread

Signed-off-by: Xiang Haihao <haihao.xiang@intel.com>
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Enable the Intra-prediction for MPEG2 P-B frame on BDW

This is picked up from the implementation on Haswell/Ivybridge.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Fix incorrect MI_BATCH_BUFFER_START command for MPEG2 encoding on BDW

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Follow the spec to make BDW encoding media pipeline command support 48-bit addressing mode

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Fix the command error for MPEG2 encoding on BDW

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Add the missing media pipeline command for encoding on BDW

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Update the pipe_control command on Gen8 to make media pipeline work

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Fix one error of VME shader for MPEG2 encoding on BDW

Otherwise the MPEG2 encoding will use the incorrect prediction result for the
macroblocks in the first row if the MVP is used

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Fix one error of VME shader for H264 encoding on BDW

Otherwise the h264 encoding will use the incorrect prediction result for the
macroblocks in the first row if the MVP is used

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

VPP: add vebox motion compensation support on BDW

Signed-off-by: Zhong Li <zhong.li@intel.com>

Follow the input Picture/Slice parameters for SLICE_STATE command on BDW

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Pass the reference frame index in List0/1 into the PAK command on BDW

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Clean up for setting up reference surface state on BDW

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Fix refrence frame for list1 on BDW

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Check the reference surface id against VA_INVALID_SURFACE on BDW

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Indent the code of encoding on BDW

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

VPP/bdw: a NULL shader for packed 4:2:2 to packed 4:2:2

!!! Develop the shader later

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Remove the duplicated header file for mpeg2 encoding on Gen8

The vme75_mepg2.inc is also enough for the mpeg2 encoding on Gen8.
And vme8_mpeg2.inc is redundant.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Remove unnecessary GPU binary shader of mpeg2 encoding on Gen8

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Code cleanup about the media encoding on Gen8

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Optimize quantization rounding precision of MPEG2 encoding on Gen8

This is from that on Ivy/Haswell.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Optimize the VME shader for MPEG2 encoding on Gen8

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Add the MVP in GPU shader to optimize mpeg2 encoding on Gen8

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Rewrite the GPU VME shader for MPEG2 encoding on Gen8

This is from that on Haswell/Ivybridge. Now the MPEG2/H264 uses the same
mode/motion vector prediction shader. But the MV search region of mpeg2
is different with that on H264, which causes that the wrong mode/motion
vector prediction is used for MPEG2.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Bulid BDW vebox pipeline

Build gen8 vebox pipeline, and ProcAMP has been enabled and verified on simulator.
However, DN/DI need further effort.

Signed-off-by: Zhong Li <zhong.li@intel.com>

PAK encoding uses the reference list parsed from slice_param instead of hacked DPB

This is backported from Sandybridge/Ivybridge/Haswell.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

VME uses reference frame parsed from slice_param instead of hacked DPB for Gen8

This is backported from Ivy/Haswell/Sandybridge.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

VPP: add VPP Filters for BDW

Needs to rebuild the shader for VAProcFilterSharpening on BDW

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Add the conversion from YUYV to NV12/I420

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Add the CSC conversion from NV12/I420 to YUYV

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

New PCI IDs for BDW

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Vp8 quant index converted to quant value on BDW

Signed-off-by: Zhong Li <zhong.li@intel.com>

Enable loop-deblock of bdw vp8 decoder

When deblock is enable, post-deblocking bo should be used as output
buffer.

Signed-off-by: Zhong Li <zhong.li@intel.com>

Remove unnecessary asserts

I think these two asserts are not necessary, and they will cause assert failure when probability buffer created.

Signed-off-by: Zhong Li <zhong.li@intel.com>

Fix a vp8 decoder picture parameter error

(1) log2(num_of_partition - 1) should be set to picture state as BSpec
(2) add an assert about probability buffer

Signed-off-by: Zhong Li <zhong.li@intel.com>

Add the VPP shader of RGBX->NV12 conversion

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Follow the bspec to workaround the NV12->RGBX conversion issue on BDW

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Add the VPP shader of NV12->RGBX conversion

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Add the VPP shader of PL3 AVS conversion between YV12 and I420

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Add the VPP shader of YV12/I420->NV12 conversion

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Add the VPP shader of NV12->YV12/I420 conversion

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Handle the pitch when using RGBX surface in VPP for BDW

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Set BSP buffer for VP8 decoding

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Use the horizontal/vertical alignment for VPP surface on BDW

This is hardware requirement.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Create the image with aligned width/height on BDW

The hardware requires that the surface pitch should be 64 alignment.
Otherwise the data port can't be accessed correctly.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Add the NV12 scaling shader for BDW

This is the first VPP shader for BDW,which is used to do the
NV12 scaling conversion.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Initialize the 8x8 sampler for AVS on BDW

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Add the 8x8 sampler for BDW

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Upload the constant buffer on Gen6+

Signe-off-by: Zhao Yakui <yakui.zhao@intel.com>

Update states for VP8 decoding on BDW

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>