Zhao Yakui [Tue, 17 Dec 2013 06:32:35 +0000 (14:32 +0800)]
Enable the Intra-prediction for MPEG2 P-B frame on BDW
This is picked up from the implementation on Haswell/Ivybridge.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Zhao Yakui [Tue, 17 Dec 2013 06:32:29 +0000 (14:32 +0800)]
Fix incorrect MI_BATCH_BUFFER_START command for MPEG2 encoding on BDW
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Zhao Yakui [Fri, 13 Dec 2013 09:03:47 +0000 (17:03 +0800)]
Follow the spec to make BDW encoding media pipeline command support 48-bit addressing mode
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Zhao Yakui [Fri, 13 Dec 2013 07:18:56 +0000 (15:18 +0800)]
Fix the command error for MPEG2 encoding on BDW
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Zhao Yakui [Fri, 13 Dec 2013 07:18:56 +0000 (15:18 +0800)]
Add the missing media pipeline command for encoding on BDW
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Zhao Yakui [Fri, 13 Dec 2013 07:18:56 +0000 (15:18 +0800)]
Update the pipe_control command on Gen8 to make media pipeline work
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Zhao Yakui [Mon, 4 Nov 2013 01:43:23 +0000 (09:43 +0800)]
Fix one error of VME shader for MPEG2 encoding on BDW
Otherwise the MPEG2 encoding will use the incorrect prediction result for the
macroblocks in the first row if the MVP is used
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Zhao Yakui [Mon, 4 Nov 2013 01:43:19 +0000 (09:43 +0800)]
Fix one error of VME shader for H264 encoding on BDW
Otherwise the h264 encoding will use the incorrect prediction result for the
macroblocks in the first row if the MVP is used
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Zhong Li [Sun, 13 Oct 2013 15:11:54 +0000 (23:11 +0800)]
VPP: add vebox motion compensation support on BDW
Signed-off-by: Zhong Li <zhong.li@intel.com>
Xiang, Haihao [Tue, 8 Oct 2013 05:27:55 +0000 (13:27 +0800)]
Follow the input Picture/Slice parameters for SLICE_STATE command on BDW
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Tue, 8 Oct 2013 05:20:39 +0000 (13:20 +0800)]
Pass the reference frame index in List0/1 into the PAK command on BDW
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Tue, 8 Oct 2013 05:11:18 +0000 (13:11 +0800)]
Clean up for setting up reference surface state on BDW
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Tue, 8 Oct 2013 03:22:46 +0000 (11:22 +0800)]
Fix refrence frame for list1 on BDW
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Tue, 8 Oct 2013 03:05:28 +0000 (11:05 +0800)]
Check the reference surface id against VA_INVALID_SURFACE on BDW
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Tue, 8 Oct 2013 03:02:56 +0000 (11:02 +0800)]
Indent the code of encoding on BDW
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Tue, 10 Sep 2013 02:24:14 +0000 (10:24 +0800)]
VPP/bdw: a NULL shader for packed 4:2:2 to packed 4:2:2
!!! Develop the shader later
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Zhao Yakui [Thu, 15 Aug 2013 07:18:39 +0000 (15:18 +0800)]
Remove the duplicated header file for mpeg2 encoding on Gen8
The vme75_mepg2.inc is also enough for the mpeg2 encoding on Gen8.
And vme8_mpeg2.inc is redundant.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Zhao Yakui [Thu, 15 Aug 2013 07:18:39 +0000 (15:18 +0800)]
Remove unnecessary GPU binary shader of mpeg2 encoding on Gen8
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Zhao Yakui [Thu, 15 Aug 2013 07:18:39 +0000 (15:18 +0800)]
Code cleanup about the media encoding on Gen8
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Zhao Yakui [Thu, 15 Aug 2013 07:18:39 +0000 (15:18 +0800)]
Optimize quantization rounding precision of MPEG2 encoding on Gen8
This is from that on Ivy/Haswell.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Zhao Yakui [Thu, 15 Aug 2013 07:18:39 +0000 (15:18 +0800)]
Optimize the VME shader for MPEG2 encoding on Gen8
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Zhao Yakui [Thu, 15 Aug 2013 07:18:39 +0000 (15:18 +0800)]
Add the MVP in GPU shader to optimize mpeg2 encoding on Gen8
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Zhao Yakui [Thu, 15 Aug 2013 07:18:39 +0000 (15:18 +0800)]
Rewrite the GPU VME shader for MPEG2 encoding on Gen8
This is from that on Haswell/Ivybridge. Now the MPEG2/H264 uses the same
mode/motion vector prediction shader. But the MV search region of mpeg2
is different with that on H264, which causes that the wrong mode/motion
vector prediction is used for MPEG2.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Zhong Li [Wed, 26 Jun 2013 06:02:53 +0000 (14:02 +0800)]
Bulid BDW vebox pipeline
Build gen8 vebox pipeline, and ProcAMP has been enabled and verified on simulator.
However, DN/DI need further effort.
Signed-off-by: Zhong Li <zhong.li@intel.com>
Zhao Yakui [Fri, 21 Jun 2013 05:29:24 +0000 (13:29 +0800)]
PAK encoding uses the reference list parsed from slice_param instead of hacked DPB
This is backported from Sandybridge/Ivybridge/Haswell.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Zhao Yakui [Fri, 21 Jun 2013 05:29:15 +0000 (13:29 +0800)]
VME uses reference frame parsed from slice_param instead of hacked DPB for Gen8
This is backported from Ivy/Haswell/Sandybridge.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Xiang, Haihao [Fri, 21 Jun 2013 02:26:13 +0000 (10:26 +0800)]
VPP: add VPP Filters for BDW
Needs to rebuild the shader for VAProcFilterSharpening on BDW
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Zhao Yakui [Fri, 21 Jun 2013 02:17:02 +0000 (10:17 +0800)]
Add the conversion from YUYV to NV12/I420
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Zhao Yakui [Fri, 21 Jun 2013 02:16:57 +0000 (10:16 +0800)]
Add the CSC conversion from NV12/I420 to YUYV
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Xiang, Haihao [Tue, 18 Jun 2013 06:16:42 +0000 (14:16 +0800)]
New PCI IDs for BDW
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Zhong Li [Sun, 9 Jun 2013 10:13:38 +0000 (18:13 +0800)]
Vp8 quant index converted to quant value on BDW
Signed-off-by: Zhong Li <zhong.li@intel.com>
Zhong Li [Sat, 8 Jun 2013 06:37:24 +0000 (14:37 +0800)]
Enable loop-deblock of bdw vp8 decoder
When deblock is enable, post-deblocking bo should be used as output
buffer.
Signed-off-by: Zhong Li <zhong.li@intel.com>
Zhong Li [Sat, 8 Jun 2013 01:49:19 +0000 (09:49 +0800)]
Remove unnecessary asserts
I think these two asserts are not necessary, and they will cause assert failure when probability buffer created.
Signed-off-by: Zhong Li <zhong.li@intel.com>
Zhong Li [Sat, 8 Jun 2013 01:49:18 +0000 (09:49 +0800)]
Fix a vp8 decoder picture parameter error
(1) log2(num_of_partition - 1) should be set to picture state as BSpec
(2) add an assert about probability buffer
Signed-off-by: Zhong Li <zhong.li@intel.com>
Zhao Yakui [Thu, 23 May 2013 02:22:09 +0000 (10:22 +0800)]
Add the VPP shader of RGBX->NV12 conversion
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Zhao Yakui [Thu, 23 May 2013 02:22:09 +0000 (10:22 +0800)]
Follow the bspec to workaround the NV12->RGBX conversion issue on BDW
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Zhao Yakui [Thu, 23 May 2013 02:22:09 +0000 (10:22 +0800)]
Add the VPP shader of NV12->RGBX conversion
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Zhao Yakui [Thu, 23 May 2013 02:22:09 +0000 (10:22 +0800)]
Add the VPP shader of PL3 AVS conversion between YV12 and I420
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Zhao Yakui [Thu, 23 May 2013 02:22:09 +0000 (10:22 +0800)]
Add the VPP shader of YV12/I420->NV12 conversion
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Zhao Yakui [Thu, 23 May 2013 02:22:09 +0000 (10:22 +0800)]
Add the VPP shader of NV12->YV12/I420 conversion
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Zhao Yakui [Thu, 23 May 2013 02:22:09 +0000 (10:22 +0800)]
Handle the pitch when using RGBX surface in VPP for BDW
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Xiang, Haihao [Tue, 21 May 2013 07:12:25 +0000 (15:12 +0800)]
Set BSP buffer for VP8 decoding
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Zhao Yakui [Tue, 16 Apr 2013 05:57:51 +0000 (13:57 +0800)]
Use the horizontal/vertical alignment for VPP surface on BDW
This is hardware requirement.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Zhao Yakui [Tue, 16 Apr 2013 05:57:42 +0000 (13:57 +0800)]
Create the image with aligned width/height on BDW
The hardware requires that the surface pitch should be 64 alignment.
Otherwise the data port can't be accessed correctly.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Zhao Yakui [Tue, 16 Apr 2013 05:57:38 +0000 (13:57 +0800)]
Add the NV12 scaling shader for BDW
This is the first VPP shader for BDW,which is used to do the
NV12 scaling conversion.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Zhao Yakui [Tue, 16 Apr 2013 05:57:23 +0000 (13:57 +0800)]
Initialize the 8x8 sampler for AVS on BDW
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Zhao Yakui [Tue, 16 Apr 2013 05:57:19 +0000 (13:57 +0800)]
Add the 8x8 sampler for BDW
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Zhao Yakui [Tue, 16 Apr 2013 05:57:14 +0000 (13:57 +0800)]
Upload the constant buffer on Gen6+
Signe-off-by: Zhao Yakui <yakui.zhao@intel.com>
Xiang, Haihao [Fri, 12 Apr 2013 06:49:10 +0000 (14:49 +0800)]
Update states for VP8 decoding on BDW
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Zhao Yakui [Thu, 11 Apr 2013 05:09:21 +0000 (13:09 +0800)]
Redefine the VPP vfe_state on Gen6+
Otherwise the VFE_STATE programmed on Gen6+ is not reasonable and difficult to
understand.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Zhao Yakui [Wed, 27 Mar 2013 04:42:04 +0000 (12:42 +0800)]
Fix the MV offset for MPEG2 on BDW
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Zhao Yakui [Wed, 27 Mar 2013 01:26:32 +0000 (09:26 +0800)]
Handle the bit length of last dword for INSERT_OBJECT on BDW
Otherwise it can't insert the content of INSERT_OBJECT command during encoding,
which causes that the encoded clip can't be parsed by player.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Zhao Yakui [Wed, 27 Mar 2013 01:24:15 +0000 (09:24 +0800)]
Rewrite the VME shader for encoding on BDW
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Zhao Yakui [Fri, 1 Mar 2013 02:38:14 +0000 (10:38 +0800)]
Set render surface alignment on BDW
This is the requirement per B-spec.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Zhao Yakui [Fri, 1 Mar 2013 02:38:13 +0000 (10:38 +0800)]
Set the force bits to read URB offset/length for SF stage on BDW
Otherwise it can't fill the thread payload correctly for pixel shader.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Zhao Yakui [Fri, 1 Mar 2013 02:38:13 +0000 (10:38 +0800)]
Update the pixel shader of subpic function for BDW
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Zhao Yakui [Fri, 1 Mar 2013 02:38:13 +0000 (10:38 +0800)]
Update the pixel shader for BDW rendering function
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Zhao Yakui [Fri, 1 Mar 2013 02:38:13 +0000 (10:38 +0800)]
Add the support of subpic for BDW
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
[Haihao: directly use object instead of id]
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Zhao Yakui [Fri, 1 Mar 2013 02:38:13 +0000 (10:38 +0800)]
Implement the rendering CSC conversion for BDW
This is implemented based on 3D engine, which is similar to that on Ivy.
But it also needs to handle a lot of changes about 3D commands between
BDW and Ivy.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
[Haihao: directly use object instead of id]
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Zhao Yakui [Fri, 1 Mar 2013 02:38:13 +0000 (10:38 +0800)]
Set the max thread num for PS thread on BDW
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Zhao Yakui [Fri, 1 Mar 2013 02:38:13 +0000 (10:38 +0800)]
Update the MI_BATCH_BUFFER_START for BDW
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Zhao Yakui [Fri, 1 Mar 2013 02:38:13 +0000 (10:38 +0800)]
Fix the VPP error during porting patch from master to staging
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Xiang, Haihao [Thu, 28 Feb 2013 04:49:55 +0000 (12:49 +0800)]
Setup VP8 decoding pipeline
Update the pipeline state later.
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Wed, 27 Feb 2013 05:36:19 +0000 (13:36 +0800)]
New macros for Gen8
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Wed, 27 Feb 2013 07:56:24 +0000 (15:56 +0800)]
Add support for VAProbabilityBufferType
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 28 Feb 2013 04:43:51 +0000 (12:43 +0800)]
Temporarily remove assert() to make vainfo happy
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 28 Feb 2013 04:40:52 +0000 (12:40 +0800)]
Advertise VP8 decoding on Gen8
The pipeline isn't implemented yet.
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Wed, 27 Feb 2013 04:53:07 +0000 (12:53 +0800)]
Surface fourcc format on Gen8
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Wed, 27 Feb 2013 05:25:37 +0000 (13:25 +0800)]
Configuration for VP8 decoding/encoding
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Wed, 23 Jan 2013 06:27:20 +0000 (14:27 +0800)]
Enlarge deblocking filter row store on BDW
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Wed, 23 Jan 2013 06:24:41 +0000 (14:24 +0800)]
No workaround for JPEG decoding on BDW
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Zhao Yakui [Tue, 22 Jan 2013 02:53:26 +0000 (10:53 +0800)]
Use the BDW surface/sampler state and memory address allocation for rendering
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
[Haihao: directly use object intead of id]
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Zhao Yakui [Tue, 22 Jan 2013 02:53:26 +0000 (10:53 +0800)]
Update the BDW surface/sampler state and media command for encoding/decoding
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Zhao Yakui [Tue, 22 Jan 2013 02:53:26 +0000 (10:53 +0800)]
Avoid the duplicated macro-definition of surface size
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Zhao Yakui [Tue, 22 Jan 2013 02:53:26 +0000 (10:53 +0800)]
Use the updated structure/command for VPP on BDW
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
[Haihao: directly use object instead of id]
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Zhao Yakui [Mon, 7 Jan 2013 05:18:47 +0000 (13:18 +0800)]
Add the BDW idrt/surface/sampler state definition
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Zhao Yakui [Mon, 7 Jan 2013 05:18:47 +0000 (13:18 +0800)]
Add the separated media encoding/decoding files for BDW
As a lot of changes about the media are added between Haswell and BDW, the
separated media encoding/decoding files are added for BDW. This
is to avoid complex backward logic for Haswell.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
[Haihao: directly use object instead of id]
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Zhao Yakui [Mon, 7 Jan 2013 05:18:47 +0000 (13:18 +0800)]
Add the initial support for GEN8
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
[Haihao: fix conflict when rebasing]
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Zhao Yakui [Wed, 26 Dec 2012 07:07:19 +0000 (15:07 +0800)]
Add the PCI ids for BDW
This is from the kernel driver.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Xiang, Haihao [Mon, 30 Dec 2013 05:15:40 +0000 (13:15 +0800)]
Render: Adjust the default value for contrast/saturation
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=73016
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Tested-by: Mark Lee <mark@markelee.com>
Xiang, Haihao [Mon, 30 Dec 2013 05:13:02 +0000 (13:13 +0800)]
Bump version for development
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Mon, 16 Dec 2013 08:05:43 +0000 (16:05 +0800)]
Intel driver 1.2.2
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Wed, 11 Dec 2013 02:03:54 +0000 (10:03 +0800)]
1.2.2.pre2
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Tue, 10 Dec 2013 02:19:09 +0000 (10:19 +0800)]
VPP: Use the right top/bottom field flag used for DI
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=72518
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Mon, 9 Sep 2013 01:10:51 +0000 (09:10 +0800)]
H.264: Support Constrained Baseline profile instead of Baseline profile
GENx doesn't support FMO/ASO, so remove the support
of Baseline profile for conformance testing. In addition, add the support
for Constrained Baseline profile.
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Zhao Yakui [Mon, 2 Dec 2013 07:56:20 +0000 (15:56 +0800)]
Upload the constant buffer on ILK/CTG so that subpicture can work
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
(cherry picked from commit
2a61b0d17072bdc5b58608e3dfa2c4f9f80dcec4)
Zhao Yakui [Fri, 22 Nov 2013 05:39:34 +0000 (13:39 +0800)]
Support the smpte240m color standard for conversion from YUV to RGB
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
(cherry picked from commit
34627c96f331f7a344270c3d51b634f5f166073e)
Zhao Yakui [Fri, 22 Nov 2013 05:39:34 +0000 (13:39 +0800)]
Support the BT709 color standard for conversion from YUV to RGB
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
(cherry picked from commit
4c43ff9234a0a6f18744078d2e743cfa0cf8f34c)
Zhao Yakui [Fri, 22 Nov 2013 05:39:34 +0000 (13:39 +0800)]
Constant buffer passes YUV2RGB CSC matrix instead of hardcoded matrix
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
(cherry picked from commit
0aa6ccc405726e5521452ee437be6b3cc6fabdee)
Zhao Yakui [Fri, 22 Nov 2013 05:39:34 +0000 (13:39 +0800)]
Increase the size of constant buffer for PS thread to pass more info
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
(cherry picked from commit
a6372850042e2a9201f4893193f77c9a55a6598e)
Zhao Yakui [Fri, 22 Nov 2013 05:39:34 +0000 (13:39 +0800)]
Fix the error in render shader on Ivy/Haswell
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
(cherry picked from commit
7af528d17924cf2ec855c0d0b1550b6c3d095682)
Xiang, Haihao [Thu, 14 Nov 2013 07:48:59 +0000 (15:48 +0800)]
Enlarge the size of array misc_param
And check the type before storing misc parameters
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Tue, 26 Nov 2013 01:21:11 +0000 (09:21 +0800)]
dec/mpeg2: ignore slices which aren't in raster scan order on SNB
Sometimes codec layer incorrectly fills slice parameters due to
the corrupted video
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=71276
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Tue, 26 Nov 2013 02:43:45 +0000 (10:43 +0800)]
SNB doesn't support MPEG-2 encoding
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=72016
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Fri, 6 Sep 2013 08:43:17 +0000 (16:43 +0800)]
Workaround for SNB
Backporting from d0184b5 in xf86-video-intel
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit
e622ecedf169bccddc8910b45d92dbec7675441e)
Xiang, Haihao [Wed, 13 Nov 2013 06:18:20 +0000 (14:18 +0800)]
VPP: remove some assert()
Instead check the input parameters and return corresponding error status if failed
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit
40fa7d9ede00e804f15df4b7b805c7345a925e17)
Xiang, Haihao [Wed, 13 Nov 2013 05:19:16 +0000 (13:19 +0800)]
Correct the usage of width/height in struct object_surface
Add comments for width/height, orig_width/orig_height as well
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit
f886f24eaaacba9544fa5f6405b7382c686f3a1f)
Xiang, Haihao [Wed, 13 Nov 2013 02:27:59 +0000 (10:27 +0800)]
VPP: use the target widht/height to calculate the horizontal/vertical step on IVB
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit
ba020ed2c7730980649d9131e41e9677f603c52a)
Xiang, Haihao [Thu, 26 Sep 2013 03:02:09 +0000 (11:02 +0800)]
render: add support for brightness/contrast/hue/saturation
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit
04ecb6e79f4382d96eb5d4b51733049d420f592a)
Xiang, Haihao [Wed, 18 Sep 2013 07:12:55 +0000 (15:12 +0800)]
VPP: change the default values for Saturation and Contrast
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit
ce0c8f0019e8545d0db529b0f28338be4b8adc15)
projects / platform / upstream / libva-intel-driver.git / log