platform/kernel/u-boot.git
2 years agospi: spi-uclass: Add new spi_get_bus_and_cs() implementation
Patrice Chotard [Wed, 30 Mar 2022 07:33:13 +0000 (09:33 +0200)]
spi: spi-uclass: Add new spi_get_bus_and_cs() implementation

Move legacy spi_get_bus_and_cs() code to _spi_get_bus_and_cs().

Add new spi_get_bus_and_cs() implementation which rely on DT
for speed and mode and don't need any drv_name nor dev_name
parameters. This will prepare the ground for next patch.

Update all callers to use _spi_get_bus_and_cs() to keep the
same behavior.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Marek Behun <marek.behun@nic.cz>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Lukasz Majewski <lukma@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Cc: "Pali Rohár" <pali@kernel.org>
Cc: Konstantin Porotchkin <kostap@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Pratyush Yadav <p.yadav@ti.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Anji J <anji.jagarlmudi@nxp.com>
Cc: Biwen Li <biwen.li@nxp.com>
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Chaitanya Sakinam <chaitanya.sakinam@nxp.com>
2 years agopowerpc: mpc85xx: Fix CONFIG_OF_EMBED support for NOR booting
Pali Rohár [Mon, 2 May 2022 16:36:39 +0000 (18:36 +0200)]
powerpc: mpc85xx: Fix CONFIG_OF_EMBED support for NOR booting

mpc85xx NOR binary contains also reset vector and therefore option
CONFIG_MPC85XX_HAVE_RESET_VECTOR must be defined.

When build system uses binman, it takes care of constructing final image
which consist of u-boot-without-reset-vector, DTB and reset-vector.

CONFIG_OF_EMBED does not use binman, there is no external DTB and Makefile
produce directly final u-boot.bin binary.

So in this case mpc85xx reset vector must not be stripped from the final
u-boot.bin binary. Fix it.

Signed-off-by: Pali Rohár <pali@kernel.org>
2 years agopowerpc: mpc85xx: Fix CONFIG_OF_SEPARATE support for NOR booting
Pali Rohár [Mon, 2 May 2022 16:36:38 +0000 (18:36 +0200)]
powerpc: mpc85xx: Fix CONFIG_OF_SEPARATE support for NOR booting

Commit e8c0e0064c8a ("powerpc: mpc85xx: Fix CONFIG_OF_SEPARATE support")
fixed SD card booting on mpc85xx boards but broke NOR booting on these
boards. Reason is that U-Boot build system for NOR images uses binman and
this binman ignores alignment defined in linker script. Instead it has own
config file where is alignment defined.

Fix binman alignment for mpc85xx boards to match what is _now_ defined in
linker script.

This change fixes building of U-Boot for NOR booting on P2020 board.

Fixes: e8c0e0064c8a ("powerpc: mpc85xx: Fix CONFIG_OF_SEPARATE support")
Signed-off-by: Pali Rohár <pali@kernel.org>
2 years agofs/squashfs: use lldiv function for math
Sean Nyekjaer [Thu, 12 May 2022 18:37:14 +0000 (20:37 +0200)]
fs/squashfs: use lldiv function for math

When compling for x86:
ld.bfd: fs/squashfs/sqfs.o: in function `sqfs_read':
u-boot/fs/squashfs/sqfs.c:1443: undefined reference to `__udivmoddi4'
ld.bfd: u-boot/fs/squashfs/sqfs.c:1521: undefined reference to `__udivmoddi4'

Signed-off-by: Sean Nyekjaer <sean.nyekjaer.ext@siemensgamesa.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Pali Rohár <pali@kernel.org>
2 years agotpm: core: Set timeouts before requesting locality
Eddie James [Fri, 13 May 2022 18:29:59 +0000 (13:29 -0500)]
tpm: core: Set timeouts before requesting locality

Requesting the locality uses the timeout values, so they need
to be set beforehand.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2 years agoMerge tag 'u-boot-imx-20220523' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
Tom Rini [Mon, 23 May 2022 13:25:39 +0000 (09:25 -0400)]
Merge tag 'u-boot-imx-20220523' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

u-boot-imx-20220523
-------------------

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/12087

Additionally to u-boot-imx20200520:

- DH MX8MP
- i.MX GPIO: reading GPIO when direction is output
- Menlo i.MX53: switch to DM

And from u-boot-imx20200520:

- fix Verdin hang
- add pca9450 regulator
- conversion to DM_SERIAL
- NAND block handling
- fix crypto
- enable cache on some boards
- add ACC board (MX6)

2 years agoARM: dts: imx: Add support for DH electronics i.MX8M Plus DHCOM and PDK2
Marek Vasut [Sat, 21 May 2022 14:56:26 +0000 (16:56 +0200)]
ARM: dts: imx: Add support for DH electronics i.MX8M Plus DHCOM and PDK2

Add support for DH electronics i.MX8M Plus DHCOM SoM on PDK2 carrier board.
Currently supported are serial console, EQoS and FEC ethernets, eMMC, SD,
SPI NOR and USB 3.0 host.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2 years agogpio: rgpio2p: Enhance reading of GPIO pin value
Christoph Fritz [Tue, 5 Apr 2022 10:29:30 +0000 (12:29 +0200)]
gpio: rgpio2p: Enhance reading of GPIO pin value

Add support for reading GPIO pin value when function is output.
With this patch applied, gpio toggle command is working.

Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2 years agoARM: imx: mx5: Convert MX53 Menlo board to DM I2C and DM RTC
Marek Vasut [Sun, 8 May 2022 00:19:12 +0000 (02:19 +0200)]
ARM: imx: mx5: Convert MX53 Menlo board to DM I2C and DM RTC

Convert the board to DM I2C and DM RTC. This leads to removal of board
side iomuxc configuration, which is now done using pin control driver,
and conversion of board side legacy I2C accessors to DM ones.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2 years agoRevert "sunxi: f1c100s: Drop SYSRESET to enable reset functionality"
Andre Przywara [Tue, 26 Apr 2022 23:19:07 +0000 (00:19 +0100)]
Revert "sunxi: f1c100s: Drop SYSRESET to enable reset functionality"

The original Allwinner F1C100 .dtsi imported from the Linux kernel tree
used the wrong compatible string for the watchdog timer, so the Allwinner
DM reset driver was not working properly. We worked around this by
disabling the SYSRESET driver, so the hardcoded SPL reset driver took
over.
Now the issue was fixed in the DTs in mainline Linux, and we synced the
fixed .dtsi file into U-Boot, so drop the hack and use the normal U-Boot
proper reset infrastructure.

This reverts commit cfcf1952c11e6ffcbbf88eb63c49edca2acf1d5e.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2 years agosunxi: F1C100s: update DT files from Linux
Andre Przywara [Tue, 26 Apr 2022 00:15:25 +0000 (01:15 +0100)]
sunxi: F1C100s: update DT files from Linux

The initial U-Boot F1C100s port was based on the mainline kernel DT
files, which were quite basic and were missing the essential MMC and
SPI peripherals. While we could work around this in the SPL by
hardcoding the required information, this left U-Boot proper without SD
card or SPI flash support, so actual loading would require FEL boot.

Now the missing DT bits have been submitted and accepted in the kernel
tree, so lets sync back those files into U-Boot to enable MMC and
SPI, plus benefit from some fixes.

This is a verbatim copy of the .dts and .dtsi file from
linux-sunxi/dt-for-5.19[1], which have been part of linux-next for a
while as well.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux.git/log/?h=sunxi/dt-for-5.19

Link: https://lore.kernel.org/linux-arm-kernel/20220317162349.739636-1-andre.przywara@arm.com/
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2 years agoclk: sunxi: implement clock driver for suniv f1c100s
George Hilliard [Sun, 25 Jul 2021 23:16:23 +0000 (19:16 -0400)]
clk: sunxi: implement clock driver for suniv f1c100s

The f1c100s has a clock tree similar to those of other sunxi parts.
Add support for it.

Signed-off-by: George Hilliard <thirtythreeforty@gmail.com>
Signed-off-by: Yifan Gu <me@yifangu.com>
Acked-by: Sean Anderson <seanga2@gmail.com>
[Andre: add PIO and I2C]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2 years agoARM: dts: sun50i: H6: Sync from Linux v5.18-rc1
Samuel Holland [Wed, 27 Apr 2022 20:31:31 +0000 (15:31 -0500)]
ARM: dts: sun50i: H6: Sync from Linux v5.18-rc1

Copy the devicetree source for the H6 SoC and all existing boards
from the Linux v5.18-rc1 tag.

To maintain ABI compatibility with existing LTS kernels, one change
moving some IP blocks to the r_intc interrupt controller is excluded.
This effectively reverts Linux commits 189bef235dd3 and 73088dfee635.

This commit also adds the following new board devicetrees:
 - sun50i-h6-pine-h64-model-b.dts
 - sun50i-h6-tanix-tx6-mini.dts

This update should not impact any existing U-Boot functionality.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2 years agoARM: dts: sun50i: A64: Sync from Linux v5.18-rc1
Samuel Holland [Wed, 27 Apr 2022 20:31:30 +0000 (15:31 -0500)]
ARM: dts: sun50i: A64: Sync from Linux v5.18-rc1

Copy the devicetree source for the A64 SoC and all existing boards
from the Linux v5.18-rc1 tag.

To maintain ABI compatibility with existing LTS kernels, one change
moving some IP blocks to the r_intc interrupt controller is excluded.
This effectively reverts Linux commits 189bef235dd3 and 73088dfee635.

This update should not impact any existing U-Boot functionality.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2 years agoARM: dts: sun8i: R40/T3: Sync from Linux v5.18-rc1
Samuel Holland [Wed, 27 Apr 2022 20:31:29 +0000 (15:31 -0500)]
ARM: dts: sun8i: R40/T3: Sync from Linux v5.18-rc1

Copy the devicetree for the R40/T3 SoC verbatim from the Linux v5.18-rc1
tag. None of the existing boards had any devicetree updates.

This commit adds the following new board devicetrees:
 - sun8i-r40-oka40i-c.dts
 - sun8i-t3-cqa3t-bv3.dts

Signed-off-by: Samuel Holland <samuel@sholland.org>
2 years agoARM: dts: sun8i: V3/V3s/S3: Sync from Linux v5.18-rc1
Samuel Holland [Wed, 27 Apr 2022 20:31:28 +0000 (15:31 -0500)]
ARM: dts: sun8i: V3/V3s/S3: Sync from Linux v5.18-rc1

Copy the devicetree source for the V3(s)/S3 SoCs and all existing boards
verbatim from the Linux v5.18-rc1 tag.

This commit also adds the following new board devicetrees:
 - sun8i-s3-elimo-initium.dts
 - sun8i-v3-sl631-imx179.dts

This update should not impact any existing U-Boot functionality.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2 years agoARM: dts: sunxi: H2+/H3/H5: Sync from Linux v5.18-rc1
Samuel Holland [Wed, 27 Apr 2022 20:31:27 +0000 (15:31 -0500)]
ARM: dts: sunxi: H2+/H3/H5: Sync from Linux v5.18-rc1

Copy the devicetree source for the H2+/H3/H5 SoCs and all existing
boards from the Linux v5.18-rc1 tag.

To maintain ABI compatibility with existing LTS kernels, one change
moving some IP blocks to the r_intc interrupt controller is excluded.
This effectively reverts Linux commits 994e5818392c and 9fdef3c3d8c2.

This commit also adds the following new board devicetree:
 - sun8i-h3-nanopi-r1.dts

This update should not impact any existing U-Boot functionality.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2 years agoARM: dts: sun8i: A83T: Sync from Linux v5.18-rc1
Samuel Holland [Wed, 27 Apr 2022 20:31:26 +0000 (15:31 -0500)]
ARM: dts: sun8i: A83T: Sync from Linux v5.18-rc1

Copy the devicetree source for the A83T SoC and all existing boards
from the Linux v5.18-rc1 tag.

To maintain ABI compatibility with existing LTS kernels, one change
moving some IP blocks to the r_intc interrupt controller is excluded.
This effectively reverts Linux commits 994e5818392c and 9fdef3c3d8c2.

As with the other SoCs, updates of note include adding detection GPIO
properties in the USB PHY nodes.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2 years agoARM: dts: sun9i: Sync from Linux v5.18-rc1
Samuel Holland [Wed, 27 Apr 2022 20:31:25 +0000 (15:31 -0500)]
ARM: dts: sun9i: Sync from Linux v5.18-rc1

Copy the devicetree source for the A80 SoC and all existing boards
verbatim from the Linux v5.18-rc1 tag.

This update should not impact any existing U-Boot functionality.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2 years agoARM: dts: sunxi: A13/A31/A23/A33: Sync from Linux v5.18-rc1
Samuel Holland [Wed, 27 Apr 2022 20:31:24 +0000 (15:31 -0500)]
ARM: dts: sunxi: A13/A31/A23/A33: Sync from Linux v5.18-rc1

Copy the devicetree source for the A10s/A13/GR8, A31(s), and A23/A33/R16
SoCs and all existing boards from the Linux v5.18-rc1 tag.

These changes are combined into one commit due to interdependencies:
 - The unit addresses were removed from bitbanged I2C buses, which
   drives a Kconfig default change. This affects sun5i-a13-utoo-p66.dts
   and sun6i-a31-colombus.dts.
 - The pinctrl nodes were renamed, including some used by the shared
   header sunxi-reference-design-tablet.dtsi.

To maintain ABI compatibility with existing LTS kernels, one change
moving some IP blocks to the r_intc interrupt controller is excluded.
This effectively reverts Linux commits 994e5818392c and 9fdef3c3d8c2.

This commit renames the file sun8i-r16-nintendo-nes-classic-edition.dts
to sun8i-r16-nintendo-nes-classic.dts to match the Linux tree.

This commit also adds the following new board devicetrees:
 - sun5i-a13-licheepi-one.dts
 - sun5i-a13-pocketbook-touch-lux-3.dts
 - sun5i-gr8-evb.dts
 - sun8i-a23-ippo-q8h-v1.2.dts
 - sun8i-a23-ippo-q8h-v5.dts
 - sun8i-a33-et-q8-v1.6.dts
 - sun8i-a33-ippo-q8h-v1.2.dts
 - sun8i-r16-nintendo-super-nes-classic.dts

As with the other SoCs, updates of note are conversion of GPIO pull-up
from pinconf to GPIO flags and renaming the detection GPIO properties in
the USB PHY nodes.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2 years agoARM: dts: sun4i: Sync from Linux v5.18-rc1
Samuel Holland [Wed, 27 Apr 2022 20:31:22 +0000 (15:31 -0500)]
ARM: dts: sun4i: Sync from Linux v5.18-rc1

Copy the devicetree source for the A10 SoC and all existing boards
verbatim from the Linux v5.18-rc1 tag.

This commit also adds the following new board devicetree:
 - sun4i-a10-topwise-a721.dts

While this update should not impact any existing U-Boot functionality,
the changes to the USB PHY detection GPIO properties are needed to
convert that driver to use the DM GPIO framework.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2 years agoARM: dts: sun7i: Sync from Linux v5.18-rc1
Samuel Holland [Wed, 27 Apr 2022 20:31:23 +0000 (15:31 -0500)]
ARM: dts: sun7i: Sync from Linux v5.18-rc1

Copy the devicetree source for the A20 SoC and all existing boards
verbatim from the Linux v5.18-rc1 tag.

This commit also adds the following new board devicetrees:
 - sun7i-a20-haoyu-marsboard.dts
 - sun7i-a20-linutronix-testbox-v2.dts
 - sun7i-a20-olinuxino-lime-emmc.dts

This update includes changes to the USB PHY detection GPIO properties
which are needed to convert that driver to use the DM GPIO framework.

Signed-off-by: Samuel Holland <samuel@sholland.org>
[Andre: fix Mele M5 U-Boot only DT]
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2 years agoARM: dts: sunxi: Remove unused devicetree headers
Samuel Holland [Wed, 27 Apr 2022 20:31:21 +0000 (15:31 -0500)]
ARM: dts: sunxi: Remove unused devicetree headers

These files are not included anywhere and do not exist in the Linux
devicetree source.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2 years agodt-bindings: sunxi: Update clock/reset binding headers
Samuel Holland [Wed, 27 Apr 2022 20:31:20 +0000 (15:31 -0500)]
dt-bindings: sunxi: Update clock/reset binding headers

Some devicetree updates make use of newly-exposed clocks and resets.
To support that, copy the binding headers from the Linux v5.18-rc1 tag.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2 years agoMerge https://source.denx.de/u-boot/custodians/u-boot-usb
Tom Rini [Sat, 21 May 2022 02:07:56 +0000 (22:07 -0400)]
Merge https://source.denx.de/u-boot/custodians/u-boot-usb

2 years agousb: dwc3: Fix non-usb3 configurations
Jan Kiszka [Mon, 25 Apr 2022 11:26:45 +0000 (13:26 +0200)]
usb: dwc3: Fix non-usb3 configurations

Missing nodes may also be signaled via -ENODATA. We need to check for
that to prevent failing in non-usb3 setups.

Furthermore, dev.phy must be NULL'ed in case usb3-phy was not found.

Fixes: 142d50fbce7c ("usb: dwc3: Add support for usb3-phy PHY configuration")
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2 years agoMerge tag 'u-boot-stm32-20220520' of https://source.denx.de/u-boot/custodians/u-boot-stm
Tom Rini [Fri, 20 May 2022 17:50:11 +0000 (13:50 -0400)]
Merge tag 'u-boot-stm32-20220520' of https://source.denx.de/u-boot/custodians/u-boot-stm

- spi: fix busy bit check in stm32_qspi driver
- stm32mp15: configure Buck3 voltage per PMIC NVM on Avenger96 board

2 years agoARM: imx6: Adapt device tree selection in DH board file
Philip Oberfichtner [Fri, 20 May 2022 08:46:26 +0000 (10:46 +0200)]
ARM: imx6: Adapt device tree selection in DH board file

Before this commit device tree selection could rely solely on
differentiating the iMX6 processor variant Q and DL. After adding two new
carrier boards, the DRC02 and the picoITX, the interchangeability of SoMs
makes this approach infeasible.

It is now required to specify the carrier board (dhcom-drc02,
dhcom-picoitx or dhcom-pdk2) at compile time using
CONFIG_DEFAULT_DEVICETREE. The SoM is determined at runtime as before.

Signed-off-by: Philip Oberfichtner <pro@denx.de>
2 years agoARM: dts: imx: Configure FEC for iMX6QDL DRC02
Philip Oberfichtner [Fri, 20 May 2022 08:46:25 +0000 (10:46 +0200)]
ARM: dts: imx: Configure FEC for iMX6QDL DRC02

Add a u-boot dtsi for configuring the FEC node of the DH DRC02.

Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Philip Oberfichtner <pro@denx.de>
2 years agoARM: dts: imx: Configure FEC for iMX6QDL picoITX
Philip Oberfichtner [Fri, 20 May 2022 08:46:24 +0000 (10:46 +0200)]
ARM: dts: imx: Configure FEC for iMX6QDL picoITX

Add a u-boot dtsi for configuring the FEC node of the DH picoITX.

Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Philip Oberfichtner <pro@denx.de>
2 years agoARM: dts: imx: Simplify fec node for iMX6QDL DHCOM boards
Philip Oberfichtner [Fri, 20 May 2022 08:46:23 +0000 (10:46 +0200)]
ARM: dts: imx: Simplify fec node for iMX6QDL DHCOM boards

Firstly the FEC can now use the regulator reg_eth_vio from
imx6qdl-dhcom-som.dtsi instead of defining its own.

Secondly the &fec node is moved to the more generic SoM device tree
file, because it can be used by multiple boards.

Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Philip Oberfichtner <pro@denx.de>
2 years agoARM: imx6: Remove CONFIG_FEC_MXC_PHYADDR from DH header
Philip Oberfichtner [Fri, 20 May 2022 08:46:22 +0000 (10:46 +0200)]
ARM: imx6: Remove CONFIG_FEC_MXC_PHYADDR from DH header

Use phy address from device tree instead of CONFIG_FEC_MXC_PHYADDR from
board header. This is required, because the DH picoITX and DRC02 boards
require different settings than PDK2. The corresponding 'phy-handle'
device tree properties are already there.

I tested this change on picoITX and DRC02, but on PDK2 it is untested.

Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Philip Oberfichtner <pro@denx.de>
2 years agoARM: dts: imx: Migrate iMX6QDL picoITX DTs from Linux
Philip Oberfichtner [Fri, 20 May 2022 08:46:21 +0000 (10:46 +0200)]
ARM: dts: imx: Migrate iMX6QDL picoITX DTs from Linux

Migrate DH picoITX device trees from Linux commit 42226c989789
(tag v5.18-rc7). No changes have been made, the DTs are exact copies.
Furthermore add the DTB to dh_imx6_defconfig.

Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Philip Oberfichtner <pro@denx.de>
2 years agoARM: dts: imx: Migrate iMX6QDL DRC02 DTs from Linux
Philip Oberfichtner [Fri, 20 May 2022 08:46:20 +0000 (10:46 +0200)]
ARM: dts: imx: Migrate iMX6QDL DRC02 DTs from Linux

Migrate DH DRC02 device trees from Linux commit 42226c989789
(tag v5.18-rc7). No changes have been made, the DTs are exact copies.
Furthermore add the DTB to dh_imx6_defconfig.

Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Philip Oberfichtner <pro@denx.de>
2 years agoARM: imx6: Fix broken DT path in DH board file
Philip Oberfichtner [Fri, 20 May 2022 08:46:19 +0000 (10:46 +0200)]
ARM: imx6: Fix broken DT path in DH board file

In the DH electronics iMX6 board file fix the outdated eeprom path by
using a DT label instead.

The label has been newly created for all iMX6QDL DHCOM boards.

Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Philip Oberfichtner <pro@denx.de>
2 years agopmic: pca9450: Add regulator driver
Marek Vasut [Fri, 20 May 2022 03:10:17 +0000 (05:10 +0200)]
pmic: pca9450: Add regulator driver

Add PCA9450 regulator driver. This is complementary driver for the BUCKn
and LDOn regulators provided by the PCA9450 PMIC driver. Currently the
driver permits reading the settngs and configuring the BUCKn and LDOn
regulators.

Reviewed-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2 years agopmic: pca9450: Add upstream regulators subnode match
Marek Vasut [Fri, 20 May 2022 03:10:16 +0000 (05:10 +0200)]
pmic: pca9450: Add upstream regulators subnode match

The upstream DT regulators node subnodes are named BUCKn and LDOn,
the downstream DT regulators node subnodes are named buckn and ldon,
add the upstream match.

Reviewed-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2 years agoimx: imx8mp_rsb3720a1: convert to DM_SERIAL
Peng Fan [Thu, 5 May 2022 07:43:28 +0000 (15:43 +0800)]
imx: imx8mp_rsb3720a1: convert to DM_SERIAL

Enable CONFIG_DM_SERIAL. uart2 and its pinmux was already
marked with u-boot,dm-spl.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2 years agoARM: imx8mm: verdin-imx8mm: fix board hang in spl
Marcel Ziswiler [Mon, 16 May 2022 22:21:45 +0000 (00:21 +0200)]
ARM: imx8mm: verdin-imx8mm: fix board hang in spl

Move the preloader_console_init() call after spl_early_init() to avoid
board hang in SPL.

While at it remove explicit in-code console/debug UART pinmuxing (uart1
and its pinmuxing are already marked as u-boot,dm-spl via device tree).

Fixes: 4551e1898769 ("configs: verdin-imx8mm: verdin-imx8mp: enable dm serial")
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2 years agoimx8mp_rsb3720a1: Enable cache in SPL
Fabio Estevam [Thu, 19 May 2022 11:59:28 +0000 (08:59 -0300)]
imx8mp_rsb3720a1: Enable cache in SPL

There is no reason for disabling I-cache and D-cache
in SPL.

Remove the unneeded CONFIG_SPL_SYS_ICACHE_OFF and
CONFIG_SPL_SYS_DCACHE_OFF options.

Signed-off-by: Fabio Estevam <festevam@denx.de>
2 years agocgtqmx8: Enable cache in SPL
Fabio Estevam [Thu, 19 May 2022 11:59:27 +0000 (08:59 -0300)]
cgtqmx8: Enable cache in SPL

There is no reason for disabling I-cache and D-cache
in SPL.

Remove the unneeded CONFIG_SPL_SYS_ICACHE_OFF and
CONFIG_SPL_SYS_DCACHE_OFF options.

Signed-off-by: Fabio Estevam <festevam@denx.de>
2 years agoimx8mm-cl-iot-gate: Enable cache in SPL
Fabio Estevam [Thu, 19 May 2022 11:59:26 +0000 (08:59 -0300)]
imx8mm-cl-iot-gate: Enable cache in SPL

There is no reason for disabling I-cache and D-cache
in SPL.

Remove the unneeded CONFIG_SPL_SYS_ICACHE_OFF and
CONFIG_SPL_SYS_DCACHE_OFF options.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
2 years agobosch: Add initial board support for ACC
Philip Oberfichtner [Thu, 19 May 2022 11:52:48 +0000 (13:52 +0200)]
bosch: Add initial board support for ACC

The Bosch ACC (Air Center Control) Board is based on the i.MX6D.

The device tree is copied from Linux, see [1]. The only difference
compared to the Linux DT is the removal of usbphynop properties. They are
defined in the Linux version of imx6qdl.dtsi, but not in the u-boot
version.

[1] Commit 6192cf8ac082 from
    git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git

Signed-off-by: Philip Oberfichtner <pro@denx.de>
2 years agoimx: imx8mn_smm_s2/s2pro: Enable TrustZone
Michael Trimarchi [Sun, 15 May 2022 09:41:09 +0000 (11:41 +0200)]
imx: imx8mn_smm_s2/s2pro: Enable TrustZone

When the board was added, enabling tzc380 was left off by
mistake. The optee was tested with the following configuration
in s2pro

+ firmware {
+ optee {
+ compatible = "linaro,optee-tz";
+ method = "smc";
+ };
+ };
+
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ /* 6MiB */
+ optee_core@5f800000 {
+ reg = <0x00 0x5f800000 0x00 0x600000>;
+ };
+
+ /* 2MiB */
+ optee_shm@5fe00000 {
+ reg = <0x00 0x5fe00000 0x00 0x200000>;
+ };
+ };
+

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
2 years agospl: spl_nand: Fix bad block handling in fitImage
Michael Trimarchi [Sun, 15 May 2022 09:35:33 +0000 (11:35 +0200)]
spl: spl_nand: Fix bad block handling in fitImage

If the fitImage has some bad block in fit image area, the
offset must be recalulcated. This should be done always.
After implementing it in mxs now is possible to call the function
even for that platform.

Cc: Fabio Estevam <festevam@gmail.com>
Tested-By: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
2 years agoarm: mach-imx: cmd_nandbcb fix bad block handling
Michael Trimarchi [Sun, 15 May 2022 09:35:32 +0000 (11:35 +0200)]
arm: mach-imx: cmd_nandbcb fix bad block handling

The badblock should be skipped properly in reading and writing.
Fix the logic. The bcb struct is written, skipping the bad block,
so we need to read using the same logic. This was tested create
bad block in the area and then flash it and read it back.

Acked-by: Han Xu <han.xu@nxp.com>
Tested-By: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
2 years agomtd: nand: mxs_nand_spl: Fix bad block skipping
Michael Trimarchi [Sun, 15 May 2022 09:35:31 +0000 (11:35 +0200)]
mtd: nand: mxs_nand_spl: Fix bad block skipping

The specific implementation was having bug. Those bugs are since
the beginning of the implementation. Some manufactures can already
experience this bug in their SPL code. This bug can be more visible on
architecture that has complicated boot process like imx8mn. Older
version of uboot can be affected if the bad block
appear in correspoding of the beginning of u-boot image. In order to
adjust the function we scan from the first erase block.

The problematic part of old code was in this part:

while (is_badblock(mtd, offs, 1)) {
           page = page + nand_page_per_block;
          /* Check i we've reached the end of flash. */
          if (page >= mtd->size >> chip->page_shift) {
                      free(page_buf);
                      return -ENOMEM;
         }
}

Even we fix it adding increment of the offset of one erase block size
, we don't fix the problem, because the first erase block where the
image start is not checked. The code was tested on an imx8mn where
the boot rom api was not able to skip it. This code is used by other
architecures like imx6 and imx8mm

Cc: Han Xu <han.xu@nxp.com>
Cc: Fabio Estevam <festevam@gmail.com>
Acked-by: Han Xu <han.xu@nxp.com>
Tested-By: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
2 years agonand: raw: mxs_nand: Fix specific hook registration
Michael Trimarchi [Sun, 15 May 2022 09:35:30 +0000 (11:35 +0200)]
nand: raw: mxs_nand: Fix specific hook registration

Move the hook after nand_scan_tail is called. The hook must be replaced
to the mxs specific one but those must to be assignment later in the
probe function.

With this fix markbad is working again. Before this change:

nand markbad 0xDEC00
NXS NAND: Writing OOB isn't supported
NXS NAND: Writing OOB isn't supported
block 0x000dec00 NOT marked as bad! ERROR 0

Cc: Han Xu <han.xu@nxp.com>
Cc: Fabio Estevam <festevam@gmail.com>
Acked-by: Han Xu <han.xu@nxp.com>
Tested-By: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
2 years agocrypto/fsl: fsl_hash: Fix dcache issue in caam_hash_finish
Gaurav Jain [Wed, 11 May 2022 08:53:19 +0000 (14:23 +0530)]
crypto/fsl: fsl_hash: Fix dcache issue in caam_hash_finish

HW accelerated hash operations are giving incorrect hash output.
so add flush and invalidate for input/output hash buffers.

Fixes: 94e3c8c4fd (crypto/fsl - Add progressive hashing support using hardware acceleration.)
Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
2 years agoi.MX8ULP: add display_ele_fw_version api
Gaurav Jain [Wed, 11 May 2022 08:37:55 +0000 (14:07 +0530)]
i.MX8ULP: add display_ele_fw_version api

implement get f/w version api.
print ele f/w version in spl.

Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Pankaj Gupta <pankaj.gupta@nxp.com>
2 years agocaam: Fix crash in case caam_jr_probe failed
Ye Li [Wed, 11 May 2022 08:26:20 +0000 (13:56 +0530)]
caam: Fix crash in case caam_jr_probe failed

If probing caam_jr returns failure, the variable "dev" will not be
initialized, so we can't use dev->name for the error print.
Otherwise it will cause crash.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Gaurav Jain <gaurav.jain@nxp.com>
2 years agokontron-sl-mx8mm: Select the CONFIG_CMD_UNZIP option
Fabio Estevam [Tue, 10 May 2022 23:06:27 +0000 (20:06 -0300)]
kontron-sl-mx8mm: Select the CONFIG_CMD_UNZIP option

Select the CMD_UNZIP option so that the 'gzwrite' command
can be used to flash wic.gz image into the eMMC.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
2 years agousb: xhci-dwc3: Support role switch default role
Mark Kettenis [Tue, 19 Apr 2022 19:06:33 +0000 (21:06 +0200)]
usb: xhci-dwc3: Support role switch default role

When the device tree indicates support for role switching through
the "usb-role-switch" property, take the "role-switch-default-mode"
property into account when deciding which role to put the
controller into.

This makes USB devices work on Apple M1 systems where the device
tree may include a "dr_mode" property that is set to "otg", but
where we need to put the controller into "host" mode to see
devices connected to the type-C ports.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
2 years agoimx: toradex/verdin-imx8mm/p: cleanup board watchdog code
Peng Fan [Thu, 5 May 2022 11:06:12 +0000 (19:06 +0800)]
imx: toradex/verdin-imx8mm/p: cleanup board watchdog code

pinctrl_wdog already marked u-boot,dm-spl, so clean up board code.

The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2 years agoimx: verdin-imx8mm/p: cleanup board watchdog code
Peng Fan [Thu, 5 May 2022 11:06:11 +0000 (19:06 +0800)]
imx: verdin-imx8mm/p: cleanup board watchdog code

pinctrl_wdog already marked u-boot,dm-spl, so clean up board code.

The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2 years agoimx: imx8mn_smm_s2: clean up board watchdog code
Peng Fan [Thu, 5 May 2022 11:06:06 +0000 (19:06 +0800)]
imx: imx8mn_smm_s2: clean up board watchdog code

pinctrl_wdog already marked u-boot,dm-spl, so clean up board code.

The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com>
2 years agoimx: imx8mm-mx8menlo: drop unneeded watchdog settings
Peng Fan [Thu, 5 May 2022 11:06:03 +0000 (19:06 +0800)]
imx: imx8mm-mx8menlo: drop unneeded watchdog settings

pinctrl_wdog as u-boot,dm-spl already marked in imx8mm-verdin-u-boot.dtsi,

The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2 years agoimx: imx8mp_evk: enable pinctrl_wdog in SPL
Peng Fan [Thu, 5 May 2022 11:05:59 +0000 (19:05 +0800)]
imx: imx8mp_evk: enable pinctrl_wdog in SPL

Mark pinctrl_wdog as u-boot,dm-spl to clean up board code,

The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2 years agoimx: imx8mm_evk: enable pinctrl_wdog in SPL
Peng Fan [Thu, 5 May 2022 11:05:58 +0000 (19:05 +0800)]
imx: imx8mm_evk: enable pinctrl_wdog in SPL

Mark pinctrl_wdog as u-boot,dm-spl to clean up board code,

The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2 years agoimx: imx8mn_evk: enable pinctrl_wdog in SPL
Peng Fan [Thu, 5 May 2022 11:05:57 +0000 (19:05 +0800)]
imx: imx8mn_evk: enable pinctrl_wdog in SPL

Mark pinctrl_wdog as u-boot,dm-spl to clean up board code,

The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2 years agoimx: imx8mq-phanbell: enable CONFIG_DM_SERIAL
Peng Fan [Thu, 5 May 2022 07:43:41 +0000 (15:43 +0800)]
imx: imx8mq-phanbell: enable CONFIG_DM_SERIAL

Marked related nodes as u-boot,dm-spl for serial driver model
Enable CONFIG_DM_SERIAL

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2 years agoimx: imx8mq-pico: enable CONFIG_DM_SERIAL
Peng Fan [Thu, 5 May 2022 07:43:40 +0000 (15:43 +0800)]
imx: imx8mq-pico: enable CONFIG_DM_SERIAL

Marked related nodes as u-boot,dm-spl for serial driver model
Enable CONFIG_DM_SERIAL

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2 years agoimx: imx8mq-cm: enable CONFIG_DM_SERIAL
Peng Fan [Thu, 5 May 2022 07:43:39 +0000 (15:43 +0800)]
imx: imx8mq-cm: enable CONFIG_DM_SERIAL

Marked related nodes as u-boot,dm-spl for serial driver model
Enable CONFIG_DM_SERIAL

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2 years agoimx: dts: move common changes to imx8mq-u-boot.dtsi
Peng Fan [Thu, 5 May 2022 07:43:38 +0000 (15:43 +0800)]
imx: dts: move common changes to imx8mq-u-boot.dtsi

Move some common changes to imx8mq-u-boot.dtsi, so others could reuse it

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2 years agoimx: imx8mm_edm_sbc: Enable SPL_DM_SERIAL
Peng Fan [Thu, 5 May 2022 07:43:36 +0000 (15:43 +0800)]
imx: imx8mm_edm_sbc: Enable SPL_DM_SERIAL

Enable CONFIG_SPL_DM_SERIAL. uart and its pinmux was already
marked with u-boot,dm-spl.
Move preloader_console_init after spl_early_init to make sure driver
model work.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2 years agoimx: imx8mm_mx8menlo: Enable DM_SERIAL
Peng Fan [Thu, 5 May 2022 07:43:30 +0000 (15:43 +0800)]
imx: imx8mm_mx8menlo: Enable DM_SERIAL

Enable CONFIG_DM_SERIAL. uart2 and its pinmux was already
marked with u-boot,dm-spl.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2 years agoboard: gateworks: gw_ventana: remove obsolete file
Tim Harvey [Fri, 29 Apr 2022 21:05:22 +0000 (14:05 -0700)]
board: gateworks: gw_ventana: remove obsolete file

commit 61cf22505339 ("board: gateworks: gw_ventana: use comomn GSC driver")
moved to the common GSC driver and moved remaining board-specific
functions to eeprom.c. The functions in gsc.c are no longer used and it
was removed from the Makefile but the file itself was not removed.
Remove it now.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2 years agoboard: gateworks: gw_ventana: add support for GPY111 PHY
Tim Harvey [Fri, 29 Apr 2022 20:51:02 +0000 (13:51 -0700)]
board: gateworks: gw_ventana: add support for GPY111 PHY

The MaxLinear GPY111 PHY is being used on some boards due to part
availability. Add support for this PHY which requires a longer reset
post-delay and RGMII delay configuration.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2 years agoboard: gateworks: venice: enable SPL_DM_SERIAL
Tim Harvey [Fri, 29 Apr 2022 19:36:25 +0000 (12:36 -0700)]
board: gateworks: venice: enable SPL_DM_SERIAL

The uart2 and its pinmux are already marked with u-boot,dm-spl but we
need to move the call to preloader_console_init() after spl_early_init()
to avoid a board hang as dm can't be used until after spl_early_init()
due to the uart driver not enabling the uart clock.

Remove the manual config of the UART pinmux now that it is no longer
needed.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2 years agoconfigs: remove FEC_QUIRK_ENET_MAC from imx8m configs
Tim Harvey [Fri, 29 Apr 2022 18:17:52 +0000 (11:17 -0700)]
configs: remove FEC_QUIRK_ENET_MAC from imx8m configs

FEC_QUIRK_ENET_MAC is defined in the imx-regs.h include file and thus
does not need to be defined in the various board config includes.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2 years agoconfigs: imx8mp_venice: add FEC_QUIRK_ENET_MAC
Tim Harvey [Fri, 29 Apr 2022 17:08:32 +0000 (10:08 -0700)]
configs: imx8mp_venice: add FEC_QUIRK_ENET_MAC

The IMX8MP SoC FEC needs to have the FEC_QUIRK_ENET_MAC defined.

Fixes: commit 2395625209cc ("board: gateworks: venice: add imx8mp-venice-gw740x support")
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2 years agoconfigs: imx8m{m, n}_venice: remove unneeded CONFIG_FEC_MXC_PHYADDR
Tim Harvey [Fri, 29 Apr 2022 16:54:04 +0000 (09:54 -0700)]
configs: imx8m{m, n}_venice: remove unneeded CONFIG_FEC_MXC_PHYADDR

The IMX8M based Venice boards all have device-tree fec nodes that
use proper dt with a phy-handle pointing to a phy with reg assigned
to the proper phy address.

There is no need to keep using the CONFIG_FEC_MXC_PHYADDR hack when
a proper dt is used - remove it.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2 years agoimx: imx8m: drop uneeded check
Peng Fan [Fri, 29 Apr 2022 08:18:49 +0000 (16:18 +0800)]
imx: imx8m: drop uneeded check

All i.MX8M needs TZASC ID SWAP set and locked, no need the check to
waste cpu cycles.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
2 years agoimx: imx8m: add rproc_att
Peng Fan [Fri, 29 Apr 2022 08:03:14 +0000 (16:03 +0800)]
imx: imx8m: add rproc_att

With rpoc_att, bootaux able to kick elf file for M core

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2 years agoimx: bootaux: get stack from elf file
Peng Fan [Fri, 29 Apr 2022 08:03:13 +0000 (16:03 +0800)]
imx: bootaux: get stack from elf file

To i.MX8, M core stack is pre-coded in source code, so need to get it
before kicking M core. The stack pointer is stored in the first word of
the first PT_LOAD section __isr_vector. So use a num to index the
section loading.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2 years agoimx: bootaux: add missing newline
Peng Fan [Fri, 29 Apr 2022 08:03:12 +0000 (16:03 +0800)]
imx: bootaux: add missing newline

Add missing newline

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2 years agoimx: bootaux: cleanup code
Peng Fan [Fri, 29 Apr 2022 08:03:11 +0000 (16:03 +0800)]
imx: bootaux: cleanup code

Use if (CONFIG_IS_ENABLED()) to make code cleaner
Enable elf support for i.MX8M

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2 years agoimx8m: fix reading of DDR4 MR registers
Rasmus Villemoes [Mon, 25 Apr 2022 14:22:48 +0000 (16:22 +0200)]
imx8m: fix reading of DDR4 MR registers

I was trying to employ lpddr4_mr_read() to something similar to what
the imx8mm-cl-iot-gate board is doing for auto-detecting the RAM
type. However, the version in drivers/ddr/imx/imx8m/ddrphy_utils.c
differs from the private one used by that board in how it extracts the
byte value, and I was only getting zeroes. Adding a bit of debug
printf'ing gives me

 tmp = 0x00ffff00
 tmp = 0x00070700
 tmp = 0x00000000
 tmp = 0x00101000

and indeed I was expecting a (combined) value of 0xff070010 (0xff
being Manufacturer ID for Micron). I can't find any documentation that
says how the values are supposed to be read, but clearly the iot-gate
definition is the right one, both for its use case as well as my
imx8mp-based board.

So lift the private definition of lpddr4_mr_read() from the
imx8mm-cl-iot-gate board code to ddrphy_utils.c, and add a declaration
in the ddr.h header where e.g. get_trained_CDD() is already declared.

This has only been compile-tested for the imx8mm-cl-iot-gate
board (since I don't have the hardware), but since I've merely moved
its definition of lpddr4_mr_read(), I'd be surprised if it changed
anything for that board.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Tested-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2 years agoARM: imx: imx31: Introduce and use UART_BASE_ADDR(n)
Marek Vasut [Sun, 24 Apr 2022 21:44:05 +0000 (23:44 +0200)]
ARM: imx: imx31: Introduce and use UART_BASE_ADDR(n)

Introduce helper macro UART_BASE_ADDR(n), which returns Nth UART base
address. Convert all board configurations to this new macro. This is the
first step toward switching CONFIG_MXC_UART_BASE to Kconfig. This is a
clean up, no functional change.

The new macro contains compile-time test to verify N is in suitable
range. The test works such that it multiplies constant N by constant
double-negation of size of a non-empty structure, i.e. it multiplies
constant N by constant 1 in each successful compilation case.

The non-empty structure may contain C11 _Static_assert(), make use of
this and place the kernel variant of static assert in there, so that
it performs the compile-time check for N in the correct range. Note
that it is not possible to directly use static_assert in compound
statements, hence this convoluted construct.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2 years agoARM: imx: imx27: Introduce and use UART_BASE_ADDR(n)
Marek Vasut [Sun, 24 Apr 2022 21:44:04 +0000 (23:44 +0200)]
ARM: imx: imx27: Introduce and use UART_BASE_ADDR(n)

Introduce helper macro UART_BASE_ADDR(n), which returns Nth UART base
address. Convert all board configurations to this new macro. This is the
first step toward switching CONFIG_MXC_UART_BASE to Kconfig. This is a
clean up, no functional change.

The new macro contains compile-time test to verify N is in suitable
range. The test works such that it multiplies constant N by constant
double-negation of size of a non-empty structure, i.e. it multiplies
constant N by constant 1 in each successful compilation case.

The non-empty structure may contain C11 _Static_assert(), make use of
this and place the kernel variant of static assert in there, so that
it performs the compile-time check for N in the correct range. Note
that it is not possible to directly use static_assert in compound
statements, hence this convoluted construct.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2 years agoARM: imx: imx8m: Introduce and use UART_BASE_ADDR(n)
Marek Vasut [Sun, 24 Apr 2022 21:44:03 +0000 (23:44 +0200)]
ARM: imx: imx8m: Introduce and use UART_BASE_ADDR(n)

Introduce helper macro UART_BASE_ADDR(n), which returns Nth UART base
address. Convert all board configurations to this new macro. This is the
first step toward switching CONFIG_MXC_UART_BASE to Kconfig. This is a
clean up, no functional change.

The new macro contains compile-time test to verify N is in suitable
range. The test works such that it multiplies constant N by constant
double-negation of size of a non-empty structure, i.e. it multiplies
constant N by constant 1 in each successful compilation case.

The non-empty structure may contain C11 _Static_assert(), make use of
this and place the kernel variant of static assert in there, so that
it performs the compile-time check for N in the correct range. Note
that it is not possible to directly use static_assert in compound
statements, hence this convoluted construct.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2 years agomx6sllevk: Remove duplicated "mmc dev" command
Fabio Estevam [Fri, 22 Apr 2022 17:17:57 +0000 (14:17 -0300)]
mx6sllevk: Remove duplicated "mmc dev" command

The "mmc dev ${mmcdev}" command is done twice.

Remove one ocurrence to avoid the duplication.

Signed-off-by: Fabio Estevam <festevam@denx.de>
2 years agomx6slevk: Remove duplicated "mmc dev" command
Fabio Estevam [Fri, 22 Apr 2022 17:17:56 +0000 (14:17 -0300)]
mx6slevk: Remove duplicated "mmc dev" command

The "mmc dev ${mmcdev}" command is done twice.

Remove one ocurrence to avoid the duplication.

Signed-off-by: Fabio Estevam <festevam@denx.de>
2 years agoi.MX8 crypto/fsl: Enable fsl CAAM rng driver
Gaurav Jain [Fri, 22 Apr 2022 11:08:34 +0000 (16:38 +0530)]
i.MX8 crypto/fsl: Enable fsl CAAM rng driver

rng driver enabled to read random number using caam.

Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
2 years agoARM: dts: imx: Use 100 kHz I2C2 on Data Modul i.MX8M Mini eDM SBC
Marek Vasut [Fri, 22 Apr 2022 08:57:53 +0000 (10:57 +0200)]
ARM: dts: imx: Use 100 kHz I2C2 on Data Modul i.MX8M Mini eDM SBC

The I2C2 has SMBus device SMSC USB2514Bi connected to it, the device is
capable of up to 100 kHz operation. Reduce the bus frequency to 100 kHz
to guarantee this I2C device can work correctly.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2 years agoimx8mn/8mp: Allow booting via USB
Fabio Estevam [Thu, 21 Apr 2022 18:05:23 +0000 (15:05 -0300)]
imx8mn/8mp: Allow booting via USB

When trying to boot via USB on i.MX8MN it is necessary to specify
the U-Boot environment location, otherwise the boot process simply
hangs.

Specify the environment location when booting from USB.

Tested on a imx8mn-evk.

Suggested-by: Michael Nazzareno Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
Tested-By: Tim Harvey <tharvey@gateworks.com>
2 years agoimx8mn_ddr4_evk: Add USB Mass Storage support
Fabio Estevam [Thu, 21 Apr 2022 18:05:22 +0000 (15:05 -0300)]
imx8mn_ddr4_evk: Add USB Mass Storage support

Add USB Mass Storage support, which is a convenient way to flash
the eMMC card, for example.

Signed-off-by: Fabio Estevam <festevam@denx.de>
2 years agoi.MX6SX: crypto/fsl: fix entropy delay value
Gaurav Jain [Fri, 15 Apr 2022 11:10:49 +0000 (16:40 +0530)]
i.MX6SX: crypto/fsl: fix entropy delay value

RNG Hardware error is reported due to incorrect entropy delay

rng self test are run to determine the correct ent_dly.
test is executed with different voltage and temperature to identify the
worst case value for ent_dly. after adding a margin value(1000),
ent_dly should be at least 12000.

Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2 years agomtd: rawnand: mxs_nand: Fix use_minimum_ecc for spl driver
Ye Li [Thu, 31 Mar 2022 05:27:47 +0000 (13:27 +0800)]
mtd: rawnand: mxs_nand: Fix use_minimum_ecc for spl driver

Because mxs_nand_spl driver does not support DM, to use the minimum ECC
layout, it needs to handle the CONFIG_NAND_MXS_USE_MINIMUM_ECC.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Han Xu <han.xu@nxp.com>
2 years agospi: stm32_qspi: Remove SR_BUSY bit check before sending command
Patrice Chotard [Thu, 12 May 2022 07:17:38 +0000 (09:17 +0200)]
spi: stm32_qspi: Remove SR_BUSY bit check before sending command

Waiting for SR_BUSY bit when receiving a new command is not needed.
SR_BUSY bit is already managed in the previous command treatment.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2 years agospi: stm32_qspi: Always check SR_TCF flags in stm32_qspi_wait_cmd()
Patrice Chotard [Thu, 12 May 2022 07:17:37 +0000 (09:17 +0200)]
spi: stm32_qspi: Always check SR_TCF flags in stm32_qspi_wait_cmd()

Currently, SR_TCF flag is checked in case there is data, this criteria
is not correct.

SR_TCF flags is set when programmed number of bytes have been transferred
to the memory device ("bytes" comprised command and data send to the
SPI device).
So even if there is no data, we must check SR_TCF flag.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2 years agoARM: dts: stm32: Configure Buck3 voltage per PMIC NVM on Avenger96
Marek Vasut [Wed, 11 May 2022 21:09:33 +0000 (23:09 +0200)]
ARM: dts: stm32: Configure Buck3 voltage per PMIC NVM on Avenger96

The Avenger96 board comes in multiple regulator configurations.
 - rev.100 or rev.200 have Buck3 preconfigured to 3V3 operation on
   boot and contains extra Enpirion EP53A8LQI DCDC converter which
   supplies the IO. Reduce Buck3 voltage to 2V9 to not waste power.
 - rev.200L have Buck3 preconfigured to 1V8 operation and have no
   Enpirion EP53A8LQI DCDC anymore, the IO is supplied from Buck3.

Configure the Buck3 voltage on this board per PMIC NVM settings and
update buck3 voltage limits in DT passed to OS before booting OS to
prevent potential hardware damage.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2 years agoMerge https://source.denx.de/u-boot/custodians/u-boot-marvell
Tom Rini [Wed, 18 May 2022 12:41:13 +0000 (08:41 -0400)]
Merge https://source.denx.de/u-boot/custodians/u-boot-marvell

- Misc Kconfig cleanups (Chris & Pali)
- turris_omnia: Fix hangup in debug UART (this introduces
  TPL/SPL_DEBUG_UART_BASE) Pali
- mvebu: uDPU: include fixed-phy support (Robert)
- pinctrl: probe pinctrl drivers during post-bind (Robert)

2 years agoarm64: zynqmp: Add DT description for si5328 for zcu102/zcu106
Michal Simek [Wed, 11 May 2022 09:52:54 +0000 (11:52 +0200)]
arm64: zynqmp: Add DT description for si5328 for zcu102/zcu106

Origin DT binding just specify driver but wasn't aligned with DT binding
which came later. Extend description for zcu102 and zcu106 to cover latest
binding.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/db66a4bb501183ffbd033da4dd263afdb214f8ec.1652262769.git.michal.simek@amd.com
2 years agoarm64: zynqmp: Add linux,code for fwuen button
Michal Simek [Wed, 11 May 2022 09:52:53 +0000 (11:52 +0200)]
arm64: zynqmp: Add linux,code for fwuen button

BTN_MISC looks like the most reasonable option for this button.
Button is used by firmware to indicate (after reset, power up) that user
wants to do firmware upgrade via firmware update utility.
For bootloader or OS is this just user button which is worth to have it
mapped.
Also button can be used as a wakeup source and pressing it for more time
can generate more chars that's why also adding wakeup-source and autorepeat
properties.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
Link: https://lore.kernel.org/r/7f6d627473632c3c3036ec9f6aaa36e00f4615e2.1652262769.git.michal.simek@amd.com
2 years agoarm64: zynqmp: Add PHY description for SGMII on vck190 SC
Michal Simek [Wed, 11 May 2022 09:52:52 +0000 (11:52 +0200)]
arm64: zynqmp: Add PHY description for SGMII on vck190 SC

SGMII requires phy to be configured. The support for this has been added to
Linux and U-Boot already that's why also describe the phy via DT. Clock is
coming from si5332 chip (output 1) 125MHz which is only one GT line use on
this board.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/8ad8d0c2fc9690cc90f95feddf87b0e94a685a43.1652262769.git.michal.simek@amd.com
2 years agoRevert "arm64: zynqmp: Add zynqmp firmware specific DT nodes"
T Karthik Reddy [Wed, 11 May 2022 09:52:51 +0000 (11:52 +0200)]
Revert "arm64: zynqmp: Add zynqmp firmware specific DT nodes"

This reverts commit 50a6bd000f94832658f42fb01b9aaf9e39a52004.

As zynqmp mini emmc does not rely on firmware, remove firmware related
device tree modes from zynqmp mini emmc dts files.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Acked-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/e69b30d82b0307c563fe72630d9172e53964aeda.1652262769.git.michal.simek@amd.com
2 years agoarm64: zynqmp: Add dmas, gpu, rtc, watchdogs and opp nodes for SOM
Michal Simek [Wed, 11 May 2022 09:52:50 +0000 (11:52 +0200)]
arm64: zynqmp: Add dmas, gpu, rtc, watchdogs and opp nodes for SOM

There are couple of IPs which are enabled in origin HW design which are
missing in SOM dt. Add them to match default setup.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/901401beacbea5931fc18cde20c157e5978a7023.1652262769.git.michal.simek@amd.com
2 years agoarm64: zynqmp: Add pwm-fan node and fix ttc0 pwm-cells property
Vishal Patel [Wed, 11 May 2022 09:52:49 +0000 (11:52 +0200)]
arm64: zynqmp: Add pwm-fan node and fix ttc0 pwm-cells property

Add pwm-fan node to control fan through hwmon and change
pwm-cells property to 3 to allow fancontrol utility to
function correctly.

Signed-off-by: Vishal Patel <vishal.patel@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/21b4dfce3e45136a468974ea3dedca03320e27b8.1652262769.git.michal.simek@amd.com
2 years agoarm64: zynqmp: Add power domain description for PL
Michal Simek [Wed, 11 May 2022 09:52:48 +0000 (11:52 +0200)]
arm64: zynqmp: Add power domain description for PL

PL has own power domain which is not described in DT. That's why add it
there by default.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/b38e2ea95dab434bc007f9ed6c438c68149744bf.1652262769.git.michal.simek@amd.com