Simon Glass [Sun, 9 Oct 2022 03:33:22 +0000 (21:33 -0600)]
test: Drop unwanted option in event_dump.py
This option is not used. Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 9 Oct 2022 03:33:21 +0000 (21:33 -0600)]
event: Drop the path when checking event-list filenames
This path does not seem to be present in clang-14 for some reason. Relax
the regular expression so that the test works, at least for non-LTO.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 9 Oct 2022 03:33:20 +0000 (21:33 -0600)]
dm: core: Fix lists_bind_fdt() using non-existent of_match
The call to device_bind_with_driver_data() passes id->data but if
the entry has no of_match then the id has not been set by the selected
driver.
Normally this passes unnoticed since a previous driver likely had an
of_match value, so the id is set to that. Of course it is not correct
to pass the id->data from a different driver.
With clang-14 the driver ordering is such that the id is never actually
set in the 'bind /usb@1 usb_ether' line in test_bind_unbind_with_node()
thus causing a crash.
Fix this by passing 0 if the of_match for a driver does not exist.
Signed-off-by: Simon Glass <sjg@chromium.org>
Rasmus Villemoes [Mon, 3 Oct 2022 09:02:45 +0000 (11:02 +0200)]
gpio-uclass: fix gpio lookup by label
Matching anything that just happens to have the sought-for label as a
prefix is wrong. For example, if the board designer has designated 10
lines for debug purposes, named "debug1" through "debug10", and we are
looking up "debug1", if debug10 happens to be met first during the
iteration we'd wrongly return that.
In theory, this can break existing users that could rely on this
quirk, but OTOH keeping the current broken semantics can cause a lot
of grief for people hitting this in the future and not understanding
why they don't find the line they expect. Considering how few in-tree
defconfigs currently set DM_GPIO_LOOKUP_LABEL (ignoring sandbox, only
four "real" boards), let's fix it before the use becomes more
widespread.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Heinrich Schuchardt [Sat, 1 Oct 2022 13:00:22 +0000 (15:00 +0200)]
x86: provide typedef jmp_buf
The jmp_buf type is required by the C99 specification.
Defining it for x86 fixes building the longjmp unit test.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Heinrich Schuchardt [Sat, 1 Oct 2022 13:00:21 +0000 (15:00 +0200)]
x86: fix longjmp() implementation
If longjmp(jmp_buf env, int val) is called with val = 0, the setjmp()
macro must return 1.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Michal Suchanek [Tue, 27 Sep 2022 21:25:24 +0000 (23:25 +0200)]
dm: pci: Fix doc typo first -> next
pci_find_first_device description says it can be used for iteration with
itself but it should really be with pci_find_next_device
Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Patrick Delaunay [Tue, 27 Sep 2022 08:18:05 +0000 (10:18 +0200)]
fdt_support: cosmetic: remove fdt_fixup_nor_flash_size prototype
Remove prototype for the removed function fdt_fixup_nor_flash_size.
This patch has no impact as the function is never used.
Fixes: 98f705c9cefd ("powerpc: remove 4xx support")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Michal Suchanek [Sun, 25 Sep 2022 13:28:47 +0000 (15:28 +0200)]
dm: doc: Fix serial howto u-boot,dm-pre-reloc typo
In a couple of places the document says u-boot,pre-reloc but all
examples show u-boot,dm-pre-reloc, use the latter consistently.
Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Rasmus Villemoes [Wed, 5 Oct 2022 09:09:25 +0000 (11:09 +0200)]
lib: fix buggy strcmp and strncmp
There are two problems with both strcmp and strncmp:
(1) The C standard is clear that the contents should be compared as
"unsigned char":
The sign of a nonzero value returned by the comparison functions
memcmp, strcmp, and strncmp is determined by the sign of the
difference between the values of the first pair of characters (both
interpreted as unsigned char) that differ in the objects being
compared.
(2) The difference between two char (or unsigned char) values can
range from -255 to +255; so that's (due to integer promotion) the
range of values we could get in the *cs-*ct expressions, but when that
is then shoe-horned into an 8-bit quantity the sign may of course
change.
The impact is somewhat limited by the way these functions
are used in practice:
- Most of the time, one is only interested in equality (or for
strncmp, "starts with"), and the existing functions do correctly
return 0 if and only if the strings are equal [for strncmp, up to
the given bound].
- Also most of the time, the strings being compared only consist of
ASCII characters, i.e. have values in the range [0, 127], and in
that case it doesn't matter if they are interpreted as signed or
unsigned char, and the possible difference range is bounded to
[-127, 127] which does fit the signed char.
For size, one could implement strcmp() in terms of strncmp() - just
make it "return strncmp(a, b, (size_t)-1);". However, performance of
strcmp() does matter somewhat, since it is used all over when parsing
and matching DT nodes and properties, so let's find some other place
to save those ~30 bytes.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Tom Rini [Wed, 26 Oct 2022 19:24:59 +0000 (15:24 -0400)]
Merge branch '2022-10-26-assorted-fixes-and-updates'
- Reduce memory usage in SPL in some cases, clarify some standalone API
license issues, fix a Kconfig dependency, pin to a specific version of
python setuptools for now, fix a signing problem in mkimage and add a
memory uclass.
Roger Quadros [Thu, 20 Oct 2022 13:30:49 +0000 (16:30 +0300)]
memory: Add TI GPMC driver
The GPMC is a unified memory controller dedicated for interfacing
with external memory devices like
- Asynchronous SRAM-like memories and ASICs
- Asynchronous, synchronous, and page mode burst NOR flash
- NAND flash
- Pseudo-SRAM devices
This driver will take care of setting up the GPMC based on
the settings specified in the Device tree and then
probe its children.
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Roger Quadros [Thu, 20 Oct 2022 13:30:48 +0000 (16:30 +0300)]
dt/bindings: memory: Add bindings for TI GPMC driver
GPMC stands for General Purpose Memory Controller and it is
present on many Texas Instruments SoCs.
It supports a number of Asynchronous and Synchronous interfaces
and has various settings to configure the bus interface.
The DT bindings define all the various GPMC settings.
As the GPMC supports multiple devices on the bus, each
device is represented as a child and the respective
GPMC settings are situated there. (see ti,gpmc-child.yaml)
These binding docs are picked up from the Linux kernel.
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Roger Quadros [Thu, 20 Oct 2022 13:30:47 +0000 (16:30 +0300)]
scripts: Makefile.spl: Enable memory drivers to be built for SPL
Introduce CONFIG_SPL_MEMORY to allow Memory drivers to
be built for SPL.
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Roger Quadros [Thu, 20 Oct 2022 13:30:46 +0000 (16:30 +0300)]
dm: memory: Introduce new uclass
Introduce UCLASS_MEMORY for future Memory Controller
device drivers.
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 22 Oct 2022 01:30:43 +0000 (19:30 -0600)]
test: Move to a working version of setuptools
The version used on Ubuntu 2022.04 produces a number of warnings:
/usr/lib/python3/dist-packages/pkg_resources/__init__.py:116:
PkgResourcesDeprecationWarning: 1.16.0-unknown is an invalid version
and will not be supported in a future release
Same with: 0.1.43ubuntu1 11.4.1ubuntu1 2.22.1ubuntu1 1.1build1
According to [1] this is a bug in setuptools. Employ the workaround for
now.
[1] https://askubuntu.com/questions/
1406952/what-is-the-meaning-of-this-
pkgresourcesdeprecationwarning-warning-from-pipenv
Signed-off-by: Simon Glass <sjg@chromium.org>
Paul Barker [Thu, 5 May 2022 15:32:41 +0000 (15:32 +0000)]
examples: hello_world: Drop inclusion of common header
The "common.h" header is not covered by the licensing exception for
standalone applications. Let's drop inclusion of this header from the
hello_world example to prove that a standalone app can be built without
it.
Signed-off-by: Paul Barker <paul.barker@sancloud.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Paul Barker [Thu, 5 May 2022 15:32:40 +0000 (15:32 +0000)]
Licenses: Clarify exceptions for standalone apps
On 2010-01-27, an email [1] was sent to the mailing list by Wolfgang
Denk which clarified the intended licensing exceptions for standalone
applications. As the "export.h" header and the "stubs.c" source files
are required to implement a standalone application, the intention was
that these files be covered by the licensing exception. This is made
clear in the following quotes from that email:
"exports.h" should be added to the "allowed" file list; there should
be no need to include "common.h". Eventually this needs fixing.
Patches are welcome.
"examples/standalone/stubs.c" should be added to the "allowed" file
list (the ppc_*jmp.S files are LGPLed).
There should be no doubts - the intention is clear, the current state
may need improvement. Help (read: patches) welcome.
[1]: https://lists.denx.de/pipermail/u-boot/2010-January/067174.html
Signed-off-by: Paul Barker <paul.barker@sancloud.com>
Cc: Wolfgang Denk <wd@denx.de>
Acked-by: Wolfgang Denk <wd@denx.de>
Benjamin Bara [Wed, 29 Jun 2022 10:27:34 +0000 (12:27 +0200)]
crypto: hash: sw: fix Kconfig dependencies
Fix SHA512 config name and add missing SHA384 config.
Signed-off-by: Benjamin Bara <Benjamin.Bara@skidata.com>
Roger Quadros [Thu, 29 Sep 2022 10:11:28 +0000 (13:11 +0300)]
spl: spl_legacy: Fix NAND boot on OMAP3 BeagleBoard
OMAP3 BeagleBoard NAND boot hangs when spl_load_legacy_img() tries
to read the header into 'struct hdr' which is allocated on the
stack.
As the header has already been read once before by spl_nand.c,
we can avoid the extra header allocation and read here by
simply passing around the pointer to the header.
This fixes NAND boot on OMAP3 BeagleBoard.
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com>
Sean Anderson [Thu, 20 Oct 2022 19:41:10 +0000 (15:41 -0400)]
mkimage: fit: Fix signing of configs with external data
Just like we exclude data-size, data-position, and data-offset from
fit_config_check_sig, we must exclude them while signing as well.
While we're at it, use the FIT_DATA_* defines for fit_config_check_sig
as welll.
Fixes: 8edecd3110e ("fit: Fix verification of images with external data")
Fixes: c522949a29d ("rsa: sig: fix config signature check for fit with padding")
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Wed, 26 Oct 2022 11:46:48 +0000 (07:46 -0400)]
Merge https://source.denx.de/u-boot/custodians/u-boot-pmic
Tom Rini [Wed, 26 Oct 2022 11:45:55 +0000 (07:45 -0400)]
Merge https://source.denx.de/u-boot/custodians/u-boot-watchdog
- nuvoton: add expire function for generic reset (Jim)
- handle watchdogs during keyed autoboot (Rasmus)
- cyclic: Don't disable cylic function upon exceeding CPU time (Stefan)
- ulp wdog: Updates to support iMX93 and DM (Alice)
Michal Suchanek [Sun, 25 Sep 2022 13:43:27 +0000 (15:43 +0200)]
power: fan53555: Fix missing newline in error message
Avoid concatenation with following message.
Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
John Keeping [Thu, 8 Sep 2022 11:38:35 +0000 (12:38 +0100)]
power: regulator: fix autoset error handling
If a regulator does not support .set_suspend_enable or
.set_suspend_value then ret is set to ENOSYS early in the function.
The most serious impact of this is that when no automatic setting of
voltage is needed then the final regulator_set_enable() is skipped
because ret has not been cleared.
It seems that the error handling for regulator_set_suspend_value() is
also wrong as if this succeeds then the normal boot-on checks are still
required, and again ENOSYS needs special treatment here.
Fixes: 11406b8f7e ("dm: regulator: support regulator more state")
Signed-off-by: John Keeping <john@metanate.com>
Tom Rini [Tue, 25 Oct 2022 13:54:59 +0000 (09:54 -0400)]
Merge https://source.denx.de/u-boot/custodians/u-boot-spi
- Add s28hl512t, s28hl01gt (Takahiro)
- Rework s25hx_t_post_bfpt_fixup() (Takahiro)
Marek Vasut [Wed, 28 Sep 2022 16:45:04 +0000 (18:45 +0200)]
cmd: sf: Handle unaligned 'update' start offset
Currently the 'sf update' command fails in case the 'start' offset is
not aligned to SPI NOR erase block size. Add the missing alignment
calculation. In case the start offset is in the middle of erase block,
round start address down to the nearest aligned one, compare only the
updated data between what is in the SPI NOR and what is being written,
copy new data at offset of the compare buffer, and write back the entire
erase block.
This is useful e.g. on i.MX6Q where the u-boot-with-spl.imx is at
offset 0x400 in the SPI NOR, while the SPI NOR may have erase block
size e.g. 0x1000 bytes.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tom Rini [Tue, 25 Oct 2022 01:28:47 +0000 (21:28 -0400)]
Merge tag 'fsl-qoriq-2022-10-18' of https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq
Layerscape update
- support sysreset,
- de-select FSL_IFC when booting from SD
- disable unused parts of ICID tables
- reduce ns_dev size for csu
- enable dma snooping for ls104x
- nand driver fixups for ls1043ardb rev 7.0 boards.
Tom Rini [Tue, 25 Oct 2022 01:28:14 +0000 (21:28 -0400)]
Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmc
Tom Rini [Mon, 24 Oct 2022 14:04:30 +0000 (10:04 -0400)]
Merge tag 'u-boot-imx-
20221024' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
u-boot-imx-
20221024
-------------------
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/13916
- for 2022.01
- rework Kontron boards (mx6 and mx8)
- fixes for Toradex
- fixes (SPI, CAAM, )
- sync DT with Linux
- fixes for Gateworks GW7903 and GW7904 PMIC
- Engicam i.Core MX8M Plus EDIMM2.2
Andrejs Cainikovs [Tue, 4 Oct 2022 11:06:32 +0000 (13:06 +0200)]
configs: verdin-imx8mp: enable caam
This change enables Cryptographic Accelerator and Assurance Module.
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Francesco Dolcini [Wed, 3 Aug 2022 11:20:09 +0000 (13:20 +0200)]
configs: colibri-imx7: Enable bootd command
Enable boot/bootd command in toradex colibri-imx7 defconfig,
it's just convenient to have it in and every other toradex board
already includes it.
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Marcel Ziswiler [Sat, 22 Oct 2022 21:59:45 +0000 (23:59 +0200)]
imx28: avoid num_cs and spi_max_frequency build errors
Avoid the following build errors after the device tree sync:
drivers/spi/mxs_spi.c: In function ‘mxs_spi_probe’:
drivers/spi/mxs_spi.c:327:25: error: ‘struct dtd_fsl_imx23_spi’ has no
member named ‘spi_max_frequency’
327 | priv->max_freq = dtplat->spi_max_frequency;
| ^~
drivers/spi/mxs_spi.c:328:23: error: ‘struct dtd_fsl_imx23_spi’ has no
member named ‘num_cs’
328 | plat->num_cs = dtplat->num_cs;
| ^~
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Marcel Ziswiler [Sat, 22 Oct 2022 21:59:43 +0000 (23:59 +0200)]
imx23: synchronise device tree with linux
Synchronise device tree with linux v6.0-rc1.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Marcel Ziswiler [Sat, 22 Oct 2022 21:59:42 +0000 (23:59 +0200)]
imx28: synchronise device tree with linux
Synchronise device tree with linux v6.0-rc1.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Marcel Ziswiler [Sat, 22 Oct 2022 21:59:41 +0000 (23:59 +0200)]
imx51: synchronise device tree with linux
Synchronise device tree with linux v6.0-rc1.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Marcel Ziswiler [Sat, 22 Oct 2022 21:59:40 +0000 (23:59 +0200)]
imx53: synchronise device tree with linux
Synchronise device tree with linux v6.0-rc1.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Marcel Ziswiler [Sat, 22 Oct 2022 21:59:39 +0000 (23:59 +0200)]
imx6qdl: synchronise device tree with linux
Synchronise device tree with linux v6.0-rc1.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Marcel Ziswiler [Sat, 22 Oct 2022 21:59:38 +0000 (23:59 +0200)]
imx6qp: synchronise device tree with linux
Synchronise device tree with linux v6.0-rc1.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Marcel Ziswiler [Sat, 22 Oct 2022 21:59:37 +0000 (23:59 +0200)]
imx6sl: synchronise device tree with linux
Synchronise device tree with linux v6.0-rc1.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Marcel Ziswiler [Sat, 22 Oct 2022 21:59:36 +0000 (23:59 +0200)]
imx6sll: synchronise device tree with linux
Synchronise device tree with linux v6.0-rc1.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Marcel Ziswiler [Sat, 22 Oct 2022 21:59:35 +0000 (23:59 +0200)]
imx6sx: synchronise device tree with linux
Synchronise device tree with linux v6.0-rc1.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Marcel Ziswiler [Sat, 22 Oct 2022 21:59:34 +0000 (23:59 +0200)]
imx6ulz: synchronise device tree with linux
Synchronise device tree with linux v6.0-rc1.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Marcel Ziswiler [Sat, 22 Oct 2022 21:59:33 +0000 (23:59 +0200)]
imx6ull: synchronise device tree with linux
Synchronise device tree with linux v6.0-rc1.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Marcel Ziswiler [Sat, 22 Oct 2022 21:59:32 +0000 (23:59 +0200)]
imx6ul: synchronise device tree with linux
Synchronise device tree with linux v6.0-rc1.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Marcel Ziswiler [Sat, 22 Oct 2022 21:59:31 +0000 (23:59 +0200)]
imx7d: synchronise device tree with linux
Synchronise device tree with linux v6.0-rc1.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Marcel Ziswiler [Sat, 22 Oct 2022 21:59:30 +0000 (23:59 +0200)]
imx7ulp: synchronise device tree with linux
Synchronise device tree with linux v6.0-rc1.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Adam Ford [Sat, 22 Oct 2022 00:58:37 +0000 (19:58 -0500)]
arm: dts: imx8mn-venice: Consolidate with imx8mn-u-boot
Now that a unified imx8mn-u-boot is available, remove duplicated
code for generating flash.bin and other common imx8mn peripherals.
Signed-off-by: Adam Ford <aford173@gmail.com>
Adam Ford [Sat, 22 Oct 2022 00:58:36 +0000 (19:58 -0500)]
arm: dts: imx8mn-var-som-symphony: Consolidate with imx8mn-u-boot
Now that a unified imx8mn-u-boot is available, remove duplicated
code for generating flash.bin and other common imx8mn peripherals.
Signed-off-by: Adam Ford <aford173@gmail.com>
Adam Ford [Sat, 22 Oct 2022 00:58:35 +0000 (19:58 -0500)]
arm: dts: imx8mn-evk: Consolidate with imx8mn-u-boot
Now that a unified imx8mn-u-boot is available, remove duplicated
code for generating flash.bin and other common imx8mn peripherals.
Signed-off-by: Adam Ford <aford173@gmail.com>
Adam Ford [Sat, 22 Oct 2022 00:58:34 +0000 (19:58 -0500)]
arm: dts: imx8mn-ddr4-evk: Consolidate with imx8mn-u-boot
Now that a unified imx8mn-u-boot is available, remove duplicated
code for generating flash.bin and other common imx8mn peripherals.
Signed-off-by: Adam Ford <aford173@gmail.com>
Adam Ford [Sat, 22 Oct 2022 00:58:33 +0000 (19:58 -0500)]
arm: dts: imx8mn-bsh-smm-s2: Consolidate with imx8mn-u-boot
Now that a unified imx8mn-u-boot is available, remove duplicated
code for generating flash.bin and other common imx8mn peripherals.
Signed-off-by: Adam Ford <aford173@gmail.com>
Adam Ford [Sat, 22 Oct 2022 00:58:32 +0000 (19:58 -0500)]
arm: dts: imx8mn-beacon-kit: Consolidate with imx8mn-u-boot
Now that a unified imx8mn-u-boot is available, remove duplicated
code for generating flash.bin and other common imx8mn peripherals.
Signed-off-by: Adam Ford <aford173@gmail.com>
Adam Ford [Sat, 22 Oct 2022 00:58:31 +0000 (19:58 -0500)]
arm: dts: imx8mn-u-boot: Create common imx8mn-u-boot.dtsi
Multiple boards create duplicate entries in their respective
-u-boot.dtsi files which all basically do the same thing.
To consolidate these and make it easier to make improvements
going forward, consolidate them all into one place.
This file creates a flash.bin image using binman, and supports
LPDDR4, DDR4 and DDR3. Since individual boards use different
peripherals and different UART ports, those entries were kept
in their respective board files, but the spba1 node was addded
which contains all UART1-3 to help facilitate SPL_DM_SERIAL.
Individual users will still need to include their respective
UART and pinctrl nodes for those UARTS.
This consolidated file also supports generating a flash.bin file
which can boot from flexSPI if CONFIG_FSPI_CONF_HEADER is
enabled.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Rasmus Villemoes [Thu, 6 Oct 2022 12:56:50 +0000 (14:56 +0200)]
imx8m: fix reading of DDR4 MR registers [again]
Commit
290ffe5788 (imx8m: fix reading of DDR4 MR registers) lifted a
private definition of lpddr4_mr_read() from imx8mm-cl-iot-gate board
code to drivers/ddr/imx/imx8m/ddrphy_utils.c, because that version
actually seems to work in practice.
However, commit
99c7cc58e1 (ddr: imx: Add i.MX9 DDR controller driver)
reintroduced the broken version in drivers/ddr/imx/imx8m/ddr_init.c,
copied most of the rest of ddrphy_utils.c to
drivers/ddr/imx/phy/ddrphy_utils.c, and stopped building
drivers/ddr/imx/imx8m/ddrphy_utils.c [and that file was then finally
completely removed with
7e9bd84883 (imx8m: ddrphy_utils: Remove unused
file)].
I assume this must have broken the imx8mm-cl-iot-gate board, at least
those that have not had their eeprom programmed with the proper
information. It certainly did break our out-of-tree board which always
reads back the ID register and uses that for a sanity check.
So apply the fix from
290ffe5788 once again.
Fixes: 99c7cc58e1 (ddr: imx: Add i.MX9 DDR controller driver)
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Andrejs Cainikovs [Tue, 4 Oct 2022 11:06:31 +0000 (13:06 +0200)]
verdin-imx8mp: spl: initialize caam
This change initializes Cryptographic Accelerator and Assurance Module.
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Andrejs Cainikovs [Tue, 4 Oct 2022 11:06:30 +0000 (13:06 +0200)]
arm: dts: verdin-imx8mp: enable caam in SPL
CAAM is initialized in SPL, so relevant device tree nodes needs to be
updated.
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Marcel Ziswiler [Thu, 22 Sep 2022 21:28:34 +0000 (23:28 +0200)]
verdin-imx8mp: various config additions and improvements
- enable bootcount command
- enable CRC32 and MD5
- enable time commands
- enable GPIO LED support
- enable further eMMC HS400 functionality
- enable fixed PHY and MDIO driver model
- enable USB host functionality
- enable thermal management unit driver
- enable hexdump
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Marcel Ziswiler [Thu, 22 Sep 2022 21:28:33 +0000 (23:28 +0200)]
verdin-imx8mm: various config additions and improvements
- enable bootcount command
- integrate bootcount using SNVS_LP general purpose register LPGPR0
- enable link-time optimisation
- explicitly set a boot delay of one second
- enable CRC32 and MD5
- enable command for low-level access to data in a partition
- enable time commands
- enable PMIC commands
- improve ETHPRIME configuration
- enable eMMC HS400 functionality
- enable fixed PHY and MDIO driver model
- remove stale PFUZE100 PMIC driver
- enable thermal management unit driver
- enable more USB host functionality
- enable hexdump
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Marcel Ziswiler [Thu, 22 Sep 2022 21:28:32 +0000 (23:28 +0200)]
verdin-imx8mm: verdin-imx8mp: update env memory layout (again)
Update the distro config env memory layout for the Verdin iMX8M Mini and
Verdin iMX8M Plus again:
- loadaddr=0x48200000 allows for 128MB area for uncompressing (ie FIT
images, kernel_comp_addr_r, kernel_comp_size)
- fdt_addr_r = loadaddr + 128MB - allows for 128MB kernel
- scriptaddr = fdt_addr_r + 512KB - allows for 512KB fdt
- ramdisk_addr_r = scriptaddr + 512KB - allows for 512KB script
Memory layout taken from commit
fd5c7173ade4
("imx8m{m,n}_venice: update env memory layout").
Note that for our regular BSP Layers and Reference Images for Yocto
Project an updated distro boot script is required (see
meta-toradex-bsp-common/recipes-bsp/u-boot/u-boot-distro-boot).
Note that this corrects a pre-maturely applied version 2 of the same
patch set.
Fixes: bbe0089d29e ("verdin-imx8mm: verdin-imx8mp: update env memory layout")
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Tim Harvey [Wed, 14 Sep 2022 16:02:19 +0000 (09:02 -0700)]
board: gateworks: venice: add imx8mm-gw7904 support
The GW7904 is based on the i.MX 8M Mini SoC featuring:
- LPDDR4 DRAM
- eMMC FLASH
- microSD connector with UHS support
- LIS2DE12 3-axis accelerometer
- Gateworks System Controller
- IMX8M FEC
- 2x RS232 off-board connectors
- PMIC
- 10x bi-color LED's
- 1x miniPCIe socket with PCIe and USB2.0
- 802.3at Class 4 PoE
- 10-30VDC input via barrel-jack
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Manoj Sai [Fri, 26 Aug 2022 12:33:37 +0000 (18:03 +0530)]
board: imx8mp: Add Engicam i.Core MX8M Plus EDIMM2.2 Starter Kit
i.Core MX8M Plus is an EDIMM SoM based on NXP i.MX8M Plus from Engicam.
i.Core MX8M Plus needs to mount on top of this Evaluation board for
creating complete i.Core MX8M Plus EDIMM2.2 Starter Kit.
Add support for it.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Manoj Sai <abbaraju.manojsai@amarulasolutions.com>
Manoj Sai [Fri, 26 Aug 2022 12:33:36 +0000 (18:03 +0530)]
arm64: dts: imx8mp: Add Engicam i.Core MX8M Plus EDIMM2.2 Starter Kit
Genaral features:
- LCD 7" C.Touch
- microSD slot
- Ethernet 1Gb
- Wifi/BT
- 2x LVDS Full HD interfaces
- 3x USB 2.0
- 1x USB 3.0
- HDMI Out
- Plus PCIe
- MIPI CSI
- 2x CAN
- Audio Out
i.Core MX8M Plus is an EDIMM SoM based on NXP i.MX8M Plus from Engicam.
i.Core MX8M Plus needs to mount on top of this Evaluation board for
creating complete i.Core MX8M Plus EDIMM2.2 Starter Kit.
Add support for it.
Sync the i.Core MX8M Plus is an EDIMM SoM based on NXP
devicetree file from linux-next tree.
commit <
aec8ad34f7f24> (arm64: dts: imx8mp: Add Engicam i.Core MX8M Plus EDIMM2.2 Starter Kit)
Signed-off-by: Manoj Sai <abbaraju.manojsai@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Manoj Sai [Fri, 26 Aug 2022 12:33:35 +0000 (18:03 +0530)]
arm64: dts: imx8mp: Add Engicam i.Core MX8M Plus SoM
i.Core MX8M Plus is an EDIMM SoM based on NXP i.MX8M Plus
from Engicam.
General features:
- NXP i.MX8M Plus
- Up to 4GB LDDR4
- 8 eMMC
- Gigabit Ethernet
- USB 3.0, 2.0 Host/OTG
- PCIe 3.0 interface
- I2S
- LVDS
- rest of i.MX8M Plus features
i.Core MX8M Plus needs to mount on top of Engicam baseboards
for creating complete platform solutions.
Add support for it.
Sync the i.Core MX8M Plus is an EDIMM SoM based on NXP i.MX8M Plus
from Engicam devicetree file from linux-next tree.
commit <
eefe06b295087> (arm64: dts: imx8mp: Add Engicam i.Core MX8M Plus SoM)
Signed-off-by: Manoj Sai <abbaraju.manojsai@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Tim Harvey [Thu, 11 Aug 2022 18:57:04 +0000 (11:57 -0700)]
board: gateworks: venice: add GW7903 PMIC
The GW7903 has a
BD71847 PMIC on I2C1. Adjust the model compare strings
to add it.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Alice Guo [Fri, 21 Oct 2022 08:41:18 +0000 (16:41 +0800)]
watchdog: ulp_wdog: add driver model for ulp watchdog driver
Enable driver model for ulp watchdog timer. When CONFIG_WDT=y and the
status of device node is "okay", initr_watchdog will be called and
finally calls ulp_wdt_probe() and ulp_wdt_start().
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Alice Guo [Fri, 21 Oct 2022 08:41:17 +0000 (16:41 +0800)]
watchdog: ulp_wdog: enable watchdog interrupt on imx93
The reset source of the external PMIC on i.MX93 is WDOG_ANY PAD and the
source of WDOG_ANY PAD is interrupt. Therefore, using PMIC to reset
needs to enable the watchdog interrupt.
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Alice Guo [Fri, 21 Oct 2022 08:41:16 +0000 (16:41 +0800)]
watchdog: ulp_wdog: Update watchdog driver for imx93
The WDOG clocks are sourced from the fixed 32KHz (lpo_clk).When the
timeout period exceeds 2 seconds, the value written to the TOVAL
register is larger than 16-bit can represent. Enabling watchdog
prescaler to solve this problem.
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Ye Li [Fri, 21 Oct 2022 08:41:15 +0000 (16:41 +0800)]
ulp_wdog: Update ulp wdog driver for 32bits command
To use 32bits refresh and unlock command as default, check the CMD32EN
bit to select the corresponding commands.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Stefan Roese [Mon, 17 Oct 2022 07:00:58 +0000 (09:00 +0200)]
cyclic: Don't disable cylic function upon exceeding CPU time
With the migration of the watchdog infrastructure to cyclic functions
it's been noticed, that at least one watchdog driver is broken now. As
the execution time of it's watchdog reset function is quite long.
In general it's not really necessary (right now) to disable the cyclic
function upon exceeding CPU time usage. So instead of disabling the
cylic function in this case, let's just print a warning once to show
this potential problem to the user.
Signed-off-by: Stefan Roese <sr@denx.de>
Suggested-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Cc: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Cc: Tom Rini <trini@konsulko.com>
Cc: Pali Rohár <pali@kernel.org>
Rasmus Villemoes [Tue, 27 Sep 2022 09:54:05 +0000 (11:54 +0200)]
sandbox.dtsi: add a sandbox,alarm-wdt instance
In order to test that we properly handle watchdog(s) during the "wait
for the user to interrupt autoboot" phase, we need a watchdog device
to be watching us.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Rasmus Villemoes [Tue, 27 Sep 2022 09:54:04 +0000 (11:54 +0200)]
sandbox: add SIGALRM-based watchdog device
In order to test that U-Boot actually maintains the watchdog device(s)
during long-running busy-loops, such as those where we wait for the
user to stop autoboot, we need a watchdog device that actually does
something during those loops; we cannot test that behaviour via the DM
test framework.
So introduce a relatively simple watchdog device which is simply based
on calling the host OS' alarm() function; that has the nice property
that a new call to alarm() simply sets a new deadline, and alarm(0)
cancels any existing alarm. These properties are precisely what we
need to implement start/reset/stop. We install our own handler so that
we get a known message printed if and when the watchdog fires, and by
just invoking that handler directly, we get expire_now for free.
The actual calls to the various OS functions (alarm, signal, raise)
need to be done in os.c, and since the driver code cannot get access
to the values of SIGALRM or SIG_DFL (that would require including a
host header, and that's only os.c which can do that), we cannot simply
do trivial wrappers for signal() and raise(), but instead create
specialized functions just for use by this driver.
Apart from enabling this driver for sandbox{,64}_defconfig, also
enable the wdt command which was useful for hand-testing this new
driver (especially with running u-boot under strace).
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Rasmus Villemoes [Tue, 27 Sep 2022 09:54:03 +0000 (11:54 +0200)]
watchdog: introduce a u-boot,autostart property
This is a companion to u-boot,noautostart. If one has a single
watchdog device that one does want to have auto-started, but several
others that one doesn't, the only way currently is to set the
CONFIG_WATCHDOG_AUTOSTART and then use the opt-out for the majority.
The main motivation for this is to add an autostarted watchdog device
to the sandbox (to test a fix) without having to set AUTOSTART in
sandbox_defconfig and add the noautostart property to the existing
devices. But it's also nice for symmetry, and the logic in
init_watchdog_dev() becomes simpler to read because we avoid all the
negations.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Jim Liu [Tue, 13 Sep 2022 06:19:24 +0000 (14:19 +0800)]
wdt: nuvoton: add expire function for generic reset
Add expire_now function for generic sysreset request
Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
Venkatesh Yadav Abbarapu [Thu, 29 Sep 2022 04:52:49 +0000 (10:22 +0530)]
mmc: Fix static checker warnings
Correct pointer dereferencing check to be more consistent.
Eliminate the below smatch warning:
drivers/mmc/mmc.c:3118 mmc_init_device()
warn: variable dereferenced before check 'm' (see line 3116)
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Reviewed-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
John Keeping [Thu, 15 Sep 2022 17:56:56 +0000 (18:56 +0100)]
mmc: dwmmc: only clear handled interrupts
Unconditionally clearing DTO when RXDR is set leads to spurious timeouts
in FIFO mode transfers if events occur in the following order:
mask = dwmci_readl(host, DWMCI_RINTSTS);
// Hardware asserts DWMCI_INTMSK_DTO here
dwmci_writel(host, DWMCI_RINTSTS, DWMCI_INTMSK_DTO);
if (mask & DWMCI_INTMSK_DTO) {
// Unreachable as DTO is cleared without being handled!
return 0;
}
Only clear interrupts that we have seen and are handling so that DTO is
not missed.
Signed-off-by: John Keeping <john@metanate.com>
Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (Rock PI 4B)
Tested-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Yann Gautier [Tue, 13 Sep 2022 11:23:46 +0000 (13:23 +0200)]
mmc: stm32_sdmmc2: manage vqmmc
The SDMMC IOs can be in an IO domain, that has to be enabled.
This is done by enabling vqmmc in the driver.
This has no impact on configurations not using an IO domain, the check
can then be executed on all platforms managing regulator, and the vqmmc
regulator enabled on all platforms having it in their DT.
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Yann Gautier [Tue, 13 Sep 2022 11:23:45 +0000 (13:23 +0200)]
mmc: stm32_sdmmc2: protect against unsupported modes
The UHS modes for SD, HS200 and HS400 modes for eMMC are not supported
by the stm32_sdmmc2 driver.
Make it clear by removing the corresponding caps after parsing the DT.
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Yann Gautier [Tue, 13 Sep 2022 11:23:44 +0000 (13:23 +0200)]
mmc: stm32_sdmmc2: add dual data rate support
To support dual data rate with STM32 sdmmc2 driver, the dedicated bit
(DDR - BIT(18)) needs to be set in the CLKRC register. Clock bypass
(no divider) is not allowed in this case. This is required for the
eMMC DDR modes.
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Kunihiko Hayashi [Fri, 9 Sep 2022 07:23:33 +0000 (16:23 +0900)]
mmc: f_sdh30: Add support for F_SDH30_E51
Add Socionext F_SDH30_E51 IP support. The features of this IP includes
CMD/DAT line delay and force card insertion mode for non-removable cards.
And the IP needs to add some quirks.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Kunihiko Hayashi [Fri, 9 Sep 2022 07:23:32 +0000 (16:23 +0900)]
mmc: sdhci: Add new quirks for SUPPORT_SINGLE
This patch defines a quirk to disable the block count
for single block transactions.
This is similar to Linux kernel commit
d3fc5d71ac4d
("mmc: sdhci: add a quirk for single block transactions").
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Sergei Antonov [Fri, 2 Sep 2022 07:40:10 +0000 (10:40 +0300)]
mmc: ftsdc010: make command timeout 250 ms as in the comment
Get rid of discrepancy beween comment /* 250 ms */ and code
which shifts by 4 thus dividing by 16.
So change code to shift by 2 and make the timeout value 250 ms.
Signed-off-by: Sergei Antonov <saproj@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Takahiro Kuwano [Mon, 12 Sep 2022 05:25:40 +0000 (14:25 +0900)]
mtd: spi-nor-core: Fix index value for SCCR dwords
Array index for SCCR 22th DWORD should be 21.
Fixes: bebdc237507c ("mtd: spi-nor: Parse SFDP SCCR Map")
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Takahiro Kuwano [Thu, 1 Sep 2022 06:05:33 +0000 (15:05 +0900)]
mtd: spi-nor-core: Rework s25hx_t_post_bfpt_fixup() for flash's internal address mode
The flash's internal address mode is tracked by nor->add_mode_nbytes and
it is set to 3 in BFPT parse. SEMPER multi-die package parts (>1Gb) are
3- or 4-byte address mode by default, depending on model number. We need
to make sure that 4-byte address mode is used for multi-die package parts.
For single-die package parts (<=1Gb), registers can be accessed by 3-byte
address. Read, program, and erase use the 4B opcodes that always take
4-byte address regardless of flash's internal address mode.
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Takahiro Kuwano [Thu, 1 Sep 2022 06:05:32 +0000 (15:05 +0900)]
mtd: spi-nor-core: Rework spansion_read/write_any_reg() to use addr_mode_nbytes
Read/Write Any Register commands take 3- or 4- byte address depending on
flash's internal address mode. The nor->addr_width tracks number of
address bytes used in read/program/erase ops that can be 4
(with 4B opcodes) regardless of flash's internal address mode. The
nor->addr_mode_nbytes tracks flash's internal address mode so replace
nor->addr_width by that.
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Takahiro Kuwano [Thu, 1 Sep 2022 06:05:31 +0000 (15:05 +0900)]
mtd: spi-nor-core: Track flash's internal address mode
The nor->addr_width tracks number of address bytes used in
read/program/erase ops and eventually set to 4 for >16MB chips, regardless
of flash's internal address mode. For Infineon SEMPER flash's, we use
Read/Write Any Register commands for configuration and status check.
These commands take 3- or 4-byte address depending on flash's internal
address mode.
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Takahiro Kuwano [Thu, 1 Sep 2022 06:05:30 +0000 (15:05 +0900)]
mtd: spi-nor-core: Default to addr_width of 3 for configurable widths
JESD216D-01 mentions that "defaults to 3-Byte mode; enters 4-Byte mode on
command."
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Takahiro Kuwano [Thu, 25 Aug 2022 07:48:48 +0000 (16:48 +0900)]
mtd: spi-nor-ids: Add s28hl512t, s28hl01gt, and s28hs01gt IDs
Add flash info table entries for s28hl512gt, s28hl01gt, and s28hs01gt.
These devices have the same functionality as s28hs512t.
In spi-nor-core, use device ID byte to detect S28 family instead of
device name.
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Takahiro Kuwano [Thu, 25 Aug 2022 07:48:47 +0000 (16:48 +0900)]
mtd: spi-nor-core: Rename configuration macro for S28 support
Change configuration macro name to support all other devices in SEMPER S28
family.
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Takahiro Kuwano [Thu, 25 Aug 2022 07:48:46 +0000 (16:48 +0900)]
mtd: spi-nor-core: Rename s28hs512t prefix
Change prefix to support all other devices in SEMPER S28 family.
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tom Rini [Sat, 22 Oct 2022 15:19:31 +0000 (11:19 -0400)]
Merge branch '2022-10-21-assorted-fixes-and-updates'
- NC-SI handling support and enable on evb-ast2[56]00, gpio driver for
ADP5585, improve qfw support, print more sysresets info, gw_ventana
and gcc-12 bugfix, improve BCB support, fix a few typos and remove an
unused keymile CONFIG symbol.
Holger Brunck [Mon, 17 Oct 2022 09:45:21 +0000 (11:45 +0200)]
board/km: drop CONFIG_KM_ROOTFSSIZE
This unused nowadays and can be dropped.
Signed-off-by: Holger Brunck <holger.brunck@hitachienergy.com>
Mattijs Korpershoek [Mon, 17 Oct 2022 07:35:04 +0000 (09:35 +0200)]
blk: fix a couple of trivial documentation typos
In some cases, the param variable is wrong, and in other cases we have
undocumented arguments.
Fix the docs.
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Michal Suchanek [Sat, 15 Oct 2022 09:30:37 +0000 (11:30 +0200)]
test: Fix typo in test name
For other sandbox tests the printed test name corresponds to the
configuration except for this one.
Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Mattijs Korpershoek [Thu, 13 Oct 2022 12:25:59 +0000 (14:25 +0200)]
cmd: bcb: select user(0) hwpart in __bcb_load()
For some blk operations, it's possible that a different hw partition
gets selected via blk_dselect_hwpart().
In that case, only the region of the device covered by that partition
is accessible.
This breaks "bcb load" which attempts to read the gpt and assumes it's
on the user(0) hw partition:
=> bcb load 2 misc
GUID Partition Table Header signature is wrong: 0xDE7B17AD07D9E5D6 != 0x5452415020494645
find_valid_gpt: *** ERROR: Invalid GPT ***
GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645
find_valid_gpt: *** ERROR: Invalid Backup GPT ***
Error: mmc 2:misc read failed (-2)
Add a fail-safe in __bcb_load() to ensure we will always read from the
user(0) hwpartition.
This fixes the following fastboot sequence:
$ fastboot erase mmc2boot1 # switch to hwpart1
$ fastboot reboot bootloader # switch to hwpart0, then reads GPT
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Reviewed-by: Sean Anderson <sean.anderson@seco.com>
Heinrich Schuchardt [Wed, 12 Oct 2022 16:59:27 +0000 (18:59 +0200)]
board: gateworks: gw_ventana: fix building with GCC 12.2
Building with GCC 12.2 results in an error
board/gateworks/gw_ventana/gw_ventana.c:636:68: error: the comparison
will always evaluate as 'true' for the address of 'pwm_padmux' will
never be NULL [-Werror=address]
636 | } else if (hwconfig_subarg_cmp(arg, "mode", "pwm") &&
| ^~
Remove the superfluous check.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-By: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Michal Suchanek [Mon, 10 Oct 2022 18:29:40 +0000 (20:29 +0200)]
common: board_f: Print information for all sysresets
Boards can have multiple sysresets, iterate all when printing sysreset
info.
Fixes: 23471aed5c ("board_f: Add reset status printing")
Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Michal Suchanek [Mon, 10 Oct 2022 18:29:39 +0000 (20:29 +0200)]
sandbox: Initialize sysreset before relocation
Without this the early sysreset code cannot be tested.
Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Andre Przywara [Mon, 10 Oct 2022 17:01:22 +0000 (18:01 +0100)]
qemu: Try to automatically boot from the QEMU firmware device (qfw)
At the moment the QEMU boot sequence tries various (storage) devices
when trying to find a payload to boot.
To simplify starting a specific kernel and initrd, there is also the qfw
command, which can use the files specified on the QEMU command line, via
the -kernel and -initrd options.
Add this command to the list of boot options to try. Since users
specifying those options on the command line probably explicitly want
to run them, let's place the new command first. Without those options,
the qfw command will just gracefully fail, and we continue with the
existing order.
This allows auto-booting of specific kernels in QEMU, for instance in CI
systems.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Andre Przywara [Mon, 10 Oct 2022 17:01:21 +0000 (18:01 +0100)]
qfw: return failure when no kernel could be loaded
When we try to load a kernel via the QEMU firmware device, we currently
"return -1;" if no kernel was specified on the QEMU command line. This
leads to the usage output, which is confusing (since nothing on the
command line was really wrong), but also somewhat hides the actual error
message.
Return CMD_RET_FAILURE (1), as it's a proper error, and make the message
more clear that this is not only a "warning".
This helps to call this command in boot scripts, and to gracefully
continue if this doesn't work.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
projects / platform / kernel / u-boot.git / log