Pali Rohár [Mon, 20 Jun 2022 11:07:03 +0000 (13:07 +0200)]
mtd: rawnand: fsl_elbc: Fix detection when nand_scan_ident() has not selected ecc.mode
ecc.mode is set to 0 (aliased to NAND_ECC_NONE) either when function
nand_scan_ident() has not selected ecc.mode or when it selected it to none
ecc mode.
Distinguish between these two states by checking of node property
"nand-ecc-mode" which function nand_scan_ident() uses for filling ecc.mode.
This change fixes usage of none ecc mode if it is specified in DTS file.
Fixes:
c9ea9019c5aa ("mtd: rawnand: fsl_elbc: Use ECC configuration from device tree")
Signed-off-by: Pali Rohár <pali@kernel.org>
Tom Rini [Thu, 30 Jun 2022 19:21:52 +0000 (15:21 -0400)]
Merge tag 'u-boot-at91-2022.10-a' of https://source.denx.de/u-boot/custodians/u-boot-at91 into next
First set of u-boot-at91 features for the 2022.10 cycle:
This feature set includes mostly fixes and alignments: DT alignment with
Linux for sama7g5, removal of invalid eeprom compatibles, removal of
extra debug_uart_init calls for all at91 boards, support for pio4 driver
pioE bank, and other minor fixes and enhancements for sam9x60 and
sama5d2_icp boards.
Tom Rini [Thu, 30 Jun 2022 13:32:15 +0000 (09:32 -0400)]
Merge tag 'versal-qspi-for-v2022.10' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze into next
Versal QSPI/OSPI changes for v2022.10
- Add new flash types
- Add cadence ospi driver for Xilinx Versal
Mihai Sain [Wed, 25 May 2022 10:32:08 +0000 (13:32 +0300)]
gpio: atmel_pio4: add support for PIO_PORTE
Add support for gpio PORT E, which is available on e.g. sama7g5 SoC.
Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
Tom Rini [Wed, 29 Jun 2022 13:54:02 +0000 (09:54 -0400)]
Merge branch '2022-06-28-Kconfig-migrations' into next
- Convert a large number of CONFIG symbols to Kconfig. Of note is a
large chunk of USB symbols (and dead code removal), ensuring all
SPL/TPL/VPL symbols have an appropriate dependency, largely (but not
entirely) removing the testing of CONFIG_SPL_BUILD in board headers,
and allowing CONFIG_EXTRA_ENV_TEXT and CONFIG_EXTRA_ENV_SETTINGS to
co-exist as this facilities migration of many platforms.
T Karthik Reddy [Thu, 12 May 2022 10:05:35 +0000 (04:05 -0600)]
spi: cadence-qspi: Fix programming ospi flash speed
When the requested flash speed is 0, the baudrate division for the
requested speed causing drop in the performance. So set the ospi flash
to operate at max frequency when requested speed is zero.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/20220512100535.16364-6-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
T Karthik Reddy [Thu, 12 May 2022 10:05:34 +0000 (04:05 -0600)]
spi: cadence_qspi: Enable apb linear mode for apb read & write operations
On versal platform, enable apb linear mode for apb read and write
execute operations amd disable it when using dma reads. This is done by
xilinx_pm_request() secure calls when CONFIG_ZYNQMP_FIRMWARE is enabled,
else we use direct raw reads and writes in case of mini U-Boot.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/20220512100535.16364-5-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
T Karthik Reddy [Thu, 12 May 2022 10:05:33 +0000 (04:05 -0600)]
spi: cadence-qspi: reset qspi flash for versal platform
When flash operated at non default mode like DDR, flash need to be reset
to operate in SDR mode to read flash ids by spi-nor framework. Reset the
flash to the default state before using the flash. This reset is handled
by a gpio driver, in case of mini U-Boot as gpio driver is disabled, we
do raw read and write access by the registers.
Versal platform utilizes spi calibration for read delay programming, so
incase by default read delay property is set in DT. We make sure not to
use read delay from DT by overwriting read_delay with -1.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/20220512100535.16364-4-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
T Karthik Reddy [Thu, 12 May 2022 10:05:32 +0000 (04:05 -0600)]
arm64: versal: Add versal specific cadence ospi driver
Add support for cadence ospi driver for Versal platform. This driver
provides support for DMA read operation which utilizes cadence qspi
driver.
If "cdns,is-dma" DT property is specified use dma for read operation
from cadence_qspi driver. As cadence_qspi_apb_dma_read() is defined in
cadence_ospi_versal driver add a weak function defination in
cadence_qspi driver.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/20220512100535.16364-3-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
T Karthik Reddy [Thu, 12 May 2022 10:05:31 +0000 (04:05 -0600)]
spi: cadence-qspi: move cadence qspi macros to header file
Move all the cadence macros from cadence_qspi_apb.c to cadence_qspi.h
file.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/20220512100535.16364-2-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Ashok Reddy Soma [Wed, 25 May 2022 05:17:12 +0000 (10:47 +0530)]
mtd: spi-nor-ids: Add support for flashes tested by xilinx
Add support for various flashes from below manufacturers which are tested
by xilinx for years.
EON:
en25q128b
GIGA:
gd25lx256e
ISSI:
is25lp008
is25lp016
is25lp01g
is25wp008
is25wp016
is25wp01g
is25wx256
MACRONIX:
mx25u51245f
mx66u1g45g
mx66l2g45g
MICRON:
mt35xl512aba
mt35xu01g
SPANSION:
s70fs01gs_256k
SST:
sst26wf016b
WINBOND:
w25q16dw
w25q16jv
w25q512jv
w25q32bv
w25h02jv
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/1653455832-14763-1-git-send-email-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Tom Rini [Tue, 14 Jun 2022 02:57:37 +0000 (22:57 -0400)]
gw_ventana: Migrate to using CONFIG_EXTRA_ENV_TEXT
Move the environment text over from being set via
CONFIG_EXTRA_ENV_SETTINGS in include/configs/gw_ventana.h and over
to plain text in board/gateworks/gw_ventana/gw_ventana.env. This lets
us drop CONFIG_EXTRA_ENV_SETTINGS_COMMON as everything resides in a
single environment file now.
Cc: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Tim Harvey <tharvey@gateworks.com>
Tom Rini [Tue, 14 Jun 2022 02:57:36 +0000 (22:57 -0400)]
Complete migration of MTDPARTS_DEFAULT / MTDIDS_DEFAULT, include in environment
- Ensure that everyone setting mtdids= and mtdparts= is doing so via the
CONFIG options.
- If the CONFIG options are set, ensure that the default environment
sets mtdparts / mtdids.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 14 Jun 2022 02:57:35 +0000 (22:57 -0400)]
Rename CONFIG_SYS_AUTOLAOD to CONFIG_SYS_DISABLE_AUTOLOAD
The "autoload" environment variable is always checked with env_get_yesno
as it can be set to any form of no. The default behavior of
env_get_yesno is to return -1 on variables that are not set, which acts
as true in general (we test for non-zero return). To convert
CONFIG_SYS_AUTOLOAD to Kconfig, given that it was almost always used to
set autoload to no, first rename to CONFIG_SYS_DISABLE_AUTOLOAD for
consistency sake. Then, make it so that if enabled we set autoload=0 in
the default environment. Migrate all platforms which set
CONFIG_SYS_AUTOLOAD to non-true or that set autoload to false in their
default environment to using CONFIG_SYS_DISABLE_AUTOLOAD
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 14 Jun 2022 02:57:34 +0000 (22:57 -0400)]
opos6uldev: Migrate to using CONFIG_EXTRA_ENV_TEXT
Move the environment text over from being set via
CONFIG_EXTRA_ENV_SETTINGS in include/configs/opos6uldev.h and over to
plain text in board/armadeus/opos6uldev/opos6uldev.env. This lets us
manage env_version without a CONFIG variable.
Cc: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 14 Jun 2022 02:57:33 +0000 (22:57 -0400)]
Convert CONFIG_ENV_RANGE to Kconfig
This converts the following to Kconfig:
CONFIG_ENV_RANGE
Now that this is in Kconfig we can enforce a minimum size and so remove
the check in C code to ensure range is larger than size.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 14 Jun 2022 02:57:32 +0000 (22:57 -0400)]
dragonboard410c: Migrate to using CONFIG_EXTRA_ENV_TEXT
With the exception of distro_boot support, we can move all of the rest
of the environment changes to come from CONFIG_EXTRA_ENV_TEXT and in
turn remove CONFIG_ENV_REFLASH.
Cc: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 14 Jun 2022 02:57:31 +0000 (22:57 -0400)]
env: Remove include/generated/env.* under "make clean"
When running "make clean" we want to remove env.in and well as env.txt.
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 14 Jun 2022 02:57:30 +0000 (22:57 -0400)]
env: Do not make CONFIG_EXTRA_ENV_TEXT and CONFIG_EXTRA_ENV_SETTINGS conflict
Largely, the use of CONFIG_EXTRA_ENV_SETTINGS can be migrated directly
to come from CONFIG_EXTRA_ENV_TEXT. The biggest case that cannot easily
be migrated is distro_bootcmd support. Rather than block migration on
this, remove the #error here so that we can being moving forward.
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 13 Jun 2022 00:02:05 +0000 (20:02 -0400)]
Convert CONFIG_SYS_USB_FAT_BOOT_PARTITION to Kconfig
This converts the following to Kconfig:
CONFIG_SYS_USB_FAT_BOOT_PARTITION
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 13 Jun 2022 00:02:04 +0000 (20:02 -0400)]
Convert CONFIG_USB_MAX_CONTROLLER_COUNT to Kconfig
This converts the following to Kconfig:
CONFIG_USB_MAX_CONTROLLER_COUNT
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 13 Jun 2022 00:02:03 +0000 (20:02 -0400)]
common: usb: Update logic for usb.o, usb_hub.o and usb_storage.o
Now that we have consistently named symbols to enable USB host or gadget
controller support in SPL or full U-Boot, we do not need to
unconditionally build USB files nor depend on non-SPL symbols to know
when to build these common files.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 13 Jun 2022 00:02:02 +0000 (20:02 -0400)]
mx6memcal: Remove SPL_USB_HOST
As this particular platform is intended to be loaded and run a specific
set of routines in SPL, we do not need the ability to further use the
USB as a host device in SPL. Disable this support.
Cc: Eric Nelson <eric@nelint.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Eric Nelson <eric@nelint.com>
Tom Rini [Mon, 13 Jun 2022 00:02:01 +0000 (20:02 -0400)]
usb: Remove non-DM code in ehci-fsl and xhci
The DM_USB migration deadline has passed and this is not used in SPL.
Remove this now unused code.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 13 Jun 2022 00:02:00 +0000 (20:02 -0400)]
Convert CONFIG_FPGA_STRATIX_V to Kconfig
This converts the following to Kconfig:
CONFIG_FPGA_STRATIX_V
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 13 Jun 2022 00:01:59 +0000 (20:01 -0400)]
fpga: Remove CONFIG_FPGA_COUNT
This define is only currently used in a single board, and always set to
one. Define this within the board code and remove other references.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 13 Jun 2022 00:01:58 +0000 (20:01 -0400)]
Convert CONFIG_ENV_MIN_ENTRIES et al to Kconfig
This converts the following to Kconfig:
CONFIG_ENV_MIN_ENTRIES
CONFIG_ENV_MAX_ENTRIES
Cc: Michal Simek <michal.simek@amd.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 11 Jun 2022 02:59:38 +0000 (22:59 -0400)]
Globally remove most CONFIG_SPL_BUILD tests from config headers
With the exception of how PowerPC handles SPL and TPL (which has its own
issues), we cannot safely hide options under CONFIG_SPL_BUILD. Largely
remove the places that have this test today.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 11 Jun 2022 02:59:37 +0000 (22:59 -0400)]
Convert CONFIG_SYS_MPC85XX_NO_RESETVEC to Kconfig
This converts the following to Kconfig:
CONFIG_SYS_MPC85XX_NO_RESETVEC
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 11 Jun 2022 02:59:36 +0000 (22:59 -0400)]
Remove CONFIG_SPL_RAW_IMAGE_ARM_TRUSTED_FIRMWARE and CONFIG_SPL_ABORT_ON_RAW_IMAGE
These symbols do not exist in mainline, remove them.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 11 Jun 2022 02:59:35 +0000 (22:59 -0400)]
siemens: Move CONFIG_FACTORYSET to Kconfig
Introduce board/siemens/common/Kconfig and have it hold FACTORYSET to
start with. Use select for this on the boards that need it.
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Samuel Egli <samuel.egli@siemens.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 11 Jun 2022 02:59:34 +0000 (22:59 -0400)]
video: Migrate exynos display options to Kconfig
Following how it's done for the majority of drivers, add a new
VIDEO_EXYNOS option and Kconfig file under drivers/video/exynos and list
the current options there.
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
Tom Rini [Sat, 11 Jun 2022 02:59:33 +0000 (22:59 -0400)]
arm: samsung: Migrate a number of symbols to Kconfig
- In a number of cases, use CONFIG_ARCH_EXYNOS[45] rather than
CONFIG_EXYNOS[45]
- In other cases, test for CONFIG_ARCH_EXYNOS or CONFIG_ARCH_S5PC1XX
- Migrate specific SoC CONFIG values to Kconfig
- Use CONFIG_TARGET_x rather than CONFIG_x
- Migrate other CONFIG_EXYNOS_x symbols to Kconfig
- Reference CONFIG_EXYNOS_RELOCATE_CODE_BASE directly as EXYNOS_RELOCATE_CODE_BASE
- Rename CONFIG_S5P_PA_SYSRAM to CONFIG_SMP_PEN_ADDR to match the rest
of U-Boot usage.
Cc: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 11 Jun 2022 02:59:32 +0000 (22:59 -0400)]
arm: exynos: Remove old pwm backlight driver
Remove the unused older exynos pwm backlight driver.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
Tom Rini [Sat, 11 Jun 2022 02:59:31 +0000 (22:59 -0400)]
arm: samsung: Remove dead LCD code
Since
bb5930d5c97f ("exynos: video: Convert several boards to driver
model for video") there have been no callers of any of the exynos_lcd_*
family of functions. Remove these from the boards, and then remove
unused logo and related code as well.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
Tom Rini [Sat, 11 Jun 2022 02:59:30 +0000 (22:59 -0400)]
block: ide: Remove ide_preinit function
The only platform currently that defines an ide_preinit function has an
empty one that immediately returns. Remove this hook.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 11 Jun 2022 02:59:29 +0000 (22:59 -0400)]
ata: sata_sil: Remove useless BLK guard in sata_sil.h
Now that the driver only supports CONFIG_BLK, remove the useless guard
in sata_sil.h.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 11 Jun 2022 02:59:28 +0000 (22:59 -0400)]
Convert CONFIG_LBA48 et al to Kconfig
This converts the following to Kconfig:
CONFIG_LBA48
CONFIG_SYS_64BIT_LBA
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 11 Jun 2022 02:59:27 +0000 (22:59 -0400)]
Convert CONFIG_FSL_SATA_V2 to Kconfig
This converts the following to Kconfig:
CONFIG_FSL_SATA_V2
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 11 Jun 2022 02:59:26 +0000 (22:59 -0400)]
ata: fsl_sata: Remove legacy non-BLK code
The migration deadline for this has passed and all boards have been
updated, remove this legacy code and references for it.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 11 Jun 2022 02:59:25 +0000 (22:59 -0400)]
ata: dwc_ahsata: Remove legacy non-CONFIG_AHCI code
The migration deadline for this has passed and all boards have been
updated, remove this legacy code and references for it.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 11 Jun 2022 02:59:24 +0000 (22:59 -0400)]
xtensa: Switch to using CONFIG_XTENSA for building device trees
The only use of CONFIG_XTFPGA was to build all of the in-tree device
trees. Switch to using CONFIG_XTENSA instead of a non-Kconfig symbol.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 8 Jun 2022 12:24:40 +0000 (08:24 -0400)]
vpl: Ensure all VPL symbols in Kconfig have some VPL dependency
Tighten up symbol dependencies in a number of places. Ensure that a VPL
specific option has at least a direct dependency on VPL. In places
where it's clear that we depend on something more specific, use that
dependency instead.
Reported-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 8 Jun 2022 12:24:39 +0000 (08:24 -0400)]
tpl: Ensure all TPL symbols in Kconfig have some TPL dependency
Tighten up symbol dependencies in a number of places. Ensure that a TPL
specific option has at least a direct dependency on TPL. In places
where it's clear that we depend on something more specific, use that
dependency instead.
Reported-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 8 Jun 2022 12:24:37 +0000 (08:24 -0400)]
spl: Move SPL_LDSCRIPT defaults to one place
We want to keep all of the default values for SPL_LDSCRIPT in the same
place both for overall clarity as well as not polluting unrelated config
files.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 8 Jun 2022 12:24:36 +0000 (08:24 -0400)]
usb: ehci-mx5: Remove non-DM code
The deadline for DM_USB migration has passed and all users have been
migrated. Remove now unused code.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 8 Jun 2022 12:24:35 +0000 (08:24 -0400)]
usb: ehci-mxc: Remove
There are no platforms enabling this driver, remove.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 8 Jun 2022 12:24:34 +0000 (08:24 -0400)]
PowerPC: Remove some unused USB code
These particular code paths aren't used anymore, remove.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 8 Jun 2022 12:24:33 +0000 (08:24 -0400)]
Convert CONFIG_TEGRA_GPU to Kconfig
This converts the following to Kconfig:
CONFIG_TEGRA_GPU
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 8 Jun 2022 12:24:32 +0000 (08:24 -0400)]
usb: xhci-fsl: Remove non-DM code
The deadline for DM_USB migration has passed and all users have been
migrated. Remove now unused code.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 8 Jun 2022 12:24:31 +0000 (08:24 -0400)]
Convert CONFIG_USB_EHCI_TXFIFO_THRESH to Kconfig
This converts the following to Kconfig:
CONFIG_USB_EHCI_TXFIFO_THRESH
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 8 Jun 2022 12:24:30 +0000 (08:24 -0400)]
usb: ehci-fsl: Remove non-DM code
The deadline for DM_USB migration has passed and all users have been
migrated. Remove now unused code.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 8 Jun 2022 12:24:28 +0000 (08:24 -0400)]
Convert CONFIG_HAS_FSL_DR_USB to Kconfig
This converts the following to Kconfig:
CONFIG_HAS_FSL_DR_USB
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 8 Jun 2022 12:24:27 +0000 (08:24 -0400)]
Convert CONFIG_EHCI_HCD_INIT_AFTER_RESET to Kconfig
This converts the following to Kconfig:
CONFIG_EHCI_HCD_INIT_AFTER_RESET
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 8 Jun 2022 12:24:26 +0000 (08:24 -0400)]
Convert CONFIG_EHCI_DESC_BIG_ENDIAN et al to Kconfig
This converts the following to Kconfig:
CONFIG_EHCI_DESC_BIG_ENDIAN
CONFIG_EHCI_MMIO_BIG_ENDIAN
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 8 Jun 2022 12:24:25 +0000 (08:24 -0400)]
ehci-mxs: Remove non-DM code
This code is not enabled anywhere, drop it.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 8 Jun 2022 12:24:24 +0000 (08:24 -0400)]
Convert CONFIG_EFLASH_PROTSECTORS to Kconfig
This converts the following to Kconfig:
CONFIG_EFLASH_PROTSECTORS
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 8 Jun 2022 12:24:23 +0000 (08:24 -0400)]
Convert CONFIG_E1000_NO_NVM to Kconfig
This converts the following to Kconfig:
CONFIG_E1000_NO_NVM
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 28 Jun 2022 14:52:00 +0000 (10:52 -0400)]
Merge branch '2022-06-28-mpc85xx-and-aspeed-fixes' into next
- Merge a PowerPC MPC85xx cleanup / fix, and aspeed linker fix
Joel Stanley [Tue, 28 Jun 2022 04:27:25 +0000 (13:57 +0930)]
aspeed/ast2600: Fix SPL linker script
The commit
99e2fbcb69f0 ("linker_lists: Rename sections to remove .
prefix") changed the name of the linker list sections. As the Aspeed SPL
linker wasn't in the tree yet, it missed the change.
This updates the SPL linker to match arch/arm/cpu/u-boot-spl.lds which
Aspeed was copied from.
Fixes:
442a69c14375 ("configs: ast2600: Move SPL bss section to DRAM space")
Signed-off-by: Joel Stanley <joel@jms.id.au>
Pali Rohár [Thu, 16 Jun 2022 12:19:44 +0000 (14:19 +0200)]
powerpc: mpc85xx: Set TEXT_BASE addresses to real base values
Currently CONFIG_SPL_TEXT_BASE and CONFIG_SYS_TEXT_BASE addresses are
manually increased by 0x1000 due to .bootpg section. This section has size
of 0x1000 bytes and is manually put by linker script before .text section
(and therefore before base address) when CONFIG_SYS_MPC85XX_NO_RESETVEC is
set. Due to this fact lot of other config options are manually increased by
0x1000 value to make correct layout. Note that entry point is not on
CONFIG_SPL_TEXT_BASE (image+0x1000) but it is really on address
CONFIG_SPL_TEXT_BASE-0x1000 (means at the start of the image).
Cleanup handling of .bootpg section when CONFIG_SYS_MPC85XX_NO_RESETVEC is
set. Put .bootpg code directly into .text section and move text base
address to the start of .bootpg code. And finally remove +0x1000 value from
lot of config options. With this removal custom PHDRS is not used anymore,
so remove it too.
After this change entry point would be at CONFIG_SPL_TEXT_BASE and not at
address -0x1000 anymore.
Tested on P2020 board with SPL and proper U-Boot.
Signed-off-by: Pali Rohár <pali@kernel.org>
Eugen Hristev [Wed, 8 Jun 2022 14:49:29 +0000 (17:49 +0300)]
board: atmel: remove calls to debug_uart_init
Since
0dba45864b ("arm: Init the debug UART") ,
the debug_uart_init is now called from crt.S
It's no longer required to call it from the board file.
With the current code, the banned <debug_uart> is printed twice:
<debug_uart>
<debug_uart>
U-Boot 2022.07-rc4-00089-gee3d158fa8 (Jun 08 2022 - 17:39:29 +0300)
Remove all calls from board_early_init_f .
Suggested-by: Balamanikandan Gunasundar <Balamanikandan.Gunasundar@microchip.com>
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Eugen Hristev [Thu, 26 May 2022 14:04:56 +0000 (17:04 +0300)]
ARM: dts: at91: sam9x60ek: fix eeprom compatible
The memory on this board is microchip
24aa025e48 which is compatible with
at24c02 with a page size of 16.
Fix the compatible accordingly.
Reported-by: Sergiu Moga <sergiu.moga@microchip.com>
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Tested-by: Sergiu Moga <sergiu.moga@microchip.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Eugen Hristev [Thu, 26 May 2022 14:04:55 +0000 (17:04 +0300)]
misc: i2c_eeprom: remove
24aa02e48
This compatible does not exist in the bindings.
All occurences in DT have been replaced by at24c02 which is equivalent.
Fixes:
7264066707 ("misc: i2c_eeprom: Add compatible for
24AA02E48")
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Michael Walle <michael@walle.cc>
Reviewed-by: Heiko Schocher <hs@denx.de>
Eugen Hristev [Thu, 26 May 2022 14:04:54 +0000 (17:04 +0300)]
ARM: dts: at91: replace microchip,
24aa02e48 with atmel, at24c02
microchip,
24aa025e48 does not exist in the bindings of this driver.
It can be replaced with atmel,at24c02 which is a standard compatible
and the memory is compatible with this one, depending on the page size.
microchip
24aa02e48 has a page size of 8, while
24aa025e48 has a page
size of 16 bytes.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Michael Walle <michael@walle.cc>
Reviewed-by: Heiko Schocher <hs@denx.de>
Eugen Hristev [Tue, 24 May 2022 10:01:44 +0000 (13:01 +0300)]
ARM: dts: at91: sama7g5/sama7g5ek: sync with kernel at91 5.19
Sync with at91 maintainer tree for-5.19 branch.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Eugen Hristev [Tue, 24 May 2022 10:00:54 +0000 (13:00 +0300)]
dt-bindings: sound: add microchip,pdmc.h
Include microchip,pdmc.h from Linux.
This file includes required defines for DT successful build.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Sergiu Moga [Fri, 13 May 2022 15:13:41 +0000 (18:13 +0300)]
configs: at91: sama5d2_icp: enable QSPI and SF command
Add the configurations required for enabling QSPI and the SF command
to allow changes to be made dynamically to serial flash devices from
the command line interface.
Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Sergiu Moga [Fri, 13 May 2022 15:13:40 +0000 (18:13 +0300)]
configs: at91: sam9x60ek: enable QSPI and SF command
Add the configurations required for enabling QSPI and the SF command
to allow changes to be made dynamically to serial flash devices from
the command line interface.
Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Sergiu Moga [Fri, 13 May 2022 15:13:39 +0000 (18:13 +0300)]
ARM: dts: sam9x60: fix compatible for qspi child node
Change the compatible of the qspi child node to
`jedec,spi-nor` so that it can be properly found
when probing the bus.
Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Tom Rini [Mon, 27 Jun 2022 17:39:19 +0000 (13:39 -0400)]
Merge branch '2022-06-27-add-armv8-sha1-sha256-support' into next
To quote the author:
This series adds support for the SHA-1 and SHA-256 Secure Hash Algorithm
for CPUs that have support of the ARM v8 Crypto Extensions. It Improves
speed of integrity & signature checking procedures.
Tom Rini [Thu, 23 Jun 2022 19:44:47 +0000 (15:44 -0400)]
qemu_arm64: Enable CONFIG_ARMV8_CRYPTO support
Now that we can make use of CPU features for sha1/sha256, enable in QEMU
so that we get some test coverage.
Cc: Loic Poulain <loic.poulain@linaro.org>
Cc: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Signed-off-by: Tom Rini <trini@konsulko.com>
Loic Poulain [Wed, 1 Jun 2022 18:26:31 +0000 (20:26 +0200)]
armv8 SHA-256 using ARMv8 Crypto Extensions
This patch adds support for the SHA-256 Secure Hash Algorithm for CPUs
that have support for the SHA-256 part of the ARM v8 Crypto Extensions.
It greatly improves sha-256 based operations, about 17x faster on iMX8M
evk board. ~12ms vs ~208ms for a 20MiB kernel sha-256 verification.
asm implementation is a simplified version of the Linux version (from
Ard Biesheuvel).
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Loic Poulain [Wed, 1 Jun 2022 18:26:30 +0000 (20:26 +0200)]
lib: sha256: Add support for hardware specific sha256_process
Mark sha256_process as weak to allow hardware specific implementation.
Add parameter for supporting multiple blocks processing.
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Loic Poulain [Wed, 1 Jun 2022 18:26:29 +0000 (20:26 +0200)]
armv8 SHA-1 using ARMv8 Crypto Extensions:
This patch adds support for the SHA-1 Secure Hash Algorithm for CPUs
that have support for the SHA-1 part of the ARM v8 Crypto Extensions.
It greatly improves sha-1 based operations, about 10x faster on iMX8M
evk board. ~12ms vs ~165ms for a 20MiB kernel sha-1 verification.
asm implementation is a simplified version of the Linux version (from
Ard Biesheuvel).
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Loic Poulain [Wed, 1 Jun 2022 18:26:28 +0000 (20:26 +0200)]
sha1: Fix digest state size/type
sha1 digest size is 5*32-bit => 160-bit. Using 64-bit unsigned long
does not cause issue with the current sha1 implementation, but could
be problematic for vectorized access.
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Loic Poulain [Wed, 1 Jun 2022 18:26:27 +0000 (20:26 +0200)]
lib: sha1: Add support for hardware specific sha1_process
Mark sha1_process as weak to allow hardware specific implementation.
Add parameter to support for multiple blocks processing.
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Tom Rini [Mon, 27 Jun 2022 14:15:50 +0000 (10:15 -0400)]
Merge tag 'xilinx-for-v2022.10' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next
Xilinx changes for v2022.10
cpu:
- Add driver for microblaze cpu
net:
- Add support for DM_ETH_PHY to AXI emac and emaclite
xilinx:
- Switch platforms to DM_ETH_PHY
- DT chagnes in ZynqMP and Zynq
- Enable support for SquashFS
zynqmp:
- Add support for KR260 boards
- Move BSS from address 0
- Move platform identification from board code to soc driver
- Improve zynqmp_psu_init_minimize
versal:
- Enable loading app at EL1
serial:
- Setup default address and clock rates for DEBUG uarts
pinctrl:
- Add support for tri state and output enable properties
relocate-rela:
- Clean relocate-rela implementation for ARM64
- Add support for Microblaze
microblaze:
- Add support for runtime relocation
- Rework cache handling (wiring, Kconfig) based on cpuinfo
- Remove interrupt support
timer:
- Extract axi timer driver from Microblaze to generic location
Michal Simek [Thu, 23 Jun 2022 11:08:30 +0000 (13:08 +0200)]
timer: Add SPL_REGMAP dependency for Xilinx timer
Add SPL_REGMAP dependency when SPL is enabled. This can avoid compilation
issues if timer is selected but SPL_REGMAP not.
Reported-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/8f6c187e04cb3127bf5148ae2dbbdf55b25ea544.1655982509.git.michal.simek@amd.com
Michal Simek [Thu, 23 Jun 2022 11:04:21 +0000 (13:04 +0200)]
xilinx: Enable support for SquashFS
Enable SquashFS for all xilinx platforms.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/dbe85afda8cd90ebfc537979d382808ff9bec160.1655982259.git.michal.simek@amd.com
Stefan Herbrechtsmeier [Mon, 20 Jun 2022 16:36:50 +0000 (18:36 +0200)]
arm64: zynqmp: Move helper functions below header includes
Move helper functions in psu_init files below header includes to avoid
forward declarations.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220620163650.18756-15-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Stefan Herbrechtsmeier [Mon, 20 Jun 2022 16:36:49 +0000 (18:36 +0200)]
tools: zynqmp_psu_init_minimize: Move helper functions below header includes
Move helper functions below header includes to avoid forward
declarations.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220620163650.18756-14-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Stefan Herbrechtsmeier [Mon, 20 Jun 2022 16:36:48 +0000 (18:36 +0200)]
tools: zynqmp_psu_init_minimize: Use CR instead of LF
Use carriage return instead of line feed to support mangling across
lines.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220620163650.18756-13-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Stefan Herbrechtsmeier [Mon, 20 Jun 2022 16:36:47 +0000 (18:36 +0200)]
tools: zynqmp_psu_init_minimize: Remove low level uart settings
There is no reason to do serial initialization. Uart driver does it
already based on DT. Good effect is that it is clear which interface is
console.
The resulting change was done in past by commit
84d2bbf082fa ("arm64:
zynqmp: Remove low level UART setting").
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220620163650.18756-12-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Stefan Herbrechtsmeier [Mon, 20 Jun 2022 16:36:46 +0000 (18:36 +0200)]
xilinx: zynqmp: make spi flash support optional
The set_dfu_alt_info function use the CONFIG_SYS_SPI_U_BOOT_OFFS define
to set the dfu_alt_info environment variable for qspi boot mode. Guard
the usage of CONFIG_SYS_SPI_U_BOOT_OFFS to make spi flash support
optional.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220620163650.18756-11-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Stefan Herbrechtsmeier [Mon, 20 Jun 2022 16:36:45 +0000 (18:36 +0200)]
xilinx: common: Separate display cpu info function
Move the print_cpuinfo function of CONFIG_DISPLAY_CPUINFO into its own
source file to support reuse by other board vendors.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220620163650.18756-10-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Stefan Herbrechtsmeier [Mon, 20 Jun 2022 16:36:44 +0000 (18:36 +0200)]
xilinx: cpuinfo: Print soc machine
Print the soc machine in the print_cpuinfo function.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220620163650.18756-9-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Stefan Herbrechtsmeier [Mon, 20 Jun 2022 16:36:43 +0000 (18:36 +0200)]
soc: xilinx: zynqmp: Add machine identification support
Add machine identification support based on the
zynqmp_get_silicon_idcode_name function and use the soc_get_machine
function of the soc uclass to get silicon idcode name for the fpga init.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220620163650.18756-8-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Stefan Herbrechtsmeier [Mon, 20 Jun 2022 16:36:42 +0000 (18:36 +0200)]
soc: xilinx: zynqmp: Remove redundant checks for zynqmp_mmio_read
Remove the redundant SPL and CurrentEL checks for the zynqmp_mmio_read
function call because the function itself runs the same checks.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220620163650.18756-7-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Stefan Herbrechtsmeier [Mon, 20 Jun 2022 16:36:41 +0000 (18:36 +0200)]
xilinx: zynqmp: Merge device lists
Merge the svd / xck devices into to the common zynqmp device list.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220620163650.18756-6-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Stefan Herbrechtsmeier [Mon, 20 Jun 2022 16:36:40 +0000 (18:36 +0200)]
xilinx: zynqmp: Reuse shift macros to define masks
Reuse the shift macros to define the masks.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220620163650.18756-5-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Stefan Herbrechtsmeier [Mon, 20 Jun 2022 16:36:39 +0000 (18:36 +0200)]
xilinx: zynqmp: Add macro for device type mask
Add a macro for the device type mask of the id code.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220620163650.18756-4-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Stefan Herbrechtsmeier [Mon, 20 Jun 2022 16:36:38 +0000 (18:36 +0200)]
xilinx: zynqmp: Replace strncat with strlcat
Replace strncat with strlcat to always produce a valid null-terminated
string.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220620163650.18756-3-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Stefan Herbrechtsmeier [Mon, 20 Jun 2022 16:36:37 +0000 (18:36 +0200)]
firmware: zynqmp: Probe driver before use
Probe the driver before use to ensure that the driver is always
available and the global data are valid. Initialize the global data
with zero and probe the driver if the global data are still zero. This
allows a usage of the firmware functions from other drivers with
arbitrary order between the drivers.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220620163650.18756-2-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Stefan Herbrechtsmeier [Mon, 20 Jun 2022 16:36:36 +0000 (18:36 +0200)]
firmware: zynqmp: Check if rx channel dev pointer is valid
Check if rx channel dev pointer is valid and not if the address of the
pointer is valid.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220620163650.18756-1-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Amit Kumar Mahapatra [Wed, 15 Jun 2022 10:22:41 +0000 (12:22 +0200)]
ARM: zynq: Fix size-cells for pl353 driver
"size-cells" of the nand controller node should be 0 as the "reg"
property of the nand device node contains the chip select number and not
address information.
The patch fixes the below compilation warning
arch/arm/dts/zynq-zc770-xm011.dtb: Warning (reg_format):
/axi/memory-controller@
e000e000/nand-controller@0,0/nand@0:reg: property
has invalid length (4 bytes) (#address-cells == 1, #size-cells == 1)
Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/6e90665a2dad7fe8ade10b8f57101f8144963791.1655288559.git.michal.simek@amd.com
Ashok Reddy Soma [Wed, 15 Jun 2022 10:16:13 +0000 (12:16 +0200)]
arm64: zynqmp: Fix usb node drive strength and slew rate
As per design, all input/rx pins should have fast slew rate and 12mA
drive strength. Rest all pins should be slow slew rate and 4mA drive
strength. Fix usb nodes as per this and remove setting of slow slew rate
for all the usb gorup pins.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/b245c165f05845c1f3ab41a92c82b7ec1538cee4.1655288171.git.michal.simek@amd.com
Michal Simek [Fri, 24 Jun 2022 12:16:32 +0000 (14:16 +0200)]
microblaze: Remove interrupt handler
The primary purpose for this code was timer. By converting it to
CONFIG_TIMER there is no code which uses this implementation that's why
remove it. If there is a need to handle interrupts this patch can be
reverted in future.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/5f2decc5a30a5678490ebde26d8c6f5a5f873cda.1654684731.git.michal.simek@amd.com
Michal Simek [Fri, 24 Jun 2022 12:16:32 +0000 (14:16 +0200)]
microblaze: Convert axi timer to DM driver
Move axi timer driver from Microblaze to generic location.
Origin implementation was irq based with counting down timer.
CONFIG_TIMER drivers are designed differently that timer is free running up
timer with automatic reload without any interrupt.
Information about clock rates are find out in timer_pre_probe() that's why
there is no need to get any additional information from DT in the driver
itself (only register offset).
Signed-off-by: Michal Simek <michal.simek@amd.com>
Tested-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Link: https://lore.kernel.org/r/6c12fc86bbc1f17d05c25018862e7b7b03346b36.1654684731.git.michal.simek@amd.com
Ovidiu Panait [Tue, 31 May 2022 18:14:35 +0000 (21:14 +0300)]
cpu: add CPU driver for microblaze
Add a basic CPU driver that retrieves information about the microblaze CPU
core. cpu_ops handlers are implemented so that the "cpu" command can work
properly:
U-Boot-mONStR> cpu list
0: cpu@0 MicroBlaze @ 50MHz, Rev: 11.0, FPGA family: zynq7000
U-Boot-mONStR> cpu detail
0: cpu@0 MicroBlaze @ 50MHz, Rev: 11.0, FPGA family: zynq7000
ID = 0, freq = 50 MHz: L1 cache, MMU
Note: cpu_ver_lookup[] and family_string_lookup[] arrays were imported from
linux.
Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20220531181435.3473549-14-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
projects / platform / kernel / u-boot.git / log