andy.hu [Wed, 11 Jan 2023 12:24:22 +0000 (12:24 +0000)]
Merge branch 'CR_2862_gt9xx_ts_515_changhuang.liang' into 'vf2-515-devel'
CR_2862_gt9xx_ts_515_changhuang.liang input: touchscreen: Add gt9xx driver support
See merge request sbc/linux!56
andy.hu [Wed, 11 Jan 2023 12:23:24 +0000 (12:23 +0000)]
Merge branch 'CR2876_vf2_make_gpio_reset_priority_low_minda' into 'vf2-515-devel'
CR_2876 dts: gpio: make gpio reset priority lower than pmic reset
See merge request sbc/linux!58
minda.chen [Tue, 10 Jan 2023 01:25:15 +0000 (09:25 +0800)]
dts: gpio: make gpio reset priority lower than pmic reset
For sbi pmic reset priority is 192. To make pmic reset
work. Make gpio reset priority lower.
Signed-off-by: minda.chen <minda.chen@starfivetech.com>
Andy Hu [Sat, 7 Jan 2023 15:02:18 +0000 (23:02 +0800)]
Merge tag 'JH7110_515_SDK_v4.0.0-rc1' into vf2-515-devel
version JH7110_515_SDK_v4.0.0-rc1 for JH7110 EVB board
1. #2828 support linux perf tool
2. #3049 merge hibernation branch to SDK
3. #2708 uboot support vout clk driver
4. #3006 uboot handle OTP return value
5. #2969, #3039 venc jpu fix futex issue
andy.hu [Sat, 7 Jan 2023 14:29:05 +0000 (14:29 +0000)]
Merge branch 'CR_2828_vf2_perf_support_minda' into 'vf2-515-devel'
vf2: config: add perf events config
See merge request sbc/linux!53
andy.hu [Fri, 6 Jan 2023 07:26:35 +0000 (07:26 +0000)]
Merge branch 'CR_3049_Hibernation_mason.huo' into 'jh7110-5.15.y-devel'
CR_3049 Add hibernation feature
See merge request sdk/linux!658
William Qiu [Fri, 6 Jan 2023 04:26:45 +0000 (12:26 +0800)]
riscv: starfive: sdio: modify and add sd card config
modify and add sd card config, sush as 'max-frequency'
'pinctrl-names'.
Signed-off-by: William Qiu <william.qiu@starfivetech.com>
andy.hu [Fri, 6 Jan 2023 06:08:13 +0000 (06:08 +0000)]
Merge branch 'CR_2828_perf_support_minda' into 'jh7110-5.15.y-devel'
CR_2828 add perf_patch
See merge request sdk/linux!641
William Qiu [Fri, 6 Jan 2023 01:55:45 +0000 (09:55 +0800)]
Hibernation: canfd: Add system PM API for can/canfd
Add system PM API for can/canfd.
Signed-off-by: William Qiu <william.qiu@starfivetech.com>
Changhuang Liang [Tue, 3 Jan 2023 07:17:39 +0000 (15:17 +0800)]
riscv: defconfig: Enable GT9xx
Enable GT9xx.
Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
Changhuang Liang [Tue, 3 Jan 2023 06:17:16 +0000 (14:17 +0800)]
riscv: dts: starfive: Add gt9xx touchscreen support
Add gt9xx touchscreen support.
Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
Changhuang Liang [Fri, 6 Jan 2023 01:44:52 +0000 (09:44 +0800)]
input: touchscreen: Add gt9xx driver support
Add gt9xx touchscreen driver support in jh7110 platform.
Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
mason.huo [Tue, 3 Jan 2023 05:39:30 +0000 (13:39 +0800)]
irqchip/irq-sifive-plic: Add syscore callbacks for hibernation
The priority and enable registers of plic will be reset
during hibernation power cycle in poweroff mode,
add the syscore callbacks to save/restore those registers.
Signed-off-by: mason.huo <mason.huo@starfivetech.com>
Sia Jee Heng [Tue, 3 Jan 2023 02:21:15 +0000 (10:21 +0800)]
RISCV: Support pmd_leaf() in the function kernel_page_present()
Update kernel_page_present() function to support pmd_leaf().
Function kernel_page_present() will be invoked when hibernation is
started.
Signed-off-by: Sia Jee Heng <jeeheng.sia@starfivetech.com>
ziv.xu [Thu, 27 Oct 2022 02:52:50 +0000 (10:52 +0800)]
timer-starfive:add pm ops for timer
add system pm ops for timer
Signed-off-by: ziv.xu <ziv.xu@starfive.com>
mason.huo [Thu, 13 Oct 2022 01:25:12 +0000 (09:25 +0800)]
rsicv: deconfig: Add hibernation and swap partition
Enable the hibernation feature, and config the default
hibernation swap partition by partition label.
Signed-off-by: mason.huo <mason.huo@starfivetech.com>
Sia Jee Heng [Sun, 6 Nov 2022 11:24:44 +0000 (19:24 +0800)]
riscv: kernel: Support hibernation resume for JH7110
Further expand the support for hibernation resume so that the hibernated
image can be restore from the disk.
Signed-off-by: Sia Jee Heng <jeeheng.sia@starfivetech.com>
Sia Jee Heng [Mon, 17 Oct 2022 02:25:05 +0000 (10:25 +0800)]
riscv: kernel: Expand functionlity of swsusp_arch_suspend for JH7110
Futher expand the functionality of the swsusp_arch_suspend so that the
hibernated image can be written to the disk and resume from the
hibernated image.
Signed-off-by: Sia Jee Heng <jeeheng.sia@starfivetech.com>
Sia Jee Heng [Thu, 1 Sep 2022 07:47:11 +0000 (15:47 +0800)]
riscv: kernel: Add support for hibernate/suspend to disk
The implementation assumes that exactly the same kernel is booted on the
same hardware.
We save the build number and date to the swap header so that we guarantee
not to resume with a different kernel upon booted up the hibernated image.
swsusp_arch_resume() and swsusp_arch_suspend() are coded as dummy
functions for now and shall complete in the subsequent patches.
Signed-off-by: Sia Jee Heng <jeeheng.sia@starfivetech.com>
mason.huo [Wed, 21 Sep 2022 10:40:44 +0000 (18:40 +0800)]
riscv: deconfig: Enable system suspend and pm test
Config the system suspend feature, enable pm test feature.
Signed-off-by: mason.huo <mason.huo@starfivetech.com>
minda.chen [Tue, 3 Jan 2023 06:47:50 +0000 (14:47 +0800)]
vf2: config: add perf events config
add perf events support in vf2.
Signed-off-by: minda.chen <minda.chen@starfivetech.com>
minda.chen [Wed, 7 Dec 2022 09:49:23 +0000 (17:49 +0800)]
dts: configs: add perf events config
add 7110 perf support
Signed-off-by: minda.chen <minda.chen@starfivetech.com>
João Mário Domingos [Tue, 16 Nov 2021 15:48:12 +0000 (15:48 +0000)]
RISC-V: Added HiFive Unmatched PMU events
This patch contains all the available events for the HiFive Unmatched performance monitoring unit.
Depends on patch [3], for the base mapfile.csv file.
Signed-off-by: João Mário Domingos <joao.mario@tecnico.ulisboa.pt>
João Mário Domingos [Tue, 16 Nov 2021 15:48:11 +0000 (15:48 +0000)]
RISC-V: Added generic pmu-events mapfile
The pmu-events now supports custom events for RISC-V, plus the cycle,
time and instret events were defined.
Signed-off-by: João Mário Domingos <joao.mario@tecnico.ulisboa.pt>
João Mário Domingos [Tue, 16 Nov 2021 15:48:10 +0000 (15:48 +0000)]
RISC-V: Support CPUID for risc-v in perf
This patch creates the header.c file for the risc-v architecture and introduces support for
PMU identification through sysfs.
It is now possible to configure pmu-events in risc-v.
Depends on patch [1], that introduces the id sysfs file.
Signed-off-by: João Mário Domingos <joao.mario@tecnico.ulisboa.pt>
Signed-off-by: minda.chen <minda.chen@starfivetech.com>
João Mário Domingos [Tue, 16 Nov 2021 15:48:09 +0000 (15:48 +0000)]
RISC-V: Create unique identification for SoC PMU
The SBI PMU platform driver did not provide any identification for
perf events matching. This patch introduces a new sysfs file inside the
platform device (soc:pmu/id) for pmu identification.
The identification is a 64-bit value generated as:
[63-32]: mvendorid;
[31]: marchid[MSB];
[30-16]: marchid[15-0];
[15-0]: mimpid[15MSBs];
The CSRs are detailed in the RISC-V privileged spec [1].
The marchid is split in MSB + 15LSBs, due to the MSB being used for
open-source architecture identification.
[1] https://github.com/riscv/riscv-isa-manual
Signed-off-by: João Mário Domingos <joao.mario@tecnico.ulisboa.pt>
Atish Patra [Wed, 8 Sep 2021 20:01:07 +0000 (13:01 -0700)]
MAINTAINERS: Add entry for RISC-V PMU drivers
Add myself and Anup as maintainer for RISC-V PMU drivers.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Atish Patra [Wed, 26 May 2021 00:51:35 +0000 (17:51 -0700)]
Documentation: riscv: Remove the old documentation
The existing pmu documentation describes the limitation of perf
infrastructure in RISC-V ISA and limited feature set of perf in RISC-V.
However, SBI PMU extension and sscofpmf extension(ISA extension) allows to
implement most of the required features of perf. Remove the old
documentation which is not accurate anymore.
Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Atish Patra [Fri, 27 Aug 2021 22:03:43 +0000 (15:03 -0700)]
RISC-V: Add sscofpmf extension support
The sscofpmf extension allows counter overflow and filtering for
programmable counters. Enable the perf driver to handle the overflow
interrupt. The overflow interrupt is a hart local interrupt.
Thus, per cpu overflow interrupts are setup as a child under the root
INTC irq domain.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Atish Patra [Thu, 24 Mar 2022 08:20:57 +0000 (16:20 +0800)]
RISC-V: Improve /proc/cpuinfo output for ISA extensions
Currently, the /proc/cpuinfo outputs the entire riscv,isa string which
is not ideal when we have multiple ISA extensions present in the ISA
string. Some of them may not be enabled in kernel as well.
Parse only the enabled ISA extension and print them in a separate row.
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Atish Patra [Wed, 9 Feb 2022 07:46:07 +0000 (23:46 -0800)]
RISC-V: Do no continue isa string parsing without correct XLEN
The isa string should begin with either rv64 or rv32. Otherwise, it is
an incorrect isa string. Currently, the string parsing continues even if
it doesnot begin with current XLEN.
Fix this by checking if it found "rv64" or "rv32" in the beginning.
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Atish Patra [Tue, 8 Feb 2022 22:58:38 +0000 (14:58 -0800)]
RISC-V: Implement multi-letter ISA extension probing framework
Multi-letter extensions can be probed using exising
riscv_isa_extension_available API now. It doesn't support versioning
right now as there is no use case for it.
Individual extension specific implementation will be added during
each extension support.
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Tsukasa OI [Sat, 12 Feb 2022 06:30:01 +0000 (15:30 +0900)]
RISC-V: Extract multi-letter extension names from "riscv, isa"
Currently, there is no usage for version numbers in extensions as
any ratified non base ISA extension will always at v1.0.
Extract the extension names in place for future parsing.
Tested-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Tsukasa OI <research_trasio@irq.a4lg.com>
[Improved commit text and comments]
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Tsukasa OI [Sat, 12 Feb 2022 06:30:00 +0000 (15:30 +0900)]
RISC-V: Minimal parser for "riscv, isa" strings
Current hart ISA ("riscv,isa") parser don't correctly parse:
1. Multi-letter extensions
2. Version numbers
All ISA extensions ratified recently has multi-letter extensions
(except 'H'). The current "riscv,isa" parser that is easily confused
by multi-letter extensions and "p" in version numbers can be a huge
problem for adding new extensions through the device tree.
Leaving it would create incompatible hacks and would make "riscv,isa"
value unreliable.
This commit implements minimal parser for "riscv,isa" strings. With this,
we can safely ignore multi-letter extensions and version numbers.
[Improved commit text and fixed a bug around 's' in base extension]
Signed-off-by: Atish Patra <atishp@rivosinc.com>
[Fixed workaround for QEMU]
Signed-off-by: Tsukasa OI <research_trasio@irq.a4lg.com>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Tsukasa OI [Sat, 12 Feb 2022 06:29:59 +0000 (15:29 +0900)]
RISC-V: Correctly print supported extensions
This commit replaces BITS_PER_LONG with number of alphabet letters.
Current ISA pretty-printing code expects extension 'a' (bit 0) through
'z' (bit 25). Although bit 26 and higher is not currently used (thus never
cause an issue in practice), it will be an annoying problem if we start to
use those in the future.
This commit disables printing high bits for now.
Reviewed-by: Anup Patel <anup@brainfault.org>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Tsukasa OI <research_trasio@irq.a4lg.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Atish Patra [Wed, 17 Mar 2021 23:54:14 +0000 (16:54 -0700)]
RISC-V: Add perf platform driver based on SBI PMU extension
RISC-V SBI specification added a PMU extension that allows to configure
start/stop any pmu counter. The RISC-V perf can use most of the generic
perf features except interrupt overflow and event filtering based on
privilege mode which will be added in future.
It also allows to monitor a handful of firmware counters that can provide
insights into firmware activity during a performance analysis.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Atish Patra [Thu, 24 Mar 2022 09:04:38 +0000 (17:04 +0800)]
RISC-V: Add RISC-V SBI PMU extension definitions
This patch adds all the definitions defined by the SBI PMU extension.
Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Atish Patra [Wed, 17 Mar 2021 23:31:46 +0000 (16:31 -0700)]
RISC-V: Add a simple platform driver for RISC-V legacy perf
The old RISC-V perf implementation allowed counting of only
cycle/instruction counters using perf. Restore that feature by implementing
a simple platform driver under a separate config to provide backward
compatibility. Any existing software stack will continue to work as it is.
However, it provides an easy way out in future where we can remove the
legacy driver.
Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Atish Patra [Wed, 17 Mar 2021 23:18:17 +0000 (16:18 -0700)]
RISC-V: Add a perf core library for pmu drivers
Implement a perf core library that can support all the essential perf
features in future. It can also accommodate any type of PMU implementation
in future. Currently, both SBI based perf driver and legacy driver
implemented uses the library. Most of the common perf functionalities
are kept in this core library wile PMU specific driver can implement PMU
specific features. For example, the SBI specific functionality will be
implemented in the SBI specific driver.
Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Atish Patra [Wed, 17 Mar 2021 22:52:47 +0000 (15:52 -0700)]
RISC-V: Add CSR encodings for all HPMCOUNTERS
Linux kernel can directly read these counters as the HPMCOUNTERS CSRs are
accessible in S-mode.
Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Atish Patra [Wed, 17 Mar 2021 22:36:30 +0000 (15:36 -0700)]
RISC-V: Remove the current perf implementation
The current perf implementation in RISC-V is not very useful as it can not
count any events other than cycle/instructions. Moreover, perf record
can not be used or the events can not be started or stopped.
Remove the implementation now for a better platform driver in future
that will implement most of the missing functionality.
Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
andy.hu [Fri, 30 Dec 2022 14:15:48 +0000 (14:15 +0000)]
Merge branch 'CR_2861_vf2_ts_515_changhuang.liang' into 'vf2-515-devel'
CR_2861_vf2_ts_515_changhuang.liang riscv: dts: starfive: Add touchscreen node support
See merge request sbc/linux!52
Changhuang Liang [Fri, 30 Dec 2022 13:29:06 +0000 (21:29 +0800)]
riscv: defconfig: Enable touchscreen
Enable touchscreen TINKER FT5406
Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
Changhuang Liang [Fri, 30 Dec 2022 13:25:52 +0000 (21:25 +0800)]
riscv: dts: starfive: Add touchscreen node support
Add touchscreen node support.
Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
Andy Hu [Fri, 30 Dec 2022 12:16:58 +0000 (20:16 +0800)]
Merge tag 'JH7110_515_SDK_v3.6.0' into vf2-515-devel
version JH7110_515_SDK_v3.6.0 for JH7110 EVB board
andy.hu [Fri, 30 Dec 2022 11:27:56 +0000 (11:27 +0000)]
Merge branch 'CR_2506_515_usb_wifi_jianlong' into 'vf2-515-devel'
CR_2506_515 net:wireless:Support eswin usb wifi ECR6600U
See merge request sbc/linux!45
andy.hu [Fri, 30 Dec 2022 11:20:41 +0000 (11:20 +0000)]
Merge branch 'CR_2936_MMC_515_william.qiu' into 'vf2-515-devel'
CR_2936_515: mmc: starfive: resolving warning logs
See merge request sbc/linux!49
Jianlong Huang [Mon, 31 Oct 2022 09:02:55 +0000 (17:02 +0800)]
configs:starfive:Enable usb wifi ECR6600U
Enable usb wifi ECR6600U
Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com>
Jianlong Huang [Mon, 31 Oct 2022 08:59:48 +0000 (16:59 +0800)]
net:wireless:Support eswin usb wifi ECR6600U
Add usb wifi ECR6600U driver
Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com>
andy.hu [Thu, 29 Dec 2022 04:29:17 +0000 (04:29 +0000)]
Merge branch 'CR_2861_ts_515_changhuang.liang' into 'jh7110-5.15.y-devel'
CR_2861_ts_515_changhuang.liang input: touchscreen: Add tinker_ft5406 driver support
See merge request sdk/linux!654
andy.hu [Thu, 29 Dec 2022 03:12:40 +0000 (03:12 +0000)]
Merge branch 'CR_2933_MMC_515_william.qiu' into 'jh7110-5.15.y-devel'
CR_2933_515 riscv: dts: mmc: delete mmc1 config
See merge request sdk/linux!651
andy.hu [Thu, 29 Dec 2022 03:11:05 +0000 (03:11 +0000)]
Merge branch 'CR_2951_515_ac101_compile_Xingyu.Wu' into 'jh7110-5.15.y-devel'
CR_2951_515_ac101_compile_Xingyu.Wu
See merge request sdk/linux!655
Changhuang Liang [Thu, 22 Dec 2022 08:07:23 +0000 (16:07 +0800)]
input: touchscreen: tinker_ft5406: Fixed show more error log bug
Fixed show more error log bug when not attach the touchscreen.
Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
Changhuang Liang [Thu, 22 Dec 2022 02:59:23 +0000 (10:59 +0800)]
riscv: defconfig: Enable touchscreen
Enable touchscreen TINKER FT5406
Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
Xingyu Wu [Thu, 22 Dec 2022 07:00:48 +0000 (15:00 +0800)]
sound: codecs: ac101: Fixed warning when compiling
Removed the useless part and fixed warning.
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
Changhuang Liang [Thu, 22 Dec 2022 02:57:08 +0000 (10:57 +0800)]
riscv: dts: starfive: Add tinker_ft5406 touchscreen node
Add tinker_ft5406 touchscreen node.
Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
Changhuang Liang [Thu, 22 Dec 2022 02:31:15 +0000 (10:31 +0800)]
input: touchscreen: tinker_ft5406: Add open&close ioctl
Add open&close ioctl.
Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
Changhuang Liang [Wed, 21 Dec 2022 08:20:04 +0000 (16:20 +0800)]
input: touchscreen: Add tinker_ft5406 driver support
Add tinker_ft5406 driver support
Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
William Qiu [Wed, 21 Dec 2022 02:59:23 +0000 (10:59 +0800)]
mmc: starfive: resolving warning logs
delete switch_voltage interface to resolving
warning logs
Signed-off-by: William Qiu <william.qiu@starfivetech.com>
William Qiu [Tue, 20 Dec 2022 10:56:59 +0000 (18:56 +0800)]
riscv: dts: mmc: delete mmc1 config
delete mmc1 config, default use mmc0
Signed-off-by: William Qiu <william.qiu@starfivetech.com>
Andy Hu [Mon, 19 Dec 2022 07:12:22 +0000 (15:12 +0800)]
Merge tag 'JH7110_515_SDK_v3.5.1' from sdk into vf2-515-devel
version JH7110_515_SDK_v3.5.1 for JH7110 EVB board
andy.hu [Mon, 19 Dec 2022 04:02:54 +0000 (04:02 +0000)]
Merge branch 'CR_2868_515_evb_rgb2hdmi_shengyang.chen' into 'jh7110-5.15.y-devel'
CR_2868: riscv: linux: vout: fix rgb2hdmi display problem
See merge request sdk/linux!639
andy.hu [Mon, 19 Dec 2022 04:00:26 +0000 (04:00 +0000)]
Merge branch 'CR_2069_515_evb_cusor_keith.zhao' into 'jh7110-5.15.y-devel'
CR_2069: riscv: linux: vout: fix cusor problem
See merge request sdk/linux!647
andy.hu [Mon, 19 Dec 2022 03:55:01 +0000 (03:55 +0000)]
Merge branch 'CR_2888_515_clocktree_pll0_Xingyu.Wu' into 'jh7110-5.15.y-devel'
CR_2888_515_clocktree_pll0_Xingyu.Wu
See merge request sdk/linux!644
andy.hu [Mon, 19 Dec 2022 03:52:06 +0000 (03:52 +0000)]
Merge branch 'CR_2871_MMC_515_william.qiu' into 'jh7110-5.15.y-devel'
CR_2871riscv: dts: mmc:modify mmc1 config
See merge request sdk/linux!643
andy.hu [Mon, 19 Dec 2022 03:49:44 +0000 (03:49 +0000)]
Merge branch 'CR_2865_RNG_jiajie.ho' into 'jh7110-5.15.y-devel'
CR_2865: hwrng: Reworked driver for speed performance and efficiency
See merge request sdk/linux!640
shengyang.chen [Fri, 16 Dec 2022 08:15:39 +0000 (16:15 +0800)]
riscv: linux: vout: fix cusor problem
fix cusor bluring problem of debian
Signed-off-by: keith <keith.zhao@starfivetech.com>
William Qiu [Thu, 15 Dec 2022 09:03:28 +0000 (17:03 +0800)]
riscv: dts: mmc:modify mmc1 config
modify mmc1 config
Signed-off-by: William Qiu <william.qiu@starfivetech.com>
Xingyu Wu [Thu, 15 Dec 2022 06:48:40 +0000 (14:48 +0800)]
clk: starfive: pll: Remove high frequency of PLL0
Remove high frequency of PLL0 and make sure PLL0 max frequency is 1.5GHz.
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
Xingyu Wu [Thu, 15 Dec 2022 06:17:59 +0000 (14:17 +0800)]
clk: starfive: Change divider value of cpu_core clock
Change divider value to make sure the frequency is half of PLL0.
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
Jia Jie Ho [Wed, 14 Dec 2022 06:14:39 +0000 (14:14 +0800)]
CR_2865: hwrng: Reworked driver for speed performance and efficiency
Changes:
1. Reseed during init only, not for every read.
2. Completion struct for irqreturn for better efficiency.
3. Add module_param for reseed operations based on request counter
and/or timer countdown.
4. Removed unused macros and steps.
Signed-off-by: Jia Jie Ho <jiajie.ho@starfivetech.com>
shengyang.chen [Wed, 14 Dec 2022 02:46:19 +0000 (10:46 +0800)]
riscv: linux: vout: fix rgb2hdmi display problem
fix problem of rgb2hdmi without display in first test
Signed-off-by: shengyang.chen<shengyang.chen@starfivetech.com>
Andy Hu [Fri, 9 Dec 2022 16:16:09 +0000 (00:16 +0800)]
Merge remote-tracking branch 'sdk/jh7110-5.15.y-devel' into vf2-515-devel
andy.hu [Fri, 9 Dec 2022 04:49:48 +0000 (04:49 +0000)]
Merge branch 'CR_2822_PCIE_Kevin.xie' into 'jh7110-5.15.y-devel'
CR 2822 riscv: configs: Add port bus driver for PCIe switch.
See merge request sdk/linux!633
andy.hu [Fri, 9 Dec 2022 04:46:38 +0000 (04:46 +0000)]
Merge branch 'CR_2796_515_sound_card_Xingyu.Wu' into 'jh7110-5.15.y-devel'
CR_2796_515_sound_card_Xingyu.Wu
See merge request sdk/linux!631
andy.hu [Fri, 9 Dec 2022 04:45:04 +0000 (04:45 +0000)]
Merge branch 'CR_2789_refresh_uboot/spl_under_kernel_5.15_ziv.xu' into 'jh7110-5.15.y-devel'
CR_2789_refresh_uboot/spl_under_kernel_5.15_ziv.xu
See merge request sdk/linux!635
Xingyu Wu [Tue, 22 Nov 2022 03:42:34 +0000 (11:42 +0800)]
sound:starfive:Move playback and capture driver as slave to starfive I2S
Move playback and capture driver as slave from snps I2S merge to starfive I2S.
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
ziv.xu [Fri, 2 Dec 2022 09:26:19 +0000 (17:26 +0800)]
riscv:jh7110.dtsi: add uboot and spl partition on qspi node
add uboot and spl partition on qspi node
Signed-off-by: ziv.xu <ziv.xu@starfive.com>
Andy Hu [Wed, 7 Dec 2022 08:55:40 +0000 (16:55 +0800)]
Merge remote-tracking branch 'sdk/jh7110-5.15.y-devel' into vf2-515-devel
Kevin.xie [Wed, 7 Dec 2022 06:20:16 +0000 (14:20 +0800)]
riscv: configs: Add port bus driver for PCIe switch.
Verified on JH7110EVB with ASMedia EV Board (asm1806 version).
Signed-off-by: Kevin.xie <kevin.xie@starfivetech.com>
Xingyu Wu [Tue, 6 Dec 2022 03:19:51 +0000 (11:19 +0800)]
riscv: dts: starfive: jh7110: Add multiple sound cards
Add multiple sound cards to let one device corresponds to
one sound card.
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
Andy Hu [Tue, 6 Dec 2022 10:43:31 +0000 (18:43 +0800)]
e24: xrp: remove from Kconfig and Makefile
since run git filter-repo, then need to remove from Kconfig and
Makefile
Signed-off-by: Andy Hu <andy.hu@starfivetech.com>
Jianlong Huang [Fri, 2 Dec 2022 03:01:42 +0000 (11:01 +0800)]
configs:starfive:Enable QSPI for visionfive2
Enable QSPI for visionfive2
Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com>
Jianlong Huang [Fri, 2 Dec 2022 02:43:01 +0000 (10:43 +0800)]
Merge tag 'JH7110_515_SDK_v3.3.0' into vf2-515-devel
version JH7110_515_SDK_v3.3.0 for JH7110 EVB board
andy.hu [Thu, 1 Dec 2022 10:52:21 +0000 (10:52 +0000)]
Merge branch 'CR_2650_PWM_hal.feng' into 'jh7110-5.15.y-devel'
CR 2650 PWM hal.feng
See merge request sdk/linux!626
andy.hu [Thu, 1 Dec 2022 10:37:13 +0000 (10:37 +0000)]
Merge branch 'CR_2653_QSPI_5.15_ziv.xu' into 'jh7110-5.15.y-devel'
CR 2653 QSPI 5.15 ziv.xu
See merge request sdk/linux!612
andy.hu [Thu, 1 Dec 2022 10:35:43 +0000 (10:35 +0000)]
Merge branch 'CR_2752_CPUfreq_515_mason.huo' into 'jh7110-5.15.y-devel'
CR_2752 riscv: dts: Change cpu vdd per stress test
See merge request sdk/linux!624
Hal Feng [Wed, 30 Nov 2022 07:15:11 +0000 (15:15 +0800)]
pwm: starfive: Use pm_runtime functions to disable clock when the device being removed
So this can avoid disabling the pwm clock again when
the pwm device is suspended and being removed.
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
mason.huo [Mon, 28 Nov 2022 01:14:51 +0000 (09:14 +0800)]
riscv: dts: Change cpu vdd per stress test
Jianlong Huang [Sat, 26 Nov 2022 07:49:42 +0000 (15:49 +0800)]
Merge tag 'JH7110_515_SDK_v3.2.0' into vf2-515-devel
version JH7110_515_SDK_v3.2.0 for JH7110 EVB board
andy.hu [Fri, 25 Nov 2022 12:56:08 +0000 (12:56 +0000)]
Merge branch 'CR_2651_spi_dtbo_reload_faild_5.15_ziv.xu' into 'jh7110-5.15.y-devel'
CR_2651_spi_dtbo_reload_faild_5.15_ziv.xu
See merge request sdk/linux!619
andy.hu [Fri, 25 Nov 2022 10:31:21 +0000 (10:31 +0000)]
Merge branch 'CR_2463_PCIE_Kevin.xie' into 'jh7110-5.15.y-devel'
CR 2463 drivers: nvme: Add precheck and delay for CQE pending status.
See merge request sdk/linux!621
Kevin.xie [Thu, 24 Nov 2022 08:59:12 +0000 (16:59 +0800)]
drivers: nvme: Add precheck and delay for CQE pending status.
To workaroud the NVMe I/O timeout problem in bootup S10udev case
which caused by the CQE update lantancy.
Signed-off-by: Kevin.xie <kevin.xie@starfivetech.com>
ziv.xu [Wed, 23 Nov 2022 06:53:58 +0000 (14:53 +0800)]
spi-pl022-starfive:fix the problem of spi overlay reload
fix the problem of spi overlay reload
Signed-off-by: ziv.xu <ziv.xu@starfive.com>
Jianlong Huang [Sat, 19 Nov 2022 14:51:04 +0000 (22:51 +0800)]
Merge tag 'JH7110_515_SDK_v3.1.0' into vf2-515-devel
version JH7110_515_SDK_v3.1.0 for JH7110 EVB board
ziv.xu [Tue, 15 Nov 2022 01:50:09 +0000 (09:50 +0800)]
driver:spi-cadence-quadspi: enable qspi
enable qspi
Signed-off-by: ziv.xu <ziv.xu@starfive.com>
andy.hu [Thu, 17 Nov 2022 09:18:17 +0000 (09:18 +0000)]
Merge branch 'CR_2429_spi_error_of_freq-5.15_ziv.xu' into 'jh7110-5.15.y-devel'
CR 2429 spi error of freq 5.15 ziv.xu
See merge request sdk/linux!603
andy.hu [Thu, 17 Nov 2022 09:12:03 +0000 (09:12 +0000)]
Merge branch 'CR_2661_V4L2_Kevin.xie' into 'jh7110-5.15.y-devel'
CR 2661 v4l2_driver: vin: Add skip frames for isp control.
See merge request sdk/linux!610
andy.hu [Thu, 17 Nov 2022 09:08:34 +0000 (09:08 +0000)]
Merge branch 'CR_2434_imx219_515_changhuang.liang' into 'jh7110-5.15.y-devel'
CR_2434_imx219_515_changhuang.liang media: v4l2_driver: Supplement the missing runtime pm get ops on more than once stream_on cases.
See merge request sdk/linux!595
andy.hu [Thu, 17 Nov 2022 07:10:11 +0000 (07:10 +0000)]
Merge branch 'CR_2642_PCIe_Kevin.xie' into 'jh7110-5.15.y-devel'
CR 2642 drivers: pci: Set PCIe PCI standard configuration ID.
See merge request sdk/linux!613
projects / platform / kernel / linux-starfive.git / log