Chanho Park [Thu, 31 Jul 2014 05:03:52 +0000 (14:03 +0900)]
dts: arm64: add fvp-base-gicv2-psci dt file
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Liviu Dudau [Fri, 31 Oct 2014 12:36:55 +0000 (12:36 +0000)]
Juno: Enable DMA for PL011 UART.
PL011 can now use DMA. TX channel is always used, RX usage depends
on the DMA engine's ability to process residual data (absent in
Juno). To cater for RX channel not being activated we als enable
to automatic polling.
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Andrew Jackson [Fri, 31 Oct 2014 09:59:18 +0000 (09:59 +0000)]
serial: pl011: Add device tree support for RX DMA polling
Add equivalent attributes to those provided in the platform data
for use when RX DMA is enabled.
Signed-off-by: Andrew Jackson <Andrew.Jackson@arm.com>
Andrew Jackson [Fri, 31 Oct 2014 08:10:29 +0000 (08:10 +0000)]
serial: pl011: Don't enable RX DMA if residue processing not supported
If the DMA engine doesn't support residue processing then the RX DMA
handling won't work terribly well if polling is enabled. So, disable
RX DMA if residue handling isn't available.
Signed-off-by: Andrew Jackson <Andrew.Jackson@arm.com>
Andrew Jackson [Fri, 31 Oct 2014 06:55:10 +0000 (06:55 +0000)]
serial: pl011: Set length of DMA transfer
The DMA engines on some systems require that the dma_length is set
when using scatter gather lists.
Signed-off-by: Andrew Jackson <Andrew.Jackson@arm.com>
Andrew Jackson [Mon, 27 Oct 2014 14:29:56 +0000 (14:29 +0000)]
serial: pl011: Avoid assumptions about buffer size when refilling TX DMA
The existing code assumed that all the bytes in the
buffer are consumed in a call. This isn't the case
since the count is adjusted.
Signed-off-by: Andrew Jackson <Andrew.Jackson@arm.com>
Andrew Jackson [Mon, 27 Oct 2014 14:16:23 +0000 (14:16 +0000)]
serial: pl011: Allocate TX DMA buffer from DMA capable memory
Allocating with __GFP_DMA avoids the need for bounce buffers
Signed-off-by: Andrew Jackson <Andrew.Jackson@arm.com>
Jon Medhurst [Tue, 15 Apr 2014 16:50:17 +0000 (17:50 +0100)]
dma: pl330: Limit MFIFO usage for memcpy to avoid exhausting entries
The MFIFO is shared by all channels so restrict each memcpy to it's fair
share. This is being over cautious, but without a global view of DMA
channel usage on a system it's not possible to come up with a more
optimum safe limit.
Signed-off-by: Jon Medhurst <tixy@linaro.org>
Jon Medhurst [Tue, 15 Apr 2014 16:18:15 +0000 (17:18 +0100)]
dma: pl330: Align DMA memcpy operations to MFIFO width
The algorithm used for programming the DMA Controller doesn't take into
consideration the requirements of transfers that are not aligned to the
bus width. Work around this by making sure we pick a bust size and
length which ensures no bursts straddle an MFIFO entry.
See "MFIFO Usage Overview" chapter in the the TRM for "CoreLink DMA
Controller DMA-330", Revision r1p1.
Signed-off-by: Jon Medhurst <tixy@linaro.org>
Laura Abbott [Thu, 9 Oct 2014 22:26:44 +0000 (15:26 -0700)]
arm64: add atomic pool for non-coherent and CMA allocations
Neither CMA nor noncoherent allocations support atomic allocations.
Add a dedicated atomic pool to support this.
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: David Riley <davidriley@chromium.org>
Cc: Olof Johansson <olof@lixom.net>
Cc: Ritesh Harjain <ritesh.harjani@gmail.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Laura Abbott [Thu, 9 Oct 2014 22:26:42 +0000 (15:26 -0700)]
arm: use genalloc for the atomic pool
ARM currently uses a bitmap for tracking atomic allocations. genalloc
already handles this type of memory pool allocation so switch to using
that instead.
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: David Riley <davidriley@chromium.org>
Cc: Olof Johansson <olof@lixom.net>
Cc: Ritesh Harjain <ritesh.harjani@gmail.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Laura Abbott [Thu, 9 Oct 2014 22:26:40 +0000 (15:26 -0700)]
common: dma-mapping: introduce common remapping functions
For architectures without coherent DMA, memory for DMA may need to be
remapped with coherent attributes. Factor out the the remapping code from
arm and put it in a common location to reduce code duplication.
As part of this, the arm APIs are now migrated away from
ioremap_page_range to the common APIs which use map_vm_area for remapping.
This should be an equivalent change and using map_vm_area is more correct
as ioremap_page_range is intended to bring in io addresses into the cpu
space and not regular kernel managed memory.
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: David Riley <davidriley@chromium.org>
Cc: Olof Johansson <olof@lixom.net>
Cc: Ritesh Harjain <ritesh.harjani@gmail.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: James Hogan <james.hogan@imgtec.com>
Cc: Laura Abbott <lauraa@codeaurora.org>
Cc: Mitchel Humpherys <mitchelh@codeaurora.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Laura Abbott [Thu, 9 Oct 2014 22:26:38 +0000 (15:26 -0700)]
lib/genalloc.c: add genpool range check function
After allocating an address from a particular genpool, there is no good
way to verify if that address actually belongs to a genpool. Introduce
addr_in_gen_pool which will return if an address plus size falls
completely within the genpool range.
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
Acked-by: Will Deacon <will.deacon@arm.com>
Reviewed-by: Olof Johansson <olof@lixom.net>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: David Riley <davidriley@chromium.org>
Cc: Ritesh Harjain <ritesh.harjani@gmail.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Thierry Reding <thierry.reding@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Laura Abbott [Thu, 9 Oct 2014 22:26:35 +0000 (15:26 -0700)]
lib/genalloc.c: add power aligned algorithm
One of the more common algorithms used for allocation is to align the
start address of the allocation to the order of size requested. Add this
as an algorithm option for genalloc.
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
Acked-by: Will Deacon <will.deacon@arm.com>
Acked-by: Olof Johansson <olof@lixom.net>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: David Riley <davidriley@chromium.org>
Cc: Ritesh Harjain <ritesh.harjani@gmail.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Thierry Reding <thierry.reding@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
WANG Chao [Wed, 6 Aug 2014 23:06:58 +0000 (16:06 -0700)]
mm/vmalloc.c: clean up map_vm_area third argument
Currently map_vm_area() takes (struct page *** pages) as third argument,
and after mapping, it moves (*pages) to point to (*pages +
nr_mappped_pages).
It looks like this kind of increment is useless to its caller these
days. The callers don't care about the increments and actually they're
trying to avoid this by passing another copy to map_vm_area().
The caller can always guarantee all the pages can be mapped into vm_area
as specified in first argument and the caller only cares about whether
map_vm_area() fails or not.
This patch cleans up the pointer movement in map_vm_area() and updates
its callers accordingly.
Signed-off-by: WANG Chao <chaowang@redhat.com>
Cc: Zhang Yanfei <zhangyanfei@cn.fujitsu.com>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Minchan Kim <minchan@kernel.org>
Cc: Nitin Gupta <ngupta@vflare.org>
Cc: Rusty Russell <rusty@rustcorp.com.au>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Steve Capper [Fri, 24 Oct 2014 12:22:20 +0000 (13:22 +0100)]
arm64: xchg: Implement cmpxchg_double
The arm64 architecture has the ability to exclusively load and store
a pair of registers from an address (ldxp/stxp). Also the SLUB can take
advantage of a cmpxchg_double implementation to avoid taking some
locks.
This patch provides an implementation of cmpxchg_double for 64-bit
pairs, and activates the logic required for the SLUB to use these
functions (HAVE_ALIGNED_STRUCT_PAGE and HAVE_CMPXCHG_DOUBLE).
Also definitions of this_cpu_cmpxchg_8 and this_cpu_cmpxchg_double_8
are wired up to cmpxchg_local and cmpxchg_double_local (rather than the
stock implementations that perform non-atomic operations with
interrupts disabled) as they are used by the SLUB.
On a Juno platform running on only the A57s I get quite a noticeable
performance improvement with 5 runs of hackbench on v3.17:
Baseline | With Patch
-----------------+-----------
Mean 119.2312 | 106.1782
StdDev 0.4919 | 0.4494
(times taken to complete `./hackbench 100 process 1000', in seconds)
Signed-off-by: Steve Capper <steve.capper@linaro.org>
Liviu Dudau [Fri, 24 Oct 2014 14:32:02 +0000 (15:32 +0100)]
Revert "The arm64 architecture has the ability to exclusively load and store"
Steve Capper has posted a v2 of the patch that gives a better path
performance.
This reverts commit
64b57f9219ea2f251c4c3c43c3b36187287d7f9d.
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Liviu Dudau [Fri, 24 Oct 2014 16:27:30 +0000 (17:27 +0100)]
Revert "Juno: defconfig: Remove the reduced debug info from defconfig and add SLUB debugging."
This reverts commit
86fa18f9ea6d4b168323d30dd5ee681a4aa7383d.
Performance with Android benchmarks drops to 50% with SLUB debugging ON
by default.
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Liviu Dudau [Thu, 23 Oct 2014 13:15:13 +0000 (14:15 +0100)]
Juno: defconfig: Remove the reduced debug info from defconfig and add SLUB debugging.
The reduced debug info trips the debugging tools that rely on certain
information being present in the debug build in order to figure out
the OS support structures. Also, SLUB debugging helps trap a corner
case where a race condition exists in the SLUB allocator when is
updating the sysfs statistics information and it races with a
SLUB deallocator over maintainance of the freelist pointer.
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Liviu Dudau [Thu, 23 Oct 2014 13:09:57 +0000 (14:09 +0100)]
HDLCD: Fix argument type for function used to implement sysfs statistics.
The hdlcd_show_underrun_count() function had a double pointer as second
argument when the correct version should be with a simple pointer. GCC 4.9
throws a warning that was finally noticed and this is the fix.
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Mark Charlebois [Wed, 27 Aug 2014 04:29:33 +0000 (05:29 +0100)]
arm64: LLVMLinux: Use global stack register variable for aarch64
To support both Clang and GCC, use the global stack register variable vs
a local register variable.
Author: Mark Charlebois <charlebm@gmail.com>
Signed-off-by: Mark Charlebois <charlebm@gmail.com>
Signed-off-by: Behan Webster <behanw@converseincode.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Behan Webster [Wed, 27 Aug 2014 04:29:31 +0000 (05:29 +0100)]
arm64: LLVMLinux: Calculate current_thread_info from current_stack_pointer
Use the global current_stack_pointer to get the value of the stack pointer.
This change supports being able to compile the kernel with both gcc and clang.
Signed-off-by: Behan Webster <behanw@converseincode.com>
Signed-off-by: Mark Charlebois <charlebm@gmail.com>
Reviewed-by: Jan-Simon Möller <dl9pf@gmx.de>
Reviewed-by: Olof Johansson <olof@lixom.net>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Behan Webster [Wed, 27 Aug 2014 04:29:29 +0000 (05:29 +0100)]
arm64: LLVMLinux: Add current_stack_pointer() for arm64
Define a global named register for current_stack_pointer. The use of this new
variable guarantees that both gcc and clang can access this register in C code.
Signed-off-by: Behan Webster <behanw@converseincode.com>
Reviewed-by: Jan-Simon Möller <dl9pf@gmx.de>
Reviewed-by: Mark Charlebois <charlebm@gmail.com>
Reviewed-by: Olof Johansson <olof@lixom.net>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Catalin Marinas [Fri, 17 Oct 2014 16:38:49 +0000 (17:38 +0100)]
futex: Ensure get_futex_key_refs() always implies a barrier
Commit
b0c29f79ecea (futexes: Avoid taking the hb->lock if there's
nothing to wake up) changes the futex code to avoid taking a lock when
there are no waiters. This code has been subsequently fixed in commit
11d4616bd07f (futex: revert back to the explicit waiter counting code).
Both the original commit and the fix-up rely on get_futex_key_refs() to
always imply a barrier.
However, for private futexes, none of the cases in the switch statement
of get_futex_key_refs() would be hit and the function completes without
a memory barrier as required before checking the "waiters" in
futex_wake() -> hb_waiters_pending(). The consequence is a race with a
thread waiting on a futex on another CPU, allowing the waker thread to
read "waiters == 0" while the waiter thread to have read "futex_val ==
locked" (in kernel).
Without this fix, the problem (user space deadlocks) can be seen with
Android bionic's mutex implementation on an arm64 multi-cluster system.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Reported-by: Matteo Franchin <Matteo.Franchin@arm.com>
Fixes:
b0c29f79ecea (futexes: Avoid taking the hb->lock if there's nothing to wake up)
Acked-by: Davidlohr Bueso <dave@stgolabs.net>
Tested-by: Mike Galbraith <umgwanakikbuti@gmail.com>
Cc: <stable@vger.kernel.org>
Cc: Darren Hart <dvhart@linux.intel.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Ingo Molnar <mingo@kernel.org>
Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Wei Yang [Wed, 6 Aug 2014 23:04:42 +0000 (16:04 -0700)]
slub: avoid duplicate creation on the first object
When a kmem_cache is created with ctor, each object in the kmem_cache
will be initialized before ready to use. While in slub implementation,
the first object will be initialized twice.
This patch reduces the duplication of initialization of the first
object.
Fix commit
7656c72b ("SLUB: add macros for scanning objects in a slab").
Signed-off-by: Wei Yang <weiyang@linux.vnet.ibm.com>
Acked-by: Christoph Lameter <cl@linux.com>
Cc: Pekka Enberg <penberg@kernel.org>
Cc: David Rientjes <rientjes@google.com>
Cc: Joonsoo Kim <iamjoonsoo.kim@lge.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Dave Hansen [Wed, 4 Jun 2014 23:06:37 +0000 (16:06 -0700)]
mm: slub: fix ALLOC_SLOWPATH stat
There used to be only one path out of __slab_alloc(), and ALLOC_SLOWPATH
got bumped in that exit path. Now there are two, and a bunch of gotos.
ALLOC_SLOWPATH can now get set more than once during a single call to
__slab_alloc() which is pretty bogus. Here's the sequence:
1. Enter __slab_alloc(), fall through all the way to the
stat(s, ALLOC_SLOWPATH);
2. hit 'if (!freelist)', and bump DEACTIVATE_BYPASS, jump to
new_slab (goto #1)
3. Hit 'if (c->partial)', bump CPU_PARTIAL_ALLOC, goto redo
(goto #2)
4. Fall through in the same path we did before all the way to
stat(s, ALLOC_SLOWPATH)
5. bump ALLOC_REFILL stat, then return
Doing this is obviously bogus. It keeps us from being able to
accurately compare ALLOC_SLOWPATH vs. ALLOC_FASTPATH. It also means
that the total number of allocs always exceeds the total number of
frees.
This patch moves stat(s, ALLOC_SLOWPATH) to be called from the same
place that __slab_alloc() is. This makes it much less likely that
ALLOC_SLOWPATH will get botched again in the spaghetti-code inside
__slab_alloc().
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Acked-by: Christoph Lameter <cl@linux.com>
Acked-by: David Rientjes <rientjes@google.com>
Cc: Pekka Enberg <penberg@kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Steve Capper [Wed, 15 Oct 2014 17:40:57 +0000 (18:40 +0100)]
The arm64 architecture has the ability to exclusively load and store
a pair of registers from an address (ldxp/stxp). Also the SLUB can take
advantage of a cmpxchg_double implementation to avoid taking some
locks.
This patch provides an implementation of cmpxchg_double for 64-bit
pairs, and activates the logic required for the SLUB to use these
functions (HAVE_ALIGNED_STRUCT_PAGE and HAVE_CMPXCHG_DOUBLE).
On a Juno platform running on only the A57s I get quite a noticeable
performance improvement with hackbench.
Before patch applied:
$ ./hackbench 100 process 1000
Running with 100*40 (== 4000) tasks.
Time: 206.331
After patch applied:
$ ./hackbench 100 process 1000
Running with 100*40 (== 4000) tasks.
Time: 182.396
Signed-off-by: Steve Capper <steve.capper@linaro.org>
Christoph Lameter [Wed, 4 Jun 2014 23:07:56 +0000 (16:07 -0700)]
mm: replace __get_cpu_var uses with this_cpu_ptr
Replace places where __get_cpu_var() is used for an address calculation
with this_cpu_ptr().
Signed-off-by: Christoph Lameter <cl@linux.com>
Cc: Tejun Heo <tj@kernel.org>
Cc: Hugh Dickins <hughd@google.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Liviu Dudau [Wed, 8 Oct 2014 16:01:17 +0000 (17:01 +0100)]
arm64: Add function tracer options to the defconfig.
More default options needed by the GTS test suite.
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Liviu Dudau [Wed, 8 Oct 2014 11:42:04 +0000 (12:42 +0100)]
Juno: Add CONFIG_SCHED_DEBUG and CONFIG_SCHEDSTATS options to the defconfig.
These options are needed by the GTS validation suite in order
to confirm the GTS functionality.
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Liviu Dudau [Wed, 8 Oct 2014 11:40:09 +0000 (12:40 +0100)]
HDLCD: Limit the pixel clock to 165MHz to match TDA19988 specs.
The DT set the upper limit for the pixel clock to 210MHz. While
technically the TDA19988 chip works at that frequency, it is
outside the spec sheet values. Restrict the clock range to the
published values.
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Liviu Dudau [Tue, 7 Oct 2014 11:07:46 +0000 (12:07 +0100)]
Juno: Update defconfig to add system profiler driver as a module.
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Dave Martin [Fri, 23 May 2014 14:51:47 +0000 (15:51 +0100)]
juno: Add stub device tree node for CCI-400
This patch adds a basic device tree node for the CCI-400
interconnect, so that the system profiler driver can refer to it.
This node is provisional and may change. For now it serves only to
provide the CCI-400 programmer's view register block base address
and size.
Signed-off-by: Dave Martin <Dave.Martin@arm.com>
Jeenu Viswambharan [Fri, 26 Sep 2014 15:45:19 +0000 (16:45 +0100)]
Add ARM System Profiler example usage script
The ARM System Profiler driver exposes System Profiler registers via.
debugfs files. The user space can program and later capture metrics from
System Profiler by accessing these files.
This script stands as an example for the System Profiler's usage.
Dave Martin [Wed, 14 May 2014 14:49:32 +0000 (15:49 +0100)]
arm64/juno: Add device tree node for the system profiler
This patch adds a device node for the system profiler on Juno.
Signed-off-by: Dave Martin <Dave.Martin@arm.com>
Dave Martin [Wed, 14 May 2014 14:48:31 +0000 (15:48 +0100)]
bus/arm-system-profiler: Basic driver for the ARM System Profiler
This patch implements a basic driver for the ARM System Profiler
The System Profiler registers are exposed symbolically via debugfs,
allowing root do manipulate and experiment with the profiler.
If an interrupt is defined for the profiler in the device tree and
ftrace is enabled, then captured data can be streamed out via trace
events.
The current user interface is minimal, with virtually no abstraction.
Future versions of the driver may substantially change the interface,
so it should be considered experimental for now.
Signed-off-by: Dave Martin <Dave.Martin@arm.com>
Liviu Dudau [Fri, 3 Oct 2014 13:52:28 +0000 (14:52 +0100)]
Juno: Change I2C bus speed used for HDMI to 100kHz.
The I2C bus driver has problems under heavy load to keep the FIFO
filled. Combined with the auto-STOP setting baked into the hardware,
it spells disaster for conversations with HDMI chip, specially
around the boot time when we want to retrieve the EDID information.
Change the bus speed to 100kHz to increase the chance of servicing
the "FIFO empty" interrupt in time.
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Liviu Dudau [Fri, 3 Oct 2014 09:33:21 +0000 (10:33 +0100)]
i2c: designware: Add support for changing the bus rate based on DT info
The Designware I2C driver does not currently support changing the bus
speed even if the hardware is capable of switching to a slower frequency.
Add support for passing the clock frequency info in the device tree.
Only standard (100kHz) or fast (400kHz) speeds are supported.
Signed-off-by: Andrew Jackson <Andrew.Jackson@arm.com>
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Andrew Jackson [Fri, 3 Oct 2014 08:29:01 +0000 (09:29 +0100)]
ASoC: dwc: Ensure FIFOs are flushed to prevent channel swap
If the FIFOs aren't flushed, the left/right channels may be swapped:
this may occur if the FIFOs are not empty when the streams start.
Signed-off-by: Andrew Jackson <Andrew.Jackson@arm.com>
Liviu Dudau [Tue, 23 Sep 2014 17:32:06 +0000 (18:32 +0100)]
Juno: defconfig: Enable PL330 DMA and Designware I2S support
Enable PL330 DMA engine and Designware I2S support in the defconfig.
However, DMA and PL011 UART doesn't work, so comment out the DMA
channels in PL011 to work around hang in the boot.
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Andrew Jackson [Fri, 29 Aug 2014 14:14:09 +0000 (15:14 +0100)]
ALSA: pcm: 64 bit ARM has coherent DMA too
Signed-off-by: Andrew Jackson <Andrew.Jackson@arm.com>
Andrew Jackson [Fri, 29 Aug 2014 15:00:29 +0000 (16:00 +0100)]
Juno: Add I2S and TDA998x audio CODEC support.
Signed-off-by: Andrew Jackson <Andrew.Jackson@arm.com>
Andrew Jackson [Fri, 29 Aug 2014 14:09:40 +0000 (15:09 +0100)]
ASoC: dwc: Add devicetree support for Designware I2S
Convert to driver to use either platform_data or device-tree for configuration
of the device. When using device-tree, the I2S block's configuration is read
from the relevant registers: this reduces the amount of information required in
the device tree.
Signed-off-by: Andrew Jackson <Andrew.Jackson@arm.com>
Andrew Jackson [Fri, 29 Aug 2014 14:00:00 +0000 (15:00 +0100)]
ASoC: dwc: Iterate over all channels
On the Designware core, the channels are independent and not combined
in higher registers. So as more channels are added, more registers need
to be updated.
Signed-off-by: Andrew Jackson <Andrew.Jackson@arm.com>
Andrew Jackson [Fri, 29 Aug 2014 14:02:38 +0000 (15:02 +0100)]
ASoC: dwc: Don't allow negative use counts
Signed-off-by: Andrew Jackson <Andrew.Jackson@arm.com>
Andrew Jackson [Fri, 29 Aug 2014 14:05:00 +0000 (15:05 +0100)]
ASoC: dwc: Allocate resources with platform_get_resource
Reorder allocations and use updated interface, platform_get_resource, to allocate
IO mapping.
Signed-off-by: Andrew Jackson <Andrew.Jackson@arm.com>
Andrew Jackson [Fri, 29 Aug 2014 14:54:53 +0000 (15:54 +0100)]
drm: i2c: tda998x: Select appropriate sound clock rate
The average CTS value is based upon the (pixel) clock rate.
Signed-off-by: Andrew Jackson <Andrew.Jackson@arm.com>
Jean-Francois Moine [Fri, 29 Aug 2014 14:51:40 +0000 (15:51 +0100)]
ASoC: tda998x: add a codec to the HDMI transmitter
This patch adds a CODEC function to the NXP TDA998x HDMI transmitter.
The CODEC handles both I2S and S/PDIF input and does dynamic input
switch in the TDA998x I2C driver on start/stop audio streaming.
Signed-off-by: Jean-Francois Moine <moinejf@free.fr>
[added reg documentation for the DT bindings]
Signed-off-by: Andrew Jackson <Andrew.Jackson@arm.com>
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Liviu Dudau [Mon, 21 Jul 2014 11:31:11 +0000 (12:31 +0100)]
drm: i2c: tda998x: Retry fetching the EDID if it fails first time.
Fetching the EDID from a connected monitor is an automated thing
with NXP TDA19988. But on some boards the fetching fails for the
first time silently without any indication that an error has occured.
More than that, subsequent fetches of the EDID succeed until the
monitor(s) are pluged out.
Add a function to validate the read EDID and retry if the block
retrieved is not valid.
Signed-off-by: Andrew Jackson <Andrew.Jackson@arm.com>
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Filipe Rinaldi [Fri, 20 Jun 2014 10:38:35 +0000 (11:38 +0100)]
scpi: Increase the maximum number of DVFS OPPs
Signed-off-by: Filipe Rinaldi <filipe.rinaldi@arm.com>
Filipe Rinaldi [Fri, 20 Jun 2014 14:25:38 +0000 (15:25 +0100)]
scpi: Add voltage on the DVFS Info command
Newer versions of SCP added voltage as one of the parameters in the
DVFS Info command. This patch reads the voltage which can be used by
CPUFreq and Devfreq.
Signed-off-by: Filipe Rinaldi <filipe.rinaldi@arm.com>
Will Deacon [Fri, 29 Aug 2014 15:11:10 +0000 (16:11 +0100)]
arm64: report correct stack pointer in KSTK_ESP for compat tasks
The KSTK_ESP macro is used to determine the user stack pointer for a
given task. In particular, this is used to to report the '[stack]' VMA
in /proc/self/maps, which is used by Android to determine the stack
location for children of the main thread.
This patch fixes the macro to use user_stack_pointer instead of directly
returning sp. This means that we report w13 instead of sp, since the
former is used as the stack pointer when executing in AArch32 state.
Cc: <stable@vger.kernel.org>
Reported-by: Serban Constantinescu <Serban.Constantinescu@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Conflicts:
arch/arm64/include/asm/processor.h
Catalin Marinas [Fri, 29 Aug 2014 15:08:02 +0000 (16:08 +0100)]
arm64: Add brackets around user_stack_pointer()
Commit
5f888a1d33 (ARM64: perf: support dwarf unwinding in compat mode)
changes user_stack_pointer() to return the compat SP for 32-bit tasks
but without brackets around the whole definition, with possible issues
on the call sites (noticed with a subsequent fix for KSTK_ESP).
Fixes:
5f888a1d33c4 (ARM64: perf: support dwarf unwinding in compat mode)
Reported-by: Sudeep Holla <sudeep.holla@arm.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Robin Murphy [Mon, 1 Sep 2014 11:02:13 +0000 (12:02 +0100)]
Revert "arm64: Juno: Disable CPU idle states for now."
This reverts commit
dd0f50e31b767c9e6c54c2971982047e7975a028.
The latest firmware has significantly improved the stability of
CPUidle/CPUfreq.
Chris Redpath [Fri, 2 May 2014 13:30:02 +0000 (14:30 +0100)]
hmp: dont attempt to pull tasks if affinity doesn't allow it
When looking for a task to be idle-pulled, don't consider tasks
where the affinity does not allow that task to be placed on the
target CPU. Also ensure that tasks with restricted affinity
do not block selecting other unrestricted busy tasks.
Use the knowledge of target CPU more effectively in idle pull
by passing to hmp_get_heaviest_task when we know it, otherwise
only checking for general affinity matches with any of the CPUs
in the bigger HMP domain.
We still need to explicitly check affinity is allowed in idle pull
since if we find no match in hmp_get_heaviest_task we will return
the current one, which may not be affine to the new CPU despite
having high enough load. In this case, there is nothing to move.
Signed-off-by: Chris Redpath <chris.redpath@arm.com>
Signed-off-by: Jon Medhurst <tixy@linaro.org>
Juri Lelli [Tue, 26 Aug 2014 11:14:45 +0000 (12:14 +0100)]
Revert "hmp: dont attempt to pull tasks if affinity doesn't allow it"
This reverts commit
95365d0a9ec7c16fbe25682998f898e400c27177.
Chris Redpath [Tue, 6 May 2014 18:46:50 +0000 (19:46 +0100)]
sched: hmp: Change small task packing defaults for all platforms
All platforms other than TC2 default to enabling packing. Since TC2
shows no performance or energy degradation with this feature enabled
make it default enabled the same as everyone else.
Likewise, vendors have been including TC2 support in multi-machine
kernel builds so they expect the default thresholds to remain the
same when the TC2 #ifdef is removed.
Signed-off-by: Chris Redpath <chris.redpath@arm.com>
Signed-off-by: Jon Medhurst <tixy@linaro.org>
Chris Redpath [Mon, 24 Mar 2014 13:47:30 +0000 (13:47 +0000)]
hmp: dont attempt to pull tasks if affinity doesn't allow it
When looking for a task to be idle-pulled, don't consider tasks
where the affinity does not allow that task to be placed on the
target CPU. Also ensure that tasks with restricted affinity
do not block selecting other unrestricted busy tasks.
Use the knowledge of target CPU more effectively in idle pull
by passing to hmp_get_heaviest_task when we know it, otherwise
only checking for general affinity matches with any of the CPUs
in the bigger HMP domain.
We still need to explicitly check affinity is allowed in idle pull
since if we find no match in hmp_get_heaviest_task we will return
the current one, which may not be affine to the new CPU despite
having high enough load. In this case, there is nothing to move.
Signed-off-by: Chris Redpath <chris.redpath@arm.com>
Signed-off-by: Jon Medhurst <tixy@linaro.org>
Chris Redpath [Mon, 24 Mar 2014 13:47:29 +0000 (13:47 +0000)]
hmp: Use idle pull to perform forced up-migrations
When a normal forced up-migration takes place we stop the task to
be migrated while the target CPU becomes available. This delay can
range from 80us to 1500us on TC2 if the target CPU is in a deep idle
state.
Instead, interrupt the target CPU and ask it to pull a task.
This lets the current eligible task continue executing on the
original CPU while the target CPU wakes. Use a pinned timer to
prevent the pulling CPU going back into power-down with pending
up-migrations.
If we trigger for a nohz kick, it doesn't matter about triggering
for an idle pull since the idle_pull flag will be set when we
execute the softirq and we'll still do the idle pull.
If the target CPU is busy, we will not pull any tasks.
Signed-off-by: Chris Redpath <chris.redpath@arm.com>
Signed-off-by: Jon Medhurst <tixy@linaro.org>
[ Rebased on top of 1.1-Juno-rc0 ]
[ Add missing this_cpu in run_rebalance_domains() ]
Signed-off-by: Patrick Bellasi <patrick.bellasi@arm.com>
Signed-off-by: Juri Lelli <juri.lelli@arm.com>
Chris Redpath [Mon, 24 Mar 2014 13:47:28 +0000 (13:47 +0000)]
sched: hmp: unify active migration code
The HMP active migration code is functionally identical to the CFS
active migration code apart from one flag check. Share the code
and make the flag check optional.
Two wrapper functions allow the flag check to be present or not.
Thanks to tixy@linaro.org for pointing out the build break and a
good solution in an earlier version.
Signed-off-by: Chris Redpath <chris.redpath@arm.com>
Signed-off-by: Jon Medhurst <tixy@linaro.org>
[ Rebased on top of 1.1-Juno-rc0 ]
Signed-off-by: Patrick Bellasi <patrick.bellasi@arm.com>
Signed-off-by: Juri Lelli <juri.lelli@arm.com>
Chris Redpath [Mon, 24 Mar 2014 13:47:27 +0000 (13:47 +0000)]
hmp: sched: Clean up hmp_up_threshold checks into a utility fn
In anticipation of modifying the up_threshold handling, make all
instances use the same utility fn to check if a task is eligible
for up-migration. This also removes the previous difference in
threshold comparison where up-migration used '!<threshold' and
idle pull used '>threshold' to decide up-migration eligibility.
Make them both use '!<threshold' instead for consistency, although
this is unlikely to change any results.
Signed-off-by: Chris Redpath <chris.redpath@arm.com>
Signed-off-by: Jon Medhurst <tixy@linaro.org>
Robin Murphy [Mon, 4 Aug 2014 15:42:51 +0000 (16:42 +0100)]
usb: Fix H20AHB driver for big-endian
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Robin Murphy [Wed, 13 Aug 2014 10:19:53 +0000 (11:19 +0100)]
Support PSCI reboot/shutdown
Hack in the extra function IDs in lieu of 'proper' PSCi 0.2 support.
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Liviu Dudau [Wed, 13 Aug 2014 13:28:45 +0000 (14:28 +0100)]
Set the CEC I2C address based on the slave I2C address.
The two LSBs of the TDA998x's I2C address are set by pins
on the chip. The associated CEC peripheral's I2C address
is set in the same way, so base the CEC address on that
of the slave's address.
Signed-off-by: Andrew Jackson <Andrew.Jackson@arm.com>
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Liviu Dudau [Fri, 8 Aug 2014 13:40:30 +0000 (14:40 +0100)]
Revert "drm: i2c: tda998x: Retry fetching the EDID if it fails first time."
This reverts commit
7d0d4cedd12513703239172eb9a7a3465cb8a6ec.
This was a stopgap solution until the real bug was properly understood.
Now that I2C transactions can be relied on, we don't need this anymore.
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Andrew Jackson [Tue, 5 Aug 2014 11:59:54 +0000 (12:59 +0100)]
i2c: designware: prevent early stop on TX FIFO empty
If the Designware core is configured with IC_EMPTYFIFO_HOLD_MASTER_EN
set to zero, allowing the TX FIFO to become empty causes a STOP
condition to be generated on the I2C bus. If the transmit FIFO
threshold is set too high, an erroneous STOP condition can be
generated on long transfers - particularly where the interrupt
latency is extended.
Signed-off-by: Andrew Jackson <Andrew.Jackson@arm.com>
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Liviu Dudau [Wed, 30 Jul 2014 14:45:53 +0000 (15:45 +0100)]
drm: Re-add DMT modes for monitors
Commit
196e077dc165a307efbd9e7569f81bbdbcf18f65
"drm: don't add inferred modes for monitors that don't support them"
It remove the call add_inferred_modes when DRM_EDID_FEATURE_DEFAULT_GTF
in feature support field is zero, this remove all inferred modes
come from GTF or CVT range information, and also remove DMT modes,
this make me lost some avaiable modes for my TV.
Signed-off-by: Wang YanQing <udknight@gmail.com>
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Liviu Dudau [Thu, 7 Aug 2014 15:42:40 +0000 (16:42 +0100)]
DRM: HDLCD: Enable compat IOCTL for 32-bit userspace.
32-bit userspace should be able to use double buffering in the
same way native binaries do, so enable it.
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Liviu Dudau [Mon, 28 Jul 2014 12:40:49 +0000 (13:40 +0100)]
arm64: Enable Heterogenous Multi Processing by default
HMP needs more tuning but its usefulness has been proved
so enable it by default. There might still be corner cases
where issues will crop up, but for demos and evaluation
is should be ready to use.
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Chris Redpath [Fri, 6 Jun 2014 14:18:59 +0000 (15:18 +0100)]
sched: hmp: fix out-of-range CPU possible
If someone hotplugs all the little CPUs while another CPU is handling
a wakeup, we can potentially return new_cpu == NR_CPUS from
hmp_select_slower_cpu (which is called internally by
hmp_best_little_cpu as well). We will use this to deref the
per_cpu rq array in hmp_next_down_delay which can go boom.
Signed-off-by: Chris Redpath <chris.redpath@arm.com>
Liviu Dudau [Thu, 24 Jul 2014 12:57:19 +0000 (13:57 +0100)]
drm: hdlcd: Add debugfs entry for displaying current pixelclock value
When asking the hardware to set a new pixelclock value we might
timeout on values that are calculated during request and not
wait for the actual outcome of the clock setting. SCP could still
finish the brute force search for the best PLL settings and might
or might not set the requested resolution. To help track the
current value of the pixelclock, add a new entry in debugfs that
displays the HW programmed value vs the one that was requested
for the current running mode.
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Punit Agrawal [Thu, 24 Jul 2014 10:42:09 +0000 (11:42 +0100)]
juno: defconfig: Enable multi-touch HID devices in defconfig
Liviu Dudau [Thu, 24 Jul 2014 11:21:17 +0000 (12:21 +0100)]
mailbox: mhu: Acknowledge the interrupt only after data is pushed
According to the mailbox documentation the controller should ACK
the RX only after it has finished pushing the data up the link.
Signed-off-by: Punit Agrawal <Punit.Agrawal@arm.com>
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Liviu Dudau [Thu, 24 Jul 2014 10:14:21 +0000 (11:14 +0100)]
mailbox: scpi: Free the mailbox channel when we fail to queue a message.
When sending an SCPI command we aquire a channel and queue the
message in the mailbox. If the queuing failed we were not releasing
the channel hence preventing everyone else from using it.
Signed-off-by: Punit Agrawal <Punit.Agrawal@arm.com>
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Liviu Dudau [Tue, 22 Jul 2014 17:46:29 +0000 (18:46 +0100)]
drm: hdlcd: Don't depend on VSYNC interrupt when setting new framebuffer.
VSYNC state is influenced by the DRM framework and cannot be relied
on when setting a new framebuffer base address and synchronising with
the hardware. Use the DMA_END interrupt as it is a more reliable way
of signaling the end of frame utilisation.
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Liviu Dudau [Tue, 22 Jul 2014 17:34:54 +0000 (18:34 +0100)]
mailbox: Pack SCPI structures used for messages.
The System Control Processor expects data sent in the messages
to be contiguos. When using unpacked structures to describe
the data being transmitted we increase the general size of the
message which leads to SCP rejecting our request.
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Liviu Dudau [Mon, 21 Jul 2014 11:50:08 +0000 (12:50 +0100)]
arm64: defconfig: Enable CPUidle driver by default.
Enable the arm64 CPUidle driver by default.
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Liviu Dudau [Mon, 21 Jul 2014 11:36:09 +0000 (12:36 +0100)]
arm64: Juno: Comment out the secondary HDLCD controller
The HDLCD controllers on Juno share the same PLL for the pixel
clock output. If the secondary output is not connected to a
monitor with the same resolution as the primary output, or
to a monitor with VGA resolution, it will cause the pixel
clock to be set to the wrong value for the primary output.
Comment out the secondary HDLCD controller for now.
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Liviu Dudau [Mon, 21 Jul 2014 11:31:11 +0000 (12:31 +0100)]
drm: i2c: tda998x: Retry fetching the EDID if it fails first time.
Fetching the EDID from a connected monitor is an automated thing
with NXP TDA19988. But on some boards the fetching fails for the
first time silently without any indication that an error has occured.
More than that, subsequent fetches of the EDID succeed until the
monitor(s) are pluged out.
Add a function to validate the read EDID and retry if the block
retrieved is not valid.
Signed-off-by: Andrew Jackson <Andrew.Jackson@arm.com>
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Liviu Dudau [Fri, 18 Jul 2014 16:31:38 +0000 (17:31 +0100)]
drm: hdlcd: Fix the picture tear when flipping framebuffers.
HDLCD contains logic in hardware to wait for VSYNC before updating
the start of framebuffer register, so we don't need to do it in
software. More than that, to remove any tearing we need to wait
for VSYNC after setting up a new framebuffer as releasing the old
fb while the hardware is still using it can cause artifacts.
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Liviu Dudau [Wed, 2 Jul 2014 23:22:05 +0000 (00:22 +0100)]
Update README.md in preparation for Beta release.
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Liviu Dudau [Wed, 2 Jul 2014 23:16:59 +0000 (00:16 +0100)]
arm64: Juno: Collect last remaining updates in preparation release.
Update the Mali device tree node label, register size resource,
update GICv2 register resource and remove UAS as a module from
defconfig. All small patches that were sitting in my inbox.
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Liviu Dudau [Tue, 1 Jul 2014 09:30:20 +0000 (10:30 +0100)]
arm64: Update defconfig to bump the CMA buffer size to 32MB and enable ION.
These changes are needed to enable the HDLCD to do double
buffering correctly with Android and Mali drivers.
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Liviu Dudau [Mon, 30 Jun 2014 17:36:57 +0000 (18:36 +0100)]
drm: arm: Add support for PRIME and dma_buf buffer sharing.
Add support for buffer sharing in HDLCD and implement proprietary
IOCTL from ARM Mali driver to get a file descriptor for the buffer.
This is used by the Mali kernel driver to import the buffers into
DDK and enable double buffering.
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Liviu Dudau [Mon, 30 Jun 2014 17:31:14 +0000 (18:31 +0100)]
staging: android: ion: Set the length of the DMA sg entries in buffer.
ion_buffer_create() will allocate a buffer and then create a DMA
mapping for it, but it forgot to set the length of the page entries.
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Liviu Dudau [Tue, 10 Jun 2014 14:46:49 +0000 (15:46 +0100)]
arm64: Juno: Disable CPU idle states for now.
CPU idle has not received enough testing to pass release status,
so we need to disable it for now.
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Liviu Dudau [Tue, 10 Jun 2014 14:45:25 +0000 (15:45 +0100)]
arm64: juno: Update defconfig to enable IPv6 options for Android
Android wants to use IPv6 features, so lets enable them.
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Alex Shi [Thu, 5 Jun 2014 06:58:06 +0000 (07:58 +0100)]
usb: fix hcd h20ahb driver depends
USB_EHCI_HCD_SYNOPSYS is not only dependent on USB_EHCI_HCD, but
also on USB_PHY. Otherwise kernel build has the following error:
LD init/built-in.o
drivers/built-in.o: In function `ehci_hcd_h20ahb_probe':
:(.text+0xb9bb4): undefined reference to `usb_add_phy_dev'
Signed-off-by: Alex Shi <alex.shi@linaro.org>
Liviu Dudau [Mon, 9 Jun 2014 15:27:10 +0000 (16:27 +0100)]
arm64: Juno: Carve out memory reserved for secure access.
Trusted Firmware 0.4 reserves the top 16MB of RAM available
in the first 4GB address space for the secure world use.
Carve out that memory from the device tree to avoid triggering
faults when accessing protected memory.
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Liviu Dudau [Mon, 9 Jun 2014 13:15:01 +0000 (14:15 +0100)]
Merge remote-tracking branch 'sudeep/juno_freq+idle' into juno-release
Conflicts:
arch/arm64/boot/dts/juno.dts
arch/arm64/configs/defconfig
arch/arm64/kernel/topology.c
drivers/clk/clk-scpi.c
drivers/cpufreq/scpi-cpufreq.c
drivers/input/serio/ambakmi.c
drivers/mailbox/arm_mhu.c
include/uapi/linux/audit.h
Sudeep Holla [Thu, 5 Jun 2014 18:24:17 +0000 (19:24 +0100)]
fixup! mailbox: add support for ARM Message Handling Unit(MHU) controller
TODO:
Yet to identify on what paths we need to clear the RX status if the
protocol timed out and frees the channel. For now have it in startup,
shutdown and interrupt...
Sudeep Holla [Wed, 4 Jun 2014 15:22:35 +0000 (16:22 +0100)]
juno: add untuned C-state details to device tree
Also add hack to workaround mmaped timer access issue
Sudeep Holla [Wed, 4 Jun 2014 15:01:29 +0000 (16:01 +0100)]
Merge branch 'arm64/unstable/arm64-cpuidle' of git://linux-arm.org/linux-2.6-lp into juno_mhu_clk_dvfs
* 'arm64/unstable/arm64-cpuidle' of git://linux-arm.org/linux-2.6-lp:
arm64: boot: dts: update rtsm aemv8 dts with PSCI and idle states
drivers: cpuidle: CPU idle ARM64 driver
arm64: add PSCI CPU_SUSPEND based cpu_suspend support
drivers: cpuidle: implement OF based idle states infrastructure
Sudeep Holla [Fri, 9 May 2014 12:32:13 +0000 (13:32 +0100)]
Temp commit to add Juno DTS and additional configs
Sudeep Holla [Fri, 9 May 2014 12:17:32 +0000 (13:17 +0100)]
cpufreq: [HORRIBLE DIRTY HACK] get arm_big_little compiling on arm64
*******!!!!!!!!****** ONLY FOR TESTING *************!!!!!!!!!***************
Currently the addition of switcher code has created too much dependencies
to get this driver compiling on ARM64. For time being add dirty compilation
hacks to test CPUFreq on Juno.
****!!!!!!!***** THIS NEEDS TO BE REWORKED *********!!!!!!!!****************
Not-at-all-Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Sudeep Holla [Thu, 8 May 2014 16:47:48 +0000 (17:47 +0100)]
cpufreq: arm_big_little: add SPCI interface driver
On some ARM based systems, a separate Cortex-M based System Control
Processor(SCP) provides the overall power, clock, reset and system
control including CPU DVFS. SCPI Message Protocol is used to
communicate with the SCPI.
This patch adds a interface driver for adding OPPs and registering
the arm_big_little cpufreq driver for such systems.
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Sudeep Holla [Thu, 24 Apr 2014 15:58:11 +0000 (16:58 +0100)]
clk: add support for clocks provided by system control processor
On some ARM based systems, a separate Cortex-M based System Control
Processor(SCP) provides the overall power, clock, reset and system
control. System Control and Power Interface(SCPI) Message Protocol
is defined for the communication between the Application Cores(AP)
and the SCP.
This patch adds support for the clocks provided by SCP using SCPI
protocol.
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Sudeep Holla [Tue, 15 Apr 2014 15:09:42 +0000 (16:09 +0100)]
mailbox: add support for System Control and Power Interface(SCPI) protocol
This patch add supports for System Control and Power Interface (SCPI)
Message Protocol used between the Application Cores(AP) and the System
Control Processor(SCP). The MHU peripheral provides a mechanism for
inter-processor communication between SCP's M3 processor and AP.
SCP offers control and management of the core/cluster power states,
various power domain DVFS including the core/cluster, certain system
clocks configuration, thermal sensors and many others.
This protocol library provides interface for all the client drivers using
SCPI to make use of the features offered by the SCP.
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Sudeep Holla [Tue, 15 Apr 2014 14:14:27 +0000 (15:14 +0100)]
mailbox: add support for ARM Message Handling Unit(MHU) controller
This patch adds support for ARM Message Handling Unit(MHU) controller
that provides control logic and interrupt generation to support
inter-processor communication between the Application Processor and
the System Control Processor(SCP).
This support is built on the existing common mailbox framework for
client/protocol drivers and controller drivers of Inter Processor
Communication(IPC). SCP controls most of the power management on the
Application Processors.
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Sudeep Holla [Thu, 8 May 2014 15:15:07 +0000 (16:15 +0100)]
arm64: add ARCH_HAS_OPP to allow enabling OPP library
The Operating Performance Point (OPP) Layer library is a generic
library used by CPUFREQ and DEVFREQ. It can be enabled only on the
platforms that specify ARCH_HAS_OPP option.
This patch selects that option in order to allow ARM64 based platforms
to use OPP library.
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>