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(parent: e2dfde4) | patch
dma: pl330: Align DMA memcpy operations to MFIFO width
authorJon Medhurst <tixy@linaro.org>
Tue, 15 Apr 2014 16:18:15 +0000 (17:18 +0100)
committerLiviu Dudau <Liviu.Dudau@arm.com>
Fri, 31 Oct 2014 12:22:14 +0000 (12:22 +0000)
commite963adad3a5b56b9824691fbca82cbced83fbcac
treed743fc6e0e3e2b06842a7b7b8fdde128a9fb26b4tree | snapshot
parente2dfde45faccacf0e4811318a161c110bfc6c658commit | diff
dma: pl330: Align DMA memcpy operations to MFIFO width

The algorithm used for programming the DMA Controller doesn't take into
consideration the requirements of transfers that are not aligned to the
bus width. Work around this by making sure we pick a bust size and
length which ensures no bursts straddle an MFIFO entry.

See "MFIFO Usage Overview" chapter in the the TRM for "CoreLink DMA
Controller DMA-330", Revision r1p1.

Signed-off-by: Jon Medhurst <tixy@linaro.org>
drivers/dma/pl330.c diff | blob | history
Domain: System / Kernel;