ASoS: samsung: odroid: Fix clock configuration for 44100 sample rate

After commit fbeec965b8d1c ("ASoC: samsung: odroid: Fix 32000 sample
rate handling") due to clock rounding error CODEC master clock frequency
is being set to 20070401 Hz instead of 22579000 Hz.
This results in too fast actual sample rate for fs=44100, e.g. 2 kHz tone
has really 3555 Hz frequency (2000 Hz * 20070401/22579000 * 2).

Fix this by increasing correction passed to clk_set_rate() to take into
account inaccuracy of EPLL frequency properly.

Change-Id: I8d08bec8e70394421c115bde1d511b730885bbe2
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>

diff --git a/sound/soc/samsung/odroid.c b/sound/soc/samsung/odroid.c
index 694512f980fdc207577fcd2a5a59d7a6484bfdd0..1dc54c4206f0adc1ed5250c2d9bf3f44f5c7adf2 100644 (file)
--- a/sound/soc/samsung/odroid.c
+++ b/sound/soc/samsung/odroid.c
@@ -91,11 +91,11 @@ static int odroid_card_be_hw_params(struct snd_pcm_substream *substream,
                return ret;
 
        /*
-        *  We add 1 to the rclk_freq value in order to avoid too low clock
+        *  We add 2 to the rclk_freq value in order to avoid too low clock
         *  frequency values due to the EPLL output frequency not being exact
         *  multiple of the audio sampling rate.
         */
-       rclk_freq = params_rate(params) * rfs + 1;
+       rclk_freq = params_rate(params) * rfs + 2;
 
        ret = clk_set_rate(priv->sclk_i2s, rclk_freq);
        if (ret < 0)