tests/amdgpu: expand write linear helper for security (v3)

This patch expand write linear helper for security to submit the command
with secure context.

v2: refine the function implementation.
v3: remove amdgpu_cs_ctx_create3.

Acked-by: Huang Rui <ray.huang@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/tests/amdgpu/amdgpu_test.h b/tests/amdgpu/amdgpu_test.h
index d7a6bd2646b77ef0207ee6cfe048fa4b578ae96b..8c7ae5ad9fb6425beddb80c5be8b8f4d684efd2c 100644 (file)
--- a/tests/amdgpu/amdgpu_test.h
+++ b/tests/amdgpu/amdgpu_test.h
@@ -267,6 +267,9 @@ CU_BOOL suite_security_tests_enable(void);
  */
 extern CU_TestInfo security_tests[];
 
+extern void
+amdgpu_command_submission_write_linear_helper_with_secure(unsigned ip_type,
+                                                         bool secure);
 
 /**
  * Helper functions
@@ -457,4 +460,5 @@ static inline bool asic_is_arcturus(uint32_t asic_id)
        }
 }
 
+
 #endif  /* #ifdef _AMDGPU_TEST_H_ */

diff --git a/tests/amdgpu/basic_tests.c b/tests/amdgpu/basic_tests.c
index dfd3ddbbf4d68afc2603c31ef9d2d66d87e9f96d..d018cd8d02cf436f4111f230bef1ec5f3e909666 100644 (file)
--- a/tests/amdgpu/basic_tests.c
+++ b/tests/amdgpu/basic_tests.c
@@ -70,7 +70,7 @@ static void amdgpu_test_exec_cs_helper(amdgpu_context_handle context_handle,
                                       int res_cnt, amdgpu_bo_handle *resources,
                                       struct amdgpu_cs_ib_info *ib_info,
                                       struct amdgpu_cs_request *ibs_request);
- 
+
 CU_TestInfo basic_tests[] = {
        { "Query Info Test",  amdgpu_query_info_test },
        { "Userptr Test",  amdgpu_userptr_test },
@@ -1348,7 +1348,8 @@ static void amdgpu_test_exec_cs_helper(amdgpu_context_handle context_handle,
        CU_ASSERT_EQUAL(r, 0);
 }
 
-static void amdgpu_command_submission_write_linear_helper(unsigned ip_type)
+void amdgpu_command_submission_write_linear_helper_with_secure(unsigned ip_type,
+                                                              bool secure)
 {
        const int sdma_write_length = 128;
        const int pm4_dw = 256;
@@ -1377,7 +1378,11 @@ static void amdgpu_command_submission_write_linear_helper(unsigned ip_type)
        r = amdgpu_query_hw_ip_info(device_handle, ip_type, 0, &hw_ip_info);
        CU_ASSERT_EQUAL(r, 0);
 
+       for (i = 0; secure && (i < 2); i++)
+               gtt_flags[i] |= AMDGPU_GEM_CREATE_ENCRYPTED;
+
        r = amdgpu_cs_ctx_create(device_handle, &context_handle);
+
        CU_ASSERT_EQUAL(r, 0);
 
        /* prepare resource */
@@ -1456,6 +1461,12 @@ static void amdgpu_command_submission_write_linear_helper(unsigned ip_type)
        CU_ASSERT_EQUAL(r, 0);
 }
 
+static void amdgpu_command_submission_write_linear_helper(unsigned ip_type)
+{
+       amdgpu_command_submission_write_linear_helper_with_secure(ip_type,
+                                                                 false);
+}
+
 static void amdgpu_command_submission_sdma_write_linear(void)
 {
        amdgpu_command_submission_write_linear_helper(AMDGPU_HW_IP_DMA);