Remove unused symbols
authorTom Rini <trini@konsulko.com>
Sat, 12 Nov 2022 22:36:43 +0000 (17:36 -0500)
committerTom Rini <trini@konsulko.com>
Mon, 5 Dec 2022 21:05:38 +0000 (16:05 -0500)
This commit removes the following unused symbols:
   CONFIG_SYS_NAND_DDR_LAW
   CONFIG_SYS_NAND_ECCSTEPS
   CONFIG_SYS_NAND_ECCTOTAL
   CONFIG_SYS_NAND_ENABLE_PIN_SPL
   CONFIG_SYS_NAND_MX7_GPMI_62_ECC_BYTES
   CONFIG_SYS_NAND_U_BOOT_RELOC_SP

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
12 files changed:
include/configs/P1010RDB.h
include/configs/T102xRDB.h
include/configs/T104xRDB.h
include/configs/T208xQDS.h
include/configs/T208xRDB.h
include/configs/T4240RDB.h
include/configs/colibri_imx7.h
include/configs/da850evm.h
include/configs/omapl138_lcdk.h
include/configs/siemens-am33x-common.h
include/configs/smartweb.h
include/configs/taurus.h

index addb306..3448766 100644 (file)
@@ -235,8 +235,6 @@ extern unsigned long get_sdram_size(void);
 #define CONFIG_SYS_NAND_FTIM3  0x0
 #endif
 
-#define CONFIG_SYS_NAND_DDR_LAW                11
-
 /* Set up IFC registers for boot location NOR/NAND */
 #if defined(CONFIG_MTD_RAW_NAND) || defined(CONFIG_NAND_SECBOOT)
 #define CONFIG_SYS_CSPR0               CONFIG_SYS_NAND_CSPR
index 62c4177..4b2327d 100644 (file)
                                        FTIM2_NAND_TWHRE(0x1e))
 #define CONFIG_SYS_NAND_FTIM3          0x0
 
-#define CONFIG_SYS_NAND_DDR_LAW                11
 #define CONFIG_SYS_NAND_BASE_LIST      { CONFIG_SYS_NAND_BASE }
 
 #if defined(CONFIG_MTD_RAW_NAND)
index ad8037e..e7d82bf 100644 (file)
                                        FTIM2_NAND_TWHRE(0x1e))
 #define CONFIG_SYS_NAND_FTIM3          0x0
 
-#define CONFIG_SYS_NAND_DDR_LAW                11
 #define CONFIG_SYS_NAND_BASE_LIST      { CONFIG_SYS_NAND_BASE }
 
 #if defined(CONFIG_MTD_RAW_NAND)
index 2dcaeda..0819550 100644 (file)
                                        FTIM2_NAND_TWHRE(0x1e))
 #define CONFIG_SYS_NAND_FTIM3          0x0
 
-#define CONFIG_SYS_NAND_DDR_LAW                11
 #define CONFIG_SYS_NAND_BASE_LIST      { CONFIG_SYS_NAND_BASE }
 
 #if defined(CONFIG_MTD_RAW_NAND)
index 223c856..75d9200 100644 (file)
                                        FTIM2_NAND_TWHRE(0x1e))
 #define CONFIG_SYS_NAND_FTIM3          0x0
 
-#define CONFIG_SYS_NAND_DDR_LAW                11
 #define CONFIG_SYS_NAND_BASE_LIST      { CONFIG_SYS_NAND_BASE }
 
 #if defined(CONFIG_MTD_RAW_NAND)
index 12edfdd..d79789a 100644 (file)
                                        FTIM2_NAND_TWHRE(0x1e))
 #define CONFIG_SYS_NAND_FTIM3          0x0
 
-#define CONFIG_SYS_NAND_DDR_LAW                11
 #define CONFIG_SYS_NAND_BASE_LIST      { CONFIG_SYS_NAND_BASE }
 
 #if defined(CONFIG_MTD_RAW_NAND)
index 7380440..5c7a9f2 100644 (file)
 #ifdef CONFIG_TARGET_COLIBRI_IMX7_NAND
 /* NAND stuff */
 #define CONFIG_SYS_NAND_BASE           0x40000000
-#define CONFIG_SYS_NAND_MX7_GPMI_62_ECC_BYTES
 #endif
 
 /* USB Configs */
index 281cbe3..262a79b 100644 (file)
 #define CONFIG_SYS_NAND_U_BOOT_SIZE    0x40000
 #define CONFIG_SYS_NAND_U_BOOT_DST     0xc1080000
 #define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_NAND_U_BOOT_DST
-#define CONFIG_SYS_NAND_U_BOOT_RELOC_SP        (CONFIG_SYS_NAND_U_BOOT_DST - \
-                                       CONFIG_SYS_NAND_U_BOOT_SIZE - \
-                                       CONFIG_SYS_MALLOC_LEN -       \
-                                       GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_NAND_ECCPOS         {                               \
                                24, 25, 26, 27, 28, \
                                29, 30, 31, 32, 33, 34, 35, 36, 37, 38, \
index 4103930..4b24d61 100644 (file)
 #define CONFIG_SYS_NAND_U_BOOT_SIZE    SZ_512K
 #define CONFIG_SYS_NAND_U_BOOT_DST     0xc1080000
 #define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_NAND_U_BOOT_DST
-#define CONFIG_SYS_NAND_U_BOOT_RELOC_SP        (CONFIG_SYS_NAND_U_BOOT_DST - \
-                                       CONFIG_SYS_NAND_U_BOOT_SIZE - \
-                                       CONFIG_SYS_MALLOC_LEN -       \
-                                       GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_NAND_ECCPOS         {                               \
                                6, 7, 8, 9, 10, 11, 12, 13, 14, 15,     \
                                22, 23, 24, 25, 26, 27, 28, 29, 30, 31, \
index 87da5e4..dd247d2 100644 (file)
 #define CONFIG_SYS_NAND_ECCSIZE                512
 #define CONFIG_SYS_NAND_ECCBYTES       14
 
-#define CONFIG_SYS_NAND_ECCSTEPS       4
-#define        CONFIG_SYS_NAND_ECCTOTAL        (CONFIG_SYS_NAND_ECCBYTES * \
-                                               CONFIG_SYS_NAND_ECCSTEPS)
-
 #define        CONFIG_SYS_NAND_U_BOOT_START    CONFIG_TEXT_BASE
 
 /*
index c8f5816..538aad9 100644 (file)
@@ -92,7 +92,6 @@
 
 /* Defines for SPL */
 
-#define CONFIG_SYS_NAND_ENABLE_PIN_SPL (2*32 + 14)
 #define CONFIG_SYS_NAND_U_BOOT_SIZE    SZ_512K
 #define        CONFIG_SYS_NAND_U_BOOT_START    CONFIG_TEXT_BASE
 #define CONFIG_SYS_NAND_U_BOOT_DST     CONFIG_TEXT_BASE
index ca9616d..5ab087d 100644 (file)
 
 /* Defines for SPL */
 
-#define CONFIG_SYS_NAND_ENABLE_PIN_SPL (2*32 + 14)
 #define CONFIG_SYS_NAND_U_BOOT_SIZE    SZ_512K
 #define        CONFIG_SYS_NAND_U_BOOT_START    CONFIG_TEXT_BASE
 #define CONFIG_SYS_NAND_U_BOOT_DST     CONFIG_TEXT_BASE