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ARM: defconfig: enable I-Cache line size workaround on Exynos systems 53/206253/1 accepted/tizen/unified/20190611.110428 submit/tizen/20190611.014400
authorMarek Szyprowski <m.szyprowski@samsung.com>
Wed, 15 May 2019 10:58:27 +0000 (12:58 +0200)
committerMarek Szyprowski <m.szyprowski@samsung.com>
Wed, 15 May 2019 10:58:37 +0000 (12:58 +0200)
commit8d40f3e556f9473254b6ac1dc0c0f564f1cdcd08
tree28a293a2463cfc7bee0e675abdcad522b77134e9tree | snapshot
parent493d0bdbcf660d92a31c4ca492beb6eabb5e47b1commit | diff
ARM: defconfig: enable I-Cache line size workaround on Exynos systems

All Exynos big.LITTLE system suffer from I-Cache line size mismatch between
CPU cores, so enable workaround for it in exynos_defconfig and
tizen_odroid_defconfig.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Change-Id: I0f324a5832e1ef47999f7b8d4ddd4a29db0ee176
arch/arm/configs/exynos_defconfig diff | blob | history
arch/arm/configs/tizen_odroid_defconfig diff | blob | history
Domain: System / Kernel;