ARM: Add workaround for I-Cache line size mismatch between CPU cores

ARM: Add workaround for I-Cache line size mismatch between CPU cores

Some big.LITTLE systems have mismatch of I-Cache line size between
LITTLE and big cores. This patch adds workaround for proper I-Cache
support on such systems. Without it, some code (typically self-modifying)
might suffer from random SIGILL failures.

Similar workaround exists for ARM64 architecture, added by commit
116c81f427ff ("arm64: Work around systems with mismatched cache line
sizes").

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Change-Id: I76e1cb24cde91dbfd5a16bd8d5dc97c7953767ff