#
NAND_SPL := y
-TEXT_BASE := 0xfff00000
+CONFIG_SYS_TEXT_BASE := 0xfff00000
PAD_TO := 0xfff01000
include $(TOPDIR)/config.mk
LDSCRIPT= $(TOPDIR)/$(CPUDIR)/u-boot-nand_spl.lds
-LDFLAGS = -Bstatic -T $(LDSCRIPT) -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS)
+LDFLAGS = -Bstatic -T $(LDSCRIPT) -Ttext $(CONFIG_SYS_TEXT_BASE) $(PLATFORM_LDFLAGS)
AFLAGS += -DCONFIG_NAND_SPL
CFLAGS += -DCONFIG_NAND_SPL
$(obj)cache.c:
@rm -f $(obj)cache.c
- ln -sf $(SRCTREE)/arch/ppc/lib/cache.c $(obj)cache.c
+ ln -sf $(SRCTREE)/arch/powerpc/lib/cache.c $(obj)cache.c
$(obj)cpu_init_early.c:
@rm -f $(obj)cpu_init_early.c
- ln -sf $(SRCTREE)/arch/ppc/cpu/mpc85xx/cpu_init_early.c $(obj)cpu_init_early.c
+ ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/cpu_init_early.c $(obj)cpu_init_early.c
$(obj)cpu_init_nand.c:
@rm -f $(obj)cpu_init_nand.c
- ln -sf $(SRCTREE)/arch/ppc/cpu/mpc85xx/cpu_init_nand.c $(obj)cpu_init_nand.c
+ ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/cpu_init_nand.c $(obj)cpu_init_nand.c
$(obj)fsl_law.c:
@rm -f $(obj)fsl_law.c
$(obj)fixed_ivor.S:
@rm -f $(obj)fixed_ivor.S
- ln -sf $(SRCTREE)/arch/ppc/cpu/mpc85xx/fixed_ivor.S $(obj)fixed_ivor.S
+ ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/fixed_ivor.S $(obj)fixed_ivor.S
$(obj)start.S: $(obj)fixed_ivor.S
@rm -f $(obj)start.S
- ln -sf $(SRCTREE)/arch/ppc/cpu/mpc85xx/start.S $(obj)start.S
+ ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/start.S $(obj)start.S
$(obj)tlb.c:
@rm -f $(obj)tlb.c
- ln -sf $(SRCTREE)/arch/ppc/cpu/mpc85xx/tlb.c $(obj)tlb.c
+ ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/tlb.c $(obj)tlb.c
$(obj)tlb_table.c:
@rm -f $(obj)tlb_table.c