Merge branch '2022-08-04-Kconfig-migrations'

[platform/kernel/u-boot.git] / include / mtd / cfi_flash.h

diff --git a/include/mtd/cfi_flash.h b/include/mtd/cfi_flash.h
index 3245b44..1321da1 100644 (file)
--- a/include/mtd/cfi_flash.h
+++ b/include/mtd/cfi_flash.h
@@ -1,25 +1,7 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * (C) Copyright 2009
  * Stefan Roese, DENX Software Engineering, sr@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.         See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
  */
 
 #ifndef __CFI_FLASH_H__
@@ -60,6 +42,13 @@
 #define AMD_CMD_UNLOCK_ACK             0x55
 #define AMD_CMD_WRITE_TO_BUFFER                0x25
 #define AMD_CMD_WRITE_BUFFER_CONFIRM   0x29
+#define AMD_CMD_SET_PPB_ENTRY          0xC0
+#define AMD_CMD_SET_PPB_EXIT_BC1       0x90
+#define AMD_CMD_SET_PPB_EXIT_BC2       0x00
+#define AMD_CMD_PPB_UNLOCK_BC1         0x80
+#define AMD_CMD_PPB_UNLOCK_BC2         0x30
+#define AMD_CMD_PPB_LOCK_BC1           0xA0
+#define AMD_CMD_PPB_LOCK_BC2           0x00
 
 #define AMD_STATUS_TOGGLE              0x40
 #define AMD_STATUS_ERROR               0x20
@@ -72,6 +61,7 @@
 
 #define FLASH_OFFSET_MANUFACTURER_ID   0x00
 #define FLASH_OFFSET_DEVICE_ID         0x01
+#define FLASH_OFFSET_LOWER_SW_BITS     0x0C
 #define FLASH_OFFSET_DEVICE_ID2                0x0E
 #define FLASH_OFFSET_DEVICE_ID3                0x0F
 #define FLASH_OFFSET_CFI               0x55
@@ -115,19 +105,23 @@
 #define NUM_ERASE_REGIONS      4 /* max. number of erase regions */
 
 typedef union {
-       unsigned char c;
-       unsigned short w;
-       unsigned long l;
-       unsigned long long ll;
+       u8 w8;
+       u16 w16;
+       u32 w32;
+       u64 w64;
 } cfiword_t;
 
 /* CFI standard query structure */
+/* The offsets and sizes of this packed structure members correspond
+ * to the actual layout in CFI Flash chips. Some 16- and 32-bit members
+ * are unaligned and must be accessed with explicit unaligned access macros.
+ */
 struct cfi_qry {
        u8      qry[3];
-       u16     p_id;
-       u16     p_adr;
-       u16     a_id;
-       u16     a_adr;
+       u16     p_id;                   /* unaligned */
+       u16     p_adr;                  /* unaligned */
+       u16     a_id;                   /* unaligned */
+       u16     a_adr;                  /* unaligned */
        u8      vcc_min;
        u8      vcc_max;
        u8      vpp_min;
@@ -141,10 +135,10 @@ struct cfi_qry {
        u8      block_erase_timeout_max;
        u8      chip_erase_timeout_max;
        u8      dev_size;
-       u16     interface_desc;
-       u16     max_buf_write_size;
+       u16     interface_desc;         /* aligned */
+       u16     max_buf_write_size;     /* aligned */
        u8      num_erase_regions;
-       u32     erase_region_info[NUM_ERASE_REGIONS];
+       u32     erase_region_info[NUM_ERASE_REGIONS];   /* unaligned */
 } __attribute__((packed));
 
 struct cfi_pri_hdr {
@@ -160,18 +154,38 @@ struct cfi_pri_hdr {
 /*
  * CFI_MAX_FLASH_BANKS only used for flash_info struct declaration.
  *
- * Use CONFIG_SYS_MAX_FLASH_BANKS_DETECT if defined
+ * CFI_FLASH_BANKS selects the correct number of available banks =
+ * cfi_flash_num_flash_banks when CONFIG_SYS_MAX_FLASH_BANKS_DETECT is defined
+ * or CONFIG_SYS_MAX_FLASH_BANKS
  */
+#define CFI_MAX_FLASH_BANKS    CONFIG_SYS_MAX_FLASH_BANKS
+
 #if defined(CONFIG_SYS_MAX_FLASH_BANKS_DETECT)
-#define CONFIG_SYS_MAX_FLASH_BANKS     (cfi_flash_num_flash_banks)
-#define CFI_MAX_FLASH_BANKS    CONFIG_SYS_MAX_FLASH_BANKS_DETECT
+/* map to cfi_flash_num_flash_banks only when supported */
+#if IS_ENABLED(CONFIG_FLASH_CFI_DRIVER) && \
+    (!IS_ENABLED(CONFIG_SPL_BUILD) || IS_ENABLED(CONFIG_SPL_MTD_SUPPORT))
+#define CFI_FLASH_BANKS                (cfi_flash_num_flash_banks)
 /* board code can update this variable before CFI detection */
 extern int cfi_flash_num_flash_banks;
-#else
-#define CFI_MAX_FLASH_BANKS    CONFIG_SYS_MAX_FLASH_BANKS
+#endif
+#endif
+/* default when bank detection is not supported */
+#ifndef CFI_FLASH_BANKS
+#define CFI_FLASH_BANKS                CONFIG_SYS_MAX_FLASH_BANKS
 #endif
 
-void flash_write_cmd(flash_info_t * info, flash_sect_t sect,
-                    uint offset, u32 cmd);
+phys_addr_t cfi_flash_bank_addr(int i);
+unsigned long cfi_flash_bank_size(int i);
+
+#ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
+void flash_write8(u8 value, void *addr);
+void flash_write16(u16 value, void *addr);
+void flash_write32(u32 value, void *addr);
+void flash_write64(u64 value, void *addr);
+u8 flash_read8(void *addr);
+u16 flash_read16(void *addr);
+u32 flash_read32(void *addr);
+u64 flash_read64(void *addr);
+#endif
 
 #endif /* __CFI_FLASH_H__ */