MPC5xxx: Change names of defines related to IPB and PCI clocks.

[platform/kernel/u-boot.git] / include / configs / spieval.h

diff --git a/include/configs/spieval.h b/include/configs/spieval.h
index 9ebb51e..fd138a5 100644 (file)
--- a/include/configs/spieval.h
+++ b/include/configs/spieval.h
@@ -219,17 +219,17 @@
 /*
  * IPB Bus clocking configuration.
  */
-#define CFG_IPBSPEED_133               /* define for 133MHz speed */
+#define CFG_IPBCLK_EQUALS_XLBCLK               /* define for 133MHz speed */
 
-#if defined(CFG_IPBSPEED_133)
+#if defined(CFG_IPBCLK_EQUALS_XLBCLK)
 /*
  * PCI Bus clocking configuration
  *
  * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
- * CFG_IPBSPEED_133 is defined. This is because a PCI Clock of 66 MHz yet hasn't
- * been tested with a IPB Bus Clock of 66 MHz.
+ * CFG_IPBCLK_EQUALS_XLBCLK is defined. This is because a PCI Clock 
+ * of 66 MHz yet hasn't been tested with a IPB Bus Clock of 66 MHz.
  */
-#define CFG_PCISPEED_66                        /* define for 66MHz speed */
+#define CFG_PCICLK_EQUALS_IPBCLK_DIV2  /* define for 66MHz speed */
 #endif
 
 /*
@@ -444,7 +444,7 @@
 
 #define CFG_BOOTCS_START       CFG_FLASH_BASE
 #define CFG_BOOTCS_SIZE                CFG_FLASH_SIZE
-#ifdef CFG_PCISPEED_66
+#ifdef CFG_PCICLK_EQUALS_IPBCLK_DIV2
 #define CFG_BOOTCS_CFG         0x0008DF30 /* for pci_clk  = 66 MHz */
 #else
 #define CFG_BOOTCS_CFG         0x0004DF30 /* for pci_clk = 33 MHz */
@@ -452,32 +452,25 @@
 #define CFG_CS0_START          CFG_FLASH_BASE
 #define CFG_CS0_SIZE           CFG_FLASH_SIZE
 
-/* automatic configuration of chip selects */
-#ifdef CONFIG_CS_AUTOCONF
 #define CONFIG_LAST_STAGE_INIT
-#endif
 
 /*
  * SRAM - Do not map below 2 GB in address space, because this area is used
  * for SDRAM autosizing.
  */
-#if defined (CONFIG_CS_AUTOCONF)
 #define CFG_CS2_START          0xE5000000
 #define CFG_CS2_SIZE           0x100000        /* 1 MByte */
 #define CFG_CS2_CFG            0x0004D930
-#endif
 
 /*
  * Grafic controller - Do not map below 2 GB in address space, because this
  * area is used for SDRAM autosizing.
  */
-#if defined (CONFIG_CS_AUTOCONF)
 #define SM501_FB_BASE          0xE0000000
 #define CFG_CS1_START          (SM501_FB_BASE)
 #define CFG_CS1_SIZE           0x4000000       /* 64 MByte */
 #define CFG_CS1_CFG            0x8F48FF70
 #define SM501_MMIO_BASE                CFG_CS1_START + 0x03E00000
-#endif
 
 #define CFG_CS_BURST           0x00000000
 #define CFG_CS_DEADCYCLE       0x33333311      /* 1 dead cycle for flash and SM501 */