Convert CONFIG_SYS_MAX_NAND_DEVICE to Kconfig

[platform/kernel/u-boot.git] / include / configs / ls1021aqds.h

diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h
index 16c1741..a788c30 100644 (file)
--- a/include/configs/ls1021aqds.h
+++ b/include/configs/ls1021aqds.h
@@ -10,46 +10,19 @@
 #define CONFIG_SYS_INIT_RAM_ADDR       OCRAM_BASE_ADDR
 #define CONFIG_SYS_INIT_RAM_SIZE       OCRAM_SIZE
 
-#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
-#define CONFIG_QIXIS_I2C_ACCESS
-#endif
-
 #ifdef CONFIG_SD_BOOT
-#define CONFIG_SPL_MAX_SIZE            0x1a000
-#define CONFIG_SPL_STACK               0x1001d000
-#define CONFIG_SPL_PAD_TO              0x1c000
-
-#define CONFIG_SYS_SPL_MALLOC_START    (CONFIG_SYS_TEXT_BASE + \
-               CONFIG_SYS_MONITOR_LEN)
-#define CONFIG_SYS_SPL_MALLOC_SIZE     0x100000
-#define CONFIG_SPL_BSS_START_ADDR      0x80100000
-#define CONFIG_SPL_BSS_MAX_SIZE                0x80000
 #define CONFIG_SYS_MONITOR_LEN         0xc0000
 #endif
 
 #ifdef CONFIG_NAND_BOOT
-#define CONFIG_SPL_MAX_SIZE            0x1a000
-#define CONFIG_SPL_STACK               0x1001d000
-#define CONFIG_SPL_PAD_TO              0x1c000
-
 #define CONFIG_SYS_NAND_U_BOOT_SIZE    (400 << 10)
-#define CONFIG_SYS_NAND_U_BOOT_DST     CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_NAND_U_BOOT_DST     CONFIG_TEXT_BASE
+#define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_TEXT_BASE
 
-#define CONFIG_SYS_SPL_MALLOC_START    0x80200000
-#define CONFIG_SYS_SPL_MALLOC_SIZE     0x100000
-#define CONFIG_SPL_BSS_START_ADDR      0x80100000
-#define CONFIG_SPL_BSS_MAX_SIZE                0x80000
 #define CONFIG_SYS_MONITOR_LEN         0x80000
 #endif
 
 #define SPD_EEPROM_ADDRESS             0x51
-#define CONFIG_SYS_SPD_BUS_NUM         0
-
-#ifndef CONFIG_SYS_FSL_DDR4
-#define CONFIG_SYS_DDR_RAW_TIMING
-#endif
-#define CONFIG_DIMM_SLOTS_PER_CTLR     1
 
 #define CONFIG_SYS_DDR_SDRAM_BASE      0x80000000UL
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
@@ -92,15 +65,9 @@
                                        FTIM2_NOR_TWP(0x1c))
 #define CONFIG_SYS_NOR_FTIM3           0
 
-#define CONFIG_SYS_FLASH_QUIET_TEST
 #define CONFIG_FLASH_SHOW_PROGRESS     45
 #define CONFIG_SYS_WRITE_SWAPPED_DATA
 
-#define CONFIG_SYS_MAX_FLASH_SECT      1024    /* sectors per device */
-#define CONFIG_SYS_FLASH_ERASE_TOUT    60000   /* Flash Erase Timeout (ms) */
-#define CONFIG_SYS_FLASH_WRITE_TOUT    500     /* Flash Write Timeout (ms) */
-
-#define CONFIG_SYS_FLASH_EMPTY_INFO
 #define CONFIG_SYS_FLASH_BANKS_LIST    {CONFIG_SYS_FLASH_BASE_PHYS, \
                                        CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000}
 
@@ -140,13 +107,11 @@
 #define CONFIG_SYS_NAND_FTIM3           0x0
 
 #define CONFIG_SYS_NAND_BASE_LIST      { CONFIG_SYS_NAND_BASE }
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 #endif
 
 /*
  * QIXIS Definitions
  */
-#define CONFIG_FSL_QIXIS
 
 #ifdef CONFIG_FSL_QIXIS
 #define QIXIS_BASE                     0x7fb00000
@@ -280,10 +245,6 @@
 
 /* GPIO */
 
-/* EEPROM */
-#define CONFIG_SYS_I2C_EEPROM_NXID
-#define CONFIG_SYS_EEPROM_BUS_NUM              0
-
 /*
  * I2C bus multiplexer
  */
@@ -319,28 +280,10 @@
 #define TSEC1_PHYIDX                   0
 #define TSEC2_PHYIDX                   0
 #define TSEC3_PHYIDX                   0
-
-#define CONFIG_FSL_SGMII_RISER         1
-#define SGMII_RISER_PHY_OFFSET         0x1b
-
-#ifdef CONFIG_FSL_SGMII_RISER
-#define CONFIG_SYS_TBIPA_VALUE         8
-#endif
-
-#endif
-
-/* PCIe */
-#define CONFIG_PCIE1           /* PCIE controller 1 */
-#define CONFIG_PCIE2           /* PCIE controller 2 */
-
-#ifdef CONFIG_PCI
-#define CONFIG_PCI_SCAN_SHOW
 #endif
 
 #define CONFIG_PEN_ADDR_BIG_ENDIAN
-#define CONFIG_LAYERSCAPE_NS_ACCESS
 #define CONFIG_SMP_PEN_ADDR            0x01ee0200
-#define COUNTER_FREQUENCY              12500000
 
 #define CONFIG_HWCONFIG
 #define HWCONFIG_BUFFER_SIZE           256
@@ -366,16 +309,10 @@
 
 #define CONFIG_LS102XA_STREAM_ID
 
-#define CONFIG_SYS_INIT_SP_OFFSET \
-       (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
-       (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
 /*
  * Environment
  */
 
 #include <asm/fsl_secure_boot.h>
-#define CONFIG_SYS_BOOTM_LEN   (64 << 20) /* Increase max gunzip size */
 
 #endif