Convert CONFIG_SYS_MAX_NAND_DEVICE to Kconfig
[platform/kernel/u-boot.git] / include / configs / ls1021aqds.h
index 012b471..a788c30 100644 (file)
@@ -16,8 +16,8 @@
 
 #ifdef CONFIG_NAND_BOOT
 #define CONFIG_SYS_NAND_U_BOOT_SIZE    (400 << 10)
-#define CONFIG_SYS_NAND_U_BOOT_DST     CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_NAND_U_BOOT_DST     CONFIG_TEXT_BASE
+#define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_TEXT_BASE
 
 #define CONFIG_SYS_MONITOR_LEN         0x80000
 #endif
                                        FTIM2_NOR_TWP(0x1c))
 #define CONFIG_SYS_NOR_FTIM3           0
 
-#define CONFIG_SYS_FLASH_QUIET_TEST
 #define CONFIG_FLASH_SHOW_PROGRESS     45
 #define CONFIG_SYS_WRITE_SWAPPED_DATA
 
-#define CONFIG_SYS_MAX_FLASH_SECT      1024    /* sectors per device */
-#define CONFIG_SYS_FLASH_ERASE_TOUT    60000   /* Flash Erase Timeout (ms) */
-#define CONFIG_SYS_FLASH_WRITE_TOUT    500     /* Flash Write Timeout (ms) */
-
-#define CONFIG_SYS_FLASH_EMPTY_INFO
 #define CONFIG_SYS_FLASH_BANKS_LIST    {CONFIG_SYS_FLASH_BASE_PHYS, \
                                        CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000}
 
 #define CONFIG_SYS_NAND_FTIM3           0x0
 
 #define CONFIG_SYS_NAND_BASE_LIST      { CONFIG_SYS_NAND_BASE }
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 #endif
 
 /*
 
 /* GPIO */
 
-/* EEPROM */
-#define CONFIG_SYS_I2C_EEPROM_NXID
-#define CONFIG_SYS_EEPROM_BUS_NUM              0
-
 /*
  * I2C bus multiplexer
  */
 #define TSEC1_PHYIDX                   0
 #define TSEC2_PHYIDX                   0
 #define TSEC3_PHYIDX                   0
-
-#define CONFIG_FSL_SGMII_RISER         1
-#define SGMII_RISER_PHY_OFFSET         0x1b
-
-#ifdef CONFIG_FSL_SGMII_RISER
-#define CONFIG_SYS_TBIPA_VALUE         8
-#endif
-
-#endif
-
-/* PCIe */
-#define CONFIG_PCIE1           /* PCIE controller 1 */
-#define CONFIG_PCIE2           /* PCIE controller 2 */
-
-#ifdef CONFIG_PCI
-#define CONFIG_PCI_SCAN_SHOW
 #endif
 
 #define CONFIG_PEN_ADDR_BIG_ENDIAN
-#define CONFIG_LAYERSCAPE_NS_ACCESS
 #define CONFIG_SMP_PEN_ADDR            0x01ee0200
 
 #define CONFIG_HWCONFIG
  */
 
 #include <asm/fsl_secure_boot.h>
-#define CONFIG_SYS_BOOTM_LEN   (64 << 20) /* Increase max gunzip size */
 
 #endif