MPC5xxx: Change names of defines related to IPB and PCI clocks.
[platform/kernel/u-boot.git] / include / configs / TB5200.h
index d793847..b42cfb6 100644 (file)
 
 #undef CONFIG_BOOTARGS
 
+#if defined(CONFIG_TQM5200_B)
+#define CONFIG_EXTRA_ENV_SETTINGS                                      \
+       "netdev=eth0\0"                                                 \
+       "rootpath=/opt/eldk/ppc_6xx\0"                                  \
+       "ramargs=setenv bootargs root=/dev/ram rw\0"                    \
+       "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
+               "nfsroot=${serverip}:${rootpath}\0"                     \
+       "addip=setenv bootargs ${bootargs} "                            \
+               "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"      \
+               ":${hostname}:${netdev}:off panic=1\0"                  \
+       "flash_self=run ramargs addip;"                                 \
+               "bootm ${kernel_addr} ${ramdisk_addr}\0"                \
+       "flash_nfs=run nfsargs addip;"                                  \
+               "bootm ${kernel_addr}\0"                                \
+       "net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0"     \
+       "bootfile=/tftpboot/tqm5200/uImage\0"                           \
+       "load=tftp 200000 ${u-boot}\0"                                  \
+       "u-boot=/tftpboot/tqm5200/u-boot.bin\0"                         \
+       "update=protect off FC000000 FC07FFFF;"                         \
+               "erase FC000000 FC07FFFF;"                              \
+               "cp.b 200000 FC000000 ${filesize};"                     \
+               "protect on FC000000 FC07FFFF\0"                        \
+       ""
+#else
 #define CONFIG_EXTRA_ENV_SETTINGS                                      \
        "netdev=eth0\0"                                                 \
        "rootpath=/opt/eldk/ppc_6xx\0"                                  \
                "cp.b 200000 FC000000 ${filesize};"                     \
                "protect on FC000000 FC05FFFF\0"                        \
        ""
+#endif /* CONFIG_TQM5200_B */
 
 #define CONFIG_BOOTCOMMAND     "run net_nfs"
 
 /*
  * IPB Bus clocking configuration.
  */
-#define CFG_IPBSPEED_133               /* define for 133MHz speed */
+#define CFG_IPBCLK_EQUALS_XLBCLK               /* define for 133MHz speed */
 
-#if defined(CFG_IPBSPEED_133)
+#if defined(CFG_IPBCLK_EQUALS_XLBCLK)
 /*
  * PCI Bus clocking configuration
  *
  * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
- * CFG_IPBSPEED_133 is defined. This is because a PCI Clock of 66 MHz yet hasn't
- * been tested with a IPB Bus Clock of 66 MHz.
+ * CFG_IPBCLK_EQUALS_XLBCLK is defined. This is because a PCI Clock 
+ * of 66 MHz yet hasn't been tested with a IPB Bus Clock of 66 MHz.
  */
-#define CFG_PCISPEED_66                        /* define for 66MHz speed */
+#define CFG_PCICLK_EQUALS_IPBCLK_DIV2          /* define for 66MHz speed */
 #endif
 
 /*
  */
 #define CFG_FLASH_BASE         TEXT_BASE /* 0xFC000000 */
 
-/* use CFI flash driver if no module variant is spezified */
+/* use CFI flash driver */
 #define CFG_FLASH_CFI          1       /* Flash is CFI conformant */
 #define CFG_FLASH_CFI_DRIVER   1       /* Use the common driver */
 #define CFG_FLASH_BANKS_LIST   { CFG_BOOTCS_START }
 #define CFG_FLASH_EMPTY_INFO
 #define CFG_FLASH_SIZE         0x04000000 /* 64 MByte */
 #define CFG_MAX_FLASH_SECT     512     /* max num of sects on one chip */
-#undef CFG_FLASH_USE_BUFFER_WRITE      /* not supported yet for AMD */
+#define CFG_FLASH_USE_BUFFER_WRITE     1
 
 #if !defined(CFG_LOWBOOT)
 #define CFG_ENV_ADDR           (CFG_FLASH_BASE + 0x00760000 + 0x00800000)
 #else  /* CFG_LOWBOOT */
+#if defined(CONFIG_TQM5200_B)
+#define CFG_ENV_ADDR           (CFG_FLASH_BASE + 0x00080000)
+#else
 #define CFG_ENV_ADDR           (CFG_FLASH_BASE + 0x00060000)
+#endif /* CONFIG_TQM5200_B */
 #endif /* CFG_LOWBOOT */
 #define CFG_MAX_FLASH_BANKS    1       /* max num of flash banks
                                           (= chip selects) */
-#define CFG_FLASH_ERASE_TOUT   240000  /* Flash Erase Timeout (in ms)  */
-#define CFG_FLASH_WRITE_TOUT   500     /* Flash Write Timeout (in ms)  */
 
 /* Dynamic MTD partition support */
 #define CONFIG_JFFS2_CMDLINE
 #define MTDIDS_DEFAULT         "nor0=TQM5200-0"
+#if defined(CONFIG_TQM5200_B)
+#define MTDPARTS_DEFAULT       "mtdparts=TQM5200-0:768k(firmware),"    \
+                                               "1280k(kernel),"        \
+                                               "2m(initrd),"           \
+                                               "4m(small-fs),"         \
+                                               "16m(big-fs),"          \
+                                               "8m(misc)"
+#else
 #define MTDPARTS_DEFAULT       "mtdparts=TQM5200-0:640k(firmware),"    \
                                                "1408k(kernel),"        \
                                                "2m(initrd),"           \
                                                "4m(small-fs),"         \
                                                "16m(big-fs),"          \
                                                "8m(misc)"
+#endif /* CONFIG_TQM5200_B */
 
 /*
  * Environment settings
  */
 #define CFG_ENV_IS_IN_FLASH    1
 #define CFG_ENV_SIZE           0x10000
+#if defined(CONFIG_TQM5200_B)
+#define CFG_ENV_SECT_SIZE      0x40000
+#else
 #define CFG_ENV_SECT_SIZE      0x20000
 #define CFG_ENV_ADDR_REDUND    (CFG_ENV_ADDR + CFG_ENV_SECT_SIZE)
-#define        CFG_ENV_SIZE_REDUND     (CFG_ENV_SIZE)
+#define CFG_ENV_SIZE_REDUND    (CFG_ENV_SIZE)
+#endif /* CONFIG_TQM5200_B */
 
 /*
  * Memory map
 #   define CFG_RAMBOOT         1
 #endif
 
+#if defined(CONFIG_TQM5200_B)
+#define CFG_MONITOR_LEN                (512 << 10)     /* Reserve 512 kB for Monitor   */
+#else
 #define CFG_MONITOR_LEN                (384 << 10)     /* Reserve 384 kB for Monitor   */
+#endif /* CONFIG_TQM5200_B */
 #define CFG_MALLOC_LEN         (256 << 10)     /* Reserve 256 kB for malloc()  */
 #define CFG_BOOTMAPSZ          (8 << 20)       /* Initial Memory map for Linux */
 
 
 #define CFG_BOOTCS_START       CFG_FLASH_BASE
 #define CFG_BOOTCS_SIZE                CFG_FLASH_SIZE
-#ifdef CFG_PCISPEED_66
+#ifdef CFG_PCICLK_EQUALS_IPBCLK_DIV2
 #define CFG_BOOTCS_CFG         0x0008DF30 /* for pci_clk  = 66 MHz */
 #else
 #define CFG_BOOTCS_CFG         0x0004DF30 /* for pci_clk = 33 MHz */
 #define CFG_CS0_START          CFG_FLASH_BASE
 #define CFG_CS0_SIZE           CFG_FLASH_SIZE
 
-/* automatic configuration of chip selects */
-#ifdef CONFIG_CS_AUTOCONF
 #define CONFIG_LAST_STAGE_INIT
-#endif
 
 /*
  * SRAM - Do not map below 2 GB in address space, because this area is used
  * for SDRAM autosizing.
  */
-#if defined (CONFIG_CS_AUTOCONF)
 #define CFG_CS2_START          0xE5000000
 #define CFG_CS2_SIZE           0x100000        /* 1 MByte */
 #define CFG_CS2_CFG            0x0004D930
-#endif
 
 /*
  * Grafic controller - Do not map below 2 GB in address space, because this
  * area is used for SDRAM autosizing.
  */
-#if defined (CONFIG_CS_AUTOCONF)
 #define SM501_FB_BASE          0xE0000000
 #define CFG_CS1_START          (SM501_FB_BASE)
 #define CFG_CS1_SIZE           0x4000000       /* 64 MByte */
 #define CFG_CS1_CFG            0x8F48FF70
 #define SM501_MMIO_BASE                CFG_CS1_START + 0x03E00000
-#endif
 
 #define CFG_CS_BURST           0x00000000
 #define CFG_CS_DEADCYCLE       0x33333311      /* 1 dead cycle for flash and SM501 */