arm: Set TTB XN bit in case DCACHE_OFF for LPAE mode

[platform/kernel/u-boot.git] / arch / arm / lib / cache-cp15.c

diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c
index e9f9fc9..e9bbcf5 100644 (file)
--- a/arch/arm/lib/cache-cp15.c
+++ b/arch/arm/lib/cache-cp15.c
@@ -71,8 +71,13 @@ void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size,
 
        end = ALIGN(start + size, MMU_SECTION_SIZE) >> MMU_SECTION_SHIFT;
        start = start >> MMU_SECTION_SHIFT;
+#ifdef CONFIG_ARMV7_LPAE
+       debug("%s: start=%pa, size=%zu, option=%llx\n", __func__, &start, size,
+             option);
+#else
        debug("%s: start=%pa, size=%zu, option=0x%x\n", __func__, &start, size,
              option);
+#endif
        for (upto = start; upto < end; upto++)
                set_section_dcache(upto, option);