ARM: dts: sun8i: R40/T3: Sync from Linux v5.18-rc1
[platform/kernel/u-boot.git] / arch / arm / dts / sun8i-r40.dtsi
index d5ad3b9..03d3e5f 100644 (file)
                        clock-names = "ahb", "mmc";
                        resets = <&ccu RST_BUS_MMC3>;
                        reset-names = "ahb";
+                       pinctrl-0 = <&mmc3_pins>;
+                       pinctrl-names = "default";
                        interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
                        status = "disabled";
                        #address-cells = <1>;
                        #interrupt-cells = <3>;
                        #gpio-cells = <3>;
 
+                       can_ph_pins: can-ph-pins {
+                               pins = "PH20", "PH21";
+                               function = "can";
+                       };
+
+                       can_pa_pins: can-pa-pins {
+                               pins = "PA16", "PA17";
+                               function = "can";
+                       };
+
                        clk_out_a_pin: clk-out-a-pin {
                                pins = "PI12";
                                function = "clk_out_a";
                        };
 
                        /omit-if-no-ref/
+                       mmc3_pins: mmc3-pins {
+                               pins = "PI4", "PI5", "PI6",
+                                      "PI7", "PI8", "PI9";
+                               function = "mmc3";
+                               drive-strength = <30>;
+                               bias-pull-up;
+                       };
+
+                       /omit-if-no-ref/
                        spi0_pc_pins: spi0-pc-pins {
                                pins = "PC0", "PC1", "PC2";
                                function = "spi0";
                                function = "spi1";
                        };
 
+                       /omit-if-no-ref/
                        uart0_pb_pins: uart0-pb-pins {
                                pins = "PB22", "PB23";
                                function = "uart0";
                        };
 
+                       /omit-if-no-ref/
+                       uart2_pi_pins: uart2-pi-pins {
+                               pins = "PI18", "PI19";
+                               function = "uart2";
+                       };
+
+                       /omit-if-no-ref/
+                       uart2_rts_cts_pi_pins: uart2-rts-cts-pi-pins{
+                               pins = "PI16", "PI17";
+                               function = "uart2";
+                       };
+
+                       /omit-if-no-ref/
                        uart3_pg_pins: uart3-pg-pins {
                                pins = "PG6", "PG7";
                                function = "uart3";
                        };
 
+                       /omit-if-no-ref/
                        uart3_rts_cts_pg_pins: uart3-rts-cts-pg-pins {
                                pins = "PG8", "PG9";
                                function = "uart3";
                        };
+
+                       /omit-if-no-ref/
+                       uart4_pg_pins: uart4-pg-pins {
+                               pins = "PG10", "PG11";
+                               function = "uart4";
+                       };
+
+                       /omit-if-no-ref/
+                       uart5_ph_pins: uart5-ph-pins {
+                               pins = "PH6", "PH7";
+                               function = "uart5";
+                       };
+
+                       /omit-if-no-ref/
+                       uart7_pi_pins: uart7-pi-pins {
+                               pins = "PI20", "PI21";
+                               function = "uart7";
+                       };
+               };
+
+               timer@1c20c00 {
+                       compatible = "allwinner,sun4i-a10-timer";
+                       reg = <0x01c20c00 0x90>;
+                       interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&osc24M>;
                };
 
                wdt: watchdog@1c20c90 {
                        status = "disabled";
                };
 
+               i2s0: i2s@1c22000 {
+                       #sound-dai-cells = <0>;
+                       compatible = "allwinner,sun8i-r40-i2s",
+                                    "allwinner,sun8i-h3-i2s";
+                       reg = <0x01c22000 0x400>;
+                       interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&ccu CLK_BUS_I2S0>, <&ccu CLK_I2S0>;
+                       clock-names = "apb", "mod";
+                       resets = <&ccu RST_BUS_I2S0>;
+                       dmas = <&dma 3>, <&dma 3>;
+                       dma-names = "rx", "tx";
+               };
+
+               i2s1: i2s@1c22400 {
+                       #sound-dai-cells = <0>;
+                       compatible = "allwinner,sun8i-r40-i2s",
+                                    "allwinner,sun8i-h3-i2s";
+                       reg = <0x01c22400 0x400>;
+                       interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&ccu CLK_BUS_I2S1>, <&ccu CLK_I2S1>;
+                       clock-names = "apb", "mod";
+                       resets = <&ccu RST_BUS_I2S1>;
+                       dmas = <&dma 4>, <&dma 4>;
+                       dma-names = "rx", "tx";
+               };
+
+               i2s2: i2s@1c22800 {
+                       #sound-dai-cells = <0>;
+                       compatible = "allwinner,sun8i-r40-i2s",
+                                    "allwinner,sun8i-h3-i2s";
+                       reg = <0x01c22800 0x400>;
+                       interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&ccu CLK_BUS_I2S2>, <&ccu CLK_I2S2>;
+                       clock-names = "apb", "mod";
+                       resets = <&ccu RST_BUS_I2S2>;
+                       dmas = <&dma 6>, <&dma 6>;
+                       dma-names = "rx", "tx";
+               };
+
                ths: thermal-sensor@1c24c00 {
                        compatible = "allwinner,sun8i-r40-ths";
                        reg = <0x01c24c00 0x100>;
                        #size-cells = <0>;
                };
 
+               can0: can@1c2bc00 {
+                       compatible = "allwinner,sun8i-r40-can";
+                       reg = <0x01c2bc00 0x400>;
+                       interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&ccu CLK_BUS_CAN>;
+                       resets = <&ccu RST_BUS_CAN>;
+                       status = "disabled";
+               };
+
                i2c4: i2c@1c2c000 {
                        compatible = "allwinner,sun6i-a31-i2c";
                        reg = <0x01c2c000 0x400>;
                        reg-io-width = <1>;
                        interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&ccu CLK_BUS_HDMI0>, <&ccu CLK_HDMI_SLOW>,
-                                <&ccu CLK_HDMI>;
-                       clock-names = "iahb", "isfr", "tmds";
+                                <&ccu CLK_HDMI>, <&rtc 0>;
+                       clock-names = "iahb", "isfr", "tmds", "cec";
                        resets = <&ccu RST_BUS_HDMI1>;
                        reset-names = "ctrl";
                        phys = <&hdmi_phy>;