pre-silicon platforms (simulator and emulator):
-------------------------
- | FIT Image |
+ | FIT Image |
| (linux + DTB + RFS) |
------------------------- ----> 0x0120_0000
- | Debug Server FW |
+ | Debug Server FW |
------------------------- ----> 0x00C0_0000
- | AIOP FW |
+ | AIOP FW |
------------------------- ----> 0x0070_0000
- | MC FW |
+ | MC FW |
------------------------- ----> 0x006C_0000
- | MC DPL Blob |
+ | MC DPL Blob |
------------------------- ----> 0x0020_0000
- | BootLoader + Env|
+ | BootLoader + Env|
------------------------- ----> 0x0000_1000
- | PBI |
+ | PBI |
------------------------- ----> 0x0000_0080
- | RCW |
+ | RCW |
------------------------- ----> 0x0000_0000
32-MB NOR flash layout for pre-silicon platforms (simulator and emulator)
----------------------------------------- ----> 0x5_8790_0000 |
| FIT Image (linux + DTB + RFS) (40M) | |
----------------------------------------- ----> 0x5_8510_0000 |
- | PHY firmware (2M) | |
+ | PHY firmware (2M) | |
----------------------------------------- ----> 0x5_84F0_0000 | 64K
| Debug Server FW (2M) | | Alt
----------------------------------------- ----> 0x5_84D0_0000 | Bank
| AIOP FW (4M) | |
----------------------------------------- ----> 0x5_8490_0000 (vbank4)
- | MC DPC Blob (1M) | |
+ | MC DPC Blob (1M) | |
----------------------------------------- ----> 0x5_8480_0000 |
| MC DPL Blob (1M) | |
----------------------------------------- ----> 0x5_8470_0000 |
- | MC FW (4M) | |
+ | MC FW (4M) | |
----------------------------------------- ----> 0x5_8430_0000 |
- | BootLoader Environment (1M) | |
+ | BootLoader Environment (1M) | |
----------------------------------------- ----> 0x5_8420_0000 |
| BootLoader (1M) | |
----------------------------------------- ----> 0x5_8410_0000 |
- | RCW and PBI (1M) | |
+ | RCW and PBI (1M) | |
----------------------------------------- ----> 0x5_8400_0000 ---
| .. Unused .. (7M) | |
----------------------------------------- ----> 0x5_8390_0000 |
| FIT Image (linux + DTB + RFS) (40M) | |
----------------------------------------- ----> 0x5_8110_0000 |
- | PHY firmware (2M) | |
+ | PHY firmware (2M) | |
----------------------------------------- ----> 0x5_80F0_0000 | 64K
| Debug Server FW (2M) | | Bank
----------------------------------------- ----> 0x5_80D0_0000 |
| AIOP FW (4M) | |
----------------------------------------- ----> 0x5_8090_0000 (vbank0)
- | MC DPC Blob (1M) | |
+ | MC DPC Blob (1M) | |
----------------------------------------- ----> 0x5_8080_0000 |
| MC DPL Blob (1M) | |
----------------------------------------- ----> 0x5_8070_0000 |
- | MC FW (4M) | |
+ | MC FW (4M) | |
----------------------------------------- ----> 0x5_8030_0000 |
- | BootLoader Environment (1M) | |
+ | BootLoader Environment (1M) | |
----------------------------------------- ----> 0x5_8020_0000 |
| BootLoader (1M) | |
----------------------------------------- ----> 0x5_8010_0000 |
- | RCW and PBI (1M) | |
+ | RCW and PBI (1M) | |
----------------------------------------- ----> 0x5_8000_0000 ---
128-MB NOR flash layout for QDS and RDB boards
mcboottimeout: MC boot timeout in milliseconds. If this variable is not defined
the value CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS will be assumed.
-mcmemsize: MC DRAM block size. If this variable is not defined, the value
+mcmemsize: MC DRAM block size in hex. If this variable is not defined, the value
CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE will be assumed.
mcinitcmd: This environment variable is defined to initiate MC and DPL deployment
during U-boot booting.However the MC, DPC and DPL can be applied from
console independently.
The variable needs to be set from the console once and then on
- rebooting the parameters set in the varible will automatically be
+ rebooting the parameters set in the variable will automatically be
executed. The commmand is demostrated taking an example of mc boot
using NOR Flash i.e. MC, DPL, and DPC is stored in the NOR flash:
-------------------
Booting from NAND requires two images, RCW and u-boot-with-spl.bin.
The difference between NAND boot RCW image and NOR boot image is the PBI
-command sequence. Below is one example for PBI commands for QDS which uses
-NAND device with 2KB/page, block size 128KB.
+command sequence. Below is one example for PBI commands for LS2085AQDS which
+uses NAND device with 2KB/page, block size 128KB.
1) CCSR 4-byte write to 0x00e00404, data=0x00000000
2) CCSR 4-byte write to 0x00e00400, data=0x1800a000
With these two images in NAND device, the board can boot from NAND.
-Another example for RDB boards,
+Another example for LS2085ARDB boards,
1) CCSR 4-byte write to 0x00e00404, data=0x00000000
2) CCSR 4-byte write to 0x00e00400, data=0x1800a000
Notice the difference from QDS is SRC, SRC_ADDR and the offset of u-boot image
to match board NAND device with 4KB/page, block size 512KB.
+Note, LS2088A and LS1088A don't support booting from NAND.
+
+Booting from SD/eMMC
+-------------------
+Booting from SD/eMMC requires two images, RCW and u-boot-with-spl.bin.
+The difference between SD boot RCW image and QSPI-NOR boot image is the
+PBI command sequence. Below is one example for PBI commands for RDB
+and QDS which uses SD device with block size 512. Block location can be
+calculated by dividing offset with block size.
+
+1) Block Copy: SRC=0x0040, SRC_ADDR=0x00100000, DEST_ADDR=0x1800a000,
+BLOCK_SIZE=0x00016000
+
+This command copies u-boot image from SD device into OCRAM. The values
+need to adjust accordingly for SD/eMMC
+
+SRC should match the cfg_rcw_src, the reset config pins.
+ The value for source(SRC) can be 0x0040 or 0x0041
+ depending upon SD or eMMC.
+SRC_ADDR is the offset of u-boot-with-spl.bin image in SD device.
+ In the example above, 1MB. This is same as QSPI-NOR.
+DEST_ADDR is configured at 0x1800a000, matching bootloc set above.
+BLOCK_SIZE is the size to be copied by PBI.
+
+2) CCSR 4-byte write to 0x01e00404, data=0x00000000
+3) CCSR 4-byte write to 0x01e00400, data=0x1800a000
+The above two commands set bootloc register to 0x00000000_1800a000 where
+the u-boot code will be running in OCRAM.
+
+
+RCW image should be written at 8th block of device(SD/eMMC). Example of
+using u-boot command
+
+mmc erase 0x8 0x10
+mmc write <rcw image in memory> 0x8 <size of rcw in block count typical value=10>
+
+To form the SD-Boot image, build u-boot with SD config, for example,
+ls1088ardb_sdcard_qspi_defconfig. The image needed is u-boot-with-spl.bin.
+The u-boot image should be written to match SRC_ADDR, in above example
+offset 0x100000 in other work it means block location 0x800
+
+mmc erase 0x800 0x1800
+mmc write <u-boot image in memory> 0x800 <size of u-boot image in block count>
+
+With these two images in SD/eMMC device, the board can boot from SD/eMMC.
+
MMU Translation Tables
======================
projects / platform / kernel / u-boot.git / blobdiff