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Rename TEXT_BASE into CONFIG_SYS_TEXT_BASE
[platform/kernel/u-boot.git]
/
include
/
configs
/
smdk6400.h
diff --git
a/include/configs/smdk6400.h
b/include/configs/smdk6400.h
index
ea65c0e
..
451b534
100644
(file)
--- a/
include/configs/smdk6400.h
+++ b/
include/configs/smdk6400.h
@@
-2,7
+2,7
@@
* (C) Copyright 2002
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
* Marius Groeger <mgroeger@sysgo.de>
* (C) Copyright 2002
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
* Marius Groeger <mgroeger@sysgo.de>
- * Gary Jennejohn <gj@denx.de>
+ * Gary Jennejohn <g
ary
j@denx.de>
* David Mueller <d.mueller@elsoft.ch>
*
* (C) Copyright 2008
* David Mueller <d.mueller@elsoft.ch>
*
* (C) Copyright 2008
@@
-40,17
+40,21
@@
#define CONFIG_S3C64XX 1 /* in a SAMSUNG S3C64XX Family */
#define CONFIG_SMDK6400 1 /* on a SAMSUNG SMDK6400 Board */
#define CONFIG_S3C64XX 1 /* in a SAMSUNG S3C64XX Family */
#define CONFIG_SMDK6400 1 /* on a SAMSUNG SMDK6400 Board */
-#define CFG_SDRAM_BASE 0x50000000
+#define CONFIG_SKIP_RELOCATE_UBOOT
+
+#define CONFIG_PERIPORT_REMAP
+#define CONFIG_PERIPORT_BASE 0x70000000
+#define CONFIG_PERIPORT_SIZE 0x13
+
+#define CONFIG_SYS_SDRAM_BASE 0x50000000
/* input clock of PLL: SMDK6400 has 12MHz input clock */
#define CONFIG_SYS_CLK_FREQ 12000000
/* input clock of PLL: SMDK6400 has 12MHz input clock */
#define CONFIG_SYS_CLK_FREQ 12000000
-#if !defined(CONFIG_NAND_SPL) && (TEXT_BASE >= 0xc0000000)
+#if !defined(CONFIG_NAND_SPL) && (
CONFIG_SYS_
TEXT_BASE >= 0xc0000000)
#define CONFIG_ENABLE_MMU
#endif
#define CONFIG_ENABLE_MMU
#endif
-#define CONFIG_MEMORY_UPPER_CODE
-
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_CMDLINE_TAG
#define CONFIG_INITRD_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_CMDLINE_TAG
#define CONFIG_INITRD_TAG
@@
-63,29
+67,28
@@
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
-#undef CONFIG_SKIP_RELOCATE_UBOOT
-
/*
* Size of malloc() pool
*/
/*
* Size of malloc() pool
*/
-#define C
FG_MALLOC_LEN
(CONFIG_ENV_SIZE + 1024 * 1024)
-#define C
FG_GBL_DATA_SIZE
128 /* size in bytes for initial data */
+#define C
ONFIG_SYS_MALLOC_LEN
(CONFIG_ENV_SIZE + 1024 * 1024)
+#define C
ONFIG_SYS_GBL_DATA_SIZE
128 /* size in bytes for initial data */
/*
* Hardware drivers
*/
/*
* Hardware drivers
*/
-#define CONFIG_DRIVER_CS8900 1 /* we have a CS8900 on-board */
-#define CS8900_BASE 0x18800300
-#define CS8900_BUS16 1 /* follow the Linux driver */
+#define CONFIG_NET_MULTI
+#define CONFIG_CS8900 /* we have a CS8900 on-board */
+#define CONFIG_CS8900_BASE 0x18800300
+#define CONFIG_CS8900_BUS16 /* follow the Linux driver */
/*
* select serial console configuration
*/
#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on SMDK6400 */
/*
* select serial console configuration
*/
#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on SMDK6400 */
-#define C
FG_HUSH_PARSER
/* use "hush" command parser */
-#ifdef C
FG
_HUSH_PARSER
-#define C
FG_PROMPT_HUSH_PS2
"> "
+#define C
ONFIG_SYS_HUSH_PARSER
/* use "hush" command parser */
+#ifdef C
ONFIG_SYS
_HUSH_PARSER
+#define C
ONFIG_SYS_PROMPT_HUSH_PS2
"> "
#endif
#define CONFIG_CMDLINE_EDITING
#endif
#define CONFIG_CMDLINE_EDITING
@@
-104,7
+107,7
@@
#define CONFIG_CMD_REGINFO
#define CONFIG_CMD_LOADS
#define CONFIG_CMD_LOADB
#define CONFIG_CMD_REGINFO
#define CONFIG_CMD_LOADS
#define CONFIG_CMD_LOADB
-#define CONFIG_CMD_ENV
+#define CONFIG_CMD_
SAVE
ENV
#define CONFIG_CMD_NAND
#if defined(CONFIG_BOOT_ONENAND)
#define CONFIG_CMD_ONENAND
#define CONFIG_CMD_NAND
#if defined(CONFIG_BOOT_ONENAND)
#define CONFIG_CMD_ONENAND
@@
-126,22
+129,22
@@
/*
* Miscellaneous configurable options
*/
/*
* Miscellaneous configurable options
*/
-#define C
FG_LONGHELP
/* undef to save memory */
-#define C
FG_PROMPT
"SMDK6400 # " /* Monitor Command Prompt */
-#define C
FG_CBSIZE
256 /* Console I/O Buffer Size */
-#define C
FG_PBSIZE
384 /* Print Buffer Size */
-#define C
FG_MAXARGS
16 /* max number of command args */
-#define C
FG_BARGSIZE CFG_CBSIZE
/* Boot Argument Buffer Size */
+#define C
ONFIG_SYS_LONGHELP
/* undef to save memory */
+#define C
ONFIG_SYS_PROMPT
"SMDK6400 # " /* Monitor Command Prompt */
+#define C
ONFIG_SYS_CBSIZE
256 /* Console I/O Buffer Size */
+#define C
ONFIG_SYS_PBSIZE
384 /* Print Buffer Size */
+#define C
ONFIG_SYS_MAXARGS
16 /* max number of command args */
+#define C
ONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/* Boot Argument Buffer Size */
-#define C
FG_MEMTEST_START CFG_SDRAM_BASE
/* memtest works on */
-#define C
FG_MEMTEST_END (CFG
_SDRAM_BASE + 0x7e00000) /* 126MB in DRAM */
+#define C
ONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
/* memtest works on */
+#define C
ONFIG_SYS_MEMTEST_END (CONFIG_SYS
_SDRAM_BASE + 0x7e00000) /* 126MB in DRAM */
-#define C
FG_LOAD_ADDR CFG_SDRAM_BASE
/* default load address */
+#define C
ONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE
/* default load address */
-#define C
FG_HZ
1000
+#define C
ONFIG_SYS_HZ
1000
/* valid baudrates */
/* valid baudrates */
-#define C
FG_BAUDRATE_TABLE
{ 9600, 19200, 38400, 57600, 115200 }
+#define C
ONFIG_SYS_BAUDRATE_TABLE
{ 9600, 19200, 38400, 57600, 115200 }
/*-----------------------------------------------------------------------
* Stack sizes
/*-----------------------------------------------------------------------
* Stack sizes
@@
-171,30
+174,30
@@
/* SMDK6400 has 2 banks of DRAM, but we use only one in U-Boot */
#define CONFIG_NR_DRAM_BANKS 1
/* SMDK6400 has 2 banks of DRAM, but we use only one in U-Boot */
#define CONFIG_NR_DRAM_BANKS 1
-#define PHYS_SDRAM_1 C
FG_SDRAM_BASE
/* SDRAM Bank #1 */
+#define PHYS_SDRAM_1 C
ONFIG_SYS_SDRAM_BASE
/* SDRAM Bank #1 */
#define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB in Bank #1 */
#define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB in Bank #1 */
-#define C
FG_FLASH_BASE
0x10000000
-#define C
FG_MONITOR_BASE
0x00000000
+#define C
ONFIG_SYS_FLASH_BASE
0x10000000
+#define C
ONFIG_SYS_MONITOR_BASE
0x00000000
/*-----------------------------------------------------------------------
* FLASH and environment organization
*/
/*-----------------------------------------------------------------------
* FLASH and environment organization
*/
-#define C
FG_MAX_FLASH_BANKS
1 /* max number of memory banks */
+#define C
ONFIG_SYS_MAX_FLASH_BANKS
1 /* max number of memory banks */
/* AM29LV160B has 35 sectors, AM29LV800B - 19 */
/* AM29LV160B has 35 sectors, AM29LV800B - 19 */
-#define C
FG_MAX_FLASH_SECT
40
+#define C
ONFIG_SYS_MAX_FLASH_SECT
40
#define CONFIG_AMD_LV800
#define CONFIG_AMD_LV800
-#define C
FG_FLASH_CFI
1 /* Use CFI parameters (needed?) */
+#define C
ONFIG_SYS_FLASH_CFI
1 /* Use CFI parameters (needed?) */
/* Use drivers/cfi_flash.c, even though the flash is not CFI-compliant */
#define CONFIG_FLASH_CFI_DRIVER 1
/* Use drivers/cfi_flash.c, even though the flash is not CFI-compliant */
#define CONFIG_FLASH_CFI_DRIVER 1
-#define C
FG_FLASH_CFI_WIDTH
FLASH_CFI_16BIT
+#define C
ONFIG_SYS_FLASH_CFI_WIDTH
FLASH_CFI_16BIT
#define CONFIG_FLASH_CFI_LEGACY
#define CONFIG_FLASH_CFI_LEGACY
-#define C
FG
_FLASH_LEGACY_512Kx16
+#define C
ONFIG_SYS
_FLASH_LEGACY_512Kx16
/* timeout values are in ticks */
/* timeout values are in ticks */
-#define C
FG_FLASH_ERASE_TOUT (5 * CFG_HZ) /* Timeout for Flash Erase
*/
-#define C
FG_FLASH_WRITE_TOUT (5 * CFG_HZ) /* Timeout for Flash Write
*/
+#define C
ONFIG_SYS_FLASH_ERASE_TOUT (5 * CONFIG_SYS_HZ) /* Timeout for Flash Erase
*/
+#define C
ONFIG_SYS_FLASH_WRITE_TOUT (5 * CONFIG_SYS_HZ) /* Timeout for Flash Write
*/
#define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */
#define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */
@@
-205,65
+208,67
@@
#define CONFIG_IDENT_STRING " for SMDK6400"
/* base address for uboot */
#define CONFIG_IDENT_STRING " for SMDK6400"
/* base address for uboot */
-#define C
FG_PHY_UBOOT_BASE (CFG
_SDRAM_BASE + 0x07e00000)
+#define C
ONFIG_SYS_PHY_UBOOT_BASE (CONFIG_SYS
_SDRAM_BASE + 0x07e00000)
/* total memory available to uboot */
/* total memory available to uboot */
-#define CFG_UBOOT_SIZE (1024 * 1024)
+#define CONFIG_SYS_UBOOT_SIZE (1024 * 1024)
+
+/* Put environment copies after the end of U-Boot owned RAM */
+#define CONFIG_NAND_ENV_DST (CONFIG_SYS_UBOOT_BASE + CONFIG_SYS_UBOOT_SIZE)
#ifdef CONFIG_ENABLE_MMU
#ifdef CONFIG_ENABLE_MMU
-#define C
FG_MAPPED_RAM_BASE
0xc0000000
+#define C
ONFIG_SYS_MAPPED_RAM_BASE
0xc0000000
#define CONFIG_BOOTCOMMAND "nand read 0xc0018000 0x60000 0x1c0000;" \
"bootm 0xc0018000"
#else
#define CONFIG_BOOTCOMMAND "nand read 0xc0018000 0x60000 0x1c0000;" \
"bootm 0xc0018000"
#else
-#define C
FG_MAPPED_RAM_BASE CFG
_SDRAM_BASE
+#define C
ONFIG_SYS_MAPPED_RAM_BASE CONFIG_SYS
_SDRAM_BASE
#define CONFIG_BOOTCOMMAND "nand read 0x50018000 0x60000 0x1c0000;" \
"bootm 0x50018000"
#endif
/* NAND U-Boot load and start address */
#define CONFIG_BOOTCOMMAND "nand read 0x50018000 0x60000 0x1c0000;" \
"bootm 0x50018000"
#endif
/* NAND U-Boot load and start address */
-#define C
FG_UBOOT_BASE (CFG
_MAPPED_RAM_BASE + 0x07e00000)
+#define C
ONFIG_SYS_UBOOT_BASE (CONFIG_SYS
_MAPPED_RAM_BASE + 0x07e00000)
#define CONFIG_ENV_OFFSET 0x0040000
/* NAND configuration */
#define CONFIG_ENV_OFFSET 0x0040000
/* NAND configuration */
-#define CFG_MAX_NAND_DEVICE 1
-#define CFG_NAND_BASE 0x70200010
-#define NAND_MAX_CHIPS 1
-#define CFG_S3C_NAND_HWECC
+#define CONFIG_SYS_MAX_NAND_DEVICE 1
+#define CONFIG_SYS_NAND_BASE 0x70200010
+#define CONFIG_SYS_S3C_NAND_HWECC
-#define C
FG_NAND_SKIP_BAD_DOT_I
1 /* ".i" read skips bad blocks */
-#define C
FG_NAND_WP
1
-#define C
FG_NAND_YAFFS_WRITE
1 /* support yaffs write */
-#define C
FG_NAND_BBT_2NDPAGE
1 /* bad-block markers in 1st and 2nd pages */
+#define C
ONFIG_SYS_NAND_SKIP_BAD_DOT_I
1 /* ".i" read skips bad blocks */
+#define C
ONFIG_SYS_NAND_WP
1
+#define C
ONFIG_SYS_NAND_YAFFS_WRITE
1 /* support yaffs write */
+#define C
ONFIG_SYS_NAND_BBT_2NDPAGE
1 /* bad-block markers in 1st and 2nd pages */
-#define C
FG_NAND_U_BOOT_DST CFG_PHY_UBOOT_BASE
/* NUB load-addr */
-#define C
FG_NAND_U_BOOT_START CFG_NAND_U_BOOT_DST
/* NUB start-addr */
+#define C
ONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_PHY_UBOOT_BASE
/* NUB load-addr */
+#define C
ONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST
/* NUB start-addr */
-#define C
FG_NAND_U_BOOT_OFFS
(4 * 1024) /* Offset to RAM U-Boot image */
-#define C
FG_NAND_U_BOOT_SIZE
(252 * 1024) /* Size of RAM U-Boot image */
+#define C
ONFIG_SYS_NAND_U_BOOT_OFFS
(4 * 1024) /* Offset to RAM U-Boot image */
+#define C
ONFIG_SYS_NAND_U_BOOT_SIZE
(252 * 1024) /* Size of RAM U-Boot image */
/* NAND chip page size */
/* NAND chip page size */
-#define C
FG_NAND_PAGE_SIZE
2048
+#define C
ONFIG_SYS_NAND_PAGE_SIZE
2048
/* NAND chip block size */
/* NAND chip block size */
-#define C
FG_NAND_BLOCK_SIZE
(128 * 1024)
+#define C
ONFIG_SYS_NAND_BLOCK_SIZE
(128 * 1024)
/* NAND chip page per block count */
/* NAND chip page per block count */
-#define C
FG_NAND_PAGE_COUNT
64
+#define C
ONFIG_SYS_NAND_PAGE_COUNT
64
/* Location of the bad-block label */
/* Location of the bad-block label */
-#define C
FG_NAND_BAD_BLOCK_POS
0
+#define C
ONFIG_SYS_NAND_BAD_BLOCK_POS
0
/* Extra address cycle for > 128MiB */
/* Extra address cycle for > 128MiB */
-#define C
FG
_NAND_5_ADDR_CYCLE
+#define C
ONFIG_SYS
_NAND_5_ADDR_CYCLE
/* Size of the block protected by one OOB (Spare Area in Samsung terminology) */
/* Size of the block protected by one OOB (Spare Area in Samsung terminology) */
-#define C
FG_NAND_ECCSIZE CFG
_NAND_PAGE_SIZE
+#define C
ONFIG_SYS_NAND_ECCSIZE CONFIG_SYS
_NAND_PAGE_SIZE
/* Number of ECC bytes per OOB - S3C6400 calculates 4 bytes ECC in 1-bit mode */
/* Number of ECC bytes per OOB - S3C6400 calculates 4 bytes ECC in 1-bit mode */
-#define C
FG_NAND_ECCBYTES
4
+#define C
ONFIG_SYS_NAND_ECCBYTES
4
/* Number of ECC-blocks per NAND page */
/* Number of ECC-blocks per NAND page */
-#define C
FG_NAND_ECCSTEPS (CFG_NAND_PAGE_SIZE / CFG
_NAND_ECCSIZE)
+#define C
ONFIG_SYS_NAND_ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / CONFIG_SYS
_NAND_ECCSIZE)
/* Size of a single OOB region */
/* Size of a single OOB region */
-#define C
FG_NAND_OOBSIZE
64
+#define C
ONFIG_SYS_NAND_OOBSIZE
64
/* Number of ECC bytes per page */
/* Number of ECC bytes per page */
-#define C
FG_NAND_ECCTOTAL (CFG_NAND_ECCBYTES * CFG
_NAND_ECCSTEPS)
+#define C
ONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * CONFIG_SYS
_NAND_ECCSTEPS)
/* ECC byte positions */
/* ECC byte positions */
-#define C
FG_NAND_ECCPOS
{40, 41, 42, 43, 44, 45, 46, 47, \
+#define C
ONFIG_SYS_NAND_ECCPOS
{40, 41, 42, 43, 44, 45, 46, 47, \
48, 49, 50, 51, 52, 53, 54, 55, \
56, 57, 58, 59, 60, 61, 62, 63}
48, 49, 50, 51, 52, 53, 54, 55, \
56, 57, 58, 59, 60, 61, 62, 63}
@@
-289,12
+294,12
@@
#if !defined(CONFIG_ENABLE_MMU)
#define CONFIG_CMD_USB 1
#if !defined(CONFIG_ENABLE_MMU)
#define CONFIG_CMD_USB 1
+#define CONFIG_USB_S3C64XX
#define CONFIG_USB_OHCI_NEW 1
#define CONFIG_USB_OHCI_NEW 1
-#define CFG_USB_OHCI_REGS_BASE 0x74300000
-#define CFG_USB_OHCI_SLOT_NAME "s3c6400"
-#define CFG_USB_OHCI_MAX_ROOT_PORTS 3
-#define CFG_USB_OHCI_CPU_INIT 1
-#define LITTLEENDIAN 1 /* used by usb_ohci.c */
+#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x74300000
+#define CONFIG_SYS_USB_OHCI_SLOT_NAME "s3c6400"
+#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 3
+#define CONFIG_SYS_USB_OHCI_CPU_INIT 1
#define CONFIG_USB_STORAGE 1
#endif
#define CONFIG_USB_STORAGE 1
#endif