-#define CFG_NAND_SELECT_DEVICE 1
-#define CFG_NAND_CS_DIST 0x200
-
-#define CFG_NAND_SIZE 0x8000
-#define CFG_NAND0_BASE (CFG_CCSRBAR + 0x03010000)
-#define CFG_NAND1_BASE (CFG_NAND0_BASE + CFG_NAND_CS_DIST)
-#define CFG_NAND2_BASE (CFG_NAND1_BASE + CFG_NAND_CS_DIST)
-#define CFG_NAND3_BASE (CFG_NAND2_BASE + CFG_NAND_CS_DIST)
-
-#define CFG_MAX_NAND_DEVICE 2 /* Max number of NAND devices */
-#define NAND_MAX_CHIPS 1
-
-#if (CFG_MAX_NAND_DEVICE == 1)
-#define CFG_NAND_BASE_LIST { CFG_NAND0_BASE }
-#elif (CFG_MAX_NAND_DEVICE == 2)
-#define CFG_NAND_QUIET_TEST 1
-#define CFG_NAND_BASE_LIST { CFG_NAND0_BASE, \
- CFG_NAND1_BASE, \
-}
-#elif (CFG_MAX_NAND_DEVICE == 4)
-#define CFG_NAND_QUIET_TEST 1
-#define CFG_NAND_BASE_LIST { CFG_NAND0_BASE, \
- CFG_NAND1_BASE, \
- CFG_NAND2_BASE, \
- CFG_NAND3_BASE, \
-}
-#endif
+#define CONFIG_SYS_NAND_SELECT_DEVICE 1
+#define CONFIG_SYS_NAND_CS_DIST 0x200
+
+#define CONFIG_SYS_NAND_SIZE 0x8000
+#define CONFIG_SYS_NAND_BASE (CONFIG_SYS_CCSRBAR + 0x03010000)
+
+#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
+#define CONFIG_SYS_NAND_MAX_CHIPS 2 /* Number of chips per device */