include/dt-bindings/power/xlnx-zynqmp-power.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /*
   3  *  Copyright (C) 2018 Xilinx, Inc.
   4  */
   5
   6 #ifndef _DT_BINDINGS_ZYNQMP_POWER_H
   7 #define _DT_BINDINGS_ZYNQMP_POWER_H
   8
   9 #define         PD_RPU_0        6
  10 #define         PD_RPU_1        7
  11 #define         PD_OCM_BANK_0   11
  12 #define         PD_OCM_BANK_1   12
  13 #define         PD_OCM_BANK_2   13
  14 #define         PD_OCM_BANK_3   14
  15 #define         PD_TCM_BANK_0   15
  16 #define         PD_TCM_BANK_1   16
  17 #define         PD_TCM_BANK_2   17
  18 #define         PD_TCM_BANK_3   18
  19 #define         PD_USB_0        22
  20 #define         PD_USB_1        23
  21 #define         PD_TTC_0        24
  22 #define         PD_TTC_1        25
  23 #define         PD_TTC_2        26
  24 #define         PD_TTC_3        27
  25 #define         PD_SATA         28
  26 #define         PD_ETH_0        29
  27 #define         PD_ETH_1        30
  28 #define         PD_ETH_2        31
  29 #define         PD_ETH_3        32
  30 #define         PD_UART_0       33
  31 #define         PD_UART_1       34
  32 #define         PD_SPI_0        35
  33 #define         PD_SPI_1        36
  34 #define         PD_I2C_0        37
  35 #define         PD_I2C_1        38
  36 #define         PD_SD_0         39
  37 #define         PD_SD_1         40
  38 #define         PD_DP           41
  39 #define         PD_GDMA         42
  40 #define         PD_ADMA         43
  41 #define         PD_NAND         44
  42 #define         PD_QSPI         45
  43 #define         PD_GPIO         46
  44 #define         PD_CAN_0        47
  45 #define         PD_CAN_1        48
  46 #define         PD_GPU          58
  47 #define         PD_PCIE         59
  48 #define         PD_PL           69
  49
  50 #endif