include/configs/cgtqmx8.h

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright 2017-2018 NXP
   4  * Copyright 2018 congatec AG
   5  *
   6  */
   7
   8 #ifndef __CGTQMX8_H
   9 #define __CGTQMX8_H
  10
  11 #include <linux/sizes.h>
  12 #include <asm/arch/imx-regs.h>
  13
  14 #ifdef CONFIG_SPL_BUILD
  15 #define CONFIG_SPL_MAX_SIZE                             (124 * 1024)
  16 #define CONFIG_SYS_MONITOR_LEN                          (1024 * 1024)
  17
  18 #define CONFIG_SPL_STACK                0x013E000
  19 #define CONFIG_SPL_BSS_START_ADDR       0x00128000
  20 #define CONFIG_SPL_BSS_MAX_SIZE         0x1000  /* 4 KB */
  21 #define CONFIG_SYS_SPL_MALLOC_START     0x00120000
  22 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x3000  /* 12 KB */
  23 #define CONFIG_SERIAL_LPUART_BASE       0x5a060000
  24 #define CONFIG_MALLOC_F_ADDR            0x00120000
  25
  26 #define CONFIG_SPL_RAW_IMAGE_ARM_TRUSTED_FIRMWARE
  27
  28 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
  29 #endif
  30
  31 #define CONFIG_REMAKE_ELF
  32
  33 /* Flat Device Tree Definitions */
  34
  35 #define CONFIG_SYS_BOOTMAPSZ            (256 << 20)
  36 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
  37 #define USDHC1_BASE_ADDR                0x5B010000
  38 #define USDHC2_BASE_ADDR                0x5B020000
  39 #define USDHC3_BASE_ADDR                0x5B030000
  40
  41 /* Boot M4 */
  42 #define M4_BOOT_ENV \
  43         "m4_0_image=m4_0.bin\0" \
  44         "m4_1_image=m4_1.bin\0" \
  45         "loadm4image_0=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4_0_image}\0" \
  46         "loadm4image_1=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4_1_image}\0" \
  47         "m4boot_0=run loadm4image_0; dcache flush; bootaux ${loadaddr} 0\0" \
  48         "m4boot_1=run loadm4image_1; dcache flush; bootaux ${loadaddr} 1\0" \
  49
  50 #ifdef CONFIG_NAND_BOOT
  51 #define MFG_NAND_PARTITION "mtdparts=gpmi-nand:128m(boot),32m(kernel),16m(dtb),8m(misc),-(rootfs) "
  52 #else
  53 #define MFG_NAND_PARTITION ""
  54 #endif
  55 #define FEC0_RESET IMX_GPIO_NR(2, 5)
  56 #define FEC0_PDOMAIN "conn_enet0"
  57
  58 #define CONFIG_MFG_ENV_SETTINGS \
  59         "mfgtool_args=setenv bootargs console=${console},${baudrate} " \
  60                 "rdinit=/linuxrc " \
  61                 "g_mass_storage.stall=0 g_mass_storage.removable=1 " \
  62                 "g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\
  63                 "g_mass_storage.iSerialNumber=\"\" "\
  64                 MFG_NAND_PARTITION \
  65                 "clk_ignore_unused "\
  66                 "\0" \
  67         "initrd_addr=0x83800000\0" \
  68         "bootcmd_mfg=run mfgtool_args;booti ${loadaddr} ${initrd_addr} ${fdt_addr};\0" \
  69
  70 /* Initial environment variables */
  71 #define CONFIG_EXTRA_ENV_SETTINGS               \
  72         CONFIG_MFG_ENV_SETTINGS \
  73         M4_BOOT_ENV \
  74         "script=boot.scr\0" \
  75         "image=Image\0" \
  76         "panel=NULL\0" \
  77         "console=ttyLP0\0" \
  78         "fdt_addr=0x83000000\0"                 \
  79         "boot_fdt=try\0" \
  80         "fdt_file=imx8qm-cgt-qmx8.dtb\0" \
  81         "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
  82         "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
  83         "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
  84         "mmcautodetect=yes\0" \
  85         "mmcargs=setenv bootargs console=${console},${baudrate} root=${mmcroot} earlycon\0 " \
  86         "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
  87         "bootscript=echo Running bootscript from mmc ...; " \
  88                 "source\0" \
  89         "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
  90         "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
  91         "mmcboot=echo Booting from mmc ...; " \
  92                 "run mmcargs; " \
  93                 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
  94                         "if run loadfdt; then " \
  95                                 "booti ${loadaddr} - ${fdt_addr}; " \
  96                         "else " \
  97                                 "echo WARN: Cannot load the DT; " \
  98                         "fi; " \
  99                 "else " \
 100                         "echo wait for boot; " \
 101                 "fi;\0" \
 102         "netargs=setenv bootargs console=${console},${baudrate} " \
 103                 "root=/dev/nfs " \
 104                 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp rw earlycon\0" \
 105         "netboot=echo Booting from net ...; " \
 106                 "run netargs;  " \
 107                 "if test ${ip_dyn} = yes; then " \
 108                         "setenv get_cmd dhcp; " \
 109                 "else " \
 110                         "setenv get_cmd tftp; " \
 111                 "fi; " \
 112                 "${get_cmd} ${loadaddr} ${image}; " \
 113                 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
 114                         "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
 115                                 "booti ${loadaddr} - ${fdt_addr}; " \
 116                         "else " \
 117                                 "echo WARN: Cannot load the DT; " \
 118                         "fi; " \
 119                 "else " \
 120                         "booti; " \
 121                 "fi;\0"
 122
 123 /* Link Definitions */
 124
 125 #define CONFIG_SYS_INIT_SP_ADDR         0x80200000
 126
 127 #define CONFIG_SYS_MMC_IMG_LOAD_PART    1
 128
 129 #define CONFIG_MMCROOT                  "/dev/mmcblk1p2"  /* USDHC2 */
 130 #define CONFIG_SYS_FSL_USDHC_NUM        3
 131
 132 #define CONFIG_SYS_SDRAM_BASE           0x80000000
 133 #define PHYS_SDRAM_1                    0x80000000
 134 #define PHYS_SDRAM_2                    0x880000000
 135 #define PHYS_SDRAM_1_SIZE               0x80000000      /* 2 GB */
 136 #define PHYS_SDRAM_2_SIZE               0x100000000     /* 4 GB */
 137
 138 /* Generic Timer Definitions */
 139 #define COUNTER_FREQUENCY               8000000 /* 8MHz */
 140
 141 /* Networking */
 142 #define CONFIG_FEC_MXC_PHYADDR          -1
 143 #define CONFIG_FEC_XCV_TYPE             RGMII
 144 #define FEC_QUIRK_ENET_MAC
 145
 146 #endif /* __CGTQMX8_H */