1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * (C) Copyright 2007-2008
4 * Stelian Pop <stelian@popies.net>
5 * Lead Tech Design <www.leadtechdesign.com>
7 * Configuation settings for the AT91SAM9261EK board.
13 /* ARM asynchronous clock */
14 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
15 #define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */
17 #include <asm/hardware.h>
20 #define CONFIG_SYS_SDRAM_BASE 0x20000000
21 #define CONFIG_SYS_SDRAM_SIZE 0x04000000
22 #define CONFIG_SYS_INIT_RAM_SIZE (16 * 1024)
23 #define CONFIG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM
26 #ifdef CONFIG_CMD_NAND
27 #define CONFIG_SYS_NAND_BASE 0x40000000
28 #define CONFIG_SYS_NAND_DBW_8
30 #define CONFIG_SYS_NAND_MASK_ALE (1 << 22)
32 #define CONFIG_SYS_NAND_MASK_CLE (1 << 21)
33 #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
34 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC15
39 #define CONFIG_DM9000_BASE 0x30000000
40 #define DM9000_IO CONFIG_DM9000_BASE
41 #define DM9000_DATA (CONFIG_DM9000_BASE + 4)
42 #define CONFIG_DM9000_USE_16BIT
43 #define CONFIG_DM9000_NO_SROM
46 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9261_UHP_BASE */