2 * Copyright (C) 1999,2000 Erik Walthinsen <omega@cse.ogi.edu>
3 * 2000 Wim Taymans <wtay@chello.be>
5 * gstarch.h: Architecture-specific inclusions
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Library General Public
9 * License as published by the Free Software Foundation; either
10 * version 2 of the License, or (at your option) any later version.
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Library General Public License for more details.
17 * You should have received a copy of the GNU Library General Public
18 * License along with this library; if not, write to the
19 * Free Software Foundation, Inc., 59 Temple Place - Suite 330,
20 * Boston, MA 02111-1307, USA.
23 #ifndef __GST_GSTARCH_H__
24 #define __GST_GSTARCH_H__
32 /***** Intel x86 *****/
33 #if defined(HAVE_CPU_I386) && defined(__GNUC__)
34 #define GST_ARCH_SET_SP(stackpointer) \
35 __asm__( "movl %0, %%esp\n" : : "r"(stackpointer) );
37 #define GST_ARCH_CALL(target) \
38 __asm__("call *%0" : : "r"(target) );
40 /* assuming the stackframe is 16 bytes */
41 #define GST_ARCH_SETUP_STACK(sp) sp -= 4
46 #elif defined (HAVE_CPU_PPC) && defined(__GNUC__)
48 /* should bring this in line with others and use an "r" */
49 #define GST_ARCH_SET_SP(stackpointer) \
50 __asm__("lwz 1,%0" : : "m"(stackpointer))
52 #define GST_ARCH_CALL(target) \
53 __asm__( "mr 0,%0\n\t" \
55 "blrl" : : "r"(target) );
57 struct minimal_ppc_stackframe {
58 unsigned long back_chain;
59 unsigned long LR_save;
60 unsigned long unused1;
61 unsigned long unused2;
64 #define GST_ARCH_SETUP_STACK(sp) \
65 sp = ((unsigned long *)(sp)) - 4; \
66 ((struct minimal_ppc_stackframe *)sp)->back_chain = 0;
70 /***** DEC[/Compaq/HP?/Intel?] Alpha *****/
71 #elif defined(HAVE_CPU_ALPHA) && defined(__GNUC__)
73 #define GST_ARCH_SET_SP(stackpointer) \
74 __asm__("bis $31,%0,$30" : : "r"(stackpointer));
76 #define GST_ARCH_CALL(target) \
77 __asm__( "bis $31,%0,$27\n\t" \
78 "jsr $26,($27),0" : : "r"(target) );
80 /* Need to get more information about the stackframe format
81 * and get the fields more correct. Check GDB sources maybe?
83 struct minimal_stackframe {
84 unsigned long back_chain;
85 unsigned long LR_save;
86 unsigned long unused1;
87 unsigned long unused2;
90 #define GST_ARCH_SETUP_STACK(sp) \
91 sp = ((unsigned long *)(sp)) - 4; \
92 ((struct minimal_stackframe *)sp)->back_chain = 0;
97 #elif defined(HAVE_CPU_ARM) && defined(__GNUC__)
99 #define GST_ARCH_SET_SP(stackpointer) \
100 __asm__( "mov sp, %0" : : "r"(stackpointer));
102 #define GST_ARCH_CALL(target) \
103 __asm__( "mov pc, %0" : : "r"(target) );
105 /* Need to get more information about the stackframe format
106 * and get the fields more correct. Check GDB sources maybe?
108 #define GST_ARCH_SETUP_STACK(sp) sp -= 4
112 /***** Sun SPARC *****/
113 #elif defined(HAVE_CPU_SPARC) && defined(__GNUC__)
115 #define GST_ARCH_SET_SP(stackpointer) \
116 __asm__( "ta 3\n\t" \
117 "mov %0, %%sp" : : "r"(stackpointer));
119 #define GST_ARCH_CALL(target) \
120 __asm__( "call %0,0\n\t" \
121 "nop" : : "r"(target) );
123 #define GST_ARCH_PRESETJMP() \
126 /* Need to get more information about the stackframe format
127 * and get the fields more correct. Check GDB sources maybe?
129 #define GST_ARCH_SETUP_STACK(sp) sp -= 4
134 #elif defined(HAVE_CPU_MIPS) && defined(__GNUC__)
136 #define GST_ARCH_SET_SP(stackpointer) \
137 __asm__("lw $sp,0(%0)\n\t" : : "r"(stackpointer));
139 #define GST_ARCH_CALL(target) \
140 __asm__("lw $25,0(%0)\n\t" /* call via $25 */ \
141 "jal $25\n\t" : : "r"(target));
143 /* assuming the stackframe is 16 bytes */
144 #define GST_ARCH_SETUP_STACK(sp) sp -= 4
149 #elif defined(HAVE_CPU_HPPA) && defined(__GNUC__)
151 #define GST_ARCH_SET_SP(stackpointer) \
152 __asm__("copy %0,%%sp\n\t" : : "r"(stackpointer));
154 #define GST_ARCH_CALL(target) \
155 __asm__("copy %0,%%r22\n\t" /* set call address */ \
156 ".CALL\n\t" /* call pseudo insn (why?) */ \
157 "bl $$dyncall,%%r31\n\t" : : "r"(target));
159 /* assume stackframe is 16 bytes */
160 #define GST_ARCH_SETUP_STACK(sp) sp -= 4
163 #elif defined(HAVE_CPU_S390) && defined(__GNUC__)
165 #define GST_ARCH_SET_SP(stackpointer) \
166 __asm__("lr 15,%0" : : "r"(stackpointer))
168 #define GST_ARCH_CALL(target) \
169 __asm__( "basr 14,%0" : : "a"(target) );
171 struct minimal_s390_stackframe {
172 unsigned long back_chain;
173 unsigned long reserved;
174 unsigned long greg[14];
178 #define GST_ARCH_SETUP_STACK(sp) \
179 sp = ((unsigned long *)(sp)) - 24; \
180 ((struct minimal_s390_stackframe *)sp)->back_chain = 0;
183 #elif defined(HAVE_MAKECONTEXT)
185 /* If we have makecontext(), we'll be using that. */
186 #define USE_MAKECONTEXT 1
189 #error Need to know about this architecture, or have a generic implementation
192 #endif /* __GST_GSTARCH_H__ */