1 2013-11-17 H.J. Lu <hongjiu.lu@intel.com>
3 * config/tc-i386.c (reloc): Add an argument, bnd_prefix, to
4 indicate if instruction has the BND prefix. Return
5 BFD_RELOC_X86_64_PC32_BND instead of BFD_RELOC_32_PCREL if
7 (output_branch): Pass BFD_RELOC_X86_64_PC32_BND to frag_var
9 (output_jump): Update reloc call.
10 (output_interseg_jump): Likewise.
11 (output_disp): Likewise.
12 (output_imm): Likewise.
13 (x86_cons_fix_new): Likewise.
14 (lex_got): Add an argument, bnd_prefix, to indicate if
15 instruction has the BND prefix. Use BFD_RELOC_X86_64_PLT32_BND
17 (x86_cons): Update lex_got call.
18 (i386_immediate): Likewise.
19 (i386_displacement): Likewise.
20 (md_apply_fix): Handle BFD_RELOC_X86_64_PC32_BND and
21 BFD_RELOC_X86_64_PLT32_BND.
22 (tc_gen_reloc): Likewise.
23 * config/tc-i386-intel.c (i386_operator): Update lex_got call.
25 2013-11-15 Yufeng Zhang <yufeng.zhang@arm.com>
27 * config/tc-aarch64.c (set_other_error): New function.
28 (parse_sys_reg): Add new parameter 'sys_reg' and if non-NULL set
29 the variable to which it points with 'o'.
30 (parse_operands): Update; check for write to read-only system
31 registers or read from write-only ones.
34 2013-11-15 Michael Zolotukhin <michael.v.zolotukhin@gmail.com>
36 * config/tc-i386.c (check_VecOperands): Reorder checks.
38 2013-11-11 Catherine Moore <clm@codesourcery.com>
40 * config/mips/tc-mips.c (convert_reg_type): Use
41 INSN_LOAD_MEMORY instead of INSN_LOAD_MEMORY_DELAY.
42 (reg_needs_delay): Likewise.
43 (insns_between): Likewise.
45 2013-11-08 Jan-Benedict Glaw <jbglaw@lug-owl.de
47 * config/tc-ppc.c (ppc_elf_localentry): Add cast.
49 2013-11-05 Yufeng Zhang <yufeng.zhang@arm.com>
51 * config/tc-aarch64.c (parse_sys_reg): Update to use aarch64_sys_reg;
52 call aarch64_sys_reg_deprecated_p and warn about the deprecated
55 2013-11-05 Yufeng Zhang <yufeng.zhang@arm.com>
57 * config/tc-aarch64.c (parse_operands): Handle AARCH64_OPND_COND1.
59 2013-11-05 Will Newton <will.newton@linaro.org>
62 * config/tc-aarch64.c (parse_operands): Avoid trying to
63 parse a vector register as an immediate.
65 2013-11-04 Jan Beulich <jbeulich@suse.com>
67 * config/tc-i386.c (check_long_reg): Correct comment indentation.
68 (check_qword_reg): Correct comment and its indentation.
69 (check_word_reg): Extend comment and correct its indentation. Also
70 check for 64-bit register.
72 2013-10-30 Ulrich Weigand <uweigand@de.ibm.com>
74 * config/tc-ppc.c (md_pseudo_table): Add .localentry.
75 (ppc_elf_localentry): New function.
76 (ppc_force_relocation): Force relocs on all branches to localenty
78 (ppc_fix_adjustable): Don't reduce such symbols to section+offset.
80 2013-10-30 Alan Modra <amodra@gmail.com>
82 * config/tc-ppc.c: Include elf/ppc64.h.
83 (ppc_abiversion): New variable.
84 (md_pseudo_table): Add .abiversion.
85 (ppc_elf_abiversion, ppc_elf_end): New functions.
86 * config/tc-ppc.h (md_end): Define.
88 2013-10-30 Alan Modra <amodra@gmail.com>
90 * config/tc-ppc.c (SEX16): Don't mask.
91 (REPORT_OVERFLOW_HI): Define as zero.
92 (ppc_elf_suffix): Support @high, @higha, @dtprel@high, @dtprel@higha,
93 @tprel@high, and @tprel@higha modifiers.
94 (md_assemble): Ignore X_unsigned when applying 16-bit insn fields.
95 Add (disabled) code to check @h and @ha reloc overflow for powerpc64.
97 (md_apply_fix): Similarly.
99 2013-10-18 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
101 * config/tc-mips.c (fpr_read_mask): Test MSA registers.
102 (fpr_write_mask): Test MSA registers.
103 (can_swap_branch_p): Check fpr write followed by fpr read.
105 2013-10-18 Nick Clifton <nickc@redhat.com>
107 * config/tc-tic6x.c (tic6x_parse_operand): Revert previous delta.
109 2013-10-14 Richard Sandiford <rdsandiford@googlemail.com>
110 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
112 * config/tc-mips.c (options): Add OPTION_MSA and OPTION_NO_MSA.
113 (md_longopts): Add mmsa and mno-msa.
114 (mips_ases): Add msa.
115 (RTYPE_MASK): Update.
116 (RTYPE_MSA): New define.
117 (OT_REG_ELEMENT): Replace with...
118 (OT_INTEGER_INDEX, OT_REG_INDEX): ...these new operand types.
119 (mips_operand_token): Replace reg_element with index.
120 (mips_parse_argument_token): Treat vector indices as separate tokens.
121 Handle register indices.
122 (md_begin): Add MSA register names.
123 (operand_reg_mask): Handle cases for OP_IMM_INDEX and OP_REG_INDEX.
124 (convert_reg_type): Handle cases for OP_REG_MSA and OP_REG_MSA_CTRL.
125 (match_mdmx_imm_reg_operand): Update accordingly.
126 (match_imm_index_operand): New function.
127 (match_reg_index_operand): New function.
128 (match_operand): Handle cases for OP_IMM_INDEX and OP_REG_INDEX.
129 (md_convert_frag): Convert bz.b/h/w/d, bnz.b/h/w/d, bz.v bnz.v.
130 (md_show_usage): Print -mmsa and -mno-msa.
131 * doc/as.texinfo: Document -mmsa and -mno-msa.
132 * doc/c-mips.texi: Document -mmsa and -mno-msa.
133 Document .set msa and .set nomsa.
135 2013-10-14 Nick Clifton <nickc@redhat.com>
137 * read.c (add_include_dir): Use xrealloc.
138 * config/tc-score.c (do_macro_bcmp): Initialise inst_main.
139 * config/tc-tic6x.c (tic6x_parse_operand): Initialise second_reg.
141 2013-10-13 Sandra Loosemore <sandra@codesourcery.com>
143 * config/tc-nios2.c (nios2_consume_arg): Make the "ba" warning
144 also test/refer to "sstatus". Reformat the warning message.
146 2013-10-10 Sean Keys <skeys@ipdatasys.com>
148 * tc-xgate.c (xgate_find_match): Refactor opcode matching.
150 2013-10-10 Jan Beulich <jbeulich@suse.com>
152 * tc-i386-intel.c (i386_intel_simplify_register): Suppress base/index
153 swapping for bndmk, bndldx, and bndstx.
155 2013-10-09 Nick Clifton <nickc@redhat.com>
158 * config/tc-epiphany.c (md_convert_frag): Add missing break
162 * config/tc-mn10200.c (md_convert_frag): Add missing break
165 2013-10-08 Jan Beulich <jbeulich@suse.com>
167 * tc-i386.c (check_word_reg): Remove misplaced "else".
168 (check_long_reg): Restore symmetry with check_word_reg.
170 2013-10-08 Jan Beulich <jbeulich@suse.com>
172 * gas/config/tc-arm.c (do_t_push_pop): Honor inst.size_req. Simplify
175 2013-10-08 Nick Clifton <nickc@redhat.com>
177 * config/tc-msp430.c (msp430_operands): Accept "<foo>.a" as an alias
178 for "<foo>a". Issue error messages for unrecognised or corrrupt
181 2013-10-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
183 * config/tc-arm.c (do_t_mvn_tst): Use narrow form for tst when
186 2013-09-30 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
188 * config/tc-i386.c (cpu_arch): Add CPU_BDVER4_FLAGS.
189 * doc/c-i386.texi: Add -march=bdver4 option.
191 2013-09-20 Alan Modra <amodra@gmail.com>
193 * configure: Regenerate.
195 2013-09-18 Tristan Gingold <gingold@adacore.com>
197 * NEWS: Add marker for 2.24.
199 2013-09-18 Nick Clifton <nickc@redhat.com>
201 * config/tc-msp430.c (OPTION_MOVE_DATA): Define.
202 (move_data): New variable.
203 (md_parse_option): Parse -md.
204 (msp430_section): New function. Catch references to the .bss or
205 .data sections and generate a special symbol for use by the libcrt
207 (md_pseudo_table): Intercept .section directives.
208 (md_longopt): Add -md
209 (md_show_usage): Likewise.
210 (msp430_operands): Generate a warning message if a NOP is inserted
211 into the instruction stream.
212 * doc/c-msp430.texi (node MSP430 Options): Document -md option.
214 2013-09-17 Doug Gilmore <Doug.Gilmore@imgtec.com>
216 * config/tc-mips.c (mips_elf_final_processing): Set
217 EF_MIPS_FP64 for -mgp32 -mfp64, removing old FIXME.
219 2013-09-16 Will Newton <will.newton@linaro.org>
221 * config/tc-arm.c (do_neon_ld_st_interleave): Add constraint
222 disallowing element size 64 with interleave other than 1.
224 2013-09-12 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
226 * config/tc-mips.c (match_insn): Set error when $31 is used for
229 2013-09-04 Tristan Gingold <gingold@adacore.com>
231 * config/tc-ppc.c (md_apply_fix): Handle defined after use toc
234 2013-09-04 Roland McGrath <mcgrathr@google.com>
237 * config/tc-arm.c (T16_32_TAB): Add _udf.
238 (do_t_udf): New function.
241 2013-08-23 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
243 * config/rx-parse.y: Rearrange the components of a bison grammar to issue
244 assembler errors at correct position.
246 2013-08-23 Yuri Chornoivan <yurchor@ukr.net>
249 * config/tc-ia64.c: Fix typos.
250 * config/tc-sparc.c: Likewise.
251 * config/tc-z80.c: Likewise.
252 * doc/c-i386.texi: Likewise.
253 * doc/c-m32r.texi: Likewise.
255 2013-08-23 Will Newton <will.newton@linaro.org>
257 * config/tc-arm.c: (do_neon_ldx_stx): Add extra constraints
258 for pre-indexed addressing modes.
260 2013-08-21 Alan Modra <amodra@gmail.com>
262 * symbols.c (fb_label_instance_inc, fb_label_instance): Properly
263 range check label number for use with fb_low_counter array.
265 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
267 * config/tc-mips.c (mips_check_isa_supports_ase, reg_lookup)
268 (mips_parse_argument_token, validate_micromips_insn, md_begin)
269 (check_regno, match_float_constant, check_completed_insn, append_insn)
270 (match_insn, match_mips16_insn, match_insns, macro_start)
271 (macro_build_ldst_constoffset, load_register, macro, mips_ip)
272 (mips16_ip, mips_set_option_string, md_parse_option)
273 (mips_after_parse_args, mips_after_parse_args, md_pcrel_from)
274 (md_apply_fix, s_align, s_option, s_mipsset, s_tls_rel_directive)
275 (s_gpword, s_gpdword, s_ehword, s_nan, tc_gen_reloc, md_convert_frag)
276 (s_mips_end, s_mips_ent, s_mips_frame, s_mips_mask, mips_parse_cpu):
277 Start error messages with a lower-case letter. Do not end error
278 messages with a period. Wrap long messages to 80 character-lines.
279 Use "cannot" instead of "can't" and "can not".
281 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
283 * config/tc-mips.c (imm_expr): Expand comment.
284 (set_at, macro, mips16_macro): Expect imm_expr to be O_constant
287 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
289 * config/tc-mips.c (imm2_expr): Delete.
290 (md_assemble, match_insn, imm2_expr.X_op, mips_ip): Update accordingly.
292 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
294 * config/tc-mips.c (report_bad_range, report_bad_field): Delete.
295 (macro): Remove M_DEXT and M_DINS handling.
297 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
299 * config/tc-mips.c (mips_arg_info): Replace allow_nonconst and
300 lax_max with lax_match.
301 (match_int_operand): Update accordingly. Don't report an error
302 for !lax_match-only cases.
303 (match_insn): Replace more_alts with lax_match and use it to
304 initialize the mips_arg_info field. Add a complete_p parameter.
305 Handle implicit VU0 suffixes here.
306 (match_invalid_for_isa, match_insns, match_mips16_insns): New
308 (mips_ip, mips16_ip): Use them.
310 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
312 * config/tc-mips.c (match_expression): Report uses of registers here.
313 Add a "must be an immediate expression" error. Handle elided offsets
315 (match_int_operand): ...here.
317 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
319 * config/tc-mips.c (mips_arg_info): Remove soft_match.
320 (match_out_of_range, match_not_constant): New functions.
321 (match_const_int): Remove fallback parameter and check for soft_match.
322 Use match_not_constant.
323 (match_mapped_int_operand, match_addiusp_operand)
324 (match_perf_reg_operand, match_save_restore_list_operand)
325 (match_mdmx_imm_reg_operand): Update accordingly. Use
326 match_out_of_range and set_insn_error* instead of as_bad.
327 (match_int_operand): Likewise. Use match_not_constant in the
328 !allows_nonconst case.
329 (match_float_constant): Report invalid float constants.
330 (match_insn, match_mips16_insn): Remove soft_match code. Rely on
331 match_float_constant to check for invalid constants. Fail the
332 match if match_const_int or match_float_constant return false.
333 (mips_ip): Update accordingly.
334 (mips16_ip): Likewise. Undo null termination of instruction name
335 once lookup is complete.
337 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
339 * config/tc-mips.c (mips_insn_error_format): New enum.
340 (mips_insn_error): New struct.
341 (insn_error): Change to a mips_insn_error.
342 (clear_insn_error, set_insn_error_format, set_insn_error)
343 (set_insn_error_i, set_insn_error_ss, report_insn_error): New
345 (mips_parse_argument_token, md_assemble, match_insn)
346 (match_mips16_insn): Use them instead of manipulating insn_error
348 (mips_ip, mips16_ip): Likewise. Simplify control flow.
350 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
352 * config/tc-mips.c (normalize_constant_expr): Move further up file.
353 (normalize_address_expr): Likewise.
354 (match_insn, match_mips16_insn): New functions, split out from...
355 (mips_ip, mips16_ip): ...here.
357 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
359 * config/tc-mips.c (operand_reg_mask, match_operand): Handle
361 (mips_ip, mips16_ip): Use mips_optional_operand_p to check
362 for optional operands.
364 2013-08-16 Alan Modra <amodra@gmail.com>
366 * config/tc-ppc.c (ppc_elf_cons): Allow @l and other reloc
369 2013-08-16 Alan Modra <amodra@gmail.com>
371 * config/tc-ppc.c (ppc_elf_lcomm): Use subsection 1.
373 2013-08-14 David Edelsohn <dje.gcc@gmail.com>
375 * config/tc-ppc.c (ppc_comm): Accept optional fourth .lcomm
376 argument as alignment.
378 2013-08-09 Nick Clifton <nickc@redhat.com>
380 * config/tc-rl78.c (elf_flags): New variable.
381 (enum options): Add OPTION_G10.
382 (md_longopts): Add mg10.
383 (md_parse_option): Parse -mg10.
384 (rl78_elf_final_processing): New function.
385 * config/tc-rl78.c (tc_final_processing): Define.
386 * doc/c-rl78.texi: Document -mg10 option.
388 2013-08-06 Jürgen Urban <JuergenUrban@gmx.de>
390 * config/tc-mips.c (match_vu0_suffix_operand): Allow single-channel
391 suffixes to be elided too.
392 (mips_lookup_insn): Don't reject INSN2_VU0_CHANNEL_SUFFIX here.
393 (mips_ip): Assume .xyzw if no VU0 suffix is specified. Allow +N
396 2013-08-05 John Tytgat <john@bass-software.com>
398 * po/POTFILES.in: Regenerate.
400 2013-08-05 Eric Botcazou <ebotcazou@adacore.com>
401 Konrad Eisele <konrad@gaisler.com>
403 * config/tc-sparc.c (sparc_arch_types): Add leon.
404 (sparc_arch): Move sparc4 around and add leon.
405 (sparc_target_format): Document -Aleon.
406 * doc/c-sparc.texi: Likewise.
408 2013-08-05 Richard Sandiford <rdsandiford@googlemail.com>
410 * config/tc-mips.c (mips_lookup_insn): Make length and opend signed.
412 2013-08-04 Jürgen Urban <JuergenUrban@gmx.de>
413 Richard Sandiford <rdsandiford@googlemail.com>
415 * config/tc-mips.c (MAX_OPERANDS): Bump to 6.
416 (RWARN): Bump to 0x8000000.
417 (RTYPE_VI, RTYPE_VF, RTYPE_R5900_I, RTYPE_R5900_Q, RTYPE_R5900_R)
418 (RTYPE_R5900_ACC): New register types.
419 (RTYPE_MASK): Include them.
420 (R5900_I_NAMES, R5900_Q_NAMES, R5900_R_NAMES, R5900_ACC_NAMES): New
422 (reg_names): Include them.
423 (mips_parse_register_1): New function, split out from...
424 (mips_parse_register): ...here. Add a channels_ptr parameter.
425 Look for VU0 channel suffixes when nonnull.
426 (reg_lookup): Update the call to mips_parse_register.
427 (mips_parse_vu0_channels): New function.
428 (OT_CHANNELS, OT_DOUBLE_CHAR): New mips_operand_token_types.
429 (mips_operand_token): Add a "channels" field to the union.
430 Extend the comment above "ch" to OT_DOUBLE_CHAR.
431 (mips_parse_base_start): Match -- and ++. Handle channel suffixes.
432 (mips_parse_argument_token): Handle channel suffixes here too.
433 (validate_mips_insn): Handle INSN2_VU0_CHANNEL_SUFFIX.
434 Ignore OP_VU0_MATCH_SUFFIX when calculating the used bits.
436 (md_begin): Register $vfN and $vfI registers.
437 (operand_reg_mask): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
438 (convert_reg_type): Handle OP_REG_VI, OP_REG_VF, OP_REG_R5900_I,
439 OP_REG_R5900_Q, OP_REG_R5900_R and OP_REG_R5900_ACC.
440 (match_vu0_suffix_operand): New function.
441 (match_operand): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
442 (macro): Use "+7" rather than "E" for LDQ2 and STQ2.
443 (mips_lookup_insn): New function.
444 (mips_ip): Use it. Allow "+K" operands to be elided at the end
445 of an instruction. Handle '#' sequences.
447 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
449 * config/tc-mips.c (macro, mips16_macro): Create an array of operand
450 values and use it instead of sreg, treg, xreg, etc.
452 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
454 * config/tc-mips.c (match_int_operand): Use mips_int_operand_min
455 and mips_int_operand_max.
456 (mips16_immed_operand, mips16_immed_operands, MIPS16_NUM_IMMED):
458 (mips16_immed_operand, mips16_immed_in_range_p): New functions.
459 (mips16_immed, mips16_extended_frag): Use them. Use mips_int_operand
460 instead of mips16_immed_operand.
462 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
464 * config/tc-mips.c (mips16_macro): Don't use move_register.
465 (mips16_ip): Allow macros to use 'p'.
467 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
469 * config/tc-mips.c (MAX_OPERANDS): New macro.
470 (mips_operand_array): New structure.
471 (mips_operands, mips16_operands, micromips_operands): New arrays.
472 (micromips_to_32_reg_b_map, micromips_to_32_reg_c_map)
473 (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map)
474 (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map)
475 (micromips_to_32_reg_q_map): Delete.
476 (insn_operands, insn_opno, insn_extract_operand): New functions.
477 (validate_mips_insn): Take a mips_operand_array as argument and
478 use it to build up a list of operands. Extend to handle INSN_MACRO
480 (validate_mips16_insn): New function.
481 (validate_micromips_insn): Take a mips_operand_array as argument.
483 (md_begin): Initialize mips_operands, mips16_operands and
484 micromips_operands. Call validate_mips_insn and
485 validate_micromips_insn for macro instructions too.
486 Call validate_mips16_insn for MIPS16 instructions.
487 (insn_read_mask, insn_write_mask, operand_reg_mask, insn_reg_mask):
489 (gpr_read_mask, gpr_write_mask, fpr_read_mask, fpr_write_mask): Use
490 them. Handle INSN_UDI.
491 (get_append_method): Use gpr_read_mask.
493 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
495 * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same
496 flags for MIPS16 and non-MIPS16 instructions.
497 (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block.
498 (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too.
499 (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling.
500 (can_swap_branch_p, get_append_method): Use the same flags for MIPS16
501 and non-MIPS16 instructions. Fix formatting.
503 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
505 * config/tc-mips.c (reg_needs_delay): Move later in file.
507 (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND.
509 2013-07-26 Sergey Guriev <sergey.s.guriev@intel.com>
510 Alexander Ivchenko <alexander.ivchenko@intel.com>
511 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
512 Sergey Lega <sergey.s.lega@intel.com>
513 Anna Tikhonova <anna.tikhonova@intel.com>
514 Ilya Tocar <ilya.tocar@intel.com>
515 Andrey Turetskiy <andrey.turetskiy@intel.com>
516 Ilya Verbin <ilya.verbin@intel.com>
517 Kirill Yukhin <kirill.yukhin@intel.com>
518 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
520 * config/tc-i386-intel.c (O_zmmword_ptr): New.
521 (i386_types): Add zmmword.
522 (i386_intel_simplify_register): Allow regzmm.
523 (i386_intel_simplify): Handle zmmwords.
524 (i386_intel_operand): Handle RC/SAE, vector operations and
526 * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
527 (struct RC_Operation): New.
528 (struct Mask_Operation): New.
529 (struct Broadcast_Operation): New.
530 (vex_prefix): Size of bytes increased to 4 to support EVEX
532 (enum i386_error): Add new error codes: unsupported_broadcast,
533 broadcast_not_on_src_operand, broadcast_needed,
534 unsupported_masking, mask_not_on_destination, no_default_mask,
535 unsupported_rc_sae, rc_sae_operand_not_last_imm,
536 invalid_register_operand, try_vector_disp8.
537 (struct _i386_insn): Add new fields vrex, need_vrex, mask,
538 rounding, broadcast, memshift.
539 (struct RC_name): New.
540 (RC_NamesTable): New.
543 (extra_symbol_chars): Add '{'.
544 (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
545 (i386_operand_type): Add regzmm, regmask and vec_disp8.
546 (match_mem_size): Handle zmmwords.
547 (operand_type_match): Handle zmm-registers.
548 (mode_from_disp_size): Handle vec_disp8.
549 (fits_in_vec_disp8): New.
550 (md_begin): Handle {} properly.
551 (type_names): Add "rZMM", "Mask reg" and "Vector d8".
552 (build_vex_prefix): Handle vrex.
553 (build_evex_prefix): New.
554 (process_immext): Adjust to properly handle EVEX.
555 (md_assemble): Add EVEX encoding support.
556 (swap_2_operands): Correctly handle operands with masking,
557 broadcasting or RC/SAE.
558 (check_VecOperands): Support EVEX features.
559 (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
560 (match_template): Support regzmm and handle new error codes.
561 (process_suffix): Handle zmmwords and zmm-registers.
562 (check_byte_reg): Extend to zmm-registers.
563 (process_operands): Extend to zmm-registers.
564 (build_modrm_byte): Handle EVEX.
565 (output_insn): Adjust to properly handle EVEX case.
566 (disp_size): Handle vec_disp8.
567 (output_disp): Support compressed disp8*N evex feature.
568 (output_imm): Handle RC/SAE immediates properly.
569 (check_VecOperations): New.
570 (i386_immediate): Handle EVEX features.
571 (i386_index_check): Handle zmmwords and zmm-registers.
572 (RC_SAE_immediate): New.
573 (i386_att_operand): Handle EVEX features.
574 (parse_real_register): Add a check for ZMM/Mask registers.
575 (OPTION_MEVEXLIG): New.
576 (OPTION_MEVEXWIG): New.
577 (md_longopts): Add mevexlig and mevexwig.
578 (md_parse_option): Handle mevexlig and mevexwig options.
579 (md_show_usage): Add description for mevexlig and mevexwig.
580 * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
581 avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
583 2013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
585 * config/tc-i386.c (cpu_arch): Add .sha.
586 * doc/c-i386.texi: Document sha/.sha.
588 2013-07-24 Anna Tikhonova <anna.tikhonova@intel.com>
589 Kirill Yukhin <kirill.yukhin@intel.com>
590 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
592 * config/tc-i386.c (BND_PREFIX): New.
593 (struct _i386_insn): Add new field bnd_prefix.
594 (add_bnd_prefix): New.
596 (i386_operand_type): Add regbnd.
597 (md_assemble): Handle BND prefixes.
598 (parse_insn): Likewise.
599 (output_branch): Likewise.
600 (output_jump): Likewise.
601 (build_modrm_byte): Handle regbnd.
602 (OPTION_MADD_BND_PREFIX): New.
603 (md_longopts): Add entry for 'madd-bnd-prefix'.
604 (md_parse_option): Handle madd-bnd-prefix option.
605 (md_show_usage): Add description for madd-bnd-prefix
607 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
609 2013-07-24 Tristan Gingold <gingold@adacore.com>
611 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
614 2013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
616 * config/tc-s390.c (s390_machine): Don't force the .machine
617 argument to lower case.
619 2013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
621 * config/tc-arm.c (s_arm_arch_extension): Improve error message
622 for invalid extension.
624 2013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
626 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
627 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
628 (aarch64_abi): New variable.
629 (ilp32_p): Change to be a macro.
630 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
631 (struct aarch64_option_abi_value_table): New struct.
632 (aarch64_abis): New table.
633 (aarch64_parse_abi): New function.
634 (aarch64_long_opts): Add entry for -mabi=.
635 * doc/as.texinfo (Target AArch64 options): Document -mabi.
636 * doc/c-aarch64.texi: Likewise.
638 2013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
640 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
643 2013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
645 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
647 * config/rx-parse.y: (rx_check_float_support): Add function to
648 check floating point operation support for target RX100 and
650 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
651 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
652 RX200, RX600, and RX610
654 2013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
656 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
658 2013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
660 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
661 * doc/c-avr.texi: Likewise.
663 2013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
665 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
666 error with older GCCs.
667 (mips16_macro_build): Dereference args.
669 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
671 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
672 New functions, split out from...
673 (reg_lookup): ...here. Remove itbl support.
674 (reglist_lookup): Delete.
675 (mips_operand_token_type): New enum.
676 (mips_operand_token): New structure.
677 (mips_operand_tokens): New variable.
678 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
679 (mips_parse_arguments): New functions.
680 (md_begin): Initialize mips_operand_tokens.
681 (mips_arg_info): Add a token field. Remove optional_reg field.
682 (match_char, match_expression): New functions.
683 (match_const_int): Use match_expression. Remove "s" argument
684 and return a boolean result. Remove O_register handling.
685 (match_regno, match_reg, match_reg_range): New functions.
686 (match_int_operand, match_mapped_int_operand, match_msb_operand)
687 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
688 (match_addiusp_operand, match_clo_clz_dest_operand)
689 (match_lwm_swm_list_operand, match_entry_exit_operand)
690 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
691 (match_tied_reg_operand): Remove "s" argument and return a boolean
692 result. Match tokens rather than text. Update calls to
693 match_const_int. Rely on match_regno to call check_regno.
694 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
695 "arg" argument. Return a boolean result.
696 (parse_float_constant): Replace with...
697 (match_float_constant): ...this new function.
698 (match_operand): Remove "s" argument and return a boolean result.
699 Update calls to subfunctions.
700 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
701 rather than string-parsing routines. Update handling of optional
702 registers for token scheme.
704 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
706 * config/tc-mips.c (parse_float_constant): Split out from...
709 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
711 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
714 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
716 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
717 (match_entry_exit_operand): New function.
718 (match_save_restore_list_operand): Likewise.
719 (match_operand): Use them.
720 (check_absolute_expr): Delete.
721 (mips16_ip): Rewrite main parsing loop to use mips_operands.
723 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
725 * config/tc-mips.c: Enable functions commented out in previous patch.
726 (SKIP_SPACE_TABS): Move further up file.
727 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
728 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
729 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
730 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
731 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
732 (micromips_imm_b_map, micromips_imm_c_map): Delete.
733 (mips_lookup_reg_pair): Delete.
734 (macro): Use report_bad_range and report_bad_field.
735 (mips_immed, expr_const_in_range): Delete.
736 (mips_ip): Rewrite main parsing loop to use new functions.
738 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
740 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
741 Change return type to bfd_boolean.
742 (report_bad_range, report_bad_field): New functions.
743 (mips_arg_info): New structure.
744 (match_const_int, convert_reg_type, check_regno, match_int_operand)
745 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
746 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
747 (match_addiusp_operand, match_clo_clz_dest_operand)
748 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
749 (match_pc_operand, match_tied_reg_operand, match_operand)
750 (check_completed_insn): New functions, commented out for now.
752 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
754 * config/tc-mips.c (insn_insert_operand): New function.
755 (macro_build, mips16_macro_build): Put null character check
756 in the for loop and convert continues to breaks. Use operand
757 structures to handle constant operands.
759 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
761 * config/tc-mips.c (validate_mips_insn): Move further up file.
762 Add insn_bits and decode_operand arguments. Use the mips_operand
763 fields to work out which bits an operand occupies. Detect double
765 (validate_micromips_insn): Move further up file. Call into
768 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
770 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
772 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
774 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
776 (macro): Update accordingly.
778 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
780 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
782 (md_assemble): Remove imm_reloc handling.
783 (mips_ip): Update commentary. Use offset_expr and offset_reloc
784 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
785 Use a temporary array rather than imm_reloc when parsing
786 constant expressions. Remove imm_reloc initialization.
787 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
788 for the relaxable field. Use a relax_char variable to track the
789 type of this field. Remove imm_reloc initialization.
791 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
793 * config/tc-mips.c (mips16_ip): Handle "I".
795 2013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
797 * config/tc-mips.c (mips_flag_nan2008): New variable.
798 (options): Add OPTION_NAN enum value.
799 (md_longopts): Handle it.
800 (md_parse_option): Likewise.
801 (s_nan): New function.
802 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
803 (md_show_usage): Add -mnan.
805 * doc/as.texinfo (Overview): Add -mnan.
806 * doc/c-mips.texi (MIPS Opts): Document -mnan.
807 (MIPS NaN Encodings): New node. Document .nan directive.
808 (MIPS-Dependent): List the new node.
810 2013-07-09 Tristan Gingold <gingold@adacore.com>
812 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
814 2013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
816 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
817 for 'A' and assume that the constant has been elided if the result
820 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
822 * config/tc-mips.c (gprel16_reloc_p): New function.
823 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
825 (offset_high_part, small_offset_p): New functions.
826 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
827 register load and store macros, handle the 16-bit offset case first.
828 If a 16-bit offset is not suitable for the instruction we're
829 generating, load it into the temporary register using
830 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
831 M_L_DAB code once the address has been constructed. For double load
832 and store macros, again handle the 16-bit offset case first.
833 If the second register cannot be accessed from the same high
834 part as the first, load it into AT using ADDRESS_ADDI_INSN.
835 Fix the handling of LD in cases where the first register is the
836 same as the base. Also handle the case where the offset is
837 not 16 bits and the second register cannot be accessed from the
838 same high part as the first. For unaligned loads and stores,
839 fuse the offbits == 12 and old "ab" handling. Apply this handling
840 whenever the second offset needs a different high part from the first.
841 Construct the offset using ADDRESS_ADDI_INSN where possible,
842 for offbits == 16 as well as offbits == 12. Use offset_reloc
843 when constructing the individual loads and stores.
844 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
845 and offset_reloc before matching against a particular opcode.
846 Handle elided 'A' constants. Allow 'A' constants to use
847 relocation operators.
849 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
851 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
852 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
853 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
855 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
857 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
858 Require the msb to be <= 31 for "+s". Check that the size is <= 31
859 for both "+s" and "+S".
861 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
863 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
864 (mips_ip, mips16_ip): Handle "+i".
866 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
868 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
869 (micromips_to_32_reg_h_map): Rename to...
870 (micromips_to_32_reg_h_map1): ...this.
871 (micromips_to_32_reg_i_map): Rename to...
872 (micromips_to_32_reg_h_map2): ...this.
873 (mips_lookup_reg_pair): New function.
874 (gpr_write_mask, macro): Adjust after above renaming.
875 (validate_micromips_insn): Remove "mi" handling.
876 (mips_ip): Likewise. Parse both registers in a pair for "mh".
878 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
880 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
881 (mips_ip): Remove "+D" and "+T" handling.
883 2013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
885 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
888 2013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
890 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
892 2013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
894 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
895 (aarch64_force_relocation): Likewise.
897 2013-07-02 Alan Modra <amodra@gmail.com>
899 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
901 2013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
903 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
904 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
905 Replace @sc{mips16} with literal `MIPS16'.
906 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
908 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
910 * config/tc-aarch64.c (reloc_table): Replace
911 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
912 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
913 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
914 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
915 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
916 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
917 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
918 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
919 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
920 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
921 (aarch64_force_relocation): Likewise.
923 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
925 * config/tc-aarch64.c (ilp32_p): New static variable.
926 (elf64_aarch64_target_format): Return the target according to the
928 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
929 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
930 (aarch64_dwarf2_addr_size): New function.
931 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
932 (DWARF2_ADDR_SIZE): New define.
934 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
936 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
938 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
940 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
942 2013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
944 * config/tc-mips.c (mips_set_options): Add insn32 member.
945 (mips_opts): Initialize it.
946 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
947 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
948 (md_longopts): Add "minsn32" and "mno-insn32" options.
949 (is_size_valid): Handle insn32 mode.
950 (md_assemble): Pass instruction string down to macro.
951 (brk_fmt): Add second dimension and insn32 mode initializers.
952 (mfhl_fmt): Likewise.
953 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
954 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
955 (macro_build_jalr, move_register): Handle insn32 mode.
956 (macro_build_branch_rs): Likewise.
957 (macro): Handle insn32 mode.
958 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
959 (mips_ip): Handle insn32 mode.
960 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
961 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
962 (mips_handle_align): Handle insn32 mode.
963 (md_show_usage): Add -minsn32 and -mno-insn32.
965 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
967 (-minsn32, -mno-insn32): New options.
968 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
970 (MIPS assembly options): New node. Document .set insn32 and
972 (MIPS-Dependent): List the new node.
974 2013-06-25 Nick Clifton <nickc@redhat.com>
976 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
977 the PC in indirect addressing on 430xv2 parts.
978 (msp430_operands): Add version test to hardware bug encoding
981 2013-06-24 Roland McGrath <mcgrathr@google.com>
983 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
984 so it skips whitespace before it.
985 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
987 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
988 (arm_reg_parse_multi): Skip whitespace first.
989 (parse_reg_list): Likewise.
990 (parse_vfp_reg_list): Likewise.
991 (s_arm_unwind_save_mmxwcg): Likewise.
993 2013-06-24 Nick Clifton <nickc@redhat.com>
996 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
998 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
1000 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
1002 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
1004 * config/tc-mips.c: Assert that offsetT and valueT are at least
1006 (GPR_SMIN, GPR_SMAX): New macros.
1007 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
1009 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1011 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
1012 conditions. Remove any code deselected by them.
1013 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
1015 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1017 * NEWS: Note removal of ECOFF support.
1018 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
1019 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
1020 (MULTI_CFILES): Remove config/e-mipsecoff.c.
1021 * Makefile.in: Regenerate.
1022 * configure.in: Remove MIPS ECOFF references.
1023 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
1025 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
1026 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
1027 (mips-*-*): ...this single case.
1028 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
1029 MIPS emulations to be e-mipself*.
1030 * configure: Regenerate.
1031 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
1032 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
1033 (mips-*-sysv*): Remove coff and ecoff cases.
1034 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
1035 * ecoff.c: Remove reference to MIPS ECOFF.
1036 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
1037 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
1038 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
1039 (mips_hi_fixup): Tweak comment.
1040 (append_insn): Require a howto.
1041 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
1043 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1045 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
1046 Use "CPU" instead of "cpu".
1047 * doc/c-mips.texi: Likewise.
1048 (MIPS Opts): Rename to MIPS Options.
1049 (MIPS option stack): Rename to MIPS Option Stack.
1050 (MIPS ASE instruction generation overrides): Rename to
1051 MIPS ASE Instruction Generation Overrides (for now).
1052 (MIPS floating-point): Rename to MIPS Floating-Point.
1054 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1056 * doc/c-mips.texi (MIPS Macros): New section.
1057 (MIPS Object): Replace with...
1058 (MIPS Small Data): ...this new section.
1060 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1062 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
1063 Capitalize name. Use @kindex instead of @cindex for .set entries.
1065 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1067 * doc/c-mips.texi (MIPS Stabs): Remove section.
1069 2013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
1071 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
1072 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
1073 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
1074 (ISA_SUPPORTS_VIRT64_ASE): Delete.
1075 (mips_ase): New structure.
1076 (mips_ases): New table.
1077 (FP64_ASES): New macro.
1078 (mips_ase_groups): New array.
1079 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
1080 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
1082 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
1083 (md_parse_option): Use mips_ases and mips_set_ase instead of
1084 separate case statements for each ASE option.
1085 (mips_after_parse_args): Use FP64_ASES. Use
1086 mips_check_isa_supports_ases to check the ASEs against
1088 (s_mipsset): Use mips_ases and mips_set_ase instead of
1089 separate if statements for each ASE option. Use
1090 mips_check_isa_supports_ases, even when a non-ASE option
1093 2013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
1095 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
1097 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1099 * config/tc-mips.c (md_shortopts, options, md_longopts)
1100 (md_longopts_size): Move earlier in file.
1102 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1104 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
1105 with a single "ase" bitmask.
1106 (mips_opts): Update accordingly.
1107 (file_ase, file_ase_explicit): New variables.
1108 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
1109 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
1110 (ISA_HAS_ROR): Adjust for mips_set_options change.
1111 (is_opcode_valid): Take the base ase mask directly from mips_opts.
1112 (mips_ip): Adjust for mips_set_options change.
1113 (md_parse_option): Likewise. Update file_ase_explicit.
1114 (mips_after_parse_args): Adjust for mips_set_options change.
1115 Use bitmask operations to select the default ASEs. Set file_ase
1116 rather than individual per-ASE variables.
1117 (s_mipsset): Adjust for mips_set_options change.
1118 (mips_elf_final_processing): Test file_ase rather than
1119 file_ase_mdmx. Remove commented-out code.
1121 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1123 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
1124 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
1125 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
1126 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
1127 (mips_after_parse_args): Use the new "ase" field to choose
1129 (mips_cpu_info_table): Move ASEs from the "flags" field to the
1132 2013-06-18 Richard Earnshaw <rearnsha@arm.com>
1134 * config/tc-arm.c (symbol_preemptible): New function.
1135 (relax_branch): Use it.
1137 2013-06-17 Catherine Moore <clm@codesourcery.com>
1138 Maciej W. Rozycki <macro@codesourcery.com>
1139 Chao-Ying Fu <fu@mips.com>
1141 * config/tc-mips.c (mips_set_options): Add ase_eva.
1142 (mips_set_options mips_opts): Add ase_eva.
1143 (file_ase_eva): Declare.
1144 (ISA_SUPPORTS_EVA_ASE): Define.
1145 (IS_SEXT_9BIT_NUM): Define.
1146 (MIPS_CPU_ASE_EVA): Define.
1147 (is_opcode_valid): Add support for ase_eva.
1148 (macro_build): Likewise.
1150 (validate_mips_insn): Likewise.
1151 (validate_micromips_insn): Likewise.
1152 (mips_ip): Likewise.
1153 (options): Add OPTION_EVA and OPTION_NO_EVA.
1154 (md_longopts): Add -meva and -mno-eva.
1155 (md_parse_option): Process new options.
1156 (mips_after_parse_args): Check for valid EVA combinations.
1157 (s_mipsset): Likewise.
1159 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
1161 * dwarf2dbg.h (dwarf2_move_insn): Declare.
1162 * dwarf2dbg.c (line_subseg): Add pmove_tail.
1163 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
1164 (dwarf2_gen_line_info_1): Update call accordingly.
1165 (dwarf2_move_insn): New function.
1166 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
1168 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
1172 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
1175 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
1176 (dwarf2_gen_line_info_1): Delete.
1177 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
1178 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
1179 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
1180 (dwarf2_directive_loc): Push previous .locs instead of generating
1183 2013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1185 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
1186 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
1188 2013-06-13 Nick Clifton <nickc@redhat.com>
1191 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
1192 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
1193 function. Generates an error if the adjusted offset is out of a
1196 2013-06-12 Sandra Loosemore <sandra@codesourcery.com>
1198 * config/tc-nios2.c (md_apply_fix): Mask constant
1199 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
1201 2013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
1203 * config/tc-mips.c (append_insn): Don't do branch relaxation for
1204 MIPS-3D instructions either.
1205 (md_convert_frag): Update the COPx branch mask accordingly.
1207 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
1209 * doc/as.texinfo (Overview): Add --relax-branch and
1211 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
1214 2013-06-09 Sandra Loosemore <sandra@codesourcery.com>
1216 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
1219 2013-06-08 Catherine Moore <clm@codesourcery.com>
1221 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
1222 (is_opcode_valid_16): Pass ase value to opcode_is_member.
1223 (append_insn): Change INSN_xxxx to ASE_xxxx.
1225 2013-06-01 George Thomas <george.thomas@atmel.com>
1227 * gas/config/tc-avr.c: Change ISA for devices with USB support to
1230 2013-05-31 H.J. Lu <hongjiu.lu@intel.com>
1232 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
1235 2013-05-31 Paul Brook <paul@codesourcery.com>
1237 * config/tc-mips.c (s_ehword): New.
1239 2013-05-30 Paul Brook <paul@codesourcery.com>
1241 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
1243 2013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
1245 * write.c (resolve_reloc_expr_symbols): On REL targets don't
1246 convert relocs who have no relocatable field either. Rephrase
1247 the conditional so that the PC-relative check is only applied
1250 2013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1252 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
1255 2013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
1257 * config/tc-aarch64.c (reloc_table): Update to use
1258 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
1259 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
1260 (md_apply_fix): Likewise.
1261 (aarch64_force_relocation): Likewise.
1263 2013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1265 * config/tc-arm.c (it_fsm_post_encode): Improve
1266 warning messages about deprecated IT block formats.
1268 2013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
1270 * config/tc-aarch64.c (md_apply_fix): Move value range checking
1271 inside fx_done condition.
1273 2013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
1275 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
1277 2013-05-20 Peter Bergner <bergner@vnet.ibm.com>
1279 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
1280 and clean up warning when using PRINT_OPCODE_TABLE.
1282 2013-05-20 Alan Modra <amodra@gmail.com>
1284 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
1285 and data fixups performing shift/high adjust/sign extension on
1286 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
1287 when writing data fixups rather than recalculating size.
1289 2013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1291 * doc/c-msp430.texi: Fix typo.
1293 2013-05-16 Tristan Gingold <gingold@adacore.com>
1295 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
1296 are also TOC symbols.
1298 2013-05-16 Nick Clifton <nickc@redhat.com>
1300 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
1301 Add -mcpu command to specify core type.
1302 * doc/c-msp430.texi: Update documentation.
1304 2013-05-09 Andrew Pinski <apinski@cavium.com>
1306 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
1307 (mips_opts): Update for the new field.
1308 (file_ase_virt): New variable.
1309 (ISA_SUPPORTS_VIRT_ASE): New macro.
1310 (ISA_SUPPORTS_VIRT64_ASE): New macro.
1311 (MIPS_CPU_ASE_VIRT): New define.
1312 (is_opcode_valid): Handle ase_virt.
1313 (macro_build): Handle "+J".
1314 (validate_mips_insn): Likewise.
1315 (mips_ip): Likewise.
1316 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
1317 (md_longopts): Add mvirt and mnovirt
1318 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
1319 (mips_after_parse_args): Handle ase_virt field.
1320 (s_mipsset): Handle "virt" and "novirt".
1321 (mips_elf_final_processing): Add a comment about virt ASE might need
1323 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
1324 * doc/c-mips.texi: Document -mvirt and -mno-virt.
1325 Document ".set virt" and ".set novirt".
1327 2013-05-09 Alan Modra <amodra@gmail.com>
1329 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
1330 control of operand flag bits.
1332 2013-05-07 Alan Modra <amodra@gmail.com>
1334 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
1335 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
1336 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
1337 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
1338 (md_apply_fix): Set fx_no_overflow for assorted relocations.
1339 Shift and sign-extend fieldval for use by some VLE reloc
1340 operand->insert functions.
1342 2013-05-06 Paul Brook <paul@codesourcery.com>
1343 Catherine Moore <clm@codesourcery.com>
1345 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
1346 (limited_pcrel_reloc_p): Likewise.
1347 (md_apply_fix): Likewise.
1348 (tc_gen_reloc): Likewise.
1350 2013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
1352 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
1353 (mips_fix_adjustable): Adjust pc-relative check to use
1356 2013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
1358 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
1359 (s_mips_stab): Do not restrict to stabn only.
1361 2013-05-02 Nick Clifton <nickc@redhat.com>
1363 * config/tc-msp430.c: Add support for the MSP430X architecture.
1364 Add code to insert a NOP instruction after any instruction that
1365 might change the interrupt state.
1366 Add support for the LARGE memory model.
1367 Add code to initialise the .MSP430.attributes section.
1368 * config/tc-msp430.h: Add support for the MSP430X architecture.
1369 * doc/c-msp430.texi: Document the new -mL and -mN command line
1371 * NEWS: Mention support for the MSP430X architecture.
1373 2013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
1375 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
1376 alpha*-*-linux*ecoff*.
1378 2013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1380 * config/tc-mips.c (mips_ip): Add sizelo.
1381 For "+C", "+G", and "+H", set sizelo and compare against it.
1383 2013-04-29 Nick Clifton <nickc@redhat.com>
1385 * as.c (Options): Add -gdwarf-sections.
1386 (parse_args): Likewise.
1387 * as.h (flag_dwarf_sections): Declare.
1388 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
1389 (process_entries): When -gdwarf-sections is enabled generate
1390 fragmentary .debug_line sections.
1391 (out_debug_line): Set the section for the .debug_line section end
1393 * doc/as.texinfo: Document -gdwarf-sections.
1394 * NEWS: Mention -gdwarf-sections.
1396 2013-04-26 Christian Groessler <chris@groessler.org>
1398 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
1399 according to the target parameter. Don't call s_segm since s_segm
1400 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
1402 (md_begin): Call s_segm according to target parameter from command
1405 2013-04-25 Alan Modra <amodra@gmail.com>
1407 * configure.in: Allow little-endian linux.
1408 * configure: Regenerate.
1410 2013-04-24 Sandra Loosemore <sandra@codesourcery.com>
1412 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
1413 "fstatus" control register to "eccinj".
1415 2013-04-19 Kai Tietz <ktietz@redhat.com>
1417 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
1419 2013-04-15 Julian Brown <julian@codesourcery.com>
1421 * expr.c (add_to_result, subtract_from_result): Make global.
1422 * expr.h (add_to_result, subtract_from_result): Add prototypes.
1423 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
1424 subtract_from_result to handle extra bit of precision for .sleb128
1427 2013-04-10 Julian Brown <julian@codesourcery.com>
1429 * read.c (convert_to_bignum): Add sign parameter. Use it
1430 instead of X_unsigned to determine sign of resulting bignum.
1431 (emit_expr): Pass extra argument to convert_to_bignum.
1432 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
1433 X_extrabit to convert_to_bignum.
1434 (parse_bitfield_cons): Set X_extrabit.
1435 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
1436 Initialise X_extrabit field as appropriate.
1437 (add_to_result): New.
1438 (subtract_from_result): New.
1440 * expr.h (expressionS): Add X_extrabit field.
1442 2013-04-10 Jan Beulich <jbeulich@suse.com>
1444 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
1445 register being PC when is_t or writeback, and use distinct
1446 diagnostic for the latter case.
1448 2013-04-10 Jan Beulich <jbeulich@suse.com>
1450 * gas/config/tc-arm.c (parse_operands): Re-write
1451 po_barrier_or_imm().
1452 (do_barrier): Remove bogus constraint().
1453 (do_t_barrier): Remove.
1455 2013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
1457 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
1458 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
1460 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
1462 2013-04-09 Jan Beulich <jbeulich@suse.com>
1464 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
1465 Use local variable Rt in more places.
1466 (do_vmsr): Accept all control registers.
1468 2013-04-09 Jan Beulich <jbeulich@suse.com>
1470 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
1471 if there was none specified for moves between scalar and core
1474 2013-04-09 Jan Beulich <jbeulich@suse.com>
1476 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
1477 NEON_ALL_LANES case.
1479 2013-04-08 Jan Beulich <jbeulich@suse.com>
1481 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
1484 2013-04-08 Jan Beulich <jbeulich@suse.com>
1486 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
1489 2013-04-03 Alan Modra <amodra@gmail.com>
1491 * doc/as.texinfo: Add support to generate man options for h8300.
1492 * doc/c-h8300.texi: Likewise.
1494 2013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1496 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
1499 2013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
1502 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
1504 2013-03-26 Nick Clifton <nickc@redhat.com>
1507 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1508 start of the file each time.
1511 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1514 2013-03-26 Douglas B Rupp <rupp@gnat.com>
1516 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1519 2013-03-21 Will Newton <will.newton@linaro.org>
1521 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1522 pc-relative str instructions in Thumb mode.
1524 2013-03-21 Michael Schewe <michael.schewe@gmx.net>
1526 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1527 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1529 * config/tc-h8300.h: Remove duplicated defines.
1531 2013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
1534 * tc-avr.c (mcu_has_3_byte_pc): New function.
1535 (tc_cfi_frame_initial_instructions): Call it to find return
1538 2013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
1541 * config/tc-tic6x.c (tic6x_try_encode): Handle
1542 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1543 encode register pair numbers when required.
1545 2013-03-15 Will Newton <will.newton@linaro.org>
1547 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1548 in vstr in Thumb mode for pre-ARMv7 cores.
1550 2013-03-14 Andreas Schwab <schwab@suse.de>
1552 * doc/c-arc.texi (ARC Directives): Revert last change and use
1553 @itemize instead of @table.
1554 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1556 2013-03-14 Nick Clifton <nickc@redhat.com>
1559 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1560 NULL message, instead just check ARM_CPU_IS_ANY directly.
1562 2013-03-14 Nick Clifton <nickc@redhat.com>
1565 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
1567 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
1568 to the @item directives.
1569 (ARM-Neon-Alignment): Move to correct place in the document.
1570 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1572 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1575 2013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
1577 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
1578 case. Add default BAD_CASE to switch.
1580 2013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
1582 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1583 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1585 2013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1587 * config/tc-arm.c (crc_ext_armv8): New feature set.
1588 (UNPRED_REG): New macro.
1589 (do_crc32_1): New function.
1590 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1591 do_crc32ch, do_crc32cw): Likewise.
1593 (insns): Add entries for crc32 mnemonics.
1594 (arm_extensions): Add entry for crc.
1596 2013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
1598 * write.h (struct fix): Add fx_dot_frag field.
1599 (dot_frag): Declare.
1600 * write.c (dot_frag): New variable.
1601 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1602 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1603 * expr.c (expr): Save value of frag_now in dot_frag when setting
1605 * read.c (emit_expr): Likewise. Delete comments.
1607 2013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1609 * config/tc-i386.c (flag_code_names): Removed.
1610 (i386_index_check): Rewrote.
1612 2013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1614 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1616 (aarch64_double_precision_fmovable): New function.
1617 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1618 function; handle hexadecimal representation of IEEE754 encoding.
1619 (parse_operands): Update the call to parse_aarch64_imm_float.
1621 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1623 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1624 (check_hle): Updated.
1625 (md_assemble): Likewise.
1626 (parse_insn): Likewise.
1628 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1630 * config/tc-i386.c (_i386_insn): Add rep_prefix.
1631 (md_assemble): Check if REP prefix is OK.
1632 (parse_insn): Remove expecting_string_instruction. Set
1635 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1637 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1639 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1641 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1642 for system registers.
1644 2013-02-27 DJ Delorie <dj@redhat.com>
1646 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1647 (rl78_op): Handle %code().
1648 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1649 (tc_gen_reloc): Likwise; convert to a computed reloc.
1650 (md_apply_fix): Likewise.
1652 2013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1654 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1656 2013-02-25 Terry Guo <terry.guo@arm.com>
1658 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1659 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1660 list of accepted CPUs.
1662 2013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1665 * config/tc-i386.c (cpu_arch): Add ".smap".
1667 * doc/c-i386.texi: Document smap.
1669 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1671 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1672 mips_assembling_insn appropriately.
1673 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1675 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1677 * config/tc-mips.c (append_insn): Correct indentation, remove
1680 2013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1682 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
1684 2013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1686 * configure.tgt: Add nios2-*-rtems*.
1688 2013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1690 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1693 2013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1695 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1696 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1698 2013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1700 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1703 2013-02-06 Sandra Loosemore <sandra@codesourcery.com>
1704 Andrew Jenner <andrew@codesourcery.com>
1706 Based on patches from Altera Corporation.
1708 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1709 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1710 * Makefile.in: Regenerated.
1711 * configure.tgt: Add case for nios2*-linux*.
1712 * config/obj-elf.c: Conditionally include elf/nios2.h.
1713 * config/tc-nios2.c: New file.
1714 * config/tc-nios2.h: New file.
1715 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1716 * doc/Makefile.in: Regenerated.
1717 * doc/all.texi: Set NIOSII.
1718 * doc/as.texinfo (Overview): Add Nios II options.
1719 (Machine Dependencies): Include c-nios2.texi.
1720 * doc/c-nios2.texi: New file.
1721 * NEWS: Note Altera Nios II support.
1723 2013-02-06 Alan Modra <amodra@gmail.com>
1726 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1727 Don't skip fixups with fx_subsy non-NULL.
1728 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1729 with fx_subsy non-NULL.
1731 2013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1733 * doc/c-metag.texi: Add "@c man" markers.
1735 2013-02-04 Alan Modra <amodra@gmail.com>
1737 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1739 (TC_ADJUST_RELOC_COUNT): Delete.
1740 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1742 2013-02-04 Alan Modra <amodra@gmail.com>
1744 * po/POTFILES.in: Regenerate.
1746 2013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1748 * config/tc-metag.c: Make SWAP instruction less permissive with
1751 2013-01-29 DJ Delorie <dj@redhat.com>
1753 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1754 relocs in .word/.etc statements.
1756 2013-01-29 Roland McGrath <mcgrathr@google.com>
1758 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1759 immediate value for 8-bit offset" error so it shows line info.
1761 2013-01-24 Joseph Myers <joseph@codesourcery.com>
1763 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1766 2013-01-24 Nick Clifton <nickc@redhat.com>
1768 * config/tc-v850.c: Add support for e3v5 architecture.
1769 * doc/c-v850.texi: Mention new support.
1771 2013-01-23 Nick Clifton <nickc@redhat.com>
1774 * config/tc-avr.c: Include dwarf2dbg.h.
1776 2013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1778 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1779 (tc_i386_fix_adjustable): Likewise.
1780 (lex_got): Likewise.
1781 (tc_gen_reloc): Likewise.
1783 2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1785 * config/tc-aarch64.c (output_operand_error_record): Change to output
1786 the out-of-range error message as value-expected message if there is
1787 only one single value in the expected range.
1788 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1789 LSL #0 as a programmer-friendly feature.
1791 2013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1793 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1794 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1795 BFD_RELOC_64_SIZE relocations.
1796 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1798 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1799 relocations against local symbols.
1801 2013-01-16 Alan Modra <amodra@gmail.com>
1803 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1804 finding some sort of toc syntax error, and break to avoid
1805 compiler uninit warning.
1807 2013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1810 * config/tc-i386.c (lex_got): Increment length by 1 if the
1811 relocation token is removed.
1813 2013-01-15 Nick Clifton <nickc@redhat.com>
1815 * config/tc-v850.c (md_assemble): Allow signed values for
1818 2013-01-11 Sean Keys <skeys@ipdatasys.com>
1820 * config/tc-xgate.c (md_begin): Fix mistake made when going from
1823 2013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1825 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1826 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1827 * config/tc-ppc.c (md_show_usage): Likewise.
1828 (ppc_handle_align): Handle power8's group ending nop.
1830 2013-01-10 Sean Keys <skeys@ipdatasys.com>
1832 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
1833 that the assember exits after the opcodes have been printed.
1835 2013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1837 * app.c: Remove trailing white spaces.
1841 * dw2gencfi.c: Likewise.
1842 * dwarf2dbg.h: Likewise.
1843 * ecoff.c: Likewise.
1844 * input-file.c: Likewise.
1845 * itbl-lex.h: Likewise.
1846 * output-file.c: Likewise.
1849 * subsegs.c: Likewise.
1850 * symbols.c: Likewise.
1851 * write.c: Likewise.
1852 * config/tc-i386.c: Likewise.
1853 * doc/Makefile.am: Likewise.
1854 * doc/Makefile.in: Likewise.
1855 * doc/c-aarch64.texi: Likewise.
1856 * doc/c-alpha.texi: Likewise.
1857 * doc/c-arc.texi: Likewise.
1858 * doc/c-arm.texi: Likewise.
1859 * doc/c-avr.texi: Likewise.
1860 * doc/c-bfin.texi: Likewise.
1861 * doc/c-cr16.texi: Likewise.
1862 * doc/c-d10v.texi: Likewise.
1863 * doc/c-d30v.texi: Likewise.
1864 * doc/c-h8300.texi: Likewise.
1865 * doc/c-hppa.texi: Likewise.
1866 * doc/c-i370.texi: Likewise.
1867 * doc/c-i386.texi: Likewise.
1868 * doc/c-i860.texi: Likewise.
1869 * doc/c-m32c.texi: Likewise.
1870 * doc/c-m32r.texi: Likewise.
1871 * doc/c-m68hc11.texi: Likewise.
1872 * doc/c-m68k.texi: Likewise.
1873 * doc/c-microblaze.texi: Likewise.
1874 * doc/c-mips.texi: Likewise.
1875 * doc/c-msp430.texi: Likewise.
1876 * doc/c-mt.texi: Likewise.
1877 * doc/c-s390.texi: Likewise.
1878 * doc/c-score.texi: Likewise.
1879 * doc/c-sh.texi: Likewise.
1880 * doc/c-sh64.texi: Likewise.
1881 * doc/c-tic54x.texi: Likewise.
1882 * doc/c-tic6x.texi: Likewise.
1883 * doc/c-v850.texi: Likewise.
1884 * doc/c-xc16x.texi: Likewise.
1885 * doc/c-xgate.texi: Likewise.
1886 * doc/c-xtensa.texi: Likewise.
1887 * doc/c-z80.texi: Likewise.
1888 * doc/internals.texi: Likewise.
1890 2013-01-10 Roland McGrath <mcgrathr@google.com>
1892 * hash.c (hash_new_sized): Make it global.
1893 * hash.h: Declare it.
1894 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1897 2013-01-10 Will Newton <will.newton@imgtec.com>
1899 * Makefile.am: Add Meta.
1900 * Makefile.in: Regenerate.
1901 * config/tc-metag.c: New file.
1902 * config/tc-metag.h: New file.
1903 * configure.tgt: Add Meta.
1904 * doc/Makefile.am: Add Meta.
1905 * doc/Makefile.in: Regenerate.
1906 * doc/all.texi: Add Meta.
1907 * doc/as.texiinfo: Document Meta options.
1908 * doc/c-metag.texi: New file.
1910 2013-01-09 Steve Ellcey <sellcey@mips.com>
1912 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1914 * config/tc-mips.c (internalError): Remove, replace with abort.
1916 2013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1918 * config/tc-aarch64.c (parse_operands): Change to compare the result
1919 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1921 2013-01-07 Nick Clifton <nickc@redhat.com>
1924 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1925 anticipated character.
1926 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1927 here as it is no longer needed.
1929 2013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1931 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1932 * doc/c-score.texi (SCORE-Opts): Likewise.
1933 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1935 2013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1937 * config/tc-mips.c: Add support for MIPS r5900.
1938 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1940 (can_swap_branch_p, get_append_method): Detect some conditional
1941 short loops to fix a bug on the r5900 by NOP in the branch delay
1943 (M_MUL): Support 3 operands in multu on r5900.
1944 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1945 (s_mipsset): Force 32 bit floating point on r5900.
1946 (mips_ip): Check parameter range of instructions mfps and mtps on
1948 * configure.in: Detect CPU type when target string contains r5900
1949 (e.g. mips64r5900el-linux-gnu).
1951 2013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1953 * as.c (parse_args): Update copyright year to 2013.
1955 2013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1957 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1960 2013-01-02 Nick Clifton <nickc@redhat.com>
1963 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1966 For older changes see ChangeLog-2012
1968 Copyright (C) 2013 Free Software Foundation, Inc.
1970 Copying and distribution of this file, with or without modification,
1971 are permitted in any medium without royalty provided the copyright
1972 notice and this notice are preserved.
1978 version-control: never