arch/arm/include/asm/ehci-omap.h

   1 /*
   2  * OMAP EHCI port support
   3  * Based on LINUX KERNEL
   4  * drivers/usb/host/ehci-omap.c and drivers/mfd/omap-usb-host.c
   5  *
   6  * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com*
   7  * Author: Govindraj R <govindraj.raja@ti.com>
   8  *
   9  * SPDX-License-Identifier:     GPL-2.0
  10  */
  11
  12 #ifndef _OMAP_COMMON_EHCI_H_
  13 #define _OMAP_COMMON_EHCI_H_
  14
  15 enum usbhs_omap_port_mode {
  16         OMAP_USBHS_PORT_MODE_UNUSED,
  17         OMAP_EHCI_PORT_MODE_PHY,
  18         OMAP_EHCI_PORT_MODE_TLL,
  19         OMAP_EHCI_PORT_MODE_HSIC,
  20 };
  21
  22 #define OMAP_HS_USB_PORTS       3
  23
  24 #define is_ehci_phy_mode(x)     ((x) == OMAP_EHCI_PORT_MODE_PHY)
  25 #define is_ehci_tll_mode(x)     ((x) == OMAP_EHCI_PORT_MODE_TLL)
  26 #define is_ehci_hsic_mode(x)    ((x) == OMAP_EHCI_PORT_MODE_HSIC)
  27
  28 /* Values of UHH_REVISION - Note: these are not given in the TRM */
  29 #define OMAP_USBHS_REV1                                 0x00000010 /* OMAP3 */
  30 #define OMAP_USBHS_REV2                                 0x50700100 /* OMAP4 */
  31 #define OMAP_USBHS_REV2_1                               0x50700101 /* OMAP5 */
  32
  33 /* UHH Register Set */
  34 #define OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN              (1 << 2)
  35 #define OMAP_UHH_HOSTCONFIG_INCR8_BURST_EN              (1 << 3)
  36 #define OMAP_UHH_HOSTCONFIG_INCR16_BURST_EN             (1 << 4)
  37 #define OMAP_UHH_HOSTCONFIG_INCRX_ALIGN_EN              (1 << 5)
  38
  39 #define OMAP_UHH_HOSTCONFIG_ULPI_P1_BYPASS              1
  40 #define OMAP_UHH_HOSTCONFIG_ULPI_P2_BYPASS              (1 << 11)
  41 #define OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS              (1 << 12)
  42 #define OMAP4_UHH_HOSTCONFIG_APP_START_CLK              (1 << 31)
  43
  44 #define OMAP_P1_MODE_CLEAR                              (3 << 16)
  45 #define OMAP_P1_MODE_TLL                                (1 << 16)
  46 #define OMAP_P1_MODE_HSIC                               (3 << 16)
  47 #define OMAP_P2_MODE_CLEAR                              (3 << 18)
  48 #define OMAP_P2_MODE_TLL                                (1 << 18)
  49 #define OMAP_P2_MODE_HSIC                               (3 << 18)
  50 #define OMAP_P3_MODE_CLEAR                              (3 << 20)
  51 #define OMAP_P3_MODE_HSIC                               (3 << 20)
  52
  53 /* EHCI Register Set */
  54 #define EHCI_INSNREG04_DISABLE_UNSUSPEND                (1 << 5)
  55 #define EHCI_INSNREG05_ULPI_CONTROL_SHIFT               31
  56 #define EHCI_INSNREG05_ULPI_PORTSEL_SHIFT               24
  57 #define EHCI_INSNREG05_ULPI_OPSEL_SHIFT                 22
  58 #define EHCI_INSNREG05_ULPI_REGADD_SHIFT                16
  59
  60 #define OMAP_REV1_TLL_CHANNEL_COUNT                     3
  61 #define OMAP_REV2_TLL_CHANNEL_COUNT                     2
  62
  63 /* TLL Register Set */
  64 #define OMAP_TLL_CHANNEL_CONF(num)                      (0x004 * num)
  65 #define OMAP_TLL_CHANNEL_CONF_DRVVBUS                   (1 << 16)
  66 #define OMAP_TLL_CHANNEL_CONF_CHRGVBUS                  (1 << 15)
  67 #define OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF            (1 << 11)
  68 #define OMAP_TLL_CHANNEL_CONF_CHANMODE_TRANSPARENT_UTMI (2 << 1)
  69 #define OMAP_TLL_CHANNEL_CONF_CHANEN                    1
  70
  71 struct omap_usbhs_board_data {
  72         enum usbhs_omap_port_mode port_mode[OMAP_HS_USB_PORTS];
  73 };
  74
  75 struct omap_usbtll {
  76         u32 rev;                /* 0x00 */
  77         u32 hwinfo;             /* 0x04 */
  78         u8 reserved1[0x8];
  79         u32 sysc;               /* 0x10 */
  80         u32 syss;               /* 0x14 */
  81         u32 irqst;              /* 0x18 */
  82         u32 irqen;              /* 0x1c */
  83         u8 reserved2[0x10];
  84         u32 shared_conf;        /* 0x30 */
  85         u8 reserved3[0xc];
  86         u32 channel_conf;       /* 0x40 */
  87 };
  88
  89 struct omap_uhh {
  90         u32 rev;        /* 0x00 */
  91         u32 hwinfo;     /* 0x04 */
  92         u8 reserved1[0x8];
  93         u32 sysc;       /* 0x10 */
  94         u32 syss;       /* 0x14 */
  95         u8 reserved2[0x28];
  96         u32 hostconfig; /* 0x40 */
  97         u32 debugcsr;   /* 0x44 */
  98 };
  99
 100 struct omap_ehci {
 101         u32 hccapbase;          /* 0x00 */
 102         u32 hcsparams;          /* 0x04 */
 103         u32 hccparams;          /* 0x08 */
 104         u8 reserved1[0x04];
 105         u32 usbcmd;             /* 0x10 */
 106         u32 usbsts;             /* 0x14 */
 107         u32 usbintr;            /* 0x18 */
 108         u32 frindex;            /* 0x1c */
 109         u32 ctrldssegment;      /* 0x20 */
 110         u32 periodiclistbase;   /* 0x24 */
 111         u32 asysnclistaddr;     /* 0x28 */
 112         u8 reserved2[0x24];
 113         u32 configflag;         /* 0x50 */
 114         u32 portsc_i;           /* 0x54 */
 115         u8 reserved3[0x38];
 116         u32 insreg00;           /* 0x90 */
 117         u32 insreg01;           /* 0x94 */
 118         u32 insreg02;           /* 0x98 */
 119         u32 insreg03;           /* 0x9c */
 120         u32 insreg04;           /* 0xa0 */
 121         u32 insreg05_utmi_ulpi; /* 0xa4 */
 122         u32 insreg06;           /* 0xa8 */
 123         u32 insreg07;           /* 0xac */
 124         u32 insreg08;           /* 0xb0 */
 125 };
 126
 127 /*
 128  * FIXME: forward declaration of this structs needed because omap got the
 129  * ehci implementation backwards. move out ehci_hcd_x from board files
 130  */
 131 struct ehci_hccr;
 132 struct ehci_hcor;
 133
 134 int omap_ehci_hcd_init(int index, struct omap_usbhs_board_data *usbhs_pdata,
 135                        struct ehci_hccr **hccr, struct ehci_hcor **hcor);
 136 int omap_ehci_hcd_stop(void);
 137
 138 #endif /* _OMAP_COMMON_EHCI_H_ */