{
int value = !!dir;
u32 reg_addr = 0;
- unsigned long flags;
reg_addr = info->base_addr;
return;
}
- //local_irq_save(flags);
value = gpio_reg_get(reg_addr, info->die);
if (dir)
else
value &= ~(1 << info->bit_num);
gpio_reg_set(reg_addr, info->die, value);
-
- //local_irq_restore(flags);
}
/*
u32 offset_addr;
u32 reg_addr;
int value;
- unsigned long flags;
reg_addr = info->base_addr;
reg_addr += offset_addr;
- //local_irq_save(flags);
-
value = gpio_reg_get(reg_addr, info->die);
if (b_on)
value |= 1 << info->bit_num;
else
value &= ~(1 << info->bit_num);
gpio_reg_set(reg_addr, info->die, value);
- //local_irq_restore(flags);
}
/*
int value;
u32 reg_addr;
u32 offset_addr;
- unsigned long flags;
reg_addr = info->base_addr;
offset_addr = __gpio_get_data_mask_reg_offs(info);
if (offset_addr != INVALID_REG) {
reg_addr += offset_addr;
- //local_irq_save(flags);
value = gpio_reg_get(reg_addr, info->die);
if (b_on)
value |= 1 << info->bit_num;
else
value &= ~(1 << info->bit_num);
gpio_reg_set(reg_addr, info->die, value);
- //local_irq_restore(flags);
GPIO_DBG("After setting gpio_addr %x data mask :%x\r\n", reg_addr,
gpio_reg_get(reg_addr, info->die));