add packaging files

add nv12 to rgb conversion in post processing

add GPU shader for NV12->RGBX conversion

add rgbx to nv12 conversion in post-processing

add GPU shader for RGB->NV12 conversion

define RGB layout in static parameter

distinguish first plane width in pixel or in byte

add RGB format surface support

wayland: drop explicit dependencies to Wayland libraries.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

wayland: ship with wayland-drm protocol.

Signed-off-by: Zhao Halley <halley.zhao@intel.com>
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

Add Wayland support.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

Drop explicit dependency on libva-x11.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

Allow build without VA/X11 API.

Signed-off-by: Dmitry Ermilov <dmitry.ermilov@intel.com>
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

Add raw DRM support.

Signed-off-by: Dmitry Ermilov <dmitry.ermilov@intel.com>
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

Add shared library utils.

Add a few helpers to open shared libraries and load specific symbols
from there.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

dri: cope with drm_state changes.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

Adopt the new interfaces for JPEG decoding

Currently the HW only supprts JPEG baseline decoding

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Adjust the search path and LUT_MV table in VME

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Tested-by: Zhang, Ouping <ouping.zhang@intel.com>

Add support for UYVY

Tested on SNB and IVB.

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

color conversion between planar and packed formats on IVB

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

New shaders for color conversion between packed and planar YUV on IVB

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

add YUY2 support in i965_GetSurfaceAttributes, fix a small issue

support NV12/I420/YV12->I420/YV12 conversion

configure: require automake >= 1.9 for tar-ustar option.

By default, newer automake versions make tar use the ancient tar V7 format
that limits filenames to 99 characters. This is troublesome for certain shader
sources files. Now require automake 1.9 and use the tar-ustar option so that
a newer format, defined in POSIX 1003.1-1988, is used. The limitation is now
256 characters.

PAX interchange format (POSIX 1003.1-2001) was considered but probably still
to young? Just stick to the intermediate format for now as this is enough for
our purposes.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

h264: fix 4K decoding (IVB).

Fix decoding of 4K videos on Ivy Bridge. Note that either dimension
shall not exceed 4096 pixels.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

Fix the width of the UV surface for AVS on IVB

The width is specified in units of pixel.

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

only update u/v offset for some video processes

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Fix the parameter initialization for IVB

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Fix the mapping between VA filters and internal video processing

Some new filters are added in va_vpp.h

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Fix the number of the supported image formats

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Update the PA shader for ILK/SNB

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

update image width of packed format

add YUY2 format support in getimage/putimage

add YUY2 to supported image list

fix a mistake in PA_Load_8x8.asm

add YUY2->YV12 conversion in post processing (SNB/ILK)

add pa_load_save_pl3 for YUY2-->YV12 conversion (SNB/ILK)

jpeg: fix submission of quantization and Huffman tables.

Upload quantiser and Huffman tables only if they are marked as dirty.
i.e. the user requested to load them.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

Implementation for i965_SyncSurface and i965_QuerySurfaceStatus
(cherry picked from commit 25673c458932caa09ae3f47c6dbe7e040dbae032)

silence compiler warning

gen6_mfc.c: In function ‘gen6_mfc_brc_init’:
gen6_mfc.c:814:44: warning: initialization from incompatible pointer type [enabled by default]
gen6_mfc.c: In function ‘gen6_mfc_avc_prepare’:
gen6_mfc.c:1058:18: warning: unused variable ‘rate_control_mode’ [-Wunused-variable]

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Fix slice delta for CBR mode

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

New BRC algorithm to match HRD

It reduces the number of recoding as well.

Signed-off-by: Rogozhkin, Dmitry V <dmitry.v.rogozhkin@intel.com>

Currently only SNB supports packed YUV image

Check the returned status as well.

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Fix coded buffer size calculating for CBR mode

The encoded frame includes not only all macroblocks,
but also PPS/SPS/Slice headers.

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Fix QP setting for CBR mode

The QP specified in MFX_AVC_SLICE_STATE is also used as the starting
QP in the first MB of a slice. In addition, add assertions for QP releated
setting for 8-bit pixel bit-depth support

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Signed-off-by: Rogozhkin, Dmitry V <dmitry.v.rogozhkin@intel.com>

Accept packed misc data package such as SEI data

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Tested-by: Dmitry Ermilov <dmitry.ermilov@intel.com>

Fix weight denom for implicit weight tables on SNB for encoding

It is the same of commit fd9c532

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Don't render the target surface with background if alpha value is 0

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

clear background under right context

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Optimal parameters for Intra prediction mode

Fix the regression caused by d90a5ea9f21bc20f35c26457dec57f41f7a184d1

The DNDI kernel is still inapplicable.

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

add yuyv->nv12 conversion in image processing

add YUYV to NV12 conversion(pa_load_save_nv12.asm etc)

add YV12 to YUY2 conversion

add pl3_load_save_pa.asm etc

add NV12 to YUY2 color conversion

add nv12_load_save_pa.asm

add 422/YUY2 to surface formats

Enable Stream-Out on IVB

Signed-off-by: Zhou Chang <chang.zhou@intel.com>

src/Android.mk: add new files for mfc, gpe, enc

Change-Id: I76a344b6d44ebc00eef507e5c633c0722c3b201a
Signed-off-by: Haitao Huang <haitao.huang@intel.com>

intel-driver: initial porting to Android ICS

Added Android make files, conditionally compile PutSurface
implementation, which is not needed for Android ICS.

For: AIA-418
Change-Id: Ifd6a6ec2dabd8ee1ad4d34a41b3d274f8817f965
Depends-Change-Id: I2feabf6941379ef4d756e942f30eba059de641f1
Depends-Change-Id: I3452f6e784f11c39d4d925c57cd844bd4cc9dc9e
Signed-off-by: Haitao Huang <haitao.huang@intel.com>

jpeg: drop explicit check for VA/JPEG decoding API.

Staging branch VA driver needs to be built against a staging branch
libva. So, the VA/JPEG decoding API is present and actually mandatory
for VA-API >= 0.34.

jpeg: fix configure check for newer API.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

jpeg: update to latest API.

Signed-off-by: Haitao Huang <haitao.huang@intel.com>
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

configure: enforce build against VA-API 0.34.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

ENC: Enable all Intra mode on Ivybridge

The same fields will be ignored on Sandybridge

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

VPP: it should be float for normalized_x/y

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

VPP: pass the origin of source region to vpp kernel

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Fix the error code for unsupported resolution

Thank Gwenole for pointing it out

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit d0dfefde77ebe6093e304a84df796c6e1157f00a)

VPP: Render target surface with background color

Currently ignore alpha value. We will fix it once the
alpha blend kernel is ready

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

MPEG-2: Fix MFX_QM_STATE command on Ivybridge

If load_intra_quantiser_matrix/load_non_intra_quantiser_matrix is set to 0, then
there is no change to quantisation matrix. In this case, submit MFX_QM_STATE
with previous setting

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit 1c00e5916b59439fc7d8b0a59e82bc6bce2eb2de)

Conflicts:

src/gen7_mfd.c

Enlarge some internal buffer for H.264 decoding on Ivybridge

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit c3f06e2b32197d403d96b548b6b7589b245e8aaa)

Support mixed mode for VME

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Fix the filling of MFC batchbuffer for software path

VME has output more macroblock messages which should be used
when filling the MFC batchbuffer

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Added workaroud for CBR support in IVB.

Remove hard-coded code.

Istead, the MFX setting depends on the user setting parameters

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Don't use DNDI kernel on Ivybridge temporarily

We will integrate the right kernel for DN/DI on Ivybridge as soon as possible.

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Don't call VPP if the kernel isn't ready.

This avoids segment fault in VPP

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Fix parameter setting for AVS on Ivybridge

DU multiplied by width in SURFACE_STATE must be less
than 16 for the sample_8x8 message.

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Add support for new Ivybridge chipset

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit 4e3a3146128c6f790c9f586c2141ae96955069cd)

Don't need to expand MVs on Ivybridge

The MVs in the VME output are consistent to MFC on Ivybridge

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Fix MvSize on Ivybridge

The MvSize in the writeback message on Sandybridge is inconsistent to
MFC, however it is consistent to MFC on Ivybridge

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Correct the setting for search path in VME_STATE

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Fix the length of writeback message for Inter frame

A GRF register consists of two OWords

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Change to none-block in CBR mode

Fixed multipul slices edge prediction issue for Intra

Added interlace mode check, just a workaround.

Support sub-partition for Inter frame

Also support 32 MVs

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Directly use the size of the output MV from VME to format MFC_AVC_PAK_OBJECT command

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Update LUT_MV table

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Expand 8 MVs

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Correct the register region in VME kernel

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Support sub-macroblocks for Inter frame

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Use the output from VME to format MFC_AVC_PAK_OBJEC command for Inter frame

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Output more information in VME output buffer for Inter frame

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Expand the VME output buffer for Inter frame

Prepare for 32 MVs(128 bytes) and other information(32 bytes) from VME. In addition, use
macros instead of magic numbers

Signed-off-by :Xiang, Haihao <haihao.xiang@intel.com>

render: fix rendering of interlaced surfaces.

Handle bob-deinterlacing flags passed to vaPutSurface().
i.e. VA_TOP_FIELD|VA_BOTTOM_FIELD.

Avoid advanced deinterlacing kernels as they allocate extra temporary
surfaces, which are useless for such simple tasks. i.e. display either
field of an interlaced surface.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

vpp: drop "flags" field in pipeline caps.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

Update LUT_MbMode for set 0

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Only disable INTRA_8x8 if transform_8x8_mode_flag isn't set

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>