riscv64: Add RISC-V target 44/284644/1 accepted/tizen_8.0_unified accepted/tizen_unified tizen tizen_8.0 accepted/tizen/8.0/unified/20231005.095258 accepted/tizen/unified/20221209.124048 tizen_8.0_m2_release
authorMarek Pikuła <m.pikula@partner.samsung.com>
Mon, 14 Nov 2022 11:10:23 +0000 (12:10 +0100)
committerŁukasz Stelmach <l.stelmach@samsung.com>
Tue, 22 Nov 2022 08:06:56 +0000 (09:06 +0100)
commit3cb5247921e8369ef2b155786f76d8bc8f5cd9b5
treef6f7e61af300536e5ce0477c963b2635b29d56b1
parent71a10835b1c0fbce875c8bc7ef1c391603158bde
riscv64: Add RISC-V target

Change-Id: I58a8241b6f91946adb2a9506217928f31cf6d34e
Signed-off-by: Łukasz Stelmach <l.stelmach@samsung.com>
Signed-off-by: Marek Pikuła <m.pikula@partner.samsung.com>
packaging/openblas.spec