platform/upstream/libva-intel-driver.git
11 years agoAdd MPEG2 VME shader files for IVB
Li Xiaowei [Fri, 21 Dec 2012 06:27:01 +0000 (14:27 +0800)]
Add MPEG2 VME shader files for IVB

Signed-off-by: Li Xiaowei <xiaowei.a.li@intel.com>
11 years agoUse the wavefront-scan instead of raster-scan during VME prediction on Haswell
Zhao Yakui [Mon, 24 Dec 2012 07:29:08 +0000 (15:29 +0800)]
Use the wavefront-scan instead of raster-scan during VME prediction on Haswell

When adding the MV prediction for AVC encoding, the GPU thread of current
macroblock needs to wait for the completion of neighbour macroblocks(left/top/up-right).
And the raster-scan will degrade the performance of AVC encoding. So the
wavefront-scan is used to spanw GPU thread, which can avoid the degrading of
the encoding performance.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
11 years agoAdd the MV prediction to optimize VME parameter on Haswell
Zhao Yakui [Mon, 24 Dec 2012 07:08:39 +0000 (15:08 +0800)]
Add the MV prediction to optimize VME parameter on Haswell

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
11 years agoDiscard the intermediate result during VME prediction on haswell
Zhao Yakui [Mon, 24 Dec 2012 07:08:29 +0000 (15:08 +0800)]
Discard the intermediate result during VME prediction on haswell

There is no functional change. It is only to avoid writing the
intermediate result of VME prediction.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
11 years agoMEDIA_OBJECT uses hardware scoreboard during VME prediction on Haswell
Zhao Yakui [Mon, 24 Dec 2012 07:08:25 +0000 (15:08 +0800)]
MEDIA_OBJECT uses hardware scoreboard during VME prediction on Haswell

To get the precise VME prediction the current macroblock will depend on its
neighbour mb(left, top, up-right). So the hardware scoreboard is used
when submitting the MEDIA_OBJECT command. This is to do the preparation
of adding MV prediction in VME prediction.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
11 years agoSet Fix_Prev_Mb_skipped flag in AVC_BSD_OBJECT command instead of VC1_BSD_OBJECT...
Xiang, Haihao [Mon, 14 Jan 2013 07:50:20 +0000 (15:50 +0800)]
Set Fix_Prev_Mb_skipped flag in AVC_BSD_OBJECT command instead of VC1_BSD_OBJECT command

A stupid error by me in the commit f750d1b

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit 88b21b9aba9be13e08109fe5d213973447f38558)

11 years agoUse the internal CondOver flag
Xiang, Haihao [Wed, 9 Jan 2013 08:05:20 +0000 (16:05 +0800)]
Use the internal CondOver flag

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit 2cb319923b6ae5c1b2c643534d7a97911b9bd54e)

11 years agoFix ttmbf/ttfrm when vstransform is 0 on HSW
Xiang, Haihao [Wed, 9 Jan 2013 07:55:54 +0000 (15:55 +0800)]
Fix ttmbf/ttfrm when vstransform is 0 on HSW

This is the same fix of c7d23b1

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
11 years agoNo overlap smoothing for B frame in Main and Simple profiles
Xiang, Haihao [Wed, 9 Jan 2013 07:44:29 +0000 (15:44 +0800)]
No overlap smoothing for B frame in Main and Simple profiles

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=58448
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit 660cb88ec00a896eefc9580e691d0a07fb2870ec)

11 years agoAlways set Fix_Prev_Mb_skipped in AVC_BSD_OBJECT command
Xiang, Haihao [Tue, 8 Jan 2013 02:31:43 +0000 (10:31 +0800)]
Always set Fix_Prev_Mb_skipped in AVC_BSD_OBJECT command

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=57720
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit f750d1b69e1aae65463eab224013b506481d8459)

11 years agorender: fix rotation vertices for Ironlake.
Gwenole Beauchesne [Thu, 4 Oct 2012 08:32:32 +0000 (10:32 +0200)]
render: fix rotation vertices for Ironlake.

Ironlake requires the vertex buffer to be ordered in a particular way.
More specifically, the correct order is bottom-right, bottom-left and
top-left vertices in "output" view, i.e. transformed.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
(cherry picked from commit dc4d4005d0f3de59b7218506cf5b20bcef61323f)

11 years agosubpicture: don't overallocate palette on 64-bit systems.
Gwenole Beauchesne [Thu, 3 Jan 2013 14:57:25 +0000 (15:57 +0100)]
subpicture: don't overallocate palette on 64-bit systems.

Allocate the exact amount of memory for VA image palettes on 64-bit
systems. No more.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
11 years agosubpicture: fix creation of IA88/AI88 subpicture images.
Gwenole Beauchesne [Thu, 3 Jan 2013 14:47:40 +0000 (15:47 +0100)]
subpicture: fix creation of IA88/AI88 subpicture images.

IA88 format is 16bpp, with one byte for alpha and one byte for the color
index. Besides, a palette with 256 entries is also needed.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
11 years agosubpicture: expose "global-alpha" is supported.
Gwenole Beauchesne [Thu, 3 Jan 2013 14:23:42 +0000 (15:23 +0100)]
subpicture: expose "global-alpha" is supported.

Make sure vaQuerySubpictureFormats() reports that "global-alpha" is
supported, along with "screen-coords".

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
11 years agoRender: Update the maximum number of WM threads
Xiang, Haihao [Fri, 21 Dec 2012 02:25:57 +0000 (10:25 +0800)]
Render: Update the maximum number of WM threads

The number is stolen from Mesa.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=57323
Signe-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Tested-by: zaverel <zaverel@free.fr>
(cherry picked from commit a140c632046e50a41bf75da097834fd9954b9561)

11 years agoAdd IS_SNB_GT1/IS_SNB_GT2/IS_IVB_GT1/IS_IVB_GT2 and remove IS_HSW_ULT and IS_HSW_GT2_PLUS
Xiang, Haihao [Fri, 21 Dec 2012 01:48:47 +0000 (09:48 +0800)]
Add IS_SNB_GT1/IS_SNB_GT2/IS_IVB_GT1/IS_IVB_GT2 and remove IS_HSW_ULT and IS_HSW_GT2_PLUS

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit bb946b7d2c97c94ac1888195ab1d5b9c59750d23)

11 years agoAdopt the same fix used in the commit 29d73dc to HSW
Xiang, Haihao [Fri, 28 Dec 2012 01:32:23 +0000 (09:32 +0800)]
Adopt the same fix used in the commit 29d73dc to HSW

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
11 years agoh264: fix first macroblock bit offset calculation (ILK, SNB, IVB).
Gwenole Beauchesne [Thu, 1 Mar 2012 17:04:56 +0000 (18:04 +0100)]
h264: fix first macroblock bit offset calculation (ILK, SNB, IVB).

Fix and simplify the scan for emulation_prevention_bytes, thus avoiding
a read beyond the end of the slice data buffer. Besides, if slice_header()
bytes are needed, use dri_bo_get_subdata() instead.

HW specific changes:
- SNB: make the HW skip the emulation prevention bytes itself.
- IVB: fix MFD_AVC_BSD_OBJECT to report the actual slice data buffer size.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
(cherry picked from commit 9b7863bf49dcf8bf1de9b45ce4e986dfd1cca418)

11 years agoFix the compile error in the previous commit
Xiang, Haihao [Thu, 20 Dec 2012 03:13:19 +0000 (11:13 +0800)]
Fix the compile error in the previous commit

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
11 years agoVPP: fix the AVS steping and frame origin issue
Li Xiaowei [Wed, 19 Dec 2012 09:06:00 +0000 (17:06 +0800)]
VPP: fix the AVS steping and frame origin issue

On HSW/IVB, when the resolution of source rectangle is
not the same as src surface, or the source rectangle does
not locate at (0,0), the scaled picture is not correct,
adjust the steping size and frame origin according to the
src rectangle's location and resolution.

Signed-off-by: Li Xiaowei <xiaowei.a.li@intel.com>
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
11 years agoworkaround to set VC1 overlap filter flag
Li, Xiaowei A [Wed, 12 Dec 2012 02:04:37 +0000 (10:04 +0800)]
workaround to set VC1 overlap filter flag

Signed-off-by: Li,Xiaowei <xiaowei.a.li@intel.com>
11 years agoFill the bitplane for VC1 skip picture decoding
Li, Xiaowei A [Wed, 12 Dec 2012 01:16:25 +0000 (09:16 +0800)]
Fill the bitplane for VC1 skip picture decoding

This is a workaround for VC1 skip picture, the corresponding
bit value in bitplane should be 1 for skip picture, but sometimes
application pass down wrong value.

Signed-off-by: Li,Xiaowei <xiaowei.a.li@intel.com>
11 years agoMPEG-2 encoding on Haswell
Xiang, Haihao [Thu, 22 Nov 2012 06:26:40 +0000 (14:26 +0800)]
MPEG-2 encoding on Haswell

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
11 years agoMPEG-2 encoding path
Xiang, Haihao [Fri, 23 Nov 2012 08:32:35 +0000 (16:32 +0800)]
MPEG-2 encoding path

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
11 years agoFix Motion Vector
Xiang, Haihao [Thu, 13 Dec 2012 05:39:10 +0000 (13:39 +0800)]
Fix Motion Vector

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
11 years agoMPEG-2 encoding: Use pre deblocking output for reconstructed picture.
Xiang, Haihao [Fri, 7 Dec 2012 05:54:37 +0000 (13:54 +0800)]
MPEG-2 encoding: Use pre deblocking output for reconstructed picture.

This avoids OLDB enabling for MPEG-2

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
11 years agoFixed an assertion failure
Xiang, Haihao [Wed, 5 Dec 2012 08:07:06 +0000 (16:07 +0800)]
Fixed an assertion failure

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
11 years agoFollow the vme output to configure PAK command
Xiang, Haihao [Mon, 3 Dec 2012 05:20:16 +0000 (13:20 +0800)]
Follow the vme output to configure PAK command

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
11 years agoShader for MPEG-2 encoding
Xiang, Haihao [Mon, 3 Dec 2012 05:18:11 +0000 (13:18 +0800)]
Shader for MPEG-2 encoding

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
11 years agoFix the number of MVs for MPEG-2 encoding
Xiang, Haihao [Mon, 3 Dec 2012 03:16:30 +0000 (11:16 +0800)]
Fix the number of MVs for MPEG-2 encoding

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
11 years agoPAK command for inter macroblock
Xiang, Haihao [Wed, 28 Nov 2012 06:27:24 +0000 (14:27 +0800)]
PAK command for inter macroblock

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
11 years agovme for MPEG-2 on Haswell
Xiang, Haihao [Wed, 28 Nov 2012 06:17:43 +0000 (14:17 +0800)]
vme for MPEG-2 on Haswell

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
11 years agoNew field profile in struct intel_encoder_context
Xiang, Haihao [Wed, 28 Nov 2012 05:24:00 +0000 (13:24 +0800)]
New field profile in struct intel_encoder_context

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
11 years agogen75_vme.c: Fix some indentation
Xiang, Haihao [Wed, 28 Nov 2012 05:06:29 +0000 (13:06 +0800)]
gen75_vme.c: Fix some indentation

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
11 years agoUpdate coded_block_pattern
Xiang, Haihao [Wed, 28 Nov 2012 04:57:51 +0000 (12:57 +0800)]
Update coded_block_pattern

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
11 years agoChange the max size
Xiang, Haihao [Wed, 28 Nov 2012 02:29:12 +0000 (10:29 +0800)]
Change the max size

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
11 years agoUpdate QM/FQM matrices for MPEG-2 encoding
Xiang, Haihao [Wed, 28 Nov 2012 02:19:11 +0000 (10:19 +0800)]
Update QM/FQM matrices for MPEG-2 encoding

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
11 years agoNo emulation bytes for MPEG-2
Xiang, Haihao [Tue, 27 Nov 2012 08:13:18 +0000 (16:13 +0800)]
No emulation bytes for MPEG-2

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
11 years agoInternal flag for the coded buffer
Xiang, Haihao [Tue, 27 Nov 2012 08:08:26 +0000 (16:08 +0800)]
Internal flag for the coded buffer

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
11 years agorename I965_CODEDBUFFER_SIZE
Xiang, Haihao [Tue, 27 Nov 2012 07:49:24 +0000 (15:49 +0800)]
rename I965_CODEDBUFFER_SIZE

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
11 years agoInsert some redunrant data around a slice
Xiang, Haihao [Fri, 23 Nov 2012 08:49:51 +0000 (16:49 +0800)]
Insert some redunrant data around a slice

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
11 years agoSetup MFC pipeline for MPEG-2 encoding on Haswell
Xiang, Haihao [Fri, 23 Nov 2012 08:30:40 +0000 (16:30 +0800)]
Setup MFC pipeline for MPEG-2 encoding on Haswell

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
11 years agoExplicitly clarify features
Xiang, Haihao [Thu, 22 Nov 2012 01:37:18 +0000 (09:37 +0800)]
Explicitly clarify features

Also simplify some MACROs

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
11 years agoVPP: Add video sharpening processing feature on HSW
Li,Xiaowei [Tue, 16 Oct 2012 21:43:39 +0000 (05:43 +0800)]
VPP: Add video sharpening processing feature on HSW

Video sharpening feature is implemented based on media
shared function pipeline, Y component of NV12 surface
will be sharpened.

Signed-off-by: Li Xiaowei <xiaowei.a.li@intel.com>
11 years agoFix H264 YUV400 surface render issue
Li, Xiaowei A [Tue, 27 Nov 2012 02:28:41 +0000 (10:28 +0800)]
Fix H264 YUV400 surface render issue

All decoded frame are considered as NV12 format in driver's,
for YUV400 format senerios, we need set the chroma component
of NV12 to a constant value(0x80), otherwise the converted ARGB
from NV12 format is not correct and cause render issue.

Signed-off-by: Li Xiaowei <xiaowei.a.li@intel.com>
11 years agovc1: fix bitplane buffer size(HSW)
Li, Xiaowei A [Fri, 14 Dec 2012 02:05:43 +0000 (10:05 +0800)]
vc1: fix bitplane buffer size(HSW)

This fixes buffer overflow in the newly allocated Gen buffer
that holds VC-1 bitplanes.

Signed-off-by: Li,Xiaowei <xiaowei.a.li@intel.com>
11 years agovc1: fix bitplane buffer size (SNB, IVB).
Gwenole Beauchesne [Thu, 2 Feb 2012 13:42:11 +0000 (14:42 +0100)]
vc1: fix bitplane buffer size (SNB, IVB).

This fixes buffer overflow in the newly allocated Gen buffer that holds
VC-1 bitplanes.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
11 years agoRender: Add four subpicture support
Li,Xiaowei [Tue, 27 Nov 2012 01:08:29 +0000 (09:08 +0800)]
Render: Add four subpicture support

Signed-off-by: Li Xiaowei <xiaowei.a.li@intel.com>
11 years agoRender: Add AI88/IA88 surface foramt support for subpicture
Li,Xiaowei [Fri, 23 Nov 2012 07:24:26 +0000 (15:24 +0800)]
Render: Add AI88/IA88 surface foramt support for subpicture

Signed off by: Li,Xiaowei A <xiaowei.a.li@intel.com>

11 years agoRender: Add global alpha support for subpicture
Li,Xiaowei [Fri, 23 Nov 2012 03:13:48 +0000 (11:13 +0800)]
Render: Add global alpha support for subpicture

Signed-off-by: Li Xiaowei A <xiaowei.a.li@intel.com>
11 years agoFeed MFC PAK with correct MV of VME output on haswell
Zhao Yakui [Thu, 13 Dec 2012 01:24:27 +0000 (09:24 +0800)]
Feed MFC PAK with correct MV of VME output on haswell

This is helpful to improve the video compress rate of H264 encoding.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
11 years agoAdjust the mode/mv cost for VME parameter based on QP for HSW
Zhao Yakui [Mon, 10 Dec 2012 08:29:37 +0000 (16:29 +0800)]
Adjust the mode/mv cost for VME parameter based on QP for HSW

Currently it will use the same mode/mv cost regardless of QP during VME
prediction, which causes that we get the same VME prediction. It is better
that we get the different VME prediction mode based on QP, which can be
adopted by using mode/mv cost.
Now it is only applied on HSW.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
11 years agoAdd the support of the chroma intra prediction on Haswell
Zhao Yakui [Mon, 10 Dec 2012 08:29:37 +0000 (16:29 +0800)]
Add the support of the chroma intra prediction on Haswell

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
11 years agoFix the corrupted macroblock for AVC encoding on HSW
Zhao Yakui [Mon, 10 Dec 2012 08:29:36 +0000 (16:29 +0800)]
Fix the corrupted macroblock for AVC encoding on HSW

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
11 years agoAdd CSC conversion between RGBX and NV12 for HSW by using AVS shader
Zhao Yakui [Fri, 7 Dec 2012 02:21:09 +0000 (10:21 +0800)]
Add CSC conversion between RGBX and NV12 for HSW by using AVS shader

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
11 years agoOptimize the sampler 8x8 coefficients for AVS shader
Zhao Yakui [Fri, 7 Dec 2012 02:21:09 +0000 (10:21 +0800)]
Optimize the sampler 8x8 coefficients for AVS shader

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
11 years agoAdd the csc conversion from RGBX to NV12 on Ivy
Zhao Yakui [Fri, 7 Dec 2012 02:21:09 +0000 (10:21 +0800)]
Add the csc conversion from RGBX to NV12 on Ivy

It also applies when the source type is BGRX.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
11 years agoAdd CSC conversion from NV12 to RGBX for VPP on Ivy
Zhao Yakui [Fri, 7 Dec 2012 02:21:09 +0000 (10:21 +0800)]
Add CSC conversion from NV12 to RGBX for VPP on Ivy

It also applies to the conversion from NV12 to BGRX.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
11 years agoconfigure: add missing dependency to libm.
Joe Konno [Tue, 20 Nov 2012 15:42:27 +0000 (07:42 -0800)]
configure: add missing dependency to libm.

Build broke when trying to compile with expressive debug CFLAGS (-g3).
This was root-caused to the lack of the "-lm" linker flag. By adding a
simple autoconf check we ensure that libm is linked.

More specifically, recent VEBOX changes depend on cos() and sin() math
functions.

Signed-off-by: Joe Konno <joe.konno@intel.com>
(cherry picked from commit eb39abb70886d9277cf7d5114125cb7b22e7c362)

11 years agowayland: port to 1.0 protocol.
Rob Bradford [Fri, 19 Oct 2012 17:49:56 +0000 (18:49 +0100)]
wayland: port to 1.0 protocol.

Previously some of the functions that this code relied upon were exported as
symbols from the wayland-client .so. However those are now autogenerated
instead and are thus included as static inlines in the header file. Therefore
we must recreated the desired functions using the function pointers found in
the vtable.

Also following the removal of the globals hash from the client code it is
necessary to setup a registry with a listener on it to receive the global
objects.

Signed-off-by: Rob Bradford <rob@linux.intel.com>
(cherry picked from commit 63db874e9c924f086bcd3518cc0f3d8c6df9ecec)

11 years agoAvoid the dup of gen_free_avc_surface during compile
Zhao Yakui [Wed, 31 Oct 2012 08:47:59 +0000 (16:47 +0800)]
Avoid the dup of gen_free_avc_surface during compile

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
11 years agoRestrict the max MV number in MV prediction
Zhao Yakui [Wed, 31 Oct 2012 08:47:58 +0000 (16:47 +0800)]
Restrict the max MV number in MV prediction

This is to follow the level limits for MV number for the two
consecutive MBs in H264 Spec.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
11 years agoAllow to create batchbuffer based on the expected buffer size
Zhao Yakui [Wed, 31 Oct 2012 08:47:57 +0000 (16:47 +0800)]
Allow to create batchbuffer based on the expected buffer size

This is to support the 4Kx4K encoding on Haswell. Otherwise the default batch
buffer size can't hold the encoding command for 4Kx4K encoding.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
11 years agoRemove the dup code of XXX_mfc_avc_prepare
Zhao Yakui [Wed, 31 Oct 2012 08:47:56 +0000 (16:47 +0800)]
Remove the dup code of XXX_mfc_avc_prepare

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
11 years agoRemove the hard coded value to suppor the 4Kx4K encoding
Zhao Yakui [Wed, 31 Oct 2012 08:47:55 +0000 (16:47 +0800)]
Remove the hard coded value to suppor the 4Kx4K encoding

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
11 years agoFix the issue in i965_UnlockSurface to lock it next time
Zhao Yakui [Wed, 31 Oct 2012 08:47:54 +0000 (16:47 +0800)]
Fix the issue in i965_UnlockSurface to lock it next time

It uses the variable of locked_image_id to check whether one surface is locked
or not. But as the locked_image_id is not assigned correctly, it causes that
it can't lock one surface next time although it calls the vaUnlockSurfaces.
Then the libva trace log can't dump the content of decoded/
encoded surface even after adding LIBVA_TRACE_SURFACE=XXX.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Gwenole Beauchesne <gb.devel@gmail.com>
11 years agoUnify the XXX_free_avc_surface for media encoding/decoding
Zhao Yakui [Wed, 31 Oct 2012 08:47:53 +0000 (16:47 +0800)]
Unify the XXX_free_avc_surface for media encoding/decoding

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
11 years agoFix thread issue with AVC private surafce
Gautam [Wed, 31 Oct 2012 08:47:52 +0000 (16:47 +0800)]
Fix thread issue with AVC private surafce

https://bugs.freedesktop.org/show_bug.cgi?id=55282

Signed-off-by: Gautam <manamgautam@gmail.com>
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
11 years agoUnify the code for xxx_free_avc_surface
Xiang, Haihao [Wed, 31 Oct 2012 08:47:51 +0000 (16:47 +0800)]
Unify the code for xxx_free_avc_surface

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
11 years agoMake it built against the current upstream libdrm
Xiang, Haihao [Wed, 24 Oct 2012 08:47:53 +0000 (16:47 +0800)]
Make it built against the current upstream libdrm

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit a97403b2b9b5542aa6dd311b23b562a413abd431)

11 years agoVEBOX: avoid allocing surface memory for vebox pipeline when external input or output...
Li, Xiaowei A [Thu, 25 Oct 2012 03:28:44 +0000 (11:28 +0800)]
VEBOX: avoid allocing surface memory for vebox pipeline when external input or output surface is refered.

Signed-off-by: Li,Xiaowei A <xiaowei.a.li@intel.com>
11 years agoCSC on Haswell
Xiang, Haihao [Thu, 25 Oct 2012 07:09:13 +0000 (15:09 +0800)]
CSC on Haswell

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
11 years agoBuild VPP shaders for Haswell
Xiang, Haihao [Thu, 25 Oct 2012 07:07:37 +0000 (15:07 +0800)]
Build VPP shaders for Haswell

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
11 years agoVEBOX: Enable vebox pipeline for video process on HSW
Li, Xiaowei A [Fri, 19 Oct 2012 02:05:07 +0000 (10:05 +0800)]
VEBOX: Enable vebox pipeline for video process on HSW

Basic vebox pipeline is enabled to do deinterlacing, denoising
and color balance for NV12 format surfaces.

Signed-off-by: Li,Xiaowei A <xiaowei.a.li@intel.com>
11 years agoExpose the vpp internal scaling function as an external interface for VEBOX.
Li,Xiaowei [Thu, 23 Aug 2012 06:42:03 +0000 (14:42 +0800)]
Expose the vpp internal scaling function as an external interface for VEBOX.

Signed-off-by Li,Xiaowei <xiaowei.a.li@intel.com>

11 years agoAdd special macro and command for vebox batch buffer execution.
root [Thu, 18 Oct 2012 01:51:49 +0000 (09:51 +0800)]
Add special macro and command for vebox batch buffer execution.

 Signed-off-by Li,Xiaowei <xiaowei.a.li@intel.com>

11 years agoHaswell: Disable Picture ID Remapping for AVC decoding
Xiang, Haihao [Mon, 15 Oct 2012 15:10:18 +0000 (11:10 -0400)]
Haswell: Disable Picture ID Remapping for AVC decoding

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
11 years agoAdd the default SEI info for CBR mode
Zhao Yakui [Mon, 24 Sep 2012 21:22:43 +0000 (17:22 -0400)]
Add the default SEI info for CBR mode

This is to add the default SEI info in CBR mode when the upper application
doesn't pass the SEI package. Otherwise when SEI is not passed for CBR mode,
it will fail in HRD test.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
11 years agoUse the common API to write avc SPS/PPS/SEI info on SNB/IVY/HSW
Zhao Yakui [Mon, 24 Sep 2012 21:20:44 +0000 (17:20 -0400)]
Use the common API to write avc SPS/PPS/SEI info on SNB/IVY/HSW

This is to remove the dup code.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
11 years agoHandle the MFX change between A stepping and B-stepping for haswell
Zhao Yakui [Wed, 12 Sep 2012 20:31:07 +0000 (16:31 -0400)]
Handle the MFX change between A stepping and B-stepping for haswell

The A0-stepping is still covered.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
11 years agoAdd the seperate decoding callback API for Haswell
Zhao Yakui [Wed, 12 Sep 2012 20:13:51 +0000 (16:13 -0400)]
Add the seperate decoding callback API for Haswell

As the MFX involves quite a lot of changes between Ivy and Haswell,
the seperate decoding callback API is added for haswell. This
can avoid the complex backward logic for Ivy.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
11 years agoFix the incorrect syntax in VME shaders for Haswell
Zhao Yakui [Fri, 7 Sep 2012 16:58:27 +0000 (12:58 -0400)]
Fix the incorrect syntax in VME shaders for Haswell

There is no functional change.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
11 years agoFix the incorrect mb_intra_struct for multi-slice on Haswell
Zhao Yakui [Tue, 28 Aug 2012 17:48:01 +0000 (13:48 -0400)]
Fix the incorrect mb_intra_struct for multi-slice on Haswell

Now the incorrect macroblock intra struct is passed under the multi-slice
scenario, which causes the wrong intra prediction for some macroblocks.
At the same time it also consider the scenario that the x coordinate
of the first macroblock in slice is not zero.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
11 years agoPass the mb_intra_struct by using thread payload on haswell
Zhao Yakui [Tue, 28 Aug 2012 17:47:56 +0000 (13:47 -0400)]
Pass the mb_intra_struct by using thread payload on haswell

Now the mb_intra_struct is calculated by the GPU thread.
But when handling the logic for multi-slice, the GPU calculation will
become complex.So pass the intra struct flag of macroblock by using
thread payload.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
11 years agoAdd the support of encoding P/B-frame on haswell
Zhao Yakui [Thu, 16 Aug 2012 20:45:40 +0000 (16:45 -0400)]
Add the support of encoding P/B-frame on haswell

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
11 years agoAdd the Intra VME for I-frame on Haswell
Zhao Yakui [Tue, 7 Aug 2012 19:33:11 +0000 (15:33 -0400)]
Add the Intra VME for I-frame on Haswell

At the same time the command buffer of MFC pak is constructed
by using CPU instead of GPU.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
11 years agoConfig the media chroma surface in the binding table for Haswell
Zhao Yakui [Fri, 20 Jul 2012 01:19:35 +0000 (21:19 -0400)]
Config the media chroma surface in the binding table for Haswell

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
11 years agoAdd the common BRC API to avoid the duplicated code
Zhao Yakui [Fri, 20 Jul 2012 01:16:04 +0000 (21:16 -0400)]
Add the common BRC API to avoid the duplicated code

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
11 years agoAdd the separated files for media encoder on haswell
Zhao Yakui [Fri, 20 Jul 2012 01:15:56 +0000 (21:15 -0400)]
Add the separated files for media encoder on haswell

There exist a lot of changes about the media encoder between Haswell
and IvyBridge. For example: the VME programming and the corresponding
general media command. To be simple, the separated files are added for
Haswell. Otherwise it has to consider the complex backward compatibility.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
11 years agohaswell: fix video post-processing setup.
Gwenole Beauchesne [Fri, 18 May 2012 09:40:59 +0000 (11:40 +0200)]
haswell: fix video post-processing setup.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
11 years agohaswell: fix render kernels.
Gwenole Beauchesne [Wed, 9 May 2012 12:40:53 +0000 (14:40 +0200)]
haswell: fix render kernels.

Regenerate render kernels for Haswell because JMPI instruction semantics
changed there. In particular, the offset is now expressed in bytes instead
of 64-bit units.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
11 years agohaswell: fix MPEG-2 decoding.
Gwenole Beauchesne [Mon, 7 May 2012 09:29:46 +0000 (11:29 +0200)]
haswell: fix MPEG-2 decoding.

Fix MPEG-2 decoding, though disable error concealment logic for now.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
11 years agohaswell: set "Shader Channel Select" fields in surface state.
Gwenole Beauchesne [Mon, 7 May 2012 07:17:55 +0000 (09:17 +0200)]
haswell: set "Shader Channel Select" fields in surface state.

For normal behaviour, each Shader Channel Select should be set to the
value indicating that same channel. i.e. Shader Channel Select Red is
set to SCS_RED, Shader Channel Select Green is set to SCS_GREEN, etc.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
11 years agohaswell: fix 3DSTATE_PS to fill in number of samples.
Gwenole Beauchesne [Mon, 7 May 2012 07:12:04 +0000 (09:12 +0200)]
haswell: fix 3DSTATE_PS to fill in number of samples.

The sample mask value must match what is set for 3DSTATE_SAMPLE_MASK,
through gen7_emit_invarient_states().

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
11 years agohaswell: fix max PS threads shift value.
Gwenole Beauchesne [Mon, 7 May 2012 07:09:48 +0000 (09:09 +0200)]
haswell: fix max PS threads shift value.

The maximum number of threads is now a 9-bit value. Thus, one more bit
towards LSB was re-used. i.e. bit position is now 23 instead of 24 on
Ivy Bridge.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
11 years agointel: fix max number of threads used on Ivy Bridge.
Gwenole Beauchesne [Mon, 7 May 2012 07:05:21 +0000 (09:05 +0200)]
intel: fix max number of threads used on Ivy Bridge.

Fix the max number of threads to be used on Ivy Bridge. In particular,
the GEN7_PS_MAX_THREADS_SHIFT offset was wrong, thus causing the GPU
to use half of what was specified.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
11 years agohaswell: use at least 64 URB entries for GT2+.
Gwenole Beauchesne [Mon, 7 May 2012 06:54:56 +0000 (08:54 +0200)]
haswell: use at least 64 URB entries for GT2+.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
11 years agoAdd PCI IDs for Haswell
Gwenole Beauchesne [Mon, 7 May 2012 06:50:21 +0000 (08:50 +0200)]
Add PCI IDs for Haswell

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
11 years agofix ttmbf/ttfrm when vstransform is 0
Zhao Halley [Fri, 21 Sep 2012 02:30:55 +0000 (10:30 +0800)]
fix ttmbf/ttfrm when vstransform is 0
(cherry picked from commit c7d23b1e9376808dfa88192ee66a1af5acdf3b16)

11 years agoChange ILLEGAL instructions to NOP instructions in avc_mc.g4b.gen5
Homer Hsing [Thu, 27 Sep 2012 05:24:09 +0000 (13:24 +0800)]
Change ILLEGAL instructions to NOP instructions in avc_mc.g4b.gen5
(cherry picked from commit 3b02b9d396c4ec7ab07ca0429023f3f54201d51b)