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(parent: ffe25a0) | patch
haswell: fix max PS threads shift value.
authorGwenole Beauchesne <gwenole.beauchesne@intel.com>
Tue, 18 Sep 2012 13:40:02 +0000 (09:40 -0400)
committerXiang, Haihao <haihao.xiang@intel.com>
Tue, 23 Oct 2012 05:56:02 +0000 (13:56 +0800)
commitdcceb2101606e9299669ac45bfcf93e2fd826824
treeb3b4d51403f2455d18efb649dfb07b436dfc6bc7tree | snapshot
parentffe25a063e23222cd72fbe4ae3eb0409618c77ddcommit | diff
haswell: fix max PS threads shift value.

The maximum number of threads is now a 9-bit value. Thus, one more bit
towards LSB was re-used. i.e. bit position is now 23 instead of 24 on
Ivy Bridge.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
src/i965_defines.h diff | blob | history
src/i965_render.c diff | blob | history
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