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surface: fix geometry (size, layout) of grayscale surfaces.
[platform/upstream/libva-intel-driver.git] / src / i965_render.c
diff --git a/src/i965_render.c b/src/i965_render.c
index 15643f3..9d0e846 100644 (file)
--- a/src/i965_render.c
+++ b/src/i965_render.c
@@ -341,7 +341,7 @@ i965_render_vs_unit(VADriverContextP ctx)
     vs_state = render_state->vs.state->virtual;
     memset(vs_state, 0, sizeof(*vs_state));
 
-    if (IS_IRONLAKE(i965->intel.device_id))
+    if (IS_IRONLAKE(i965->intel.device_info))
         vs_state->thread4.nr_urb_entries = URB_VS_ENTRIES >> 2;
     else
         vs_state->thread4.nr_urb_entries = URB_VS_ENTRIES;
@@ -455,7 +455,7 @@ i965_subpic_render_wm_unit(VADriverContextP ctx)
 
     wm_state->thread1.single_program_flow = 1; /* XXX */
 
-    if (IS_IRONLAKE(i965->intel.device_id))
+    if (IS_IRONLAKE(i965->intel.device_info))
         wm_state->thread1.binding_table_entry_count = 0; /* hardware requirement */
     else
         wm_state->thread1.binding_table_entry_count = 7;
@@ -472,7 +472,7 @@ i965_subpic_render_wm_unit(VADriverContextP ctx)
     wm_state->wm4.stats_enable = 0;
     wm_state->wm4.sampler_state_pointer = render_state->wm.sampler->offset >> 5; 
 
-    if (IS_IRONLAKE(i965->intel.device_id)) {
+    if (IS_IRONLAKE(i965->intel.device_info)) {
         wm_state->wm4.sampler_count = 0;        /* hardware requirement */
     } else {
         wm_state->wm4.sampler_count = (render_state->wm.sampler_count + 3) / 4;
@@ -519,7 +519,7 @@ i965_render_wm_unit(VADriverContextP ctx)
 
     wm_state->thread1.single_program_flow = 1; /* XXX */
 
-    if (IS_IRONLAKE(i965->intel.device_id))
+    if (IS_IRONLAKE(i965->intel.device_info))
         wm_state->thread1.binding_table_entry_count = 0;        /* hardware requirement */
     else
         wm_state->thread1.binding_table_entry_count = 7;
@@ -536,7 +536,7 @@ i965_render_wm_unit(VADriverContextP ctx)
     wm_state->wm4.stats_enable = 0;
     wm_state->wm4.sampler_state_pointer = render_state->wm.sampler->offset >> 5; 
 
-    if (IS_IRONLAKE(i965->intel.device_id)) {
+    if (IS_IRONLAKE(i965->intel.device_info)) {
         wm_state->wm4.sampler_count = 0;        /* hardware requirement */
     } else {
         wm_state->wm4.sampler_count = (render_state->wm.sampler_count + 3) / 4;
@@ -828,12 +828,12 @@ i965_render_src_surface_state(
     assert(ss_bo->virtual);
     ss = (char *)ss_bo->virtual + SURFACE_STATE_OFFSET(index);
 
-    if (IS_GEN7(i965->intel.device_id)) {
+    if (IS_GEN7(i965->intel.device_info)) {
         gen7_render_set_surface_state(ss,
                                       region, offset,
                                       w, h,
                                       pitch, format, flags);
-        if (IS_HASWELL(i965->intel.device_id))
+        if (IS_HASWELL(i965->intel.device_info))
             gen7_render_set_surface_scs(ss);
         dri_bo_emit_reloc(ss_bo,
                           I915_GEM_DOMAIN_SAMPLER, 0,
@@ -876,6 +876,9 @@ i965_render_src_surfaces_state(
     i965_render_src_surface_state(ctx, 1, region, 0, rw, rh, region_pitch, I965_SURFACEFORMAT_R8_UNORM, flags);     /* Y */
     i965_render_src_surface_state(ctx, 2, region, 0, rw, rh, region_pitch, I965_SURFACEFORMAT_R8_UNORM, flags);
 
+    if (obj_surface->fourcc == VA_FOURCC_Y800) /* single plane for grayscale */
+        return;
+
     if (obj_surface->fourcc == VA_FOURCC_NV12) {
         i965_render_src_surface_state(ctx, 3, region,
                                       region_pitch * obj_surface->y_cb_offset,
@@ -943,12 +946,12 @@ i965_render_dest_surface_state(VADriverContextP ctx, int index)
     assert(ss_bo->virtual);
     ss = (char *)ss_bo->virtual + SURFACE_STATE_OFFSET(index);
 
-    if (IS_GEN7(i965->intel.device_id)) {
+    if (IS_GEN7(i965->intel.device_info)) {
         gen7_render_set_surface_state(ss,
                                       dest_region->bo, 0,
                                       dest_region->width, dest_region->height,
                                       dest_region->pitch, format, 0);
-        if (IS_HASWELL(i965->intel.device_id))
+        if (IS_HASWELL(i965->intel.device_info))
             gen7_render_set_surface_scs(ss);
         dri_bo_emit_reloc(ss_bo,
                           I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
@@ -1230,7 +1233,7 @@ i965_render_state_base_address(VADriverContextP ctx)
     struct intel_batchbuffer *batch = i965->batch;
     struct i965_render_state *render_state = &i965->render_state;
 
-    if (IS_IRONLAKE(i965->intel.device_id)) {
+    if (IS_IRONLAKE(i965->intel.device_info)) {
         BEGIN_BATCH(batch, 8);
         OUT_BATCH(batch, CMD_STATE_BASE_ADDRESS | 6);
         OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY);
@@ -1394,7 +1397,7 @@ i965_render_vertex_elements(VADriverContextP ctx)
     struct i965_driver_data *i965 = i965_driver_data(ctx);
     struct intel_batchbuffer *batch = i965->batch;
 
-    if (IS_IRONLAKE(i965->intel.device_id)) {
+    if (IS_IRONLAKE(i965->intel.device_info)) {
         BEGIN_BATCH(batch, 5);
         OUT_BATCH(batch, CMD_VERTEX_ELEMENTS | 3);
         /* offset 0: X,Y -> {X, Y, 1.0, 1.0} */
@@ -1486,7 +1489,7 @@ i965_render_startup(VADriverContextP ctx)
               ((4 * 4) << VB0_BUFFER_PITCH_SHIFT));
     OUT_RELOC(batch, render_state->vb.vertex_buffer, I915_GEM_DOMAIN_VERTEX, 0, 0);
 
-    if (IS_IRONLAKE(i965->intel.device_id))
+    if (IS_IRONLAKE(i965->intel.device_info))
         OUT_RELOC(batch, render_state->vb.vertex_buffer, I915_GEM_DOMAIN_VERTEX, 0, 12 * 4);
     else
         OUT_BATCH(batch, 3);
@@ -1536,9 +1539,9 @@ i965_clear_dest_region(VADriverContextP ctx)
 
     br13 |= pitch;
 
-    if (IS_GEN6(i965->intel.device_id) ||
-        IS_GEN7(i965->intel.device_id) ||
-        IS_GEN8(i965->intel.device_id)) {
+    if (IS_GEN6(i965->intel.device_info) ||
+        IS_GEN7(i965->intel.device_info) ||
+        IS_GEN8(i965->intel.device_info)) {
         intel_batchbuffer_start_atomic_blt(batch, 24);
         BEGIN_BLT_BATCH(batch, 6);
     } else {
@@ -2553,7 +2556,7 @@ gen7_emit_urb(VADriverContextP ctx)
     struct intel_batchbuffer *batch = i965->batch;
     unsigned int num_urb_entries = 32;
 
-    if (IS_HASWELL(i965->intel.device_id))
+    if (IS_HASWELL(i965->intel.device_info))
         num_urb_entries = 64;
 
     BEGIN_BATCH(batch, 2);
@@ -2862,7 +2865,7 @@ gen7_emit_wm_state(VADriverContextP ctx, int kernel)
     unsigned int max_threads_shift = GEN7_PS_MAX_THREADS_SHIFT_IVB;
     unsigned int num_samples = 0;
 
-    if (IS_HASWELL(i965->intel.device_id)) {
+    if (IS_HASWELL(i965->intel.device_info)) {
         max_threads_shift = GEN7_PS_MAX_THREADS_SHIFT_HSW;
         num_samples = 1 << GEN7_PS_SAMPLE_MASK_SHIFT_HSW;
     }
@@ -3132,9 +3135,52 @@ intel_render_put_subpicture(
     render_state->render_put_subpicture(ctx, obj_surface, src_rect, dst_rect);
 }
 
+static void
+genx_render_terminate(VADriverContextP ctx)
+{
+    int i;
+    struct i965_driver_data *i965 = i965_driver_data(ctx);
+    struct i965_render_state *render_state = &i965->render_state;
+
+    dri_bo_unreference(render_state->curbe.bo);
+    render_state->curbe.bo = NULL;
+
+    for (i = 0; i < NUM_RENDER_KERNEL; i++) {
+        struct i965_kernel *kernel = &render_state->render_kernels[i];
+
+        dri_bo_unreference(kernel->bo);
+        kernel->bo = NULL;
+    }
+
+    dri_bo_unreference(render_state->vb.vertex_buffer);
+    render_state->vb.vertex_buffer = NULL;
+    dri_bo_unreference(render_state->vs.state);
+    render_state->vs.state = NULL;
+    dri_bo_unreference(render_state->sf.state);
+    render_state->sf.state = NULL;
+    dri_bo_unreference(render_state->wm.sampler);
+    render_state->wm.sampler = NULL;
+    dri_bo_unreference(render_state->wm.state);
+    render_state->wm.state = NULL;
+    dri_bo_unreference(render_state->wm.surface_state_binding_table_bo);
+    dri_bo_unreference(render_state->cc.viewport);
+    render_state->cc.viewport = NULL;
+    dri_bo_unreference(render_state->cc.state);
+    render_state->cc.state = NULL;
+    dri_bo_unreference(render_state->cc.blend);
+    render_state->cc.blend = NULL;
+    dri_bo_unreference(render_state->cc.depth_stencil);
+    render_state->cc.depth_stencil = NULL;
+
+    if (render_state->draw_region) {
+        dri_bo_unreference(render_state->draw_region->bo);
+        free(render_state->draw_region);
+        render_state->draw_region = NULL;
+    }
+}
 
 bool 
-i965_render_init(VADriverContextP ctx)
+genx_render_init(VADriverContextP ctx)
 {
     struct i965_driver_data *i965 = i965_driver_data(ctx);
     struct i965_render_state *render_state = &i965->render_state;
@@ -3146,19 +3192,17 @@ i965_render_init(VADriverContextP ctx)
     assert(NUM_RENDER_KERNEL == (sizeof(render_kernels_gen6) / 
                                  sizeof(render_kernels_gen6[0])));
 
-    if (IS_GEN8(i965->intel.device_id)) {
-        return gen8_render_init(ctx);
-    } else  if (IS_GEN7(i965->intel.device_id)) {
+    if (IS_GEN7(i965->intel.device_info)) {
         memcpy(render_state->render_kernels,
-               (IS_HASWELL(i965->intel.device_id) ? render_kernels_gen7_haswell : render_kernels_gen7),
+               (IS_HASWELL(i965->intel.device_info) ? render_kernels_gen7_haswell : render_kernels_gen7),
                sizeof(render_state->render_kernels));
         render_state->render_put_surface = gen7_render_put_surface;
         render_state->render_put_subpicture = gen7_render_put_subpicture;
-    } else if (IS_GEN6(i965->intel.device_id)) {
+    } else if (IS_GEN6(i965->intel.device_info)) {
         memcpy(render_state->render_kernels, render_kernels_gen6, sizeof(render_state->render_kernels));
         render_state->render_put_surface = gen6_render_put_surface;
         render_state->render_put_subpicture = gen6_render_put_subpicture;
-    } else if (IS_IRONLAKE(i965->intel.device_id)) {
+    } else if (IS_IRONLAKE(i965->intel.device_info)) {
         memcpy(render_state->render_kernels, render_kernels_gen5, sizeof(render_state->render_kernels));
         render_state->render_put_surface = i965_render_put_surface;
         render_state->render_put_subpicture = i965_render_put_subpicture;
@@ -3168,6 +3212,8 @@ i965_render_init(VADriverContextP ctx)
         render_state->render_put_subpicture = i965_render_put_subpicture;
     }
 
+    render_state->render_terminate = genx_render_terminate;
+
     for (i = 0; i < NUM_RENDER_KERNEL; i++) {
         struct i965_kernel *kernel = &render_state->render_kernels[i];
 
@@ -3190,52 +3236,19 @@ i965_render_init(VADriverContextP ctx)
     return true;
 }
 
-void 
-i965_render_terminate(VADriverContextP ctx)
+bool
+i965_render_init(VADriverContextP ctx)
 {
-    int i;
     struct i965_driver_data *i965 = i965_driver_data(ctx);
-    struct i965_render_state *render_state = &i965->render_state;
-
-    if (IS_GEN8(i965->intel.device_id)) {
-        gen8_render_terminate(ctx);
-        return;
-    } 
 
-    dri_bo_unreference(render_state->curbe.bo);
-    render_state->curbe.bo = NULL;
-
-    for (i = 0; i < NUM_RENDER_KERNEL; i++) {
-        struct i965_kernel *kernel = &render_state->render_kernels[i];
-        
-        dri_bo_unreference(kernel->bo);
-        kernel->bo = NULL;
-    }
+    return i965->codec_info->render_init(ctx);
+}
 
-    dri_bo_unreference(render_state->vb.vertex_buffer);
-    render_state->vb.vertex_buffer = NULL;
-    dri_bo_unreference(render_state->vs.state);
-    render_state->vs.state = NULL;
-    dri_bo_unreference(render_state->sf.state);
-    render_state->sf.state = NULL;
-    dri_bo_unreference(render_state->wm.sampler);
-    render_state->wm.sampler = NULL;
-    dri_bo_unreference(render_state->wm.state);
-    render_state->wm.state = NULL;
-    dri_bo_unreference(render_state->wm.surface_state_binding_table_bo);
-    dri_bo_unreference(render_state->cc.viewport);
-    render_state->cc.viewport = NULL;
-    dri_bo_unreference(render_state->cc.state);
-    render_state->cc.state = NULL;
-    dri_bo_unreference(render_state->cc.blend);
-    render_state->cc.blend = NULL;
-    dri_bo_unreference(render_state->cc.depth_stencil);
-    render_state->cc.depth_stencil = NULL;
+void
+i965_render_terminate(VADriverContextP ctx)
+{
+    struct i965_driver_data *i965 = i965_driver_data(ctx);
+    struct i965_render_state *render_state = &i965->render_state;
 
-    if (render_state->draw_region) {
-        dri_bo_unreference(render_state->draw_region->bo);
-        free(render_state->draw_region);
-        render_state->draw_region = NULL;
-    }
+    render_state->render_terminate(ctx);
 }
-
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