if (!avc_bsd_surface) {
avc_bsd_surface = calloc(sizeof(GenAvcSurface), 1);
+ avc_bsd_surface->frame_store_id = -1;
assert((obj_surface->size & 0x3f) == 0);
obj_surface->private_data = avc_bsd_surface;
}
{
struct intel_batchbuffer *batch = i965_h264_context->batch;
struct i965_avc_bsd_context *i965_avc_bsd_context;
- int i, j;
+ int i;
VAPictureH264 *va_pic;
struct object_surface *obj_surface;
GenAvcSurface *avc_bsd_surface;
OUT_BCS_BATCH(batch, 0);
for (i = 0; i < ARRAY_ELEMS(i965_h264_context->fsid_list); i++) {
- if (i965_h264_context->fsid_list[i].surface_id != VA_INVALID_ID &&
- i965_h264_context->fsid_list[i].obj_surface &&
- i965_h264_context->fsid_list[i].obj_surface->private_data) {
- int found = 0;
- for (j = 0; j < ARRAY_ELEMS(pic_param->ReferenceFrames); j++) {
- va_pic = &pic_param->ReferenceFrames[j];
-
- if (va_pic->flags & VA_PICTURE_H264_INVALID)
- continue;
-
- if (va_pic->picture_id == i965_h264_context->fsid_list[i].surface_id) {
- found = 1;
- break;
- }
- }
-
- assert(found == 1);
- obj_surface = i965_h264_context->fsid_list[i].obj_surface;
+ obj_surface = i965_h264_context->fsid_list[i].obj_surface;
+ if (obj_surface && obj_surface->private_data) {
avc_bsd_surface = obj_surface->private_data;
OUT_BCS_RELOC(batch, avc_bsd_surface->dmv_top,
va_pic = &pic_param->CurrPic;
obj_surface = decode_state->render_object;
- obj_surface->flags &= ~SURFACE_REF_DIS_MASK;
- obj_surface->flags |= (pic_param->pic_fields.bits.reference_pic_flag ? SURFACE_REFERENCED : 0);
+ if (pic_param->pic_fields.bits.reference_pic_flag)
+ obj_surface->flags |= SURFACE_REFERENCED;
+ else
+ obj_surface->flags &= ~SURFACE_REFERENCED;
i965_check_alloc_surface_bo(ctx, obj_surface, 0, VA_FOURCC_NV12, SUBSAMPLE_YUV420);
/* initial uv component for YUV400 case */
/* POC List */
for (i = 0; i < ARRAY_ELEMS(i965_h264_context->fsid_list); i++) {
- if (i965_h264_context->fsid_list[i].surface_id != VA_INVALID_ID) {
- int found = 0;
- for (j = 0; j < ARRAY_ELEMS(pic_param->ReferenceFrames); j++) {
- va_pic = &pic_param->ReferenceFrames[j];
-
- if (va_pic->flags & VA_PICTURE_H264_INVALID)
- continue;
-
- if (va_pic->picture_id == i965_h264_context->fsid_list[i].surface_id) {
- found = 1;
- break;
- }
- }
+ obj_surface = i965_h264_context->fsid_list[i].obj_surface;
- assert(found == 1);
+ if (obj_surface) {
+ const VAPictureH264 * const va_pic = avc_find_picture(
+ obj_surface->base.id, pic_param->ReferenceFrames,
+ ARRAY_ELEMS(pic_param->ReferenceFrames));
- if (!(va_pic->flags & VA_PICTURE_H264_INVALID)) {
- OUT_BCS_BATCH(batch, va_pic->TopFieldOrderCnt);
- OUT_BCS_BATCH(batch, va_pic->BottomFieldOrderCnt);
- }
+ assert(va_pic != NULL);
+ OUT_BCS_BATCH(batch, va_pic->TopFieldOrderCnt);
+ OUT_BCS_BATCH(batch, va_pic->BottomFieldOrderCnt);
} else {
OUT_BCS_BATCH(batch, 0);
OUT_BCS_BATCH(batch, 0);
{
struct i965_driver_data *i965 = i965_driver_data(ctx);
- if (IS_IRONLAKE(i965->intel.device_id))
+ if (IS_IRONLAKE(i965->intel.device_info))
ironlake_avc_bsd_object(ctx, decode_state, pic_param, slice_param, slice_index, i965_h264_context);
else
g4x_avc_bsd_object(ctx, decode_state, pic_param, slice_param, slice_index, i965_h264_context);
assert(decode_state->pic_param && decode_state->pic_param->buffer);
pic_param = (VAPictureParameterBufferH264 *)decode_state->pic_param->buffer;
- intel_update_avc_frame_store_index(ctx, decode_state, pic_param, i965_h264_context->fsid_list);
+ intel_update_avc_frame_store_index(ctx, decode_state, pic_param,
+ i965_h264_context->fsid_list, &i965_h264_context->fs_ctx);
i965_h264_context->enable_avc_ildb = 0;
i965_h264_context->picture.i_flag = 1;