posst_processing_context_init()/finalize() callback functions for each platform

[platform/upstream/libva-intel-driver.git] / src / gen8_post_processing.c

diff --git a/src/gen8_post_processing.c b/src/gen8_post_processing.c
index 78f5a83..4ff7f41 100644 (file)
--- a/src/gen8_post_processing.c
+++ b/src/gen8_post_processing.c
@@ -41,10 +41,10 @@
 #include "i965_render.h"
 #include "intel_media.h"
 
-#define HAS_PP(ctx) (IS_IRONLAKE((ctx)->intel.device_id) ||     \
-                     IS_GEN6((ctx)->intel.device_id) ||         \
-                     IS_GEN7((ctx)->intel.device_id) ||         \
-                     IS_GEN8((ctx)->intel.device_id))
+#define HAS_PP(ctx) (IS_IRONLAKE((ctx)->intel.device_info) ||     \
+                     IS_GEN6((ctx)->intel.device_info) ||         \
+                     IS_GEN7((ctx)->intel.device_info) ||         \
+                     IS_GEN8((ctx)->intel.device_info))
 
 
 #define SURFACE_STATE_PADDED_SIZE               SURFACE_STATE_PADDED_SIZE_GEN8
@@ -469,16 +469,18 @@ gen8_pp_set_media_rw_message_surface(VADriverContextP ctx, struct i965_post_proc
     struct object_image *obj_image;
     dri_bo *bo;
     int fourcc = pp_get_surface_fourcc(ctx, surface);
-    const int U = (fourcc == VA_FOURCC('Y', 'V', '1', '2') ||
-                   fourcc == VA_FOURCC('I', 'M', 'C', '1')) ? 2 : 1;
-    const int V = (fourcc == VA_FOURCC('Y', 'V', '1', '2') ||
-                   fourcc == VA_FOURCC('I', 'M', 'C', '1')) ? 1 : 2;
-    int interleaved_uv = fourcc == VA_FOURCC('N', 'V', '1', '2');
-    int packed_yuv = (fourcc == VA_FOURCC('Y', 'U', 'Y', '2') || fourcc == VA_FOURCC('U', 'Y', 'V', 'Y'));
-    int rgbx_format = (fourcc == VA_FOURCC('R', 'G', 'B', 'A') ||
-                              fourcc == VA_FOURCC('R', 'G', 'B', 'X') ||
-                              fourcc == VA_FOURCC('B', 'G', 'R', 'A') ||
-                              fourcc == VA_FOURCC('B', 'G', 'R', 'X'));
+    const int U = (fourcc == VA_FOURCC_YV12 ||
+                   fourcc == VA_FOURCC_YV16 ||
+                   fourcc == VA_FOURCC_IMC1) ? 2 : 1;
+    const int V = (fourcc == VA_FOURCC_YV12 ||
+                   fourcc == VA_FOURCC_YV16 ||
+                   fourcc == VA_FOURCC_IMC1) ? 1 : 2;
+    int interleaved_uv = fourcc == VA_FOURCC_NV12;
+    int packed_yuv = (fourcc == VA_FOURCC_YUY2 || fourcc == VA_FOURCC_UYVY);
+    int rgbx_format = (fourcc == VA_FOURCC_RGBA ||
+                              fourcc == VA_FOURCC_RGBX ||
+                              fourcc == VA_FOURCC_BGRA ||
+                              fourcc == VA_FOURCC_BGRX);
 
     if (surface->type == I965_SURFACE_TYPE_SURFACE) {
         obj_surface = (struct object_surface *)surface->base;
@@ -538,6 +540,12 @@ gen8_pp_set_media_rw_message_surface(VADriverContextP ctx, struct i965_post_proc
             height[2] = obj_image->image.height / 2;
             pitch[2] = obj_image->image.pitches[V];
             offset[2] = obj_image->image.offsets[V];
+            if (fourcc == VA_FOURCC_YV16 || fourcc == VA_FOURCC_422H) {
+                width[1] = obj_image->image.width / 2;
+                height[1] = obj_image->image.height;
+                width[2] = obj_image->image.width / 2;
+                height[2] = obj_image->image.height;
+            }
         }
     }
 
@@ -551,8 +559,8 @@ gen8_pp_set_media_rw_message_surface(VADriverContextP ctx, struct i965_post_proc
                struct gen7_pp_static_parameter *pp_static_parameter = pp_context->pp_static_parameter;
                /* the format is MSB: X-B-G-R */
                pp_static_parameter->grf2.save_avs_rgb_swap = 0;
-               if ((fourcc == VA_FOURCC('B', 'G', 'R', 'A')) ||
-                        (fourcc == VA_FOURCC('B', 'G', 'R', 'X'))) {
+               if ((fourcc == VA_FOURCC_BGRA) ||
+                        (fourcc == VA_FOURCC_BGRX)) {
                        /* It is stored as MSB: X-R-G-B */
                        pp_static_parameter->grf2.save_avs_rgb_swap = 1;
                }
@@ -581,11 +589,11 @@ gen8_pp_set_media_rw_message_surface(VADriverContextP ctx, struct i965_post_proc
         int format0 = SURFACE_FORMAT_Y8_UNORM;
 
         switch (fourcc) {
-        case VA_FOURCC('Y', 'U', 'Y', '2'):
+        case VA_FOURCC_YUY2:
             format0 = SURFACE_FORMAT_YCRCB_NORMAL;
             break;
 
-        case VA_FOURCC('U', 'Y', 'V', 'Y'):
+        case VA_FOURCC_UYVY:
             format0 = SURFACE_FORMAT_YCRCB_SWAPY;
             break;
 
@@ -597,8 +605,8 @@ gen8_pp_set_media_rw_message_surface(VADriverContextP ctx, struct i965_post_proc
            /* Only R8G8B8A8_UNORM is supported for BGRX or RGBX */
            format0 = SURFACE_FORMAT_R8G8B8A8_UNORM;
            pp_static_parameter->grf2.src_avs_rgb_swap = 0;
-           if ((fourcc == VA_FOURCC('B', 'G', 'R', 'A')) ||
-                (fourcc == VA_FOURCC('B', 'G', 'R', 'X'))) {
+           if ((fourcc == VA_FOURCC_BGRA) ||
+                (fourcc == VA_FOURCC_BGRX)) {
                pp_static_parameter->grf2.src_avs_rgb_swap = 1;
            }
        }
@@ -743,11 +751,11 @@ static void gen7_update_src_surface_uv_offset(VADriverContextP    ctx,
     struct gen7_pp_static_parameter *pp_static_parameter = pp_context->pp_static_parameter;
     int fourcc = pp_get_surface_fourcc(ctx, surface);
 
-    if (fourcc == VA_FOURCC('Y', 'U', 'Y', '2')) {
+    if (fourcc == VA_FOURCC_YUY2) {
         pp_static_parameter->grf2.di_destination_packed_y_component_offset = 0;
         pp_static_parameter->grf2.di_destination_packed_u_component_offset = 1;
         pp_static_parameter->grf2.di_destination_packed_v_component_offset = 3;
-    } else if (fourcc == VA_FOURCC('U', 'Y', 'V', 'Y')) {
+    } else if (fourcc == VA_FOURCC_UYVY) {
         pp_static_parameter->grf2.di_destination_packed_y_component_offset = 1;
         pp_static_parameter->grf2.di_destination_packed_u_component_offset = 0;
         pp_static_parameter->grf2.di_destination_packed_v_component_offset = 2;
@@ -965,6 +973,7 @@ gen8_pp_plx_avs_initialize(VADriverContextP ctx, struct i965_post_processing_con
     pp_static_parameter->grf2.avs_wa_width = src_width;
     pp_static_parameter->grf2.avs_wa_one_div_256_width = (float) 1.0 / (256 * src_width);
     pp_static_parameter->grf2.avs_wa_five_div_256_width = (float) 5.0 / (256 * src_width);
+    pp_static_parameter->grf2.alpha = 255;
 
     pp_static_parameter->grf3.sampler_load_horizontal_scaling_step_ratio = (float) pp_avs_context->src_w / dw;
     pp_static_parameter->grf4.sampler_load_vertical_scaling_step = (float) src_rect->height / src_height / dst_rect->height;
@@ -1231,7 +1240,7 @@ gen8_pp_curbe_load(VADriverContextP ctx,
     struct i965_driver_data *i965 = i965_driver_data(ctx);
     int param_size = 64;
 
-    if (IS_GEN8(i965->intel.device_id))
+    if (IS_GEN8(i965->intel.device_info))
         param_size = sizeof(struct gen7_pp_static_parameter);
 
     BEGIN_BATCH(batch, 4);
@@ -1255,7 +1264,7 @@ gen8_pp_object_walker(VADriverContextP ctx,
     unsigned int *command_ptr;
 
     param_size = sizeof(struct gen7_pp_inline_parameter);
-    if (IS_GEN8(i965->intel.device_id))
+    if (IS_GEN8(i965->intel.device_info))
         param_size = sizeof(struct gen7_pp_inline_parameter);
 
     x_steps = pp_context->pp_x_steps(pp_context->private_context);
@@ -1297,7 +1306,7 @@ gen8_pp_object_walker(VADriverContextP ctx,
 
     dri_bo_unmap(command_buffer);
 
-    if (IS_GEN8(i965->intel.device_id)) {
+    if (IS_GEN8(i965->intel.device_info)) {
        BEGIN_BATCH(batch, 3);
        OUT_BATCH(batch, MI_BATCH_BUFFER_START | (1 << 8) | (1 << 0));
        OUT_RELOC(batch, command_buffer,
@@ -1364,7 +1373,7 @@ gen8_post_processing(
     return va_status;
 }
 
-void
+static void
 gen8_post_processing_context_finalize(struct i965_post_processing_context *pp_context)
 {
     dri_bo_unreference(pp_context->surface_state_binding_table.bo);
@@ -1401,7 +1410,7 @@ gen8_post_processing_context_finalize(struct i965_post_processing_context *pp_co
 
 void
 gen8_post_processing_context_init(VADriverContextP ctx,
-                                  struct i965_post_processing_context *pp_context,
+                                  void *data,
                                   struct intel_batchbuffer *batch)
 {
     struct i965_driver_data *i965 = i965_driver_data(ctx);
@@ -1409,6 +1418,7 @@ gen8_post_processing_context_init(VADriverContextP ctx,
     unsigned int kernel_offset, end_offset;
     unsigned char *kernel_ptr;
     struct pp_module *pp_module;
+    struct i965_post_processing_context *pp_context = data;
 
     {
        pp_context->vfe_gpu_state.max_num_threads = 60;
@@ -1419,10 +1429,11 @@ gen8_post_processing_context_init(VADriverContextP ctx,
     }
 
     pp_context->intel_post_processing = gen8_post_processing;
+    pp_context->finalize = gen8_post_processing_context_finalize;
 
     assert(NUM_PP_MODULES == ARRAY_ELEMS(pp_modules_gen8));
 
-    if (IS_GEN8(i965->intel.device_id))
+    if (IS_GEN8(i965->intel.device_info))
         memcpy(pp_context->pp_modules, pp_modules_gen8, sizeof(pp_context->pp_modules));
     else {
         /* should never get here !!! */
@@ -1476,7 +1487,7 @@ gen8_post_processing_context_init(VADriverContextP ctx,
     dri_bo_unmap(pp_context->instruction_state.bo);
 
     /* static & inline parameters */
-    if (IS_GEN8(i965->intel.device_id)) {
+    if (IS_GEN8(i965->intel.device_info)) {
         pp_context->pp_static_parameter = calloc(sizeof(struct gen7_pp_static_parameter), 1);
         pp_context->pp_inline_parameter = calloc(sizeof(struct gen7_pp_inline_parameter), 1);
     }