Add new tests for OpSConvert and OpFConvert
[platform/upstream/VK-GL-CTS.git] / android / cts / master / vk-master.txt
index a61ab53..f1fa4d3 100644 (file)
@@ -58487,6 +58487,2950 @@ dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.d32_sfloat_s
 dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint.optimal_general_nearest
 dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint.general_optimal_nearest
 dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_uint_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_uint_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_uint_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_uint_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_uint_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_uint_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_uint_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_uint_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_uint_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_uint_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_uint_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_uint_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32b32_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32b32_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32b32_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32b32_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32b32a32_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32b32a32_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32b32a32_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32b32a32_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_sint_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_sint_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_sint_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_sint_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_sint_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_sint_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_sint_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_sint_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_sint_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_sint_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_sint_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_sint_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32b32_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32b32_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32b32_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32b32_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32b32a32_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32b32a32_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32b32a32_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32b32a32_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r4g4_unorm_pack8.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r4g4_unorm_pack8.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r4g4_unorm_pack8.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r4g4_unorm_pack8.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r4g4_unorm_pack8.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r4g4_unorm_pack8.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r4g4_unorm_pack8.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r4g4_unorm_pack8.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r4g4b4a4_unorm_pack16.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r4g4b4a4_unorm_pack16.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r4g4b4a4_unorm_pack16.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r4g4b4a4_unorm_pack16.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r4g4b4a4_unorm_pack16.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r4g4b4a4_unorm_pack16.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r4g4b4a4_unorm_pack16.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r4g4b4a4_unorm_pack16.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b4g4r4a4_unorm_pack16.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b4g4r4a4_unorm_pack16.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b4g4r4a4_unorm_pack16.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b4g4r4a4_unorm_pack16.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b4g4r4a4_unorm_pack16.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b4g4r4a4_unorm_pack16.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b4g4r4a4_unorm_pack16.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b4g4r4a4_unorm_pack16.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r5g6b5_unorm_pack16.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r5g6b5_unorm_pack16.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r5g6b5_unorm_pack16.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r5g6b5_unorm_pack16.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r5g6b5_unorm_pack16.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r5g6b5_unorm_pack16.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r5g6b5_unorm_pack16.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r5g6b5_unorm_pack16.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b5g6r5_unorm_pack16.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b5g6r5_unorm_pack16.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b5g6r5_unorm_pack16.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b5g6r5_unorm_pack16.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b5g6r5_unorm_pack16.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b5g6r5_unorm_pack16.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b5g6r5_unorm_pack16.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b5g6r5_unorm_pack16.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r5g5b5a1_unorm_pack16.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r5g5b5a1_unorm_pack16.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r5g5b5a1_unorm_pack16.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r5g5b5a1_unorm_pack16.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r5g5b5a1_unorm_pack16.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r5g5b5a1_unorm_pack16.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r5g5b5a1_unorm_pack16.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r5g5b5a1_unorm_pack16.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b5g5r5a1_unorm_pack16.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b5g5r5a1_unorm_pack16.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b5g5r5a1_unorm_pack16.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b5g5r5a1_unorm_pack16.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b5g5r5a1_unorm_pack16.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b5g5r5a1_unorm_pack16.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b5g5r5a1_unorm_pack16.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b5g5r5a1_unorm_pack16.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a1r5g5b5_unorm_pack16.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a1r5g5b5_unorm_pack16.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a1r5g5b5_unorm_pack16.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a1r5g5b5_unorm_pack16.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a1r5g5b5_unorm_pack16.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a1r5g5b5_unorm_pack16.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a1r5g5b5_unorm_pack16.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a1r5g5b5_unorm_pack16.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_unorm_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_unorm_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_unorm_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_unorm_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_unorm_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_unorm_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_unorm_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_unorm_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_snorm_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_snorm_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_snorm_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_snorm_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_snorm_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_snorm_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_snorm_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_snorm_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_uscaled_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_uscaled_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_uscaled_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_uscaled_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_uscaled_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_uscaled_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_uscaled_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_uscaled_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_sscaled_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_sscaled_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_sscaled_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_sscaled_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_sscaled_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_sscaled_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_sscaled_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_sscaled_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_unorm_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_unorm_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_unorm_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_unorm_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_unorm_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_unorm_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_unorm_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_unorm_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_snorm_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_snorm_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_snorm_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_snorm_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_snorm_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_snorm_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_snorm_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_snorm_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_uscaled_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_uscaled_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_uscaled_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_uscaled_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_uscaled_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_uscaled_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_uscaled_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_uscaled_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_sscaled_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_sscaled_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_sscaled_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_sscaled_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_sscaled_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_sscaled_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_sscaled_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_sscaled_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_unorm_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_unorm_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_unorm_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_unorm_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_unorm_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_unorm_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_unorm_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_unorm_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_snorm_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_snorm_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_snorm_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_snorm_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_snorm_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_snorm_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_snorm_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_snorm_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_uscaled_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_uscaled_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_uscaled_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_uscaled_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_uscaled_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_uscaled_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_uscaled_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_uscaled_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_sscaled_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_sscaled_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_sscaled_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_sscaled_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_sscaled_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_sscaled_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_sscaled_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_sscaled_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_sfloat.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_sfloat.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_sfloat.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_sfloat.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_sfloat.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_sfloat.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_sfloat.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_sfloat.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_sfloat.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_sfloat.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_sfloat.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_sfloat.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_sfloat.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_sfloat.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_sfloat.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_sfloat.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_sfloat.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_sfloat.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_sfloat.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_sfloat.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_sfloat.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_sfloat.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_sfloat.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_sfloat.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_sfloat.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_sfloat.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_sfloat.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_sfloat.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_sfloat.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_sfloat.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_sfloat.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_sfloat.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32_sfloat.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32_sfloat.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32_sfloat.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32_sfloat.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32_sfloat.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32_sfloat.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32_sfloat.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32_sfloat.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32_sfloat.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32_sfloat.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32_sfloat.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32_sfloat.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32_sfloat.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32_sfloat.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32_sfloat.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32_sfloat.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32b32_sfloat.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32b32_sfloat.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32b32_sfloat.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32b32_sfloat.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32b32_sfloat.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32b32_sfloat.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32b32_sfloat.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32b32_sfloat.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32b32a32_sfloat.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32b32a32_sfloat.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32b32a32_sfloat.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32b32a32_sfloat.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32b32a32_sfloat.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32b32a32_sfloat.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32b32a32_sfloat.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32b32a32_sfloat.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_srgb.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_srgb.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_srgb.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_srgb.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_srgb.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_srgb.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_srgb.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_srgb.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_srgb.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_srgb.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_srgb.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_srgb.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_srgb.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_srgb.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_srgb.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_srgb.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_srgb.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_srgb.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_srgb.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_srgb.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_srgb.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_srgb.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_srgb.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_srgb.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_srgb.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_srgb.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_srgb.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_srgb.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_srgb.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_srgb.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_srgb.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_srgb.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_srgb.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_srgb.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_srgb.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_srgb.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_srgb.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_srgb.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_srgb.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_srgb.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_srgb.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_srgb.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_srgb.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_srgb.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_srgb.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_srgb.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_srgb.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_srgb.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_srgb_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_srgb_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_srgb_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_srgb_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_srgb_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_srgb_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_srgb_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_srgb_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_uint_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_uint_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_uint_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_uint_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_uint_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_uint_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_uint_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_uint_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_uint_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_uint_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_uint_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_uint_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32b32_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32b32_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32b32_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32b32_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32b32a32_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32b32a32_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32b32a32_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32b32a32_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_sint_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_sint_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_sint_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_sint_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_sint_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_sint_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_sint_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_sint_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_sint_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_sint_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_sint_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_sint_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32b32_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32b32_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32b32_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32b32_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32b32a32_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32b32a32_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32b32a32_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32b32a32_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r4g4_unorm_pack8.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r4g4_unorm_pack8.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r4g4_unorm_pack8.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r4g4_unorm_pack8.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r4g4_unorm_pack8.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r4g4_unorm_pack8.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r4g4_unorm_pack8.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r4g4_unorm_pack8.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r4g4b4a4_unorm_pack16.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r4g4b4a4_unorm_pack16.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r4g4b4a4_unorm_pack16.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r4g4b4a4_unorm_pack16.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r4g4b4a4_unorm_pack16.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r4g4b4a4_unorm_pack16.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r4g4b4a4_unorm_pack16.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r4g4b4a4_unorm_pack16.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b4g4r4a4_unorm_pack16.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b4g4r4a4_unorm_pack16.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b4g4r4a4_unorm_pack16.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b4g4r4a4_unorm_pack16.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b4g4r4a4_unorm_pack16.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b4g4r4a4_unorm_pack16.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b4g4r4a4_unorm_pack16.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b4g4r4a4_unorm_pack16.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r5g6b5_unorm_pack16.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r5g6b5_unorm_pack16.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r5g6b5_unorm_pack16.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r5g6b5_unorm_pack16.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r5g6b5_unorm_pack16.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r5g6b5_unorm_pack16.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r5g6b5_unorm_pack16.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r5g6b5_unorm_pack16.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b5g6r5_unorm_pack16.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b5g6r5_unorm_pack16.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b5g6r5_unorm_pack16.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b5g6r5_unorm_pack16.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b5g6r5_unorm_pack16.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b5g6r5_unorm_pack16.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b5g6r5_unorm_pack16.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b5g6r5_unorm_pack16.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r5g5b5a1_unorm_pack16.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r5g5b5a1_unorm_pack16.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r5g5b5a1_unorm_pack16.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r5g5b5a1_unorm_pack16.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r5g5b5a1_unorm_pack16.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r5g5b5a1_unorm_pack16.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r5g5b5a1_unorm_pack16.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r5g5b5a1_unorm_pack16.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b5g5r5a1_unorm_pack16.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b5g5r5a1_unorm_pack16.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b5g5r5a1_unorm_pack16.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b5g5r5a1_unorm_pack16.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b5g5r5a1_unorm_pack16.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b5g5r5a1_unorm_pack16.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b5g5r5a1_unorm_pack16.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b5g5r5a1_unorm_pack16.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a1r5g5b5_unorm_pack16.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a1r5g5b5_unorm_pack16.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a1r5g5b5_unorm_pack16.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a1r5g5b5_unorm_pack16.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a1r5g5b5_unorm_pack16.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a1r5g5b5_unorm_pack16.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a1r5g5b5_unorm_pack16.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a1r5g5b5_unorm_pack16.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_unorm_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_unorm_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_unorm_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_unorm_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_unorm_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_unorm_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_unorm_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_unorm_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_snorm_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_snorm_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_snorm_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_snorm_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_snorm_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_snorm_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_snorm_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_snorm_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_uscaled_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_uscaled_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_uscaled_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_uscaled_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_uscaled_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_uscaled_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_uscaled_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_uscaled_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_sscaled_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_sscaled_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_sscaled_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_sscaled_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_sscaled_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_sscaled_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_sscaled_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_sscaled_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_unorm_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_unorm_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_unorm_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_unorm_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_unorm_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_unorm_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_unorm_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_unorm_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_snorm_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_snorm_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_snorm_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_snorm_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_snorm_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_snorm_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_snorm_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_snorm_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_uscaled_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_uscaled_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_uscaled_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_uscaled_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_uscaled_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_uscaled_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_uscaled_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_uscaled_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_sscaled_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_sscaled_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_sscaled_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_sscaled_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_sscaled_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_sscaled_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_sscaled_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_sscaled_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_unorm_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_unorm_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_unorm_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_unorm_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_unorm_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_unorm_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_unorm_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_unorm_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_snorm_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_snorm_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_snorm_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_snorm_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_snorm_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_snorm_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_snorm_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_snorm_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_uscaled_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_uscaled_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_uscaled_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_uscaled_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_uscaled_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_uscaled_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_uscaled_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_uscaled_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_sscaled_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_sscaled_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_sscaled_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_sscaled_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_sscaled_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_sscaled_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_sscaled_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_sscaled_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_sfloat.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_sfloat.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_sfloat.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_sfloat.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_sfloat.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_sfloat.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_sfloat.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_sfloat.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_sfloat.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_sfloat.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_sfloat.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_sfloat.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_sfloat.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_sfloat.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_sfloat.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_sfloat.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_sfloat.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_sfloat.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_sfloat.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_sfloat.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_sfloat.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_sfloat.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_sfloat.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_sfloat.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_sfloat.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_sfloat.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_sfloat.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_sfloat.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_sfloat.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_sfloat.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_sfloat.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_sfloat.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32_sfloat.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32_sfloat.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32_sfloat.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32_sfloat.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32_sfloat.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32_sfloat.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32_sfloat.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32_sfloat.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32_sfloat.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32_sfloat.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32_sfloat.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32_sfloat.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32_sfloat.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32_sfloat.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32_sfloat.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32_sfloat.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32b32_sfloat.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32b32_sfloat.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32b32_sfloat.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32b32_sfloat.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32b32_sfloat.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32b32_sfloat.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32b32_sfloat.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32b32_sfloat.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32b32a32_sfloat.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32b32a32_sfloat.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32b32a32_sfloat.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32b32a32_sfloat.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32b32a32_sfloat.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32b32a32_sfloat.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32b32a32_sfloat.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32b32a32_sfloat.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_srgb.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_srgb.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_srgb.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_srgb.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_srgb.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_srgb.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_srgb.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_srgb.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_srgb.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_srgb.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_srgb.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_srgb.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_srgb.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_srgb.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_srgb.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_srgb.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_srgb.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_srgb.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_srgb.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_srgb.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_srgb.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_srgb.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_srgb.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_srgb.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_srgb.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_srgb.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_srgb.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_srgb.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_srgb.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_srgb.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_srgb.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_srgb.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_srgb.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_srgb.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_srgb.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_srgb.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_srgb.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_srgb.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_srgb.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_srgb.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_srgb.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_srgb.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_srgb.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_srgb.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_srgb.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_srgb.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_srgb.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_srgb.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_srgb_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_srgb_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_srgb_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_srgb_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_srgb_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_srgb_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_srgb_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_srgb_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_uint_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_uint_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_uint_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_uint_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_uint_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_uint_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_uint_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_uint_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_uint_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_uint_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_uint_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_uint_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32b32_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32b32_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32b32_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32b32_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32b32a32_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32b32a32_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32b32a32_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32b32a32_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_sint_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_sint_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_sint_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_sint_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_sint_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_sint_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_sint_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_sint_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_sint_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_sint_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_sint_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_sint_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32b32_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32b32_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32b32_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32b32_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32b32a32_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32b32a32_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32b32a32_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32b32a32_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r4g4_unorm_pack8.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r4g4_unorm_pack8.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r4g4_unorm_pack8.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r4g4_unorm_pack8.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r4g4_unorm_pack8.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r4g4_unorm_pack8.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r4g4_unorm_pack8.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r4g4_unorm_pack8.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r4g4b4a4_unorm_pack16.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r4g4b4a4_unorm_pack16.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r4g4b4a4_unorm_pack16.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r4g4b4a4_unorm_pack16.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r4g4b4a4_unorm_pack16.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r4g4b4a4_unorm_pack16.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r4g4b4a4_unorm_pack16.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r4g4b4a4_unorm_pack16.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b4g4r4a4_unorm_pack16.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b4g4r4a4_unorm_pack16.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b4g4r4a4_unorm_pack16.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b4g4r4a4_unorm_pack16.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b4g4r4a4_unorm_pack16.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b4g4r4a4_unorm_pack16.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b4g4r4a4_unorm_pack16.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b4g4r4a4_unorm_pack16.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r5g6b5_unorm_pack16.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r5g6b5_unorm_pack16.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r5g6b5_unorm_pack16.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r5g6b5_unorm_pack16.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r5g6b5_unorm_pack16.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r5g6b5_unorm_pack16.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r5g6b5_unorm_pack16.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r5g6b5_unorm_pack16.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b5g6r5_unorm_pack16.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b5g6r5_unorm_pack16.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b5g6r5_unorm_pack16.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b5g6r5_unorm_pack16.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b5g6r5_unorm_pack16.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b5g6r5_unorm_pack16.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b5g6r5_unorm_pack16.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b5g6r5_unorm_pack16.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r5g5b5a1_unorm_pack16.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r5g5b5a1_unorm_pack16.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r5g5b5a1_unorm_pack16.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r5g5b5a1_unorm_pack16.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r5g5b5a1_unorm_pack16.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r5g5b5a1_unorm_pack16.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r5g5b5a1_unorm_pack16.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r5g5b5a1_unorm_pack16.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b5g5r5a1_unorm_pack16.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b5g5r5a1_unorm_pack16.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b5g5r5a1_unorm_pack16.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b5g5r5a1_unorm_pack16.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b5g5r5a1_unorm_pack16.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b5g5r5a1_unorm_pack16.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b5g5r5a1_unorm_pack16.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b5g5r5a1_unorm_pack16.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a1r5g5b5_unorm_pack16.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a1r5g5b5_unorm_pack16.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a1r5g5b5_unorm_pack16.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a1r5g5b5_unorm_pack16.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a1r5g5b5_unorm_pack16.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a1r5g5b5_unorm_pack16.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a1r5g5b5_unorm_pack16.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a1r5g5b5_unorm_pack16.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_unorm_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_unorm_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_unorm_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_unorm_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_unorm_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_unorm_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_unorm_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_unorm_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_snorm_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_snorm_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_snorm_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_snorm_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_snorm_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_snorm_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_snorm_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_snorm_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_uscaled_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_uscaled_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_uscaled_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_uscaled_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_uscaled_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_uscaled_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_uscaled_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_uscaled_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_sscaled_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_sscaled_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_sscaled_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_sscaled_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_sscaled_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_sscaled_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_sscaled_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_sscaled_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_unorm_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_unorm_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_unorm_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_unorm_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_unorm_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_unorm_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_unorm_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_unorm_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_snorm_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_snorm_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_snorm_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_snorm_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_snorm_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_snorm_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_snorm_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_snorm_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_uscaled_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_uscaled_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_uscaled_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_uscaled_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_uscaled_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_uscaled_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_uscaled_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_uscaled_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_sscaled_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_sscaled_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_sscaled_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_sscaled_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_sscaled_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_sscaled_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_sscaled_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_sscaled_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_unorm_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_unorm_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_unorm_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_unorm_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_unorm_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_unorm_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_unorm_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_unorm_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_snorm_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_snorm_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_snorm_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_snorm_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_snorm_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_snorm_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_snorm_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_snorm_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_uscaled_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_uscaled_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_uscaled_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_uscaled_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_uscaled_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_uscaled_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_uscaled_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_uscaled_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_sscaled_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_sscaled_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_sscaled_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_sscaled_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_sscaled_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_sscaled_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_sscaled_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_sscaled_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_sfloat.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_sfloat.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_sfloat.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_sfloat.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_sfloat.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_sfloat.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_sfloat.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_sfloat.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_sfloat.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_sfloat.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_sfloat.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_sfloat.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_sfloat.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_sfloat.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_sfloat.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_sfloat.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_sfloat.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_sfloat.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_sfloat.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_sfloat.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_sfloat.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_sfloat.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_sfloat.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_sfloat.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_sfloat.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_sfloat.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_sfloat.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_sfloat.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_sfloat.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_sfloat.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_sfloat.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_sfloat.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32_sfloat.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32_sfloat.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32_sfloat.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32_sfloat.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32_sfloat.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32_sfloat.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32_sfloat.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32_sfloat.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32_sfloat.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32_sfloat.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32_sfloat.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32_sfloat.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32_sfloat.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32_sfloat.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32_sfloat.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32_sfloat.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32b32_sfloat.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32b32_sfloat.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32b32_sfloat.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32b32_sfloat.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32b32_sfloat.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32b32_sfloat.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32b32_sfloat.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32b32_sfloat.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32b32a32_sfloat.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32b32a32_sfloat.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32b32a32_sfloat.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32b32a32_sfloat.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32b32a32_sfloat.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32b32a32_sfloat.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32b32a32_sfloat.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32b32a32_sfloat.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_srgb.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_srgb.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_srgb.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_srgb.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_srgb.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_srgb.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_srgb.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_srgb.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_srgb.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_srgb.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_srgb.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_srgb.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_srgb.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_srgb.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_srgb.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_srgb.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_srgb.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_srgb.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_srgb.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_srgb.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_srgb.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_srgb.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_srgb.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_srgb.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_srgb.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_srgb.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_srgb.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_srgb.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_srgb.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_srgb.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_srgb.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_srgb.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_srgb.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_srgb.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_srgb.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_srgb.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_srgb.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_srgb.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_srgb.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_srgb.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_srgb.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_srgb.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_srgb.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_srgb.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_srgb.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_srgb.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_srgb.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_srgb.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_srgb_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_srgb_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_srgb_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_srgb_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_srgb_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_srgb_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_srgb_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_srgb_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_uint_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_uint_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_uint_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_uint_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_uint_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_uint_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_uint_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_uint_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_uint_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_uint_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_uint_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_uint_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32b32_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32b32_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32b32_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32b32_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32b32a32_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32b32a32_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32b32a32_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32b32a32_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_sint_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_sint_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_sint_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_sint_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_sint_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_sint_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_sint_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_sint_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_sint_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_sint_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_sint_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_sint_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32b32_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32b32_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32b32_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32b32_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32b32a32_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32b32a32_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32b32a32_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32b32a32_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r4g4_unorm_pack8.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r4g4_unorm_pack8.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r4g4_unorm_pack8.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r4g4_unorm_pack8.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r4g4_unorm_pack8.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r4g4_unorm_pack8.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r4g4_unorm_pack8.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r4g4_unorm_pack8.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r4g4b4a4_unorm_pack16.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r4g4b4a4_unorm_pack16.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r4g4b4a4_unorm_pack16.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r4g4b4a4_unorm_pack16.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r4g4b4a4_unorm_pack16.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r4g4b4a4_unorm_pack16.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r4g4b4a4_unorm_pack16.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r4g4b4a4_unorm_pack16.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b4g4r4a4_unorm_pack16.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b4g4r4a4_unorm_pack16.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b4g4r4a4_unorm_pack16.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b4g4r4a4_unorm_pack16.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b4g4r4a4_unorm_pack16.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b4g4r4a4_unorm_pack16.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b4g4r4a4_unorm_pack16.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b4g4r4a4_unorm_pack16.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r5g6b5_unorm_pack16.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r5g6b5_unorm_pack16.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r5g6b5_unorm_pack16.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r5g6b5_unorm_pack16.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r5g6b5_unorm_pack16.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r5g6b5_unorm_pack16.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r5g6b5_unorm_pack16.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r5g6b5_unorm_pack16.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b5g6r5_unorm_pack16.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b5g6r5_unorm_pack16.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b5g6r5_unorm_pack16.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b5g6r5_unorm_pack16.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b5g6r5_unorm_pack16.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b5g6r5_unorm_pack16.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b5g6r5_unorm_pack16.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b5g6r5_unorm_pack16.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r5g5b5a1_unorm_pack16.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r5g5b5a1_unorm_pack16.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r5g5b5a1_unorm_pack16.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r5g5b5a1_unorm_pack16.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r5g5b5a1_unorm_pack16.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r5g5b5a1_unorm_pack16.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r5g5b5a1_unorm_pack16.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r5g5b5a1_unorm_pack16.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b5g5r5a1_unorm_pack16.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b5g5r5a1_unorm_pack16.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b5g5r5a1_unorm_pack16.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b5g5r5a1_unorm_pack16.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b5g5r5a1_unorm_pack16.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b5g5r5a1_unorm_pack16.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b5g5r5a1_unorm_pack16.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b5g5r5a1_unorm_pack16.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a1r5g5b5_unorm_pack16.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a1r5g5b5_unorm_pack16.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a1r5g5b5_unorm_pack16.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a1r5g5b5_unorm_pack16.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a1r5g5b5_unorm_pack16.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a1r5g5b5_unorm_pack16.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a1r5g5b5_unorm_pack16.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a1r5g5b5_unorm_pack16.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_unorm_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_unorm_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_unorm_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_unorm_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_unorm_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_unorm_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_unorm_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_unorm_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_snorm_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_snorm_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_snorm_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_snorm_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_snorm_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_snorm_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_snorm_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_snorm_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_uscaled_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_uscaled_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_uscaled_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_uscaled_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_uscaled_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_uscaled_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_uscaled_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_uscaled_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_sscaled_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_sscaled_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_sscaled_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_sscaled_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_sscaled_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_sscaled_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_sscaled_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_sscaled_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_unorm_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_unorm_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_unorm_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_unorm_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_unorm_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_unorm_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_unorm_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_unorm_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_snorm_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_snorm_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_snorm_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_snorm_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_snorm_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_snorm_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_snorm_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_snorm_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_uscaled_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_uscaled_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_uscaled_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_uscaled_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_uscaled_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_uscaled_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_uscaled_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_uscaled_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_sscaled_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_sscaled_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_sscaled_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_sscaled_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_sscaled_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_sscaled_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_sscaled_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_sscaled_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_unorm_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_unorm_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_unorm_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_unorm_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_unorm_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_unorm_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_unorm_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_unorm_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_snorm_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_snorm_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_snorm_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_snorm_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_snorm_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_snorm_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_snorm_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_snorm_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_uscaled_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_uscaled_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_uscaled_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_uscaled_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_uscaled_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_uscaled_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_uscaled_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_uscaled_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_sscaled_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_sscaled_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_sscaled_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_sscaled_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_sscaled_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_sscaled_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_sscaled_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_sscaled_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_sfloat.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_sfloat.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_sfloat.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_sfloat.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_sfloat.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_sfloat.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_sfloat.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_sfloat.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_sfloat.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_sfloat.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_sfloat.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_sfloat.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_sfloat.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_sfloat.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_sfloat.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_sfloat.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_sfloat.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_sfloat.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_sfloat.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_sfloat.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_sfloat.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_sfloat.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_sfloat.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_sfloat.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_sfloat.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_sfloat.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_sfloat.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_sfloat.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_sfloat.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_sfloat.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_sfloat.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_sfloat.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32_sfloat.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32_sfloat.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32_sfloat.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32_sfloat.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32_sfloat.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32_sfloat.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32_sfloat.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32_sfloat.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32_sfloat.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32_sfloat.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32_sfloat.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32_sfloat.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32_sfloat.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32_sfloat.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32_sfloat.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32_sfloat.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32b32_sfloat.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32b32_sfloat.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32b32_sfloat.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32b32_sfloat.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32b32_sfloat.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32b32_sfloat.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32b32_sfloat.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32b32_sfloat.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32b32a32_sfloat.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32b32a32_sfloat.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32b32a32_sfloat.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32b32a32_sfloat.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32b32a32_sfloat.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32b32a32_sfloat.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32b32a32_sfloat.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32b32a32_sfloat.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_srgb.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_srgb.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_srgb.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_srgb.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_srgb.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_srgb.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_srgb.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_srgb.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_srgb.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_srgb.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_srgb.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_srgb.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_srgb.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_srgb.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_srgb.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_srgb.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_srgb.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_srgb.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_srgb.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_srgb.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_srgb.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_srgb.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_srgb.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_srgb.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_srgb.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_srgb.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_srgb.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_srgb.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_srgb.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_srgb.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_srgb.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_srgb.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_srgb.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_srgb.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_srgb.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_srgb.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_srgb.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_srgb.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_srgb.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_srgb.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_srgb.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_srgb.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_srgb.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_srgb.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_srgb.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_srgb.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_srgb.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_srgb.general_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_srgb_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_srgb_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_srgb_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_srgb_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_srgb_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_srgb_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_srgb_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_srgb_pack32.general_general_linear
 dEQP-VK.api.copy_and_blit.core.resolve_image.whole.2_bit
 dEQP-VK.api.copy_and_blit.core.resolve_image.whole.4_bit
 dEQP-VK.api.copy_and_blit.core.resolve_image.whole.8_bit
@@ -61627,6 +64571,2950 @@ dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_sten
 dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint.optimal_general_nearest
 dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint.general_optimal_nearest
 dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_uint_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_uint_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_uint_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_uint_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_uint_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_uint_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_uint_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_uint_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_uint_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_uint_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_uint_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_uint_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32b32_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32b32_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32b32_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32b32_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32b32a32_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32b32a32_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32b32a32_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32b32a32_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_sint_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_sint_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_sint_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_sint_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_sint_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_sint_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_sint_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_sint_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_sint_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_sint_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_sint_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_sint_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32b32_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32b32_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32b32_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32b32_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32b32a32_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32b32a32_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32b32a32_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32b32a32_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r4g4_unorm_pack8.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r4g4_unorm_pack8.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r4g4_unorm_pack8.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r4g4_unorm_pack8.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r4g4_unorm_pack8.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r4g4_unorm_pack8.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r4g4_unorm_pack8.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r4g4_unorm_pack8.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r4g4b4a4_unorm_pack16.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r4g4b4a4_unorm_pack16.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r4g4b4a4_unorm_pack16.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r4g4b4a4_unorm_pack16.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r4g4b4a4_unorm_pack16.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r4g4b4a4_unorm_pack16.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r4g4b4a4_unorm_pack16.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r4g4b4a4_unorm_pack16.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b4g4r4a4_unorm_pack16.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b4g4r4a4_unorm_pack16.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b4g4r4a4_unorm_pack16.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b4g4r4a4_unorm_pack16.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b4g4r4a4_unorm_pack16.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b4g4r4a4_unorm_pack16.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b4g4r4a4_unorm_pack16.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b4g4r4a4_unorm_pack16.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r5g6b5_unorm_pack16.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r5g6b5_unorm_pack16.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r5g6b5_unorm_pack16.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r5g6b5_unorm_pack16.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r5g6b5_unorm_pack16.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r5g6b5_unorm_pack16.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r5g6b5_unorm_pack16.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r5g6b5_unorm_pack16.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b5g6r5_unorm_pack16.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b5g6r5_unorm_pack16.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b5g6r5_unorm_pack16.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b5g6r5_unorm_pack16.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b5g6r5_unorm_pack16.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b5g6r5_unorm_pack16.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b5g6r5_unorm_pack16.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b5g6r5_unorm_pack16.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r5g5b5a1_unorm_pack16.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r5g5b5a1_unorm_pack16.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r5g5b5a1_unorm_pack16.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r5g5b5a1_unorm_pack16.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r5g5b5a1_unorm_pack16.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r5g5b5a1_unorm_pack16.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r5g5b5a1_unorm_pack16.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r5g5b5a1_unorm_pack16.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b5g5r5a1_unorm_pack16.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b5g5r5a1_unorm_pack16.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b5g5r5a1_unorm_pack16.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b5g5r5a1_unorm_pack16.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b5g5r5a1_unorm_pack16.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b5g5r5a1_unorm_pack16.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b5g5r5a1_unorm_pack16.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b5g5r5a1_unorm_pack16.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a1r5g5b5_unorm_pack16.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a1r5g5b5_unorm_pack16.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a1r5g5b5_unorm_pack16.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a1r5g5b5_unorm_pack16.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a1r5g5b5_unorm_pack16.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a1r5g5b5_unorm_pack16.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a1r5g5b5_unorm_pack16.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a1r5g5b5_unorm_pack16.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_unorm_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_unorm_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_unorm_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_unorm_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_unorm_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_unorm_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_unorm_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_unorm_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_snorm_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_snorm_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_snorm_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_snorm_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_snorm_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_snorm_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_snorm_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_snorm_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_uscaled_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_uscaled_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_uscaled_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_uscaled_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_uscaled_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_uscaled_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_uscaled_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_uscaled_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_sscaled_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_sscaled_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_sscaled_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_sscaled_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_sscaled_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_sscaled_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_sscaled_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_sscaled_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_unorm_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_unorm_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_unorm_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_unorm_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_unorm_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_unorm_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_unorm_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_unorm_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_snorm_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_snorm_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_snorm_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_snorm_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_snorm_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_snorm_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_snorm_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_snorm_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_uscaled_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_uscaled_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_uscaled_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_uscaled_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_uscaled_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_uscaled_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_uscaled_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_uscaled_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_sscaled_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_sscaled_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_sscaled_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_sscaled_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_sscaled_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_sscaled_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_sscaled_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2r10g10b10_sscaled_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_unorm_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_unorm_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_unorm_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_unorm_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_unorm_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_unorm_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_unorm_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_unorm_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_snorm_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_snorm_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_snorm_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_snorm_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_snorm_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_snorm_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_snorm_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_snorm_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_uscaled_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_uscaled_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_uscaled_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_uscaled_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_uscaled_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_uscaled_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_uscaled_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_uscaled_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_sscaled_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_sscaled_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_sscaled_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_sscaled_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_sscaled_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_sscaled_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_sscaled_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a2b10g10r10_sscaled_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_sfloat.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_sfloat.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_sfloat.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_sfloat.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_sfloat.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_sfloat.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_sfloat.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16_sfloat.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_sfloat.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_sfloat.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_sfloat.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_sfloat.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_sfloat.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_sfloat.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_sfloat.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16_sfloat.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_sfloat.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_sfloat.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_sfloat.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_sfloat.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_sfloat.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_sfloat.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_sfloat.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16_sfloat.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_sfloat.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_sfloat.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_sfloat.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_sfloat.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_sfloat.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_sfloat.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_sfloat.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r16g16b16a16_sfloat.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32_sfloat.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32_sfloat.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32_sfloat.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32_sfloat.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32_sfloat.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32_sfloat.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32_sfloat.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32_sfloat.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32_sfloat.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32_sfloat.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32_sfloat.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32_sfloat.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32_sfloat.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32_sfloat.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32_sfloat.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32_sfloat.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32b32_sfloat.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32b32_sfloat.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32b32_sfloat.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32b32_sfloat.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32b32_sfloat.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32b32_sfloat.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32b32_sfloat.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32b32_sfloat.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32b32a32_sfloat.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32b32a32_sfloat.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32b32a32_sfloat.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32b32a32_sfloat.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32b32a32_sfloat.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32b32a32_sfloat.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32b32a32_sfloat.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r32g32b32a32_sfloat.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_srgb.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_srgb.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_srgb.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_srgb.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_srgb.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_srgb.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_srgb.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8_srgb.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_srgb.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_srgb.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_srgb.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_srgb.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_srgb.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_srgb.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_srgb.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8_srgb.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_srgb.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_srgb.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_srgb.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_srgb.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_srgb.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_srgb.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_srgb.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8_srgb.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_srgb.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_srgb.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_srgb.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_srgb.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_srgb.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_srgb.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_srgb.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8_srgb.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_srgb.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_srgb.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_srgb.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_srgb.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_srgb.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_srgb.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_srgb.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.r8g8b8a8_srgb.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_srgb.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_srgb.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_srgb.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_srgb.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_srgb.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_srgb.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_srgb.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.b8g8r8a8_srgb.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_srgb_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_srgb_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_srgb_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_srgb_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_srgb_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_srgb_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_srgb_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_1.a8b8g8r8_srgb_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_uint_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_uint_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_uint_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_uint_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_uint_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_uint_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_uint_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_uint_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_uint_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_uint_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_uint_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_uint_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32b32_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32b32_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32b32_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32b32_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32b32a32_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32b32a32_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32b32a32_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32b32a32_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_sint_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_sint_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_sint_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_sint_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_sint_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_sint_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_sint_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_sint_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_sint_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_sint_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_sint_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_sint_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32b32_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32b32_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32b32_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32b32_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32b32a32_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32b32a32_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32b32a32_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32b32a32_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r4g4_unorm_pack8.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r4g4_unorm_pack8.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r4g4_unorm_pack8.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r4g4_unorm_pack8.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r4g4_unorm_pack8.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r4g4_unorm_pack8.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r4g4_unorm_pack8.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r4g4_unorm_pack8.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r4g4b4a4_unorm_pack16.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r4g4b4a4_unorm_pack16.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r4g4b4a4_unorm_pack16.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r4g4b4a4_unorm_pack16.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r4g4b4a4_unorm_pack16.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r4g4b4a4_unorm_pack16.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r4g4b4a4_unorm_pack16.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r4g4b4a4_unorm_pack16.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b4g4r4a4_unorm_pack16.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b4g4r4a4_unorm_pack16.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b4g4r4a4_unorm_pack16.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b4g4r4a4_unorm_pack16.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b4g4r4a4_unorm_pack16.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b4g4r4a4_unorm_pack16.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b4g4r4a4_unorm_pack16.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b4g4r4a4_unorm_pack16.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r5g6b5_unorm_pack16.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r5g6b5_unorm_pack16.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r5g6b5_unorm_pack16.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r5g6b5_unorm_pack16.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r5g6b5_unorm_pack16.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r5g6b5_unorm_pack16.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r5g6b5_unorm_pack16.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r5g6b5_unorm_pack16.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b5g6r5_unorm_pack16.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b5g6r5_unorm_pack16.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b5g6r5_unorm_pack16.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b5g6r5_unorm_pack16.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b5g6r5_unorm_pack16.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b5g6r5_unorm_pack16.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b5g6r5_unorm_pack16.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b5g6r5_unorm_pack16.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r5g5b5a1_unorm_pack16.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r5g5b5a1_unorm_pack16.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r5g5b5a1_unorm_pack16.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r5g5b5a1_unorm_pack16.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r5g5b5a1_unorm_pack16.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r5g5b5a1_unorm_pack16.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r5g5b5a1_unorm_pack16.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r5g5b5a1_unorm_pack16.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b5g5r5a1_unorm_pack16.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b5g5r5a1_unorm_pack16.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b5g5r5a1_unorm_pack16.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b5g5r5a1_unorm_pack16.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b5g5r5a1_unorm_pack16.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b5g5r5a1_unorm_pack16.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b5g5r5a1_unorm_pack16.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b5g5r5a1_unorm_pack16.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a1r5g5b5_unorm_pack16.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a1r5g5b5_unorm_pack16.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a1r5g5b5_unorm_pack16.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a1r5g5b5_unorm_pack16.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a1r5g5b5_unorm_pack16.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a1r5g5b5_unorm_pack16.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a1r5g5b5_unorm_pack16.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a1r5g5b5_unorm_pack16.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_unorm_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_unorm_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_unorm_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_unorm_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_unorm_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_unorm_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_unorm_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_unorm_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_snorm_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_snorm_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_snorm_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_snorm_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_snorm_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_snorm_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_snorm_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_snorm_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_uscaled_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_uscaled_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_uscaled_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_uscaled_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_uscaled_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_uscaled_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_uscaled_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_uscaled_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_sscaled_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_sscaled_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_sscaled_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_sscaled_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_sscaled_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_sscaled_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_sscaled_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_sscaled_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_unorm_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_unorm_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_unorm_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_unorm_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_unorm_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_unorm_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_unorm_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_unorm_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_snorm_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_snorm_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_snorm_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_snorm_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_snorm_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_snorm_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_snorm_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_snorm_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_uscaled_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_uscaled_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_uscaled_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_uscaled_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_uscaled_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_uscaled_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_uscaled_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_uscaled_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_sscaled_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_sscaled_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_sscaled_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_sscaled_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_sscaled_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_sscaled_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_sscaled_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2r10g10b10_sscaled_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_unorm_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_unorm_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_unorm_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_unorm_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_unorm_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_unorm_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_unorm_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_unorm_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_snorm_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_snorm_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_snorm_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_snorm_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_snorm_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_snorm_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_snorm_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_snorm_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_uscaled_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_uscaled_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_uscaled_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_uscaled_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_uscaled_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_uscaled_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_uscaled_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_uscaled_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_sscaled_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_sscaled_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_sscaled_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_sscaled_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_sscaled_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_sscaled_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_sscaled_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a2b10g10r10_sscaled_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_sfloat.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_sfloat.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_sfloat.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_sfloat.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_sfloat.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_sfloat.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_sfloat.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16_sfloat.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_sfloat.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_sfloat.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_sfloat.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_sfloat.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_sfloat.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_sfloat.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_sfloat.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16_sfloat.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_sfloat.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_sfloat.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_sfloat.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_sfloat.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_sfloat.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_sfloat.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_sfloat.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16_sfloat.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_sfloat.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_sfloat.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_sfloat.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_sfloat.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_sfloat.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_sfloat.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_sfloat.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r16g16b16a16_sfloat.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32_sfloat.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32_sfloat.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32_sfloat.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32_sfloat.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32_sfloat.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32_sfloat.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32_sfloat.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32_sfloat.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32_sfloat.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32_sfloat.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32_sfloat.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32_sfloat.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32_sfloat.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32_sfloat.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32_sfloat.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32_sfloat.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32b32_sfloat.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32b32_sfloat.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32b32_sfloat.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32b32_sfloat.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32b32_sfloat.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32b32_sfloat.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32b32_sfloat.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32b32_sfloat.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32b32a32_sfloat.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32b32a32_sfloat.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32b32a32_sfloat.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32b32a32_sfloat.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32b32a32_sfloat.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32b32a32_sfloat.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32b32a32_sfloat.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r32g32b32a32_sfloat.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_srgb.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_srgb.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_srgb.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_srgb.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_srgb.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_srgb.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_srgb.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8_srgb.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_srgb.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_srgb.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_srgb.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_srgb.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_srgb.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_srgb.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_srgb.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8_srgb.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_srgb.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_srgb.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_srgb.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_srgb.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_srgb.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_srgb.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_srgb.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8_srgb.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_srgb.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_srgb.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_srgb.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_srgb.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_srgb.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_srgb.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_srgb.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8_srgb.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_srgb.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_srgb.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_srgb.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_srgb.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_srgb.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_srgb.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_srgb.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.r8g8b8a8_srgb.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_srgb.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_srgb.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_srgb.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_srgb.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_srgb.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_srgb.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_srgb.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.b8g8r8a8_srgb.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_srgb_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_srgb_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_srgb_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_srgb_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_srgb_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_srgb_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_srgb_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_base_level.layercount_6.a8b8g8r8_srgb_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_uint_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_uint_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_uint_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_uint_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_uint_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_uint_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_uint_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_uint_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_uint_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_uint_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_uint_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_uint_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32b32_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32b32_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32b32_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32b32_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32b32a32_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32b32a32_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32b32a32_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32b32a32_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_sint_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_sint_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_sint_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_sint_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_sint_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_sint_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_sint_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_sint_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_sint_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_sint_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_sint_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_sint_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32b32_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32b32_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32b32_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32b32_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32b32a32_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32b32a32_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32b32a32_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32b32a32_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r4g4_unorm_pack8.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r4g4_unorm_pack8.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r4g4_unorm_pack8.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r4g4_unorm_pack8.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r4g4_unorm_pack8.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r4g4_unorm_pack8.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r4g4_unorm_pack8.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r4g4_unorm_pack8.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r4g4b4a4_unorm_pack16.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r4g4b4a4_unorm_pack16.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r4g4b4a4_unorm_pack16.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r4g4b4a4_unorm_pack16.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r4g4b4a4_unorm_pack16.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r4g4b4a4_unorm_pack16.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r4g4b4a4_unorm_pack16.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r4g4b4a4_unorm_pack16.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b4g4r4a4_unorm_pack16.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b4g4r4a4_unorm_pack16.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b4g4r4a4_unorm_pack16.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b4g4r4a4_unorm_pack16.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b4g4r4a4_unorm_pack16.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b4g4r4a4_unorm_pack16.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b4g4r4a4_unorm_pack16.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b4g4r4a4_unorm_pack16.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r5g6b5_unorm_pack16.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r5g6b5_unorm_pack16.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r5g6b5_unorm_pack16.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r5g6b5_unorm_pack16.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r5g6b5_unorm_pack16.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r5g6b5_unorm_pack16.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r5g6b5_unorm_pack16.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r5g6b5_unorm_pack16.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b5g6r5_unorm_pack16.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b5g6r5_unorm_pack16.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b5g6r5_unorm_pack16.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b5g6r5_unorm_pack16.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b5g6r5_unorm_pack16.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b5g6r5_unorm_pack16.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b5g6r5_unorm_pack16.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b5g6r5_unorm_pack16.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r5g5b5a1_unorm_pack16.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r5g5b5a1_unorm_pack16.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r5g5b5a1_unorm_pack16.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r5g5b5a1_unorm_pack16.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r5g5b5a1_unorm_pack16.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r5g5b5a1_unorm_pack16.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r5g5b5a1_unorm_pack16.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r5g5b5a1_unorm_pack16.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b5g5r5a1_unorm_pack16.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b5g5r5a1_unorm_pack16.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b5g5r5a1_unorm_pack16.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b5g5r5a1_unorm_pack16.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b5g5r5a1_unorm_pack16.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b5g5r5a1_unorm_pack16.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b5g5r5a1_unorm_pack16.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b5g5r5a1_unorm_pack16.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a1r5g5b5_unorm_pack16.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a1r5g5b5_unorm_pack16.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a1r5g5b5_unorm_pack16.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a1r5g5b5_unorm_pack16.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a1r5g5b5_unorm_pack16.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a1r5g5b5_unorm_pack16.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a1r5g5b5_unorm_pack16.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a1r5g5b5_unorm_pack16.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_unorm_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_unorm_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_unorm_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_unorm_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_unorm_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_unorm_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_unorm_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_unorm_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_snorm_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_snorm_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_snorm_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_snorm_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_snorm_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_snorm_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_snorm_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_snorm_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_uscaled_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_uscaled_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_uscaled_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_uscaled_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_uscaled_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_uscaled_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_uscaled_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_uscaled_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_sscaled_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_sscaled_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_sscaled_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_sscaled_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_sscaled_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_sscaled_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_sscaled_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_sscaled_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_unorm_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_unorm_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_unorm_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_unorm_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_unorm_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_unorm_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_unorm_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_unorm_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_snorm_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_snorm_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_snorm_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_snorm_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_snorm_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_snorm_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_snorm_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_snorm_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_uscaled_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_uscaled_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_uscaled_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_uscaled_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_uscaled_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_uscaled_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_uscaled_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_uscaled_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_sscaled_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_sscaled_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_sscaled_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_sscaled_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_sscaled_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_sscaled_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_sscaled_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2r10g10b10_sscaled_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_unorm_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_unorm_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_unorm_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_unorm_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_unorm_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_unorm_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_unorm_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_unorm_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_snorm_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_snorm_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_snorm_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_snorm_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_snorm_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_snorm_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_snorm_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_snorm_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_uscaled_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_uscaled_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_uscaled_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_uscaled_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_uscaled_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_uscaled_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_uscaled_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_uscaled_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_sscaled_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_sscaled_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_sscaled_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_sscaled_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_sscaled_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_sscaled_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_sscaled_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a2b10g10r10_sscaled_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_sfloat.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_sfloat.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_sfloat.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_sfloat.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_sfloat.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_sfloat.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_sfloat.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16_sfloat.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_sfloat.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_sfloat.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_sfloat.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_sfloat.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_sfloat.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_sfloat.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_sfloat.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16_sfloat.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_sfloat.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_sfloat.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_sfloat.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_sfloat.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_sfloat.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_sfloat.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_sfloat.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16_sfloat.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_sfloat.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_sfloat.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_sfloat.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_sfloat.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_sfloat.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_sfloat.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_sfloat.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r16g16b16a16_sfloat.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32_sfloat.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32_sfloat.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32_sfloat.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32_sfloat.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32_sfloat.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32_sfloat.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32_sfloat.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32_sfloat.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32_sfloat.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32_sfloat.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32_sfloat.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32_sfloat.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32_sfloat.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32_sfloat.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32_sfloat.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32_sfloat.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32b32_sfloat.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32b32_sfloat.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32b32_sfloat.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32b32_sfloat.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32b32_sfloat.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32b32_sfloat.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32b32_sfloat.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32b32_sfloat.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32b32a32_sfloat.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32b32a32_sfloat.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32b32a32_sfloat.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32b32a32_sfloat.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32b32a32_sfloat.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32b32a32_sfloat.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32b32a32_sfloat.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r32g32b32a32_sfloat.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_srgb.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_srgb.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_srgb.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_srgb.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_srgb.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_srgb.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_srgb.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8_srgb.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_srgb.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_srgb.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_srgb.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_srgb.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_srgb.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_srgb.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_srgb.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8_srgb.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_srgb.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_srgb.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_srgb.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_srgb.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_srgb.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_srgb.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_srgb.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8_srgb.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_srgb.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_srgb.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_srgb.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_srgb.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_srgb.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_srgb.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_srgb.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8_srgb.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_srgb.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_srgb.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_srgb.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_srgb.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_srgb.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_srgb.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_srgb.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.r8g8b8a8_srgb.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_srgb.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_srgb.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_srgb.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_srgb.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_srgb.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_srgb.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_srgb.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.b8g8r8a8_srgb.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_srgb_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_srgb_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_srgb_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_srgb_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_srgb_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_srgb_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_srgb_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_1.a8b8g8r8_srgb_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_uint_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_uint_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_uint_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_uint_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_uint_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_uint_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_uint_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_uint_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_uint_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_uint_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_uint_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_uint_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32b32_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32b32_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32b32_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32b32_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32b32a32_uint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32b32a32_uint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32b32a32_uint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32b32a32_uint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_sint_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_sint_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_sint_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_sint_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_sint_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_sint_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_sint_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_sint_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_sint_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_sint_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_sint_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_sint_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32b32_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32b32_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32b32_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32b32_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32b32a32_sint.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32b32a32_sint.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32b32a32_sint.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32b32a32_sint.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r4g4_unorm_pack8.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r4g4_unorm_pack8.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r4g4_unorm_pack8.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r4g4_unorm_pack8.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r4g4_unorm_pack8.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r4g4_unorm_pack8.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r4g4_unorm_pack8.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r4g4_unorm_pack8.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r4g4b4a4_unorm_pack16.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r4g4b4a4_unorm_pack16.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r4g4b4a4_unorm_pack16.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r4g4b4a4_unorm_pack16.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r4g4b4a4_unorm_pack16.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r4g4b4a4_unorm_pack16.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r4g4b4a4_unorm_pack16.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r4g4b4a4_unorm_pack16.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b4g4r4a4_unorm_pack16.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b4g4r4a4_unorm_pack16.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b4g4r4a4_unorm_pack16.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b4g4r4a4_unorm_pack16.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b4g4r4a4_unorm_pack16.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b4g4r4a4_unorm_pack16.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b4g4r4a4_unorm_pack16.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b4g4r4a4_unorm_pack16.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r5g6b5_unorm_pack16.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r5g6b5_unorm_pack16.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r5g6b5_unorm_pack16.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r5g6b5_unorm_pack16.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r5g6b5_unorm_pack16.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r5g6b5_unorm_pack16.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r5g6b5_unorm_pack16.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r5g6b5_unorm_pack16.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b5g6r5_unorm_pack16.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b5g6r5_unorm_pack16.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b5g6r5_unorm_pack16.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b5g6r5_unorm_pack16.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b5g6r5_unorm_pack16.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b5g6r5_unorm_pack16.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b5g6r5_unorm_pack16.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b5g6r5_unorm_pack16.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r5g5b5a1_unorm_pack16.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r5g5b5a1_unorm_pack16.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r5g5b5a1_unorm_pack16.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r5g5b5a1_unorm_pack16.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r5g5b5a1_unorm_pack16.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r5g5b5a1_unorm_pack16.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r5g5b5a1_unorm_pack16.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r5g5b5a1_unorm_pack16.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b5g5r5a1_unorm_pack16.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b5g5r5a1_unorm_pack16.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b5g5r5a1_unorm_pack16.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b5g5r5a1_unorm_pack16.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b5g5r5a1_unorm_pack16.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b5g5r5a1_unorm_pack16.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b5g5r5a1_unorm_pack16.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b5g5r5a1_unorm_pack16.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a1r5g5b5_unorm_pack16.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a1r5g5b5_unorm_pack16.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a1r5g5b5_unorm_pack16.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a1r5g5b5_unorm_pack16.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a1r5g5b5_unorm_pack16.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a1r5g5b5_unorm_pack16.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a1r5g5b5_unorm_pack16.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a1r5g5b5_unorm_pack16.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_unorm_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_unorm_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_unorm_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_unorm_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_unorm_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_unorm_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_unorm_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_unorm_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_snorm_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_snorm_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_snorm_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_snorm_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_snorm_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_snorm_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_snorm_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_snorm_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_uscaled_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_uscaled_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_uscaled_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_uscaled_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_uscaled_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_uscaled_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_uscaled_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_uscaled_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_sscaled_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_sscaled_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_sscaled_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_sscaled_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_sscaled_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_sscaled_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_sscaled_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_sscaled_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_unorm_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_unorm_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_unorm_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_unorm_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_unorm_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_unorm_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_unorm_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_unorm_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_snorm_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_snorm_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_snorm_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_snorm_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_snorm_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_snorm_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_snorm_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_snorm_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_uscaled_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_uscaled_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_uscaled_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_uscaled_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_uscaled_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_uscaled_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_uscaled_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_uscaled_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_sscaled_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_sscaled_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_sscaled_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_sscaled_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_sscaled_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_sscaled_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_sscaled_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2r10g10b10_sscaled_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_unorm_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_unorm_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_unorm_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_unorm_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_unorm_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_unorm_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_unorm_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_unorm_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_snorm_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_snorm_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_snorm_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_snorm_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_snorm_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_snorm_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_snorm_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_snorm_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_uscaled_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_uscaled_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_uscaled_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_uscaled_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_uscaled_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_uscaled_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_uscaled_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_uscaled_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_sscaled_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_sscaled_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_sscaled_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_sscaled_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_sscaled_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_sscaled_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_sscaled_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a2b10g10r10_sscaled_pack32.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_sfloat.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_sfloat.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_sfloat.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_sfloat.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_sfloat.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_sfloat.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_sfloat.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16_sfloat.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_sfloat.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_sfloat.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_sfloat.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_sfloat.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_sfloat.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_sfloat.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_sfloat.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16_sfloat.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_sfloat.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_sfloat.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_sfloat.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_sfloat.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_sfloat.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_sfloat.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_sfloat.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16_sfloat.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_unorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_unorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_unorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_unorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_unorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_unorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_unorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_unorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_snorm.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_snorm.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_snorm.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_snorm.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_snorm.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_snorm.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_snorm.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_snorm.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_uscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_uscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_uscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_uscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_uscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_uscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_uscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_uscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_sscaled.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_sscaled.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_sscaled.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_sscaled.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_sscaled.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_sscaled.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_sscaled.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_sscaled.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_sfloat.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_sfloat.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_sfloat.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_sfloat.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_sfloat.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_sfloat.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_sfloat.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r16g16b16a16_sfloat.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32_sfloat.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32_sfloat.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32_sfloat.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32_sfloat.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32_sfloat.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32_sfloat.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32_sfloat.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32_sfloat.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32_sfloat.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32_sfloat.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32_sfloat.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32_sfloat.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32_sfloat.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32_sfloat.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32_sfloat.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32_sfloat.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32b32_sfloat.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32b32_sfloat.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32b32_sfloat.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32b32_sfloat.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32b32_sfloat.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32b32_sfloat.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32b32_sfloat.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32b32_sfloat.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32b32a32_sfloat.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32b32a32_sfloat.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32b32a32_sfloat.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32b32a32_sfloat.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32b32a32_sfloat.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32b32a32_sfloat.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32b32a32_sfloat.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r32g32b32a32_sfloat.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_srgb.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_srgb.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_srgb.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_srgb.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_srgb.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_srgb.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_srgb.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8_srgb.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_srgb.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_srgb.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_srgb.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_srgb.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_srgb.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_srgb.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_srgb.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8_srgb.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_srgb.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_srgb.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_srgb.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_srgb.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_srgb.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_srgb.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_srgb.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8_srgb.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_srgb.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_srgb.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_srgb.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_srgb.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_srgb.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_srgb.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_srgb.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8_srgb.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_srgb.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_srgb.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_srgb.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_srgb.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_srgb.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_srgb.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_srgb.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.r8g8b8a8_srgb.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_srgb.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_srgb.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_srgb.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_srgb.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_srgb.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_srgb.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_srgb.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.b8g8r8a8_srgb.general_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_srgb_pack32.optimal_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_srgb_pack32.optimal_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_srgb_pack32.optimal_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_srgb_pack32.optimal_general_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_srgb_pack32.general_optimal_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_srgb_pack32.general_optimal_linear
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_srgb_pack32.general_general_nearest
+dEQP-VK.api.copy_and_blit.dedicated_allocation.blit_image.all_formats.generate_mipmaps.from_previous_level.layercount_6.a8b8g8r8_srgb_pack32.general_general_linear
 dEQP-VK.api.copy_and_blit.dedicated_allocation.resolve_image.whole.2_bit
 dEQP-VK.api.copy_and_blit.dedicated_allocation.resolve_image.whole.4_bit
 dEQP-VK.api.copy_and_blit.dedicated_allocation.resolve_image.whole.8_bit
@@ -67685,16390 +73573,16390 @@ dEQP-VK.memory.binding.aliasing.suballocated.image_33_257
 dEQP-VK.memory.binding.aliasing.suballocated.image_257_8
 dEQP-VK.memory.binding.aliasing.suballocated.image_257_33
 dEQP-VK.memory.binding.aliasing.suballocated.image_257_257
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_repl_dfail_inv_comp_not_equal_back_fail_decc_pass_repl_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_keep_dfail_inv_comp_not_equal_back_fail_decc_pass_repl_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decw_dfail_wrap_comp_less_back_fail_incc_pass_keep_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_incc_dfail_keep_comp_greater_or_equal_back_fail_wrap_pass_decw_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_keep_dfail_wrap_comp_equal_back_fail_inv_pass_incc_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_inv_dfail_repl_comp_always_back_fail_incc_pass_keep_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_incc_dfail_decc_comp_not_equal_back_fail_repl_pass_inv_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_keep_dfail_incc_comp_greater_or_equal_back_fail_zero_pass_incc_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_zero_dfail_keep_comp_equal_back_fail_incc_pass_keep_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_wrap_dfail_decw_comp_less_or_equal_back_fail_decc_pass_zero_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_zero_dfail_zero_comp_greater_back_fail_keep_pass_wrap_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_wrap_dfail_decw_comp_less_or_equal_back_fail_inv_pass_zero_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_incc_dfail_decc_comp_equal_back_fail_incc_pass_wrap_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decc_dfail_decc_comp_less_or_equal_back_fail_wrap_pass_incc_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_wrap_dfail_decc_comp_never_back_fail_decc_pass_decc_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decw_dfail_decw_comp_greater_or_equal_back_fail_decc_pass_wrap_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decw_dfail_incc_comp_greater_or_equal_back_fail_wrap_pass_decw_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decw_dfail_decw_comp_always_back_fail_decw_pass_decw_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_keep_dfail_incc_comp_less_back_fail_keep_pass_decw_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_zero_dfail_inv_comp_always_back_fail_repl_pass_keep_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_wrap_dfail_repl_comp_never_back_fail_inv_pass_zero_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_incc_dfail_inv_comp_less_back_fail_decw_pass_wrap_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_incc_dfail_decc_comp_equal_back_fail_decc_pass_incc_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_wrap_dfail_wrap_comp_less_back_fail_decc_pass_incc_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_wrap_dfail_decc_comp_equal_back_fail_decw_pass_wrap_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_inv_dfail_wrap_comp_less_back_fail_inv_pass_wrap_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decc_dfail_incc_comp_greater_back_fail_zero_pass_inv_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_keep_dfail_inv_comp_greater_back_fail_wrap_pass_decc_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decc_dfail_wrap_comp_greater_or_equal_back_fail_keep_pass_keep_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_inv_dfail_decc_comp_less_or_equal_back_fail_inv_pass_decc_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_inv_dfail_repl_comp_greater_or_equal_back_fail_zero_pass_inv_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_keep_dfail_keep_comp_always_back_fail_decc_pass_inv_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_zero_dfail_decc_comp_never_back_fail_wrap_pass_keep_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_incc_dfail_zero_comp_never_back_fail_wrap_pass_zero_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_incc_dfail_decw_comp_never_back_fail_keep_pass_incc_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_keep_dfail_inv_comp_never_back_fail_incc_pass_incc_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_repl_dfail_wrap_comp_less_back_fail_incc_pass_keep_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decc_dfail_zero_comp_greater_or_equal_back_fail_keep_pass_repl_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_zero_dfail_decw_comp_equal_back_fail_decc_pass_decc_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_wrap_dfail_zero_comp_not_equal_back_fail_wrap_pass_zero_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decc_dfail_zero_comp_not_equal_back_fail_keep_pass_wrap_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decc_dfail_repl_comp_never_back_fail_keep_pass_decc_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_inv_dfail_inv_comp_greater_back_fail_inv_pass_decc_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decw_dfail_inv_comp_always_back_fail_wrap_pass_inv_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_keep_dfail_repl_comp_greater_back_fail_decw_pass_decw_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decc_dfail_decw_comp_equal_back_fail_incc_pass_keep_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_repl_dfail_keep_comp_less_or_equal_back_fail_zero_pass_decc_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decw_dfail_wrap_comp_always_back_fail_decc_pass_repl_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_incc_dfail_incc_comp_less_or_equal_back_fail_zero_pass_decw_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_incc_dfail_decc_comp_never_back_fail_incc_pass_incc_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_incc_dfail_inv_comp_greater_or_equal_back_fail_incc_pass_incc_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decc_dfail_decw_comp_greater_back_fail_incc_pass_incc_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_keep_dfail_repl_comp_never_back_fail_wrap_pass_decc_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_wrap_dfail_decc_comp_equal_back_fail_wrap_pass_keep_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decc_dfail_incc_comp_not_equal_back_fail_keep_pass_wrap_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decw_dfail_repl_comp_greater_back_fail_decc_pass_decc_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_zero_dfail_zero_comp_not_equal_back_fail_decc_pass_decw_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_keep_dfail_incc_comp_not_equal_back_fail_zero_pass_zero_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decc_dfail_incc_comp_always_back_fail_inv_pass_keep_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decc_dfail_incc_comp_greater_back_fail_keep_pass_decc_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_incc_dfail_wrap_comp_greater_back_fail_zero_pass_decc_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_keep_dfail_wrap_comp_less_or_equal_back_fail_zero_pass_incc_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_wrap_dfail_decw_comp_not_equal_back_fail_repl_pass_keep_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_incc_dfail_inv_comp_less_back_fail_wrap_pass_wrap_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_incc_dfail_keep_comp_less_back_fail_repl_pass_incc_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_inv_dfail_zero_comp_not_equal_back_fail_inv_pass_incc_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_wrap_dfail_wrap_comp_less_or_equal_back_fail_incc_pass_inv_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_zero_dfail_wrap_comp_greater_or_equal_back_fail_wrap_pass_wrap_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decc_dfail_repl_comp_equal_back_fail_inv_pass_zero_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_keep_dfail_repl_comp_always_back_fail_repl_pass_decc_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_inv_dfail_decw_comp_never_back_fail_zero_pass_keep_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_incc_dfail_incc_comp_equal_back_fail_incc_pass_inv_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decw_dfail_inv_comp_equal_back_fail_decw_pass_incc_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_wrap_dfail_zero_comp_greater_or_equal_back_fail_zero_pass_decw_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_repl_dfail_inv_comp_less_back_fail_decc_pass_wrap_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_zero_dfail_zero_comp_greater_or_equal_back_fail_wrap_pass_repl_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_keep_dfail_wrap_comp_always_back_fail_incc_pass_zero_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_zero_dfail_keep_comp_never_back_fail_decw_pass_keep_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decc_dfail_keep_comp_less_or_equal_back_fail_inv_pass_zero_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_wrap_dfail_keep_comp_never_back_fail_decc_pass_decc_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_keep_dfail_wrap_comp_greater_back_fail_keep_pass_wrap_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decw_dfail_wrap_comp_equal_back_fail_inv_pass_keep_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_repl_dfail_inv_comp_never_back_fail_zero_pass_decw_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_repl_dfail_decw_comp_greater_or_equal_back_fail_wrap_pass_repl_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_inv_dfail_keep_comp_greater_or_equal_back_fail_inv_pass_repl_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_wrap_dfail_repl_comp_never_back_fail_wrap_pass_inv_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decw_dfail_repl_comp_greater_or_equal_back_fail_wrap_pass_wrap_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_wrap_dfail_decw_comp_greater_back_fail_decc_pass_decw_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_repl_dfail_incc_comp_never_back_fail_decw_pass_wrap_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_zero_dfail_inv_comp_always_back_fail_keep_pass_repl_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decw_dfail_repl_comp_equal_back_fail_keep_pass_zero_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_repl_dfail_decc_comp_greater_back_fail_decc_pass_decw_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_incc_dfail_keep_comp_not_equal_back_fail_inv_pass_repl_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_wrap_dfail_inv_comp_always_back_fail_decc_pass_incc_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_inv_dfail_inv_comp_greater_or_equal_back_fail_keep_pass_wrap_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decc_dfail_zero_comp_always_back_fail_wrap_pass_inv_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_keep_dfail_wrap_comp_greater_or_equal_back_fail_zero_pass_decc_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decw_dfail_decc_comp_always_back_fail_decc_pass_keep_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_wrap_dfail_repl_comp_not_equal_back_fail_keep_pass_decw_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decc_dfail_wrap_comp_equal_back_fail_decc_pass_wrap_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_zero_dfail_keep_comp_less_or_equal_back_fail_zero_pass_decc_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decc_dfail_decw_comp_equal_back_fail_repl_pass_zero_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_zero_dfail_wrap_comp_greater_or_equal_back_fail_wrap_pass_decc_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_zero_dfail_incc_comp_greater_or_equal_back_fail_decc_pass_zero_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_wrap_dfail_repl_comp_not_equal_back_fail_decw_pass_zero_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_keep_dfail_keep_comp_greater_or_equal_back_fail_decw_pass_wrap_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decc_dfail_incc_comp_less_or_equal_back_fail_keep_pass_keep_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decc_dfail_inv_comp_greater_or_equal_back_fail_repl_pass_decc_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_keep_dfail_incc_comp_greater_or_equal_back_fail_repl_pass_decc_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_zero_dfail_inv_comp_greater_or_equal_back_fail_inv_pass_keep_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decw_dfail_repl_comp_less_or_equal_back_fail_repl_pass_zero_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_incc_dfail_wrap_comp_greater_back_fail_incc_pass_decw_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_repl_dfail_keep_comp_greater_back_fail_inv_pass_incc_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decw_dfail_repl_comp_equal_back_fail_decw_pass_repl_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decw_dfail_keep_comp_less_back_fail_zero_pass_decw_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_keep_dfail_wrap_comp_equal_back_fail_repl_pass_decw_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_repl_dfail_zero_comp_always_back_fail_inv_pass_keep_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decc_dfail_repl_comp_never_back_fail_inv_pass_repl_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_inv_dfail_keep_comp_never_back_fail_zero_pass_decc_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_zero_dfail_inv_comp_equal_back_fail_inv_pass_inv_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_repl_dfail_decw_comp_equal_back_fail_inv_pass_zero_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_zero_dfail_decc_comp_less_or_equal_back_fail_decw_pass_repl_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_incc_dfail_inv_comp_never_back_fail_incc_pass_zero_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decc_dfail_zero_comp_less_or_equal_back_fail_inv_pass_incc_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_wrap_dfail_decw_comp_always_back_fail_keep_pass_decc_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_inv_dfail_incc_comp_less_or_equal_back_fail_wrap_pass_wrap_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_repl_dfail_wrap_comp_not_equal_back_fail_inv_pass_inv_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decw_dfail_decc_comp_less_or_equal_back_fail_repl_pass_repl_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_inv_dfail_keep_comp_greater_back_fail_decw_pass_decw_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_keep_dfail_decc_comp_less_or_equal_back_fail_wrap_pass_inv_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_repl_dfail_repl_comp_equal_back_fail_repl_pass_keep_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_wrap_dfail_decc_comp_less_back_fail_inv_pass_repl_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decc_dfail_repl_comp_less_back_fail_incc_pass_wrap_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_repl_dfail_zero_comp_never_back_fail_inv_pass_decc_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decw_dfail_inv_comp_never_back_fail_keep_pass_repl_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_repl_dfail_decw_comp_not_equal_back_fail_repl_pass_decw_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_repl_dfail_inv_comp_greater_back_fail_inv_pass_repl_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_wrap_dfail_zero_comp_never_back_fail_inv_pass_repl_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decw_dfail_inv_comp_greater_or_equal_back_fail_repl_pass_wrap_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_incc_dfail_decw_comp_always_back_fail_decc_pass_decw_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decc_dfail_inv_comp_less_or_equal_back_fail_incc_pass_incc_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_repl_dfail_repl_comp_less_or_equal_back_fail_repl_pass_decc_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_repl_dfail_inv_comp_greater_back_fail_decw_pass_repl_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_keep_dfail_keep_comp_greater_or_equal_back_fail_zero_pass_repl_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_repl_dfail_decc_comp_less_or_equal_back_fail_zero_pass_keep_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decw_dfail_decc_comp_greater_or_equal_back_fail_repl_pass_repl_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_repl_dfail_incc_comp_less_or_equal_back_fail_decw_pass_decw_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decc_dfail_wrap_comp_never_back_fail_keep_pass_repl_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decc_dfail_zero_comp_never_back_fail_repl_pass_decc_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_inv_dfail_inv_comp_greater_back_fail_decc_pass_decc_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_wrap_dfail_keep_comp_always_back_fail_incc_pass_inv_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_keep_dfail_incc_comp_equal_back_fail_inv_pass_wrap_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decc_dfail_incc_comp_never_back_fail_inv_pass_keep_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_incc_dfail_keep_comp_always_back_fail_inv_pass_decc_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decc_dfail_incc_comp_always_back_fail_incc_pass_incc_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_zero_dfail_decw_comp_less_back_fail_decw_pass_decc_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decw_dfail_zero_comp_not_equal_back_fail_decw_pass_zero_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_incc_dfail_repl_comp_greater_or_equal_back_fail_incc_pass_decw_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_keep_dfail_keep_comp_equal_back_fail_repl_pass_incc_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decc_dfail_zero_comp_always_back_fail_wrap_pass_keep_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_zero_dfail_incc_comp_always_back_fail_decw_pass_decc_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_wrap_dfail_decc_comp_equal_back_fail_repl_pass_zero_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_incc_dfail_repl_comp_never_back_fail_decc_pass_wrap_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_zero_dfail_decc_comp_greater_or_equal_back_fail_decc_pass_incc_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_repl_dfail_zero_comp_always_back_fail_repl_pass_zero_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decw_dfail_keep_comp_not_equal_back_fail_wrap_pass_repl_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_zero_dfail_keep_comp_less_or_equal_back_fail_zero_pass_decw_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decw_dfail_incc_comp_never_back_fail_decc_pass_zero_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_keep_dfail_decc_comp_less_or_equal_back_fail_repl_pass_decw_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decc_dfail_decc_comp_less_back_fail_decw_pass_keep_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decw_dfail_wrap_comp_not_equal_back_fail_zero_pass_decc_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decc_dfail_inv_comp_less_or_equal_back_fail_zero_pass_decw_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_keep_dfail_incc_comp_greater_back_fail_wrap_pass_decc_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_inv_dfail_wrap_comp_less_back_fail_keep_pass_keep_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_keep_dfail_decc_comp_not_equal_back_fail_decc_pass_inv_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_inv_dfail_zero_comp_greater_or_equal_back_fail_zero_pass_keep_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_incc_dfail_decw_comp_always_back_fail_decw_pass_inv_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_incc_dfail_wrap_comp_always_back_fail_inv_pass_incc_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decw_dfail_wrap_comp_never_back_fail_keep_pass_incc_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_keep_dfail_keep_comp_not_equal_back_fail_zero_pass_decw_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decw_dfail_repl_comp_less_or_equal_back_fail_inv_pass_keep_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_inv_dfail_decw_comp_greater_back_fail_keep_pass_decw_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_repl_dfail_decc_comp_less_or_equal_back_fail_incc_pass_inv_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_zero_dfail_decw_comp_less_back_fail_wrap_pass_repl_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_zero_dfail_inv_comp_always_back_fail_decc_pass_zero_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_zero_dfail_inv_comp_greater_or_equal_back_fail_decw_pass_zero_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_wrap_dfail_decw_comp_always_back_fail_incc_pass_zero_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_inv_dfail_wrap_comp_not_equal_back_fail_incc_pass_wrap_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_inv_dfail_decc_comp_less_back_fail_inv_pass_inv_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_repl_dfail_keep_comp_equal_back_fail_inv_pass_inv_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_repl_dfail_wrap_comp_equal_back_fail_keep_pass_repl_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decc_dfail_repl_comp_greater_back_fail_decw_pass_repl_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_wrap_dfail_keep_comp_never_back_fail_repl_pass_decc_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_inv_dfail_inv_comp_equal_back_fail_inv_pass_wrap_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_repl_dfail_zero_comp_greater_back_fail_decc_pass_inv_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decw_dfail_decc_comp_always_back_fail_incc_pass_repl_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_zero_dfail_decc_comp_equal_back_fail_decw_pass_decw_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_incc_dfail_wrap_comp_less_back_fail_incc_pass_zero_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_zero_dfail_incc_comp_less_or_equal_back_fail_keep_pass_incc_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_keep_dfail_decc_comp_never_back_fail_incc_pass_zero_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_incc_dfail_inv_comp_not_equal_back_fail_repl_pass_keep_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decw_dfail_decc_comp_always_back_fail_zero_pass_incc_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_inv_dfail_wrap_comp_not_equal_back_fail_decc_pass_decw_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_keep_dfail_inv_comp_not_equal_back_fail_incc_pass_inv_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_repl_dfail_zero_comp_always_back_fail_decw_pass_keep_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_inv_dfail_decc_comp_greater_back_fail_decc_pass_repl_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_wrap_dfail_incc_comp_not_equal_back_fail_incc_pass_inv_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_keep_dfail_wrap_comp_less_or_equal_back_fail_inv_pass_wrap_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decw_dfail_zero_comp_never_back_fail_decw_pass_keep_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_repl_dfail_decc_comp_not_equal_back_fail_decw_pass_decw_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_keep_dfail_repl_comp_not_equal_back_fail_decc_pass_repl_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decw_dfail_repl_comp_less_or_equal_back_fail_repl_pass_keep_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_incc_dfail_wrap_comp_less_back_fail_decw_pass_decw_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decw_dfail_decw_comp_greater_back_fail_inv_pass_incc_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_incc_dfail_decw_comp_not_equal_back_fail_wrap_pass_decw_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decc_dfail_keep_comp_equal_back_fail_inv_pass_incc_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decw_dfail_incc_comp_greater_or_equal_back_fail_decc_pass_decc_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_inv_dfail_zero_comp_less_or_equal_back_fail_zero_pass_decw_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decw_dfail_decw_comp_not_equal_back_fail_repl_pass_inv_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_wrap_dfail_keep_comp_greater_or_equal_back_fail_wrap_pass_decw_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_wrap_dfail_wrap_comp_never_back_fail_inv_pass_wrap_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_incc_dfail_zero_comp_greater_or_equal_back_fail_repl_pass_wrap_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_zero_dfail_zero_comp_not_equal_back_fail_decw_pass_incc_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_keep_dfail_inv_comp_greater_back_fail_repl_pass_zero_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_inv_dfail_wrap_comp_not_equal_back_fail_wrap_pass_keep_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_zero_dfail_repl_comp_never_back_fail_repl_pass_inv_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_keep_dfail_decc_comp_less_back_fail_inv_pass_zero_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_incc_dfail_repl_comp_greater_back_fail_zero_pass_keep_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_inv_dfail_decc_comp_never_back_fail_keep_pass_incc_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_zero_dfail_zero_comp_less_or_equal_back_fail_inv_pass_inv_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decw_dfail_inv_comp_less_back_fail_decw_pass_zero_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_inv_dfail_keep_comp_always_back_fail_repl_pass_decw_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_inv_dfail_zero_comp_never_back_fail_incc_pass_inv_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_keep_dfail_keep_comp_greater_or_equal_back_fail_inv_pass_inv_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_keep_dfail_decc_comp_never_back_fail_inv_pass_keep_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_keep_dfail_inv_comp_less_back_fail_decc_pass_keep_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decc_dfail_decw_comp_not_equal_back_fail_decc_pass_keep_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_incc_dfail_zero_comp_not_equal_back_fail_zero_pass_decc_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decc_dfail_keep_comp_greater_or_equal_back_fail_keep_pass_incc_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_keep_dfail_zero_comp_greater_or_equal_back_fail_decc_pass_decc_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_wrap_dfail_decc_comp_greater_or_equal_back_fail_decc_pass_keep_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_incc_dfail_decc_comp_greater_back_fail_zero_pass_wrap_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_keep_dfail_decc_comp_equal_back_fail_incc_pass_incc_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_keep_dfail_zero_comp_always_back_fail_inv_pass_keep_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_inv_dfail_inv_comp_always_back_fail_inv_pass_keep_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decw_dfail_inv_comp_always_back_fail_incc_pass_inv_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decw_dfail_keep_comp_always_back_fail_wrap_pass_decw_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_incc_dfail_inv_comp_equal_back_fail_decw_pass_decw_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decc_dfail_keep_comp_always_back_fail_zero_pass_incc_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_incc_dfail_wrap_comp_never_back_fail_keep_pass_decc_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_wrap_dfail_decw_comp_greater_back_fail_zero_pass_incc_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_repl_dfail_wrap_comp_never_back_fail_wrap_pass_wrap_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_zero_dfail_keep_comp_greater_back_fail_repl_pass_repl_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_repl_dfail_wrap_comp_less_or_equal_back_fail_incc_pass_zero_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_incc_dfail_inv_comp_less_or_equal_back_fail_decw_pass_repl_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_inv_dfail_incc_comp_equal_back_fail_decw_pass_incc_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_incc_dfail_decw_comp_equal_back_fail_decc_pass_inv_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_zero_dfail_zero_comp_greater_back_fail_keep_pass_incc_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_keep_dfail_zero_comp_equal_back_fail_wrap_pass_zero_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_zero_dfail_keep_comp_less_or_equal_back_fail_repl_pass_keep_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_inv_dfail_repl_comp_never_back_fail_inv_pass_zero_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_wrap_dfail_inv_comp_equal_back_fail_zero_pass_inv_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_zero_dfail_decw_comp_less_or_equal_back_fail_decw_pass_wrap_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_wrap_dfail_inv_comp_not_equal_back_fail_wrap_pass_zero_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_repl_dfail_wrap_comp_less_or_equal_back_fail_inv_pass_wrap_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_repl_dfail_repl_comp_greater_or_equal_back_fail_zero_pass_repl_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_inv_dfail_wrap_comp_always_back_fail_incc_pass_repl_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_incc_dfail_incc_comp_less_or_equal_back_fail_decw_pass_inv_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decw_dfail_keep_comp_greater_or_equal_back_fail_inv_pass_incc_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decc_dfail_incc_comp_greater_back_fail_decw_pass_decw_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_keep_dfail_incc_comp_equal_back_fail_keep_pass_decc_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decw_dfail_repl_comp_greater_back_fail_wrap_pass_keep_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_wrap_dfail_repl_comp_never_back_fail_incc_pass_decw_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decc_dfail_decc_comp_not_equal_back_fail_decc_pass_wrap_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_inv_dfail_keep_comp_greater_back_fail_wrap_pass_decc_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_incc_dfail_keep_comp_greater_or_equal_back_fail_incc_pass_inv_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_inv_dfail_zero_comp_less_back_fail_wrap_pass_incc_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_keep_dfail_decc_comp_never_back_fail_repl_pass_inv_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_wrap_dfail_zero_comp_greater_back_fail_inv_pass_keep_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_incc_dfail_keep_comp_always_back_fail_decw_pass_wrap_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decw_dfail_decc_comp_always_back_fail_inv_pass_incc_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_keep_dfail_zero_comp_not_equal_back_fail_zero_pass_decw_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decw_dfail_inv_comp_equal_back_fail_decc_pass_keep_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_keep_dfail_decw_comp_greater_back_fail_decc_pass_decw_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_keep_dfail_inv_comp_never_back_fail_repl_pass_keep_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decc_dfail_zero_comp_less_back_fail_inv_pass_keep_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_wrap_dfail_decc_comp_not_equal_back_fail_wrap_pass_decc_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_inv_dfail_decw_comp_less_or_equal_back_fail_incc_pass_wrap_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_inv_dfail_keep_comp_never_back_fail_decw_pass_inv_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_repl_dfail_decc_comp_less_back_fail_repl_pass_inv_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decc_dfail_zero_comp_less_or_equal_back_fail_inv_pass_repl_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decw_dfail_incc_comp_less_back_fail_inv_pass_decc_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decc_dfail_decc_comp_greater_or_equal_back_fail_decw_pass_decw_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_incc_dfail_incc_comp_never_back_fail_wrap_pass_decc_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_keep_dfail_keep_comp_greater_back_fail_repl_pass_incc_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decw_dfail_incc_comp_always_back_fail_decw_pass_keep_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_incc_dfail_keep_comp_greater_back_fail_zero_pass_decw_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decc_dfail_decc_comp_not_equal_back_fail_incc_pass_incc_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decc_dfail_incc_comp_less_or_equal_back_fail_incc_pass_decc_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_repl_dfail_keep_comp_never_back_fail_inv_pass_decc_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decw_dfail_zero_comp_less_or_equal_back_fail_wrap_pass_repl_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_wrap_dfail_zero_comp_greater_or_equal_back_fail_zero_pass_decw_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_repl_dfail_keep_comp_equal_back_fail_repl_pass_wrap_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_keep_dfail_repl_comp_greater_back_fail_decc_pass_repl_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_zero_dfail_inv_comp_greater_back_fail_repl_pass_keep_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_zero_dfail_zero_comp_always_back_fail_keep_pass_zero_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_incc_dfail_decc_comp_always_back_fail_keep_pass_zero_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decw_dfail_keep_comp_less_back_fail_wrap_pass_incc_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_inv_dfail_keep_comp_greater_back_fail_zero_pass_decw_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_keep_dfail_decc_comp_greater_back_fail_zero_pass_inv_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_keep_dfail_decc_comp_greater_or_equal_back_fail_inv_pass_keep_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_wrap_dfail_decc_comp_less_or_equal_back_fail_decc_pass_keep_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_inv_dfail_decw_comp_equal_back_fail_decw_pass_wrap_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_repl_dfail_wrap_comp_greater_or_equal_back_fail_zero_pass_inv_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_repl_dfail_keep_comp_never_back_fail_keep_pass_repl_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_inv_dfail_wrap_comp_less_or_equal_back_fail_inv_pass_repl_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_wrap_dfail_zero_comp_less_or_equal_back_fail_keep_pass_inv_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decc_dfail_keep_comp_less_back_fail_inv_pass_wrap_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_inv_dfail_inv_comp_not_equal_back_fail_zero_pass_decc_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decw_dfail_zero_comp_never_back_fail_decc_pass_inv_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_keep_dfail_inv_comp_less_or_equal_back_fail_repl_pass_decw_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_zero_dfail_keep_comp_less_or_equal_back_fail_decc_pass_keep_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_repl_dfail_repl_comp_equal_back_fail_keep_pass_zero_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_incc_dfail_repl_comp_greater_back_fail_keep_pass_repl_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_repl_dfail_decw_comp_greater_back_fail_zero_pass_incc_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_wrap_dfail_keep_comp_not_equal_back_fail_keep_pass_repl_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decw_dfail_zero_comp_greater_back_fail_decw_pass_wrap_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_incc_dfail_decw_comp_greater_or_equal_back_fail_repl_pass_decw_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_zero_dfail_keep_comp_never_back_fail_decc_pass_incc_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_repl_dfail_incc_comp_less_or_equal_back_fail_decc_pass_zero_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_zero_dfail_inv_comp_always_back_fail_incc_pass_repl_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_zero_dfail_incc_comp_always_back_fail_decc_pass_zero_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decw_dfail_repl_comp_greater_or_equal_back_fail_incc_pass_zero_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_keep_dfail_decw_comp_less_or_equal_back_fail_keep_pass_decw_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_wrap_dfail_incc_comp_always_back_fail_keep_pass_keep_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_inv_dfail_incc_comp_always_back_fail_incc_pass_wrap_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_zero_dfail_decc_comp_less_or_equal_back_fail_keep_pass_inv_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_keep_dfail_keep_comp_never_back_fail_zero_pass_zero_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_incc_dfail_decc_comp_equal_back_fail_inv_pass_keep_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_wrap_dfail_decc_comp_always_back_fail_keep_pass_incc_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_incc_dfail_wrap_comp_never_back_fail_wrap_pass_wrap_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_inv_dfail_keep_comp_less_back_fail_decc_pass_incc_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_zero_dfail_repl_comp_never_back_fail_inv_pass_inv_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decc_dfail_zero_comp_greater_or_equal_back_fail_keep_pass_zero_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_wrap_dfail_decc_comp_equal_back_fail_keep_pass_decc_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decc_dfail_decc_comp_less_back_fail_zero_pass_wrap_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_incc_dfail_keep_comp_equal_back_fail_incc_pass_decc_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_inv_dfail_inv_comp_always_back_fail_zero_pass_incc_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_keep_dfail_repl_comp_less_or_equal_back_fail_inv_pass_inv_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_keep_dfail_incc_comp_greater_or_equal_back_fail_inv_pass_keep_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_inv_dfail_wrap_comp_less_back_fail_zero_pass_keep_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_incc_dfail_inv_comp_equal_back_fail_incc_pass_inv_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_repl_dfail_inv_comp_equal_back_fail_inv_pass_incc_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_inv_dfail_decc_comp_not_equal_back_fail_decw_pass_repl_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_inv_dfail_wrap_comp_greater_or_equal_back_fail_wrap_pass_inv_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_repl_dfail_repl_comp_less_back_fail_decc_pass_inv_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decc_dfail_decw_comp_less_back_fail_wrap_pass_repl_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decw_dfail_zero_comp_equal_back_fail_incc_pass_decc_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_incc_dfail_zero_comp_greater_back_fail_wrap_pass_decw_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_zero_dfail_decw_comp_equal_back_fail_keep_pass_incc_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decc_dfail_wrap_comp_never_back_fail_incc_pass_zero_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_incc_dfail_zero_comp_greater_back_fail_zero_pass_decc_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_repl_dfail_incc_comp_always_back_fail_incc_pass_incc_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_zero_dfail_incc_comp_less_back_fail_repl_pass_repl_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_inv_dfail_wrap_comp_never_back_fail_zero_pass_zero_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_keep_dfail_inv_comp_equal_back_fail_keep_pass_inv_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_repl_dfail_keep_comp_not_equal_back_fail_wrap_pass_keep_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_incc_dfail_keep_comp_less_back_fail_zero_pass_repl_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decc_dfail_decw_comp_greater_or_equal_back_fail_wrap_pass_incc_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_wrap_dfail_incc_comp_greater_or_equal_back_fail_zero_pass_decc_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_wrap_dfail_decw_comp_always_back_fail_decw_pass_wrap_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_zero_dfail_decc_comp_equal_back_fail_keep_pass_wrap_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decw_dfail_zero_comp_equal_back_fail_decw_pass_zero_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_incc_dfail_decw_comp_less_or_equal_back_fail_incc_pass_decw_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_inv_dfail_incc_comp_never_back_fail_decc_pass_incc_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_wrap_dfail_decc_comp_greater_back_fail_repl_pass_inv_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decc_dfail_inv_comp_not_equal_back_fail_wrap_pass_wrap_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decw_dfail_repl_comp_greater_or_equal_back_fail_decw_pass_decc_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_keep_dfail_repl_comp_never_back_fail_incc_pass_decw_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decc_dfail_repl_comp_greater_or_equal_back_fail_repl_pass_keep_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decw_dfail_decc_comp_never_back_fail_incc_pass_decc_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_incc_dfail_keep_comp_less_back_fail_decc_pass_decw_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_keep_dfail_inv_comp_equal_back_fail_repl_pass_incc_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_wrap_dfail_keep_comp_less_back_fail_incc_pass_keep_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decc_dfail_inv_comp_never_back_fail_keep_pass_wrap_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decw_dfail_repl_comp_less_back_fail_decc_pass_decc_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_keep_dfail_decc_comp_not_equal_back_fail_inv_pass_decw_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_wrap_dfail_inv_comp_never_back_fail_decc_pass_keep_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_incc_dfail_keep_comp_equal_back_fail_decc_pass_wrap_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_incc_dfail_incc_comp_never_back_fail_incc_pass_incc_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_repl_dfail_decc_comp_less_back_fail_incc_pass_incc_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decw_dfail_repl_comp_never_back_fail_incc_pass_repl_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decc_dfail_wrap_comp_always_back_fail_decc_pass_decw_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_incc_dfail_keep_comp_less_or_equal_back_fail_decw_pass_decc_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_incc_dfail_wrap_comp_less_or_equal_back_fail_inv_pass_incc_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_wrap_dfail_wrap_comp_less_or_equal_back_fail_decw_pass_incc_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_zero_dfail_decw_comp_never_back_fail_inv_pass_wrap_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_keep_dfail_decw_comp_equal_back_fail_decc_pass_zero_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_zero_dfail_decw_comp_greater_or_equal_back_fail_inv_pass_keep_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_zero_dfail_repl_comp_less_back_fail_incc_pass_zero_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decw_dfail_decw_comp_greater_back_fail_decc_pass_zero_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_incc_dfail_keep_comp_not_equal_back_fail_decw_pass_decw_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_incc_dfail_zero_comp_less_back_fail_incc_pass_incc_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_inv_dfail_inv_comp_less_back_fail_repl_pass_incc_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decw_dfail_decc_comp_less_back_fail_decc_pass_inv_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_wrap_dfail_decc_comp_less_back_fail_keep_pass_decw_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_keep_dfail_decc_comp_not_equal_back_fail_decw_pass_wrap_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decw_dfail_keep_comp_equal_back_fail_wrap_pass_keep_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_incc_dfail_incc_comp_not_equal_back_fail_repl_pass_decw_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_zero_dfail_keep_comp_equal_back_fail_keep_pass_incc_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_zero_dfail_decc_comp_not_equal_back_fail_keep_pass_zero_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_inv_dfail_repl_comp_never_back_fail_wrap_pass_zero_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_zero_dfail_repl_comp_not_equal_back_fail_wrap_pass_inv_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_wrap_dfail_zero_comp_greater_or_equal_back_fail_decw_pass_zero_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_incc_dfail_incc_comp_greater_back_fail_keep_pass_wrap_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_zero_dfail_decc_comp_greater_or_equal_back_fail_incc_pass_incc_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decc_dfail_inv_comp_always_back_fail_keep_pass_zero_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decw_dfail_keep_comp_not_equal_back_fail_zero_pass_decc_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decw_dfail_inv_comp_always_back_fail_decc_pass_decw_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_inv_dfail_repl_comp_not_equal_back_fail_decc_pass_decw_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_keep_dfail_decw_comp_less_back_fail_decc_pass_inv_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_wrap_dfail_decc_comp_always_back_fail_decw_pass_keep_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decw_dfail_wrap_comp_never_back_fail_zero_pass_wrap_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_inv_dfail_repl_comp_less_back_fail_repl_pass_decw_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_inv_dfail_decw_comp_less_back_fail_repl_pass_inv_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decc_dfail_wrap_comp_always_back_fail_keep_pass_inv_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_zero_dfail_decc_comp_equal_back_fail_wrap_pass_decc_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_incc_dfail_incc_comp_greater_or_equal_back_fail_zero_pass_zero_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_incc_dfail_inv_comp_always_back_fail_decw_pass_incc_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decc_dfail_zero_comp_greater_back_fail_keep_pass_incc_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decc_dfail_keep_comp_less_or_equal_back_fail_incc_pass_decc_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decw_dfail_wrap_comp_greater_or_equal_back_fail_decw_pass_decc_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_keep_dfail_repl_comp_never_back_fail_repl_pass_decw_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_inv_dfail_decw_comp_less_or_equal_back_fail_inv_pass_keep_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_zero_dfail_decw_comp_not_equal_back_fail_zero_pass_inv_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_incc_dfail_zero_comp_always_back_fail_keep_pass_zero_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_inv_dfail_keep_comp_not_equal_back_fail_wrap_pass_incc_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_wrap_dfail_repl_comp_greater_or_equal_back_fail_incc_pass_inv_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_wrap_dfail_incc_comp_greater_back_fail_wrap_pass_wrap_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_incc_dfail_inv_comp_greater_back_fail_inv_pass_wrap_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_wrap_dfail_keep_comp_greater_or_equal_back_fail_incc_pass_incc_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_repl_dfail_zero_comp_equal_back_fail_keep_pass_wrap_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_wrap_dfail_zero_comp_greater_back_fail_inv_pass_repl_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decc_dfail_zero_comp_greater_back_fail_wrap_pass_wrap_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_zero_dfail_zero_comp_never_back_fail_repl_pass_decc_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decc_dfail_decc_comp_greater_or_equal_back_fail_repl_pass_zero_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decw_dfail_decw_comp_not_equal_back_fail_decc_pass_decc_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decw_dfail_incc_comp_not_equal_back_fail_zero_pass_decw_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_repl_dfail_keep_comp_greater_back_fail_decc_pass_decw_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_inv_dfail_wrap_comp_greater_or_equal_back_fail_zero_pass_repl_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_repl_dfail_keep_comp_not_equal_back_fail_inv_pass_inv_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decc_dfail_decw_comp_not_equal_back_fail_decw_pass_repl_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_keep_dfail_decw_comp_greater_or_equal_back_fail_keep_pass_decc_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_wrap_dfail_repl_comp_equal_back_fail_inv_pass_keep_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_inv_dfail_repl_comp_greater_back_fail_incc_pass_wrap_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_wrap_dfail_inv_comp_always_back_fail_keep_pass_inv_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_repl_dfail_decw_comp_equal_back_fail_repl_pass_wrap_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decc_dfail_wrap_comp_greater_back_fail_wrap_pass_repl_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_repl_dfail_incc_comp_not_equal_back_fail_keep_pass_decc_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_repl_dfail_keep_comp_greater_or_equal_back_fail_incc_pass_repl_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_repl_dfail_decc_comp_less_back_fail_zero_pass_repl_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decw_dfail_decw_comp_less_back_fail_repl_pass_repl_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_wrap_dfail_repl_comp_equal_back_fail_wrap_pass_decw_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_zero_dfail_incc_comp_not_equal_back_fail_inv_pass_wrap_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_keep_dfail_keep_comp_not_equal_back_fail_decc_pass_zero_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decc_dfail_repl_comp_always_back_fail_decw_pass_keep_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_keep_dfail_inv_comp_equal_back_fail_wrap_pass_decc_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_repl_dfail_wrap_comp_less_back_fail_zero_pass_keep_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_inv_dfail_incc_comp_less_or_equal_back_fail_zero_pass_repl_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decw_dfail_keep_comp_not_equal_back_fail_keep_pass_inv_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_incc_dfail_inv_comp_greater_or_equal_back_fail_keep_pass_decw_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decc_dfail_zero_comp_less_back_fail_zero_pass_incc_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_keep_dfail_decw_comp_always_back_fail_zero_pass_decc_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_repl_dfail_zero_comp_not_equal_back_fail_repl_pass_keep_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_wrap_dfail_keep_comp_less_or_equal_back_fail_repl_pass_repl_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_keep_dfail_zero_comp_not_equal_back_fail_decw_pass_wrap_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_zero_dfail_decw_comp_never_back_fail_zero_pass_keep_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_repl_dfail_decw_comp_never_back_fail_keep_pass_zero_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_keep_dfail_inv_comp_not_equal_back_fail_zero_pass_repl_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decw_dfail_decc_comp_equal_back_fail_decc_pass_keep_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_repl_dfail_wrap_comp_always_back_fail_incc_pass_decw_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decw_dfail_repl_comp_less_back_fail_inv_pass_repl_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decc_dfail_incc_comp_always_back_fail_wrap_pass_decw_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decw_dfail_inv_comp_greater_or_equal_back_fail_incc_pass_decc_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_zero_dfail_decw_comp_greater_or_equal_back_fail_keep_pass_decw_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_keep_dfail_incc_comp_greater_back_fail_wrap_pass_zero_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_keep_dfail_repl_comp_less_or_equal_back_fail_decw_pass_keep_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_keep_dfail_inv_comp_never_back_fail_keep_pass_keep_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_zero_dfail_inv_comp_greater_or_equal_back_fail_wrap_pass_keep_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_repl_dfail_keep_comp_greater_or_equal_back_fail_decw_pass_zero_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_incc_dfail_keep_comp_greater_back_fail_inv_pass_repl_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decw_dfail_wrap_comp_greater_back_fail_wrap_pass_incc_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_zero_dfail_wrap_comp_greater_back_fail_incc_pass_decw_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_incc_dfail_wrap_comp_not_equal_back_fail_zero_pass_zero_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_repl_dfail_wrap_comp_equal_back_fail_inv_pass_incc_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_keep_dfail_wrap_comp_equal_back_fail_inv_pass_repl_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_incc_dfail_keep_comp_less_back_fail_repl_pass_keep_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_inv_dfail_zero_comp_never_back_fail_decw_pass_incc_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_wrap_dfail_keep_comp_always_back_fail_incc_pass_inv_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_inv_dfail_keep_comp_equal_back_fail_decc_pass_wrap_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_wrap_dfail_zero_comp_always_back_fail_wrap_pass_inv_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_wrap_dfail_zero_comp_never_back_fail_zero_pass_wrap_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_incc_dfail_keep_comp_greater_back_fail_zero_pass_wrap_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_incc_dfail_wrap_comp_never_back_fail_repl_pass_incc_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_zero_dfail_decc_comp_not_equal_back_fail_wrap_pass_incc_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_keep_dfail_wrap_comp_not_equal_back_fail_incc_pass_zero_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_keep_dfail_incc_comp_less_back_fail_repl_pass_keep_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_keep_dfail_incc_comp_greater_or_equal_back_fail_incc_pass_keep_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_incc_dfail_inv_comp_not_equal_back_fail_wrap_pass_keep_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_wrap_dfail_wrap_comp_greater_or_equal_back_fail_decw_pass_incc_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decw_dfail_decw_comp_equal_back_fail_decw_pass_wrap_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_inv_dfail_wrap_comp_never_back_fail_zero_pass_decw_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_inv_dfail_keep_comp_always_back_fail_incc_pass_inv_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_inv_dfail_repl_comp_less_or_equal_back_fail_keep_pass_inv_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_inv_dfail_inv_comp_never_back_fail_wrap_pass_inv_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_inv_dfail_zero_comp_greater_back_fail_decc_pass_inv_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decw_dfail_decw_comp_not_equal_back_fail_keep_pass_inv_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decc_dfail_decc_comp_less_back_fail_repl_pass_decw_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decc_dfail_decc_comp_greater_or_equal_back_fail_wrap_pass_decc_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_keep_dfail_decc_comp_greater_back_fail_inv_pass_decc_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decc_dfail_incc_comp_not_equal_back_fail_incc_pass_keep_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decc_dfail_wrap_comp_equal_back_fail_zero_pass_decc_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_inv_dfail_repl_comp_equal_back_fail_inv_pass_decc_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_repl_dfail_incc_comp_less_or_equal_back_fail_inv_pass_inv_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_incc_dfail_wrap_comp_never_back_fail_inv_pass_repl_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_inv_dfail_zero_comp_greater_back_fail_repl_pass_incc_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decc_dfail_repl_comp_greater_back_fail_decw_pass_inv_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_inv_dfail_decc_comp_less_or_equal_back_fail_decc_pass_decc_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_repl_dfail_zero_comp_less_back_fail_keep_pass_inv_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_incc_dfail_zero_comp_greater_or_equal_back_fail_keep_pass_repl_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_inv_dfail_keep_comp_less_or_equal_back_fail_decc_pass_incc_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_wrap_dfail_incc_comp_less_back_fail_decw_pass_inv_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_incc_dfail_decc_comp_less_or_equal_back_fail_inv_pass_wrap_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_incc_dfail_repl_comp_greater_or_equal_back_fail_zero_pass_incc_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_incc_dfail_zero_comp_always_back_fail_decw_pass_incc_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_repl_dfail_repl_comp_less_back_fail_keep_pass_incc_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_zero_dfail_repl_comp_less_back_fail_keep_pass_repl_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decc_dfail_wrap_comp_not_equal_back_fail_incc_pass_zero_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decw_dfail_inv_comp_not_equal_back_fail_decc_pass_decc_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_repl_dfail_decc_comp_greater_or_equal_back_fail_wrap_pass_decw_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decw_dfail_wrap_comp_never_back_fail_incc_pass_repl_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_wrap_dfail_wrap_comp_greater_back_fail_decw_pass_decw_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decc_dfail_zero_comp_greater_back_fail_zero_pass_wrap_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_repl_dfail_keep_comp_greater_or_equal_back_fail_decc_pass_decc_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_incc_dfail_zero_comp_not_equal_back_fail_wrap_pass_repl_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_zero_dfail_keep_comp_greater_back_fail_wrap_pass_incc_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_keep_dfail_decc_comp_less_or_equal_back_fail_decc_pass_zero_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decc_dfail_repl_comp_equal_back_fail_zero_pass_keep_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_incc_dfail_zero_comp_greater_back_fail_wrap_pass_decc_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_incc_dfail_decc_comp_greater_back_fail_wrap_pass_incc_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decc_dfail_keep_comp_less_or_equal_back_fail_zero_pass_incc_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_incc_dfail_repl_comp_greater_back_fail_wrap_pass_decc_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decc_dfail_inv_comp_greater_back_fail_inv_pass_incc_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_incc_dfail_inv_comp_less_or_equal_back_fail_inv_pass_decc_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_incc_dfail_keep_comp_greater_or_equal_back_fail_inv_pass_incc_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_wrap_dfail_decc_comp_equal_back_fail_keep_pass_incc_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_incc_dfail_zero_comp_always_back_fail_incc_pass_wrap_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decc_dfail_zero_comp_less_or_equal_back_fail_zero_pass_incc_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_zero_dfail_keep_comp_equal_back_fail_repl_pass_decc_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_keep_dfail_repl_comp_less_back_fail_inv_pass_zero_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_zero_dfail_decc_comp_less_back_fail_decw_pass_keep_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_incc_dfail_decw_comp_greater_or_equal_back_fail_decw_pass_zero_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decc_dfail_inv_comp_less_back_fail_keep_pass_incc_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_keep_dfail_inv_comp_less_or_equal_back_fail_decc_pass_decc_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decc_dfail_incc_comp_equal_back_fail_wrap_pass_keep_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_zero_dfail_decc_comp_always_back_fail_decw_pass_decc_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_zero_dfail_incc_comp_not_equal_back_fail_wrap_pass_zero_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decw_dfail_inv_comp_less_or_equal_back_fail_wrap_pass_zero_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_keep_dfail_repl_comp_less_back_fail_incc_pass_decw_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_keep_dfail_inv_comp_always_back_fail_incc_pass_keep_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_keep_dfail_inv_comp_never_back_fail_wrap_pass_keep_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_keep_dfail_decw_comp_equal_back_fail_repl_pass_keep_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decw_dfail_repl_comp_greater_back_fail_decw_pass_keep_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_repl_dfail_wrap_comp_equal_back_fail_inv_pass_decw_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_keep_dfail_incc_comp_equal_back_fail_decc_pass_repl_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_wrap_dfail_keep_comp_greater_back_fail_keep_pass_keep_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decw_dfail_inv_comp_not_equal_back_fail_decw_pass_wrap_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_zero_dfail_wrap_comp_less_back_fail_repl_pass_decw_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decc_dfail_decc_comp_equal_back_fail_keep_pass_zero_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decc_dfail_decc_comp_never_back_fail_inv_pass_decc_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_keep_dfail_zero_comp_less_back_fail_keep_pass_decc_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_repl_dfail_repl_comp_not_equal_back_fail_incc_pass_keep_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_repl_dfail_repl_comp_less_back_fail_zero_pass_repl_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decw_dfail_decw_comp_greater_back_fail_decc_pass_repl_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decc_dfail_zero_comp_less_back_fail_repl_pass_decw_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_repl_dfail_repl_comp_greater_back_fail_decw_pass_decc_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_wrap_dfail_keep_comp_greater_back_fail_keep_pass_repl_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_repl_dfail_inv_comp_not_equal_back_fail_inv_pass_wrap_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_keep_dfail_decw_comp_less_back_fail_keep_pass_repl_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_zero_dfail_inv_comp_always_back_fail_decc_pass_keep_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_incc_dfail_decw_comp_greater_or_equal_back_fail_wrap_pass_zero_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_zero_dfail_incc_comp_never_back_fail_decw_pass_incc_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_zero_dfail_decc_comp_greater_or_equal_back_fail_inv_pass_zero_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_keep_dfail_zero_comp_not_equal_back_fail_wrap_pass_zero_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_repl_dfail_incc_comp_never_back_fail_inv_pass_keep_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_keep_dfail_keep_comp_less_or_equal_back_fail_incc_pass_repl_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_inv_dfail_decc_comp_less_or_equal_back_fail_decw_pass_keep_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_keep_dfail_decc_comp_less_back_fail_incc_pass_inv_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_wrap_dfail_zero_comp_less_or_equal_back_fail_keep_pass_keep_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_inv_dfail_zero_comp_equal_back_fail_wrap_pass_wrap_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decw_dfail_incc_comp_equal_back_fail_zero_pass_inv_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_incc_dfail_decw_comp_never_back_fail_wrap_pass_decw_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_wrap_dfail_keep_comp_equal_back_fail_wrap_pass_incc_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decw_dfail_decw_comp_greater_back_fail_zero_pass_wrap_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_zero_dfail_decc_comp_never_back_fail_zero_pass_decw_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_repl_dfail_decc_comp_greater_back_fail_repl_pass_zero_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_keep_dfail_repl_comp_greater_back_fail_incc_pass_repl_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_inv_dfail_wrap_comp_greater_back_fail_decc_pass_keep_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_repl_dfail_zero_comp_greater_or_equal_back_fail_inv_pass_inv_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decc_dfail_incc_comp_never_back_fail_repl_pass_repl_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decc_dfail_inv_comp_not_equal_back_fail_decw_pass_decc_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_incc_dfail_decw_comp_never_back_fail_keep_pass_decc_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_incc_dfail_incc_comp_never_back_fail_keep_pass_incc_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decw_dfail_wrap_comp_greater_or_equal_back_fail_inv_pass_incc_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_keep_dfail_repl_comp_always_back_fail_zero_pass_decw_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_incc_dfail_decw_comp_never_back_fail_incc_pass_keep_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_keep_dfail_decw_comp_not_equal_back_fail_decc_pass_incc_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decw_dfail_wrap_comp_greater_or_equal_back_fail_zero_pass_keep_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_zero_dfail_repl_comp_equal_back_fail_incc_pass_decw_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_incc_dfail_inv_comp_never_back_fail_zero_pass_zero_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_wrap_dfail_zero_comp_greater_or_equal_back_fail_zero_pass_incc_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_keep_dfail_inv_comp_less_back_fail_incc_pass_wrap_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_zero_dfail_decc_comp_less_back_fail_zero_pass_keep_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_repl_dfail_decw_comp_less_back_fail_wrap_pass_zero_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decw_dfail_decc_comp_less_or_equal_back_fail_repl_pass_repl_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_keep_dfail_incc_comp_not_equal_back_fail_inv_pass_decw_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_keep_dfail_keep_comp_less_or_equal_back_fail_decc_pass_keep_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_zero_dfail_wrap_comp_greater_or_equal_back_fail_inv_pass_keep_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_keep_dfail_inv_comp_less_or_equal_back_fail_zero_pass_zero_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decc_dfail_decw_comp_never_back_fail_inv_pass_keep_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_inv_dfail_incc_comp_greater_or_equal_back_fail_repl_pass_decc_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_wrap_dfail_incc_comp_equal_back_fail_decw_pass_inv_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decw_dfail_keep_comp_equal_back_fail_decc_pass_wrap_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decc_dfail_repl_comp_less_back_fail_decw_pass_decw_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decc_dfail_decw_comp_greater_or_equal_back_fail_decw_pass_decc_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_repl_dfail_decc_comp_always_back_fail_wrap_pass_decc_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_keep_dfail_decc_comp_less_or_equal_back_fail_zero_pass_repl_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_keep_dfail_repl_comp_greater_or_equal_back_fail_inv_pass_keep_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_zero_dfail_decw_comp_equal_back_fail_repl_pass_keep_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_inv_dfail_decw_comp_never_back_fail_repl_pass_zero_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_wrap_dfail_decc_comp_greater_or_equal_back_fail_wrap_pass_inv_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decw_dfail_decw_comp_equal_back_fail_inv_pass_wrap_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_inv_dfail_incc_comp_not_equal_back_fail_inv_pass_decw_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decw_dfail_repl_comp_greater_back_fail_repl_pass_inv_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_incc_dfail_inv_comp_always_back_fail_wrap_pass_decw_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decw_dfail_decw_comp_greater_back_fail_decc_pass_incc_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_wrap_dfail_inv_comp_never_back_fail_keep_pass_decw_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_keep_dfail_decw_comp_always_back_fail_decw_pass_wrap_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_repl_dfail_zero_comp_less_back_fail_keep_pass_keep_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_incc_dfail_decc_comp_not_equal_back_fail_decc_pass_repl_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_zero_dfail_keep_comp_less_back_fail_keep_pass_incc_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_keep_dfail_repl_comp_greater_back_fail_decc_pass_zero_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_keep_dfail_decc_comp_equal_back_fail_zero_pass_keep_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_repl_dfail_repl_comp_greater_or_equal_back_fail_decw_pass_keep_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_inv_dfail_keep_comp_greater_or_equal_back_fail_decw_pass_repl_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_incc_dfail_inv_comp_never_back_fail_decc_pass_inv_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decw_dfail_keep_comp_always_back_fail_wrap_pass_incc_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decc_dfail_repl_comp_equal_back_fail_wrap_pass_decw_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_incc_dfail_repl_comp_not_equal_back_fail_inv_pass_decc_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decw_dfail_decw_comp_equal_back_fail_repl_pass_incc_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_wrap_dfail_decc_comp_never_back_fail_incc_pass_decw_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_incc_dfail_decc_comp_not_equal_back_fail_zero_pass_wrap_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decw_dfail_repl_comp_not_equal_back_fail_incc_pass_incc_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decw_dfail_inv_comp_less_or_equal_back_fail_zero_pass_decw_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_inv_dfail_zero_comp_less_back_fail_inv_pass_decw_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decc_dfail_repl_comp_never_back_fail_keep_pass_inv_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decw_dfail_wrap_comp_not_equal_back_fail_keep_pass_decc_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_inv_dfail_decw_comp_greater_or_equal_back_fail_keep_pass_decw_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_keep_dfail_inv_comp_greater_back_fail_decc_pass_inv_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_keep_dfail_keep_comp_greater_back_fail_zero_pass_keep_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decw_dfail_wrap_comp_never_back_fail_repl_pass_keep_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decw_dfail_repl_comp_always_back_fail_incc_pass_decw_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_wrap_dfail_incc_comp_not_equal_back_fail_incc_pass_decw_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decw_dfail_inv_comp_less_or_equal_back_fail_zero_pass_wrap_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_zero_dfail_wrap_comp_equal_back_fail_keep_pass_decw_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_zero_dfail_repl_comp_not_equal_back_fail_decw_pass_zero_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decc_dfail_decw_comp_less_or_equal_back_fail_repl_pass_zero_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_keep_dfail_zero_comp_never_back_fail_inv_pass_decc_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_keep_dfail_repl_comp_always_back_fail_keep_pass_keep_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decc_dfail_keep_comp_never_back_fail_decw_pass_keep_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decc_dfail_decc_comp_greater_back_fail_incc_pass_decc_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_zero_dfail_keep_comp_always_back_fail_repl_pass_decc_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decw_dfail_repl_comp_always_back_fail_wrap_pass_zero_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decc_dfail_wrap_comp_greater_back_fail_keep_pass_decw_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_repl_dfail_inv_comp_less_or_equal_back_fail_repl_pass_decc_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decc_dfail_wrap_comp_less_back_fail_wrap_pass_repl_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_incc_dfail_incc_comp_equal_back_fail_keep_pass_decc_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_inv_dfail_decc_comp_greater_back_fail_inv_pass_incc_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_inv_dfail_inv_comp_equal_back_fail_decc_pass_inv_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decc_dfail_inv_comp_never_back_fail_inv_pass_inv_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_keep_dfail_keep_comp_never_back_fail_keep_pass_decc_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_repl_dfail_repl_comp_less_back_fail_decw_pass_keep_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_repl_dfail_decw_comp_greater_back_fail_inv_pass_repl_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decc_dfail_inv_comp_always_back_fail_repl_pass_repl_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decw_dfail_wrap_comp_less_or_equal_back_fail_repl_pass_decc_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_zero_dfail_wrap_comp_greater_back_fail_inv_pass_decw_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_repl_dfail_decc_comp_always_back_fail_wrap_pass_zero_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_wrap_dfail_repl_comp_equal_back_fail_repl_pass_repl_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_inv_dfail_decc_comp_never_back_fail_wrap_pass_wrap_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decc_dfail_inv_comp_never_back_fail_decc_pass_inv_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decw_dfail_decc_comp_never_back_fail_wrap_pass_decc_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_incc_dfail_zero_comp_less_or_equal_back_fail_repl_pass_decw_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_repl_dfail_incc_comp_equal_back_fail_zero_pass_incc_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_zero_dfail_inv_comp_less_back_fail_wrap_pass_repl_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_repl_dfail_keep_comp_never_back_fail_decw_pass_zero_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decc_dfail_repl_comp_never_back_fail_decc_pass_repl_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_repl_dfail_decw_comp_equal_back_fail_decc_pass_decc_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decc_dfail_decw_comp_not_equal_back_fail_inv_pass_repl_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decw_dfail_keep_comp_never_back_fail_incc_pass_decc_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decc_dfail_keep_comp_less_back_fail_wrap_pass_decw_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decw_dfail_repl_comp_not_equal_back_fail_decc_pass_decc_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_incc_dfail_wrap_comp_greater_back_fail_incc_pass_decw_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decw_dfail_incc_comp_less_back_fail_wrap_pass_incc_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decw_dfail_inv_comp_less_back_fail_incc_pass_decw_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_keep_dfail_repl_comp_less_or_equal_back_fail_incc_pass_decw_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decw_dfail_zero_comp_always_back_fail_zero_pass_keep_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_repl_dfail_keep_comp_greater_or_equal_back_fail_inv_pass_decw_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_repl_dfail_repl_comp_less_or_equal_back_fail_repl_pass_repl_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decc_dfail_decw_comp_less_or_equal_back_fail_inv_pass_repl_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_incc_dfail_keep_comp_greater_or_equal_back_fail_wrap_pass_decc_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_repl_dfail_zero_comp_greater_or_equal_back_fail_zero_pass_incc_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_zero_dfail_decw_comp_less_or_equal_back_fail_decw_pass_repl_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decw_dfail_decc_comp_greater_or_equal_back_fail_repl_pass_zero_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_zero_dfail_zero_comp_greater_or_equal_back_fail_decc_pass_decw_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_wrap_dfail_incc_comp_always_back_fail_zero_pass_zero_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decc_dfail_decc_comp_always_back_fail_decc_pass_wrap_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decw_dfail_zero_comp_not_equal_back_fail_keep_pass_decc_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_incc_dfail_inv_comp_greater_or_equal_back_fail_wrap_pass_decw_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decw_dfail_decc_comp_not_equal_back_fail_decw_pass_incc_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_zero_dfail_repl_comp_not_equal_back_fail_repl_pass_decw_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decw_dfail_decc_comp_equal_back_fail_keep_pass_zero_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decc_dfail_incc_comp_always_back_fail_decc_pass_decw_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decw_dfail_incc_comp_not_equal_back_fail_wrap_pass_decc_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_incc_dfail_wrap_comp_never_back_fail_decw_pass_decw_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decc_dfail_keep_comp_always_back_fail_keep_pass_incc_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decc_dfail_keep_comp_not_equal_back_fail_wrap_pass_decc_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_keep_dfail_inv_comp_equal_back_fail_incc_pass_decc_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decw_dfail_decc_comp_equal_back_fail_inv_pass_keep_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_inv_dfail_decc_comp_not_equal_back_fail_repl_pass_decw_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_repl_dfail_zero_comp_less_or_equal_back_fail_decc_pass_inv_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decc_dfail_inv_comp_never_back_fail_keep_pass_repl_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_inv_dfail_inv_comp_equal_back_fail_zero_pass_decc_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decc_dfail_zero_comp_greater_or_equal_back_fail_wrap_pass_inv_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decw_dfail_repl_comp_greater_back_fail_incc_pass_decc_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_zero_dfail_inv_comp_less_or_equal_back_fail_repl_pass_decw_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_wrap_dfail_inv_comp_less_or_equal_back_fail_incc_pass_zero_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_wrap_dfail_zero_comp_always_back_fail_inv_pass_wrap_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_keep_dfail_zero_comp_less_back_fail_keep_pass_wrap_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_wrap_dfail_incc_comp_less_or_equal_back_fail_decw_pass_keep_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_keep_dfail_inv_comp_less_or_equal_back_fail_incc_pass_wrap_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decw_dfail_decc_comp_less_or_equal_back_fail_incc_pass_keep_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decw_dfail_wrap_comp_never_back_fail_decc_pass_decw_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_inv_dfail_wrap_comp_greater_or_equal_back_fail_wrap_pass_decw_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decw_dfail_zero_comp_equal_back_fail_repl_pass_inv_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_incc_dfail_incc_comp_less_or_equal_back_fail_decw_pass_decw_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decw_dfail_decw_comp_greater_or_equal_back_fail_wrap_pass_incc_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_keep_dfail_zero_comp_greater_back_fail_zero_pass_decw_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_wrap_dfail_inv_comp_not_equal_back_fail_repl_pass_keep_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decw_dfail_keep_comp_not_equal_back_fail_decw_pass_wrap_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_keep_dfail_zero_comp_never_back_fail_repl_pass_decw_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_zero_dfail_incc_comp_equal_back_fail_inv_pass_keep_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_zero_dfail_keep_comp_less_back_fail_decw_pass_zero_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decc_dfail_decc_comp_greater_back_fail_inv_pass_zero_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_zero_dfail_wrap_comp_always_back_fail_decc_pass_decc_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_repl_dfail_decw_comp_less_back_fail_keep_pass_zero_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_incc_dfail_decw_comp_never_back_fail_keep_pass_repl_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decw_dfail_repl_comp_always_back_fail_decw_pass_incc_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_wrap_dfail_wrap_comp_less_back_fail_inv_pass_decw_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_wrap_dfail_decc_comp_never_back_fail_keep_pass_wrap_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_wrap_dfail_incc_comp_never_back_fail_repl_pass_wrap_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_inv_dfail_inv_comp_greater_back_fail_zero_pass_wrap_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decw_dfail_decc_comp_never_back_fail_keep_pass_inv_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_incc_dfail_decw_comp_less_or_equal_back_fail_zero_pass_decw_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_wrap_dfail_inv_comp_not_equal_back_fail_zero_pass_incc_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_wrap_dfail_wrap_comp_greater_back_fail_decc_pass_wrap_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decc_dfail_incc_comp_less_or_equal_back_fail_decc_pass_wrap_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_keep_dfail_incc_comp_less_back_fail_wrap_pass_decc_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_incc_dfail_zero_comp_never_back_fail_decc_pass_keep_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_inv_dfail_inv_comp_less_or_equal_back_fail_wrap_pass_incc_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_keep_dfail_keep_comp_greater_or_equal_back_fail_repl_pass_inv_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_repl_dfail_repl_comp_greater_back_fail_wrap_pass_keep_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decw_dfail_zero_comp_equal_back_fail_repl_pass_repl_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_keep_dfail_zero_comp_greater_back_fail_keep_pass_decw_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decc_dfail_decc_comp_always_back_fail_zero_pass_keep_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_wrap_dfail_decw_comp_always_back_fail_wrap_pass_decc_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_incc_dfail_incc_comp_always_back_fail_repl_pass_wrap_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_zero_dfail_wrap_comp_equal_back_fail_keep_pass_incc_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_keep_dfail_incc_comp_always_back_fail_wrap_pass_zero_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_inv_dfail_inv_comp_never_back_fail_wrap_pass_keep_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_keep_dfail_repl_comp_greater_or_equal_back_fail_inv_pass_inv_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_keep_dfail_decw_comp_greater_back_fail_incc_pass_keep_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_incc_dfail_incc_comp_equal_back_fail_keep_pass_keep_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_zero_dfail_wrap_comp_less_back_fail_repl_pass_incc_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_zero_dfail_incc_comp_greater_back_fail_zero_pass_zero_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_keep_dfail_incc_comp_never_back_fail_incc_pass_zero_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_inv_dfail_repl_comp_never_back_fail_decw_pass_keep_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_keep_dfail_inv_comp_greater_back_fail_decw_pass_inv_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_zero_dfail_zero_comp_not_equal_back_fail_decc_pass_keep_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_inv_dfail_inv_comp_equal_back_fail_decc_pass_zero_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decw_dfail_repl_comp_less_or_equal_back_fail_decw_pass_inv_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decc_dfail_keep_comp_never_back_fail_wrap_pass_decw_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decw_dfail_incc_comp_equal_back_fail_keep_pass_decc_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_wrap_dfail_decw_comp_less_back_fail_decw_pass_decw_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_keep_dfail_incc_comp_less_or_equal_back_fail_keep_pass_wrap_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_incc_dfail_decw_comp_not_equal_back_fail_zero_pass_keep_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_zero_dfail_decw_comp_equal_back_fail_wrap_pass_incc_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decc_dfail_zero_comp_greater_or_equal_back_fail_inv_pass_zero_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_zero_dfail_zero_comp_always_back_fail_decw_pass_decc_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_zero_dfail_decc_comp_always_back_fail_inv_pass_zero_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decc_dfail_keep_comp_never_back_fail_incc_pass_zero_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decw_dfail_incc_comp_equal_back_fail_zero_pass_decc_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_incc_dfail_decw_comp_less_back_fail_zero_pass_decw_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decw_dfail_incc_comp_equal_back_fail_decw_pass_incc_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_keep_dfail_decc_comp_never_back_fail_keep_pass_decw_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_wrap_dfail_wrap_comp_not_equal_back_fail_decw_pass_keep_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_repl_dfail_keep_comp_never_back_fail_repl_pass_wrap_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_wrap_dfail_inv_comp_always_back_fail_incc_pass_repl_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_keep_dfail_repl_comp_not_equal_back_fail_decw_pass_wrap_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decc_dfail_wrap_comp_greater_back_fail_keep_pass_keep_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decc_dfail_zero_comp_less_back_fail_inv_pass_decc_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_repl_dfail_zero_comp_equal_back_fail_repl_pass_decc_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decc_dfail_inv_comp_always_back_fail_zero_pass_repl_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_wrap_dfail_wrap_comp_always_back_fail_keep_pass_decc_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_repl_dfail_inv_comp_never_back_fail_zero_pass_wrap_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decw_dfail_wrap_comp_greater_or_equal_back_fail_keep_pass_repl_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_keep_dfail_keep_comp_not_equal_back_fail_inv_pass_decw_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_keep_dfail_zero_comp_less_back_fail_incc_pass_keep_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decc_dfail_inv_comp_less_or_equal_back_fail_repl_pass_keep_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_repl_dfail_zero_comp_equal_back_fail_decc_pass_decc_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decw_dfail_zero_comp_always_back_fail_decc_pass_repl_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_incc_dfail_decc_comp_never_back_fail_repl_pass_decw_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_keep_dfail_wrap_comp_less_or_equal_back_fail_inv_pass_incc_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_zero_dfail_wrap_comp_less_back_fail_keep_pass_keep_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_keep_dfail_decw_comp_greater_back_fail_incc_pass_zero_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_inv_dfail_incc_comp_less_or_equal_back_fail_decc_pass_keep_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_inv_dfail_keep_comp_less_or_equal_back_fail_zero_pass_inv_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decc_dfail_decc_comp_less_back_fail_incc_pass_inv_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decc_dfail_decw_comp_never_back_fail_keep_pass_decc_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decw_dfail_zero_comp_not_equal_back_fail_decw_pass_decc_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_zero_dfail_incc_comp_less_or_equal_back_fail_keep_pass_decw_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_zero_dfail_repl_comp_greater_back_fail_decw_pass_zero_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decw_dfail_decw_comp_less_back_fail_zero_pass_zero_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_wrap_dfail_decw_comp_never_back_fail_decw_pass_decw_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_inv_dfail_inv_comp_equal_back_fail_wrap_pass_wrap_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_keep_dfail_incc_comp_less_or_equal_back_fail_incc_pass_inv_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_incc_dfail_zero_comp_greater_or_equal_back_fail_decw_pass_keep_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_inv_dfail_incc_comp_greater_back_fail_wrap_pass_incc_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_incc_dfail_decc_comp_never_back_fail_repl_pass_inv_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_repl_dfail_decw_comp_always_back_fail_decw_pass_incc_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_incc_dfail_repl_comp_less_or_equal_back_fail_decc_pass_repl_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decw_dfail_wrap_comp_greater_back_fail_inv_pass_incc_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decw_dfail_wrap_comp_less_back_fail_decw_pass_decw_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_keep_dfail_decw_comp_not_equal_back_fail_inv_pass_decw_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_zero_dfail_zero_comp_equal_back_fail_keep_pass_keep_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_incc_dfail_incc_comp_not_equal_back_fail_decw_pass_zero_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decc_dfail_decc_comp_always_back_fail_inv_pass_incc_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_inv_dfail_wrap_comp_greater_back_fail_zero_pass_decc_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_wrap_dfail_incc_comp_not_equal_back_fail_decw_pass_inv_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_inv_dfail_inv_comp_always_back_fail_incc_pass_wrap_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_repl_dfail_incc_comp_greater_or_equal_back_fail_wrap_pass_inv_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_inv_dfail_incc_comp_greater_or_equal_back_fail_decw_pass_repl_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decw_dfail_inv_comp_greater_back_fail_zero_pass_inv_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_inv_dfail_zero_comp_equal_back_fail_inv_pass_decw_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decw_dfail_zero_comp_not_equal_back_fail_wrap_pass_inv_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_keep_dfail_decw_comp_less_back_fail_decc_pass_decw_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_inv_dfail_zero_comp_greater_or_equal_back_fail_wrap_pass_keep_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decw_dfail_incc_comp_less_back_fail_incc_pass_inv_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decw_dfail_zero_comp_equal_back_fail_decc_pass_decw_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decc_dfail_incc_comp_always_back_fail_decc_pass_decw_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_repl_dfail_repl_comp_less_back_fail_repl_pass_decc_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_inv_dfail_wrap_comp_equal_back_fail_incc_pass_repl_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_repl_dfail_decw_comp_equal_back_fail_incc_pass_inv_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_wrap_dfail_inv_comp_less_back_fail_repl_pass_repl_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_inv_dfail_incc_comp_less_back_fail_repl_pass_wrap_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_keep_dfail_decw_comp_greater_or_equal_back_fail_inv_pass_inv_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_repl_dfail_decw_comp_always_back_fail_wrap_pass_keep_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_incc_dfail_zero_comp_always_back_fail_wrap_pass_repl_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decc_dfail_decw_comp_less_or_equal_back_fail_incc_pass_incc_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_inv_dfail_keep_comp_not_equal_back_fail_incc_pass_decc_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_repl_dfail_decc_comp_not_equal_back_fail_keep_pass_inv_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_inv_dfail_wrap_comp_equal_back_fail_decw_pass_repl_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_inv_dfail_decc_comp_not_equal_back_fail_wrap_pass_inv_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_keep_dfail_decw_comp_not_equal_back_fail_zero_pass_inv_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decc_dfail_zero_comp_equal_back_fail_decw_pass_keep_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decc_dfail_wrap_comp_not_equal_back_fail_repl_pass_decc_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decw_dfail_inv_comp_not_equal_back_fail_zero_pass_decc_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_incc_dfail_incc_comp_always_back_fail_incc_pass_decw_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_inv_dfail_repl_comp_equal_back_fail_incc_pass_incc_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_zero_dfail_decc_comp_not_equal_back_fail_keep_pass_inv_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decw_dfail_keep_comp_less_back_fail_decc_pass_zero_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_incc_dfail_wrap_comp_less_back_fail_decw_pass_decw_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_wrap_dfail_decw_comp_less_or_equal_back_fail_decc_pass_incc_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_incc_dfail_zero_comp_not_equal_back_fail_repl_pass_wrap_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_zero_dfail_incc_comp_always_back_fail_repl_pass_incc_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_wrap_dfail_decc_comp_always_back_fail_inv_pass_zero_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_keep_dfail_repl_comp_equal_back_fail_repl_pass_wrap_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_keep_dfail_incc_comp_not_equal_back_fail_wrap_pass_keep_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_keep_dfail_keep_comp_always_back_fail_repl_pass_keep_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_keep_dfail_inv_comp_never_back_fail_zero_pass_keep_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_incc_dfail_wrap_comp_less_back_fail_keep_pass_keep_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_incc_dfail_inv_comp_greater_or_equal_back_fail_decw_pass_incc_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_keep_dfail_keep_comp_greater_back_fail_decc_pass_incc_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_incc_dfail_incc_comp_always_back_fail_inv_pass_keep_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_wrap_dfail_inv_comp_not_equal_back_fail_wrap_pass_incc_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_inv_dfail_repl_comp_always_back_fail_wrap_pass_wrap_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_inv_dfail_keep_comp_never_back_fail_decc_pass_inv_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_keep_dfail_decw_comp_never_back_fail_decc_pass_inv_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_incc_dfail_inv_comp_always_back_fail_inv_pass_keep_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_keep_dfail_decw_comp_always_back_fail_inv_pass_incc_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_zero_dfail_wrap_comp_greater_back_fail_incc_pass_keep_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_inv_dfail_repl_comp_equal_back_fail_decw_pass_zero_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_repl_dfail_keep_comp_greater_back_fail_repl_pass_inv_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decc_dfail_inv_comp_greater_or_equal_back_fail_wrap_pass_repl_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_zero_dfail_repl_comp_not_equal_back_fail_wrap_pass_decc_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_zero_dfail_keep_comp_never_back_fail_zero_pass_zero_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decw_dfail_inv_comp_greater_or_equal_back_fail_decw_pass_zero_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_zero_dfail_keep_comp_greater_or_equal_back_fail_inv_pass_decw_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_wrap_dfail_decw_comp_always_back_fail_keep_pass_zero_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decw_dfail_keep_comp_always_back_fail_zero_pass_wrap_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decc_dfail_wrap_comp_less_or_equal_back_fail_repl_pass_decw_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_zero_dfail_wrap_comp_greater_back_fail_decw_pass_decc_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_repl_dfail_inv_comp_always_back_fail_keep_pass_zero_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_inv_dfail_incc_comp_greater_or_equal_back_fail_keep_pass_repl_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_wrap_dfail_zero_comp_always_back_fail_repl_pass_inv_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_wrap_dfail_incc_comp_never_back_fail_decw_pass_wrap_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_repl_dfail_wrap_comp_greater_or_equal_back_fail_keep_pass_wrap_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_incc_dfail_wrap_comp_less_back_fail_decw_pass_repl_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_wrap_dfail_keep_comp_less_or_equal_back_fail_repl_pass_incc_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_incc_dfail_zero_comp_greater_back_fail_zero_pass_wrap_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_repl_dfail_decc_comp_equal_back_fail_repl_pass_incc_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decc_dfail_zero_comp_not_equal_back_fail_repl_pass_repl_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_wrap_dfail_repl_comp_always_back_fail_wrap_pass_decc_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decc_dfail_decw_comp_greater_or_equal_back_fail_keep_pass_wrap_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_zero_dfail_incc_comp_less_or_equal_back_fail_decc_pass_decc_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_wrap_dfail_zero_comp_greater_or_equal_back_fail_wrap_pass_zero_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_inv_dfail_repl_comp_equal_back_fail_decw_pass_wrap_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_incc_dfail_inv_comp_never_back_fail_decw_pass_inv_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_repl_dfail_wrap_comp_equal_back_fail_decc_pass_incc_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_zero_dfail_repl_comp_less_back_fail_repl_pass_repl_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_wrap_dfail_wrap_comp_greater_back_fail_zero_pass_zero_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decc_dfail_zero_comp_less_back_fail_inv_pass_wrap_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_keep_dfail_repl_comp_greater_or_equal_back_fail_incc_pass_decc_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decw_dfail_zero_comp_greater_or_equal_back_fail_decw_pass_keep_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_repl_dfail_zero_comp_greater_or_equal_back_fail_zero_pass_decw_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decw_dfail_zero_comp_always_back_fail_incc_pass_repl_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decw_dfail_decc_comp_less_back_fail_zero_pass_decw_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_inv_dfail_decc_comp_never_back_fail_repl_pass_decw_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_zero_dfail_incc_comp_greater_back_fail_keep_pass_inv_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decw_dfail_zero_comp_less_or_equal_back_fail_decc_pass_zero_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_incc_dfail_zero_comp_less_back_fail_incc_pass_decw_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_incc_dfail_repl_comp_never_back_fail_zero_pass_incc_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decw_dfail_wrap_comp_never_back_fail_decw_pass_incc_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_repl_dfail_decw_comp_less_or_equal_back_fail_keep_pass_decw_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decc_dfail_keep_comp_greater_back_fail_inv_pass_repl_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decw_dfail_inv_comp_not_equal_back_fail_keep_pass_decc_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decw_dfail_inv_comp_greater_or_equal_back_fail_decw_pass_decw_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_incc_dfail_keep_comp_less_or_equal_back_fail_zero_pass_decw_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_zero_dfail_decc_comp_always_back_fail_zero_pass_incc_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_incc_dfail_incc_comp_less_back_fail_decc_pass_zero_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decc_dfail_keep_comp_never_back_fail_incc_pass_incc_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_repl_dfail_keep_comp_never_back_fail_inv_pass_decc_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_zero_dfail_wrap_comp_not_equal_back_fail_zero_pass_repl_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_repl_dfail_incc_comp_less_back_fail_wrap_pass_zero_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_keep_dfail_decw_comp_always_back_fail_decw_pass_repl_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_zero_dfail_wrap_comp_greater_back_fail_decc_pass_keep_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decw_dfail_keep_comp_greater_or_equal_back_fail_inv_pass_zero_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decw_dfail_wrap_comp_always_back_fail_keep_pass_decw_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decw_dfail_incc_comp_less_or_equal_back_fail_incc_pass_decw_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_keep_dfail_decc_comp_never_back_fail_keep_pass_decw_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_zero_dfail_decc_comp_never_back_fail_keep_pass_keep_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_incc_dfail_zero_comp_equal_back_fail_keep_pass_zero_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_zero_dfail_wrap_comp_greater_back_fail_zero_pass_incc_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_incc_dfail_decc_comp_less_back_fail_incc_pass_zero_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_incc_dfail_decc_comp_always_back_fail_inv_pass_incc_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decc_dfail_repl_comp_always_back_fail_zero_pass_incc_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_zero_dfail_zero_comp_less_or_equal_back_fail_keep_pass_decc_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_incc_dfail_zero_comp_equal_back_fail_zero_pass_zero_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_zero_dfail_zero_comp_not_equal_back_fail_keep_pass_incc_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_incc_dfail_inv_comp_greater_back_fail_decw_pass_zero_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_keep_dfail_zero_comp_equal_back_fail_zero_pass_incc_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_keep_dfail_wrap_comp_greater_or_equal_back_fail_decw_pass_keep_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_incc_dfail_keep_comp_never_back_fail_zero_pass_keep_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decc_dfail_keep_comp_less_or_equal_back_fail_decc_pass_incc_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_repl_dfail_incc_comp_always_back_fail_incc_pass_decc_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decc_dfail_wrap_comp_equal_back_fail_keep_pass_repl_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_inv_dfail_decw_comp_less_back_fail_incc_pass_decc_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decc_dfail_keep_comp_less_or_equal_back_fail_repl_pass_inv_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_zero_dfail_repl_comp_greater_back_fail_inv_pass_decc_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decc_dfail_wrap_comp_greater_or_equal_back_fail_inv_pass_zero_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_inv_dfail_decw_comp_equal_back_fail_wrap_pass_decc_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_wrap_dfail_repl_comp_not_equal_back_fail_wrap_pass_inv_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decc_dfail_wrap_comp_greater_back_fail_keep_pass_wrap_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decc_dfail_wrap_comp_less_back_fail_zero_pass_decc_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_incc_dfail_decw_comp_less_back_fail_incc_pass_decc_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_repl_dfail_keep_comp_less_or_equal_back_fail_keep_pass_incc_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_incc_dfail_incc_comp_greater_or_equal_back_fail_inv_pass_repl_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_zero_dfail_wrap_comp_greater_or_equal_back_fail_repl_pass_incc_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_inv_dfail_zero_comp_always_back_fail_decw_pass_zero_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_inv_dfail_incc_comp_equal_back_fail_keep_pass_inv_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_repl_dfail_zero_comp_not_equal_back_fail_zero_pass_inv_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_inv_dfail_repl_comp_greater_back_fail_zero_pass_repl_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_repl_dfail_keep_comp_always_back_fail_repl_pass_inv_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_incc_dfail_decw_comp_greater_or_equal_back_fail_zero_pass_repl_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_wrap_dfail_keep_comp_greater_back_fail_zero_pass_incc_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_incc_dfail_incc_comp_greater_back_fail_repl_pass_wrap_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_incc_dfail_wrap_comp_less_or_equal_back_fail_decw_pass_incc_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decc_dfail_repl_comp_less_or_equal_back_fail_repl_pass_incc_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_keep_dfail_inv_comp_less_back_fail_incc_pass_decc_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decc_dfail_decc_comp_greater_or_equal_back_fail_incc_pass_keep_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_inv_dfail_keep_comp_equal_back_fail_zero_pass_decc_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_wrap_dfail_wrap_comp_greater_or_equal_back_fail_incc_pass_inv_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_inv_dfail_incc_comp_not_equal_back_fail_keep_pass_wrap_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_keep_dfail_keep_comp_always_back_fail_wrap_pass_inv_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_wrap_dfail_decw_comp_greater_back_fail_inv_pass_keep_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decc_dfail_decw_comp_less_back_fail_inv_pass_wrap_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decc_dfail_keep_comp_greater_back_fail_zero_pass_decc_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_zero_dfail_zero_comp_less_or_equal_back_fail_zero_pass_decc_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_incc_dfail_decw_comp_greater_back_fail_inv_pass_zero_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decw_dfail_decc_comp_less_or_equal_back_fail_zero_pass_incc_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_repl_dfail_zero_comp_less_or_equal_back_fail_zero_pass_decw_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_repl_dfail_decw_comp_less_back_fail_inv_pass_repl_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decw_dfail_incc_comp_less_back_fail_decc_pass_repl_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_wrap_dfail_zero_comp_greater_back_fail_zero_pass_decw_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_keep_dfail_wrap_comp_less_back_fail_inv_pass_wrap_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_zero_dfail_keep_comp_less_back_fail_incc_pass_keep_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decw_dfail_decw_comp_greater_or_equal_back_fail_zero_pass_zero_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_zero_dfail_repl_comp_greater_or_equal_back_fail_decw_pass_decw_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_inv_dfail_decw_comp_greater_back_fail_repl_pass_zero_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_repl_dfail_decw_comp_always_back_fail_wrap_pass_inv_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_zero_dfail_wrap_comp_always_back_fail_repl_pass_repl_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_keep_dfail_repl_comp_equal_back_fail_zero_pass_zero_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_wrap_dfail_repl_comp_always_back_fail_inv_pass_keep_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_inv_dfail_decw_comp_not_equal_back_fail_wrap_pass_wrap_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_incc_dfail_incc_comp_never_back_fail_inv_pass_inv_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_incc_dfail_zero_comp_always_back_fail_decw_pass_incc_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_repl_dfail_zero_comp_greater_or_equal_back_fail_repl_pass_incc_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_incc_dfail_incc_comp_less_or_equal_back_fail_decc_pass_repl_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_wrap_dfail_wrap_comp_always_back_fail_keep_pass_incc_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decw_dfail_wrap_comp_greater_or_equal_back_fail_keep_pass_wrap_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_inv_dfail_inv_comp_greater_or_equal_back_fail_wrap_pass_decw_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_inv_dfail_incc_comp_always_back_fail_zero_pass_inv_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_inv_dfail_inv_comp_greater_back_fail_decw_pass_inv_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decc_dfail_decw_comp_never_back_fail_decc_pass_inv_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_keep_dfail_inv_comp_not_equal_back_fail_inv_pass_decc_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_wrap_dfail_inv_comp_greater_back_fail_inv_pass_keep_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_inv_dfail_zero_comp_greater_back_fail_wrap_pass_wrap_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decw_dfail_incc_comp_never_back_fail_decc_pass_inv_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_repl_dfail_repl_comp_equal_back_fail_zero_pass_decw_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_inv_dfail_decw_comp_not_equal_back_fail_decw_pass_repl_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_wrap_dfail_wrap_comp_less_back_fail_incc_pass_inv_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_incc_dfail_repl_comp_equal_back_fail_wrap_pass_wrap_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decc_dfail_decc_comp_equal_back_fail_repl_pass_incc_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_incc_dfail_incc_comp_less_or_equal_back_fail_keep_pass_decc_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decc_dfail_decc_comp_not_equal_back_fail_decw_pass_incc_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decc_dfail_repl_comp_less_or_equal_back_fail_zero_pass_decc_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_zero_dfail_incc_comp_equal_back_fail_inv_pass_decc_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_keep_dfail_wrap_comp_always_back_fail_zero_pass_zero_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decc_dfail_incc_comp_greater_back_fail_inv_pass_keep_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_keep_dfail_decw_comp_greater_or_equal_back_fail_inv_pass_decc_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_wrap_dfail_keep_comp_not_equal_back_fail_zero_pass_keep_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decw_dfail_inv_comp_equal_back_fail_wrap_pass_wrap_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_inv_dfail_incc_comp_less_or_equal_back_fail_wrap_pass_decw_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decc_dfail_wrap_comp_not_equal_back_fail_wrap_pass_inv_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_incc_dfail_incc_comp_greater_back_fail_wrap_pass_decc_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_inv_dfail_wrap_comp_always_back_fail_zero_pass_incc_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_wrap_dfail_inv_comp_equal_back_fail_incc_pass_inv_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_wrap_dfail_incc_comp_greater_back_fail_wrap_pass_wrap_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_inv_dfail_repl_comp_greater_or_equal_back_fail_incc_pass_wrap_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_inv_dfail_zero_comp_never_back_fail_incc_pass_inv_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_keep_dfail_wrap_comp_less_back_fail_wrap_pass_inv_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decc_dfail_zero_comp_less_or_equal_back_fail_zero_pass_keep_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_wrap_dfail_decc_comp_never_back_fail_zero_pass_decc_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decc_dfail_zero_comp_equal_back_fail_inv_pass_wrap_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_incc_dfail_decc_comp_never_back_fail_keep_pass_decc_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decw_dfail_decw_comp_not_equal_back_fail_keep_pass_incc_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_keep_dfail_decc_comp_never_back_fail_inv_pass_decw_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_keep_dfail_decc_comp_less_back_fail_wrap_pass_keep_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_inv_dfail_decw_comp_not_equal_back_fail_wrap_pass_keep_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_keep_dfail_wrap_comp_less_or_equal_back_fail_decw_pass_inv_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_inv_dfail_zero_comp_greater_or_equal_back_fail_decc_pass_keep_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decc_dfail_decw_comp_always_back_fail_decc_pass_inv_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_inv_dfail_zero_comp_greater_or_equal_back_fail_decw_pass_decc_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_repl_dfail_inv_comp_not_equal_back_fail_wrap_pass_inv_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_repl_dfail_zero_comp_greater_back_fail_decw_pass_repl_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_wrap_dfail_incc_comp_never_back_fail_wrap_pass_repl_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_wrap_dfail_incc_comp_less_or_equal_back_fail_inv_pass_wrap_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decw_dfail_repl_comp_greater_or_equal_back_fail_decc_pass_wrap_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_inv_dfail_repl_comp_greater_back_fail_wrap_pass_decw_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_wrap_dfail_inv_comp_less_back_fail_incc_pass_inv_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_incc_dfail_decc_comp_never_back_fail_decc_pass_wrap_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decc_dfail_zero_comp_greater_back_fail_zero_pass_incc_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_wrap_dfail_incc_comp_greater_back_fail_decw_pass_decc_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decw_dfail_decw_comp_equal_back_fail_wrap_pass_wrap_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_keep_dfail_repl_comp_equal_back_fail_wrap_pass_decw_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_inv_dfail_incc_comp_never_back_fail_incc_pass_keep_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_inv_dfail_decw_comp_greater_or_equal_back_fail_incc_pass_inv_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_zero_dfail_keep_comp_always_back_fail_repl_pass_inv_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_incc_dfail_incc_comp_greater_or_equal_back_fail_keep_pass_zero_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_wrap_dfail_inv_comp_equal_back_fail_inv_pass_incc_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decw_dfail_zero_comp_never_back_fail_repl_pass_wrap_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_wrap_dfail_wrap_comp_always_back_fail_inv_pass_decw_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_inv_dfail_repl_comp_less_or_equal_back_fail_decw_pass_wrap_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_wrap_dfail_repl_comp_greater_or_equal_back_fail_zero_pass_inv_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_wrap_dfail_decc_comp_never_back_fail_incc_pass_wrap_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_zero_dfail_wrap_comp_never_back_fail_wrap_pass_wrap_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_wrap_dfail_decw_comp_not_equal_back_fail_wrap_pass_zero_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_incc_dfail_repl_comp_always_back_fail_keep_pass_wrap_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_keep_dfail_inv_comp_not_equal_back_fail_wrap_pass_incc_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_incc_dfail_incc_comp_greater_back_fail_wrap_pass_keep_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_wrap_dfail_inv_comp_never_back_fail_wrap_pass_incc_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_zero_dfail_inv_comp_not_equal_back_fail_incc_pass_wrap_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_wrap_dfail_inv_comp_greater_back_fail_repl_pass_zero_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_inv_dfail_decc_comp_less_back_fail_keep_pass_wrap_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_inv_dfail_repl_comp_not_equal_back_fail_incc_pass_inv_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_repl_dfail_wrap_comp_less_back_fail_repl_pass_inv_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decc_dfail_incc_comp_not_equal_back_fail_decw_pass_repl_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_repl_dfail_decc_comp_not_equal_back_fail_inv_pass_decc_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_inv_dfail_zero_comp_equal_back_fail_keep_pass_repl_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_incc_dfail_wrap_comp_always_back_fail_decw_pass_inv_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_keep_dfail_decw_comp_never_back_fail_inv_pass_incc_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_inv_dfail_wrap_comp_greater_back_fail_keep_pass_keep_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decc_dfail_wrap_comp_less_back_fail_incc_pass_inv_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_repl_dfail_decc_comp_greater_back_fail_wrap_pass_decc_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decc_dfail_inv_comp_always_back_fail_repl_pass_repl_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decw_dfail_wrap_comp_equal_back_fail_decw_pass_decc_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_inv_dfail_decw_comp_never_back_fail_incc_pass_decw_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_inv_dfail_decw_comp_less_back_fail_inv_pass_inv_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_zero_dfail_decw_comp_not_equal_back_fail_wrap_pass_inv_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decw_dfail_repl_comp_greater_or_equal_back_fail_zero_pass_zero_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_incc_dfail_decc_comp_always_back_fail_decw_pass_decw_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decc_dfail_inv_comp_greater_back_fail_inv_pass_incc_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_zero_dfail_zero_comp_always_back_fail_incc_pass_decc_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_inv_dfail_inv_comp_less_or_equal_back_fail_repl_pass_zero_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_zero_dfail_decw_comp_greater_or_equal_back_fail_zero_pass_inv_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decw_dfail_wrap_comp_equal_back_fail_zero_pass_zero_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_keep_dfail_zero_comp_less_or_equal_back_fail_wrap_pass_decw_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_zero_dfail_zero_comp_greater_back_fail_zero_pass_keep_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_keep_dfail_inv_comp_greater_or_equal_back_fail_keep_pass_zero_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decw_dfail_incc_comp_greater_back_fail_zero_pass_keep_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_repl_dfail_incc_comp_less_or_equal_back_fail_decc_pass_decw_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_keep_dfail_repl_comp_greater_or_equal_back_fail_repl_pass_repl_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_wrap_dfail_decw_comp_less_back_fail_inv_pass_keep_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decc_dfail_decw_comp_greater_or_equal_back_fail_decw_pass_wrap_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_inv_dfail_decw_comp_greater_or_equal_back_fail_decw_pass_decc_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_inv_dfail_repl_comp_less_back_fail_zero_pass_inv_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_keep_dfail_zero_comp_equal_back_fail_decc_pass_inv_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decc_dfail_repl_comp_less_back_fail_keep_pass_keep_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decw_dfail_incc_comp_greater_or_equal_back_fail_keep_pass_decc_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_repl_dfail_decw_comp_greater_or_equal_back_fail_keep_pass_decw_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decc_dfail_keep_comp_greater_back_fail_decc_pass_repl_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_zero_dfail_wrap_comp_equal_back_fail_incc_pass_decc_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_keep_dfail_zero_comp_greater_or_equal_back_fail_zero_pass_zero_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decc_dfail_decw_comp_always_back_fail_zero_pass_keep_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_zero_dfail_inv_comp_less_or_equal_back_fail_incc_pass_decc_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_zero_dfail_inv_comp_greater_back_fail_decc_pass_zero_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_incc_dfail_zero_comp_never_back_fail_repl_pass_zero_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decw_dfail_decw_comp_less_or_equal_back_fail_zero_pass_incc_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_repl_dfail_decw_comp_less_or_equal_back_fail_inv_pass_decw_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_zero_dfail_inv_comp_equal_back_fail_wrap_pass_repl_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_repl_dfail_zero_comp_never_back_fail_incc_pass_zero_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_keep_dfail_repl_comp_always_back_fail_decc_pass_repl_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_wrap_dfail_zero_comp_greater_or_equal_back_fail_keep_pass_keep_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_inv_dfail_inv_comp_greater_or_equal_back_fail_wrap_pass_wrap_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_repl_dfail_repl_comp_greater_back_fail_incc_pass_inv_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_wrap_dfail_keep_comp_never_back_fail_decc_pass_repl_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_repl_dfail_zero_comp_greater_or_equal_back_fail_decw_pass_wrap_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_wrap_dfail_inv_comp_equal_back_fail_wrap_pass_repl_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_inv_dfail_zero_comp_less_back_fail_zero_pass_wrap_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_keep_dfail_decw_comp_equal_back_fail_decc_pass_inv_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_zero_dfail_decc_comp_always_back_fail_keep_pass_keep_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_incc_dfail_zero_comp_less_or_equal_back_fail_zero_pass_zero_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_incc_dfail_incc_comp_less_or_equal_back_fail_incc_pass_incc_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_incc_dfail_repl_comp_equal_back_fail_repl_pass_incc_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_zero_dfail_zero_comp_less_back_fail_wrap_pass_incc_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_wrap_dfail_decw_comp_greater_back_fail_decc_pass_zero_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_zero_dfail_repl_comp_not_equal_back_fail_keep_pass_wrap_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_keep_dfail_repl_comp_less_or_equal_back_fail_decc_pass_zero_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decw_dfail_zero_comp_greater_or_equal_back_fail_incc_pass_keep_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_keep_dfail_decc_comp_never_back_fail_decw_pass_decw_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_incc_dfail_keep_comp_equal_back_fail_incc_pass_keep_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_zero_dfail_zero_comp_greater_back_fail_repl_pass_incc_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_incc_dfail_keep_comp_always_back_fail_repl_pass_zero_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_incc_dfail_keep_comp_not_equal_back_fail_decw_pass_incc_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_wrap_dfail_repl_comp_always_back_fail_repl_pass_incc_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_keep_dfail_keep_comp_less_or_equal_back_fail_inv_pass_wrap_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_wrap_dfail_incc_comp_greater_or_equal_back_fail_decc_pass_keep_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_inv_dfail_zero_comp_greater_back_fail_wrap_pass_wrap_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decw_dfail_zero_comp_greater_back_fail_incc_pass_inv_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_repl_dfail_decw_comp_always_back_fail_zero_pass_decw_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_repl_dfail_inv_comp_less_or_equal_back_fail_zero_pass_repl_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_incc_dfail_incc_comp_less_back_fail_inv_pass_repl_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_zero_dfail_inv_comp_equal_back_fail_wrap_pass_incc_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_wrap_dfail_keep_comp_equal_back_fail_repl_pass_zero_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decw_dfail_wrap_comp_greater_or_equal_back_fail_incc_pass_wrap_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decc_dfail_decc_comp_less_back_fail_decw_pass_decw_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_incc_dfail_keep_comp_always_back_fail_decw_pass_decc_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decc_dfail_wrap_comp_less_back_fail_keep_pass_incc_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_incc_dfail_keep_comp_less_or_equal_back_fail_decc_pass_decc_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_zero_dfail_decw_comp_always_back_fail_repl_pass_incc_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decc_dfail_wrap_comp_not_equal_back_fail_wrap_pass_zero_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_keep_dfail_decc_comp_always_back_fail_decw_pass_decc_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_repl_dfail_inv_comp_less_or_equal_back_fail_decc_pass_keep_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_keep_dfail_wrap_comp_less_back_fail_repl_pass_repl_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decw_dfail_repl_comp_less_or_equal_back_fail_repl_pass_keep_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decw_dfail_zero_comp_greater_back_fail_decc_pass_decw_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_repl_dfail_decw_comp_greater_back_fail_decw_pass_decw_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_inv_dfail_decc_comp_never_back_fail_zero_pass_repl_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decc_dfail_repl_comp_always_back_fail_zero_pass_inv_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_zero_dfail_zero_comp_not_equal_back_fail_zero_pass_decc_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_keep_dfail_zero_comp_never_back_fail_keep_pass_zero_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_repl_dfail_decc_comp_less_back_fail_decc_pass_keep_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decw_dfail_wrap_comp_always_back_fail_zero_pass_repl_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_inv_dfail_incc_comp_greater_or_equal_back_fail_inv_pass_decw_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_incc_dfail_incc_comp_not_equal_back_fail_incc_pass_inv_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_zero_dfail_decc_comp_greater_or_equal_back_fail_repl_pass_incc_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_inv_dfail_decw_comp_always_back_fail_decc_pass_zero_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_zero_dfail_decw_comp_always_back_fail_zero_pass_inv_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_inv_dfail_incc_comp_less_back_fail_decw_pass_zero_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_keep_dfail_wrap_comp_less_or_equal_back_fail_repl_pass_inv_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decc_dfail_repl_comp_not_equal_back_fail_inv_pass_keep_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_keep_dfail_incc_comp_not_equal_back_fail_zero_pass_decc_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decw_dfail_inv_comp_always_back_fail_zero_pass_keep_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_zero_dfail_keep_comp_never_back_fail_zero_pass_decw_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_keep_dfail_keep_comp_not_equal_back_fail_incc_pass_zero_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decc_dfail_wrap_comp_greater_or_equal_back_fail_wrap_pass_keep_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decw_dfail_wrap_comp_not_equal_back_fail_incc_pass_decc_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_wrap_dfail_decc_comp_not_equal_back_fail_decc_pass_decw_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_zero_dfail_keep_comp_greater_or_equal_back_fail_wrap_pass_wrap_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_repl_dfail_decw_comp_less_back_fail_decw_pass_zero_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_wrap_dfail_wrap_comp_less_back_fail_wrap_pass_repl_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_zero_dfail_inv_comp_less_or_equal_back_fail_decc_pass_wrap_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_repl_dfail_incc_comp_never_back_fail_repl_pass_zero_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_keep_dfail_decw_comp_never_back_fail_inv_pass_repl_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decc_dfail_decc_comp_greater_or_equal_back_fail_zero_pass_keep_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_repl_dfail_decc_comp_less_back_fail_repl_pass_decc_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_keep_dfail_wrap_comp_less_back_fail_keep_pass_repl_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decc_dfail_repl_comp_never_back_fail_inv_pass_keep_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_keep_dfail_inv_comp_equal_back_fail_repl_pass_decc_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_incc_dfail_inv_comp_never_back_fail_repl_pass_keep_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_inv_dfail_decw_comp_equal_back_fail_incc_pass_incc_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decw_dfail_decc_comp_not_equal_back_fail_decw_pass_inv_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_repl_dfail_decc_comp_equal_back_fail_decc_pass_decw_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_zero_dfail_incc_comp_always_back_fail_decc_pass_repl_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_repl_dfail_decc_comp_equal_back_fail_decw_pass_zero_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_incc_dfail_decw_comp_less_back_fail_zero_pass_repl_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decc_dfail_decw_comp_not_equal_back_fail_zero_pass_incc_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_inv_dfail_repl_comp_always_back_fail_decw_pass_decc_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_inv_dfail_zero_comp_not_equal_back_fail_wrap_pass_inv_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decw_dfail_decc_comp_less_back_fail_keep_pass_inv_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_repl_dfail_incc_comp_greater_back_fail_decw_pass_decw_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_zero_dfail_decw_comp_not_equal_back_fail_incc_pass_repl_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_inv_dfail_incc_comp_greater_back_fail_decc_pass_zero_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decc_dfail_wrap_comp_greater_back_fail_decc_pass_inv_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_zero_dfail_decw_comp_always_back_fail_decw_pass_decc_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_keep_dfail_wrap_comp_less_back_fail_incc_pass_zero_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_zero_dfail_inv_comp_equal_back_fail_decw_pass_keep_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_zero_dfail_zero_comp_greater_or_equal_back_fail_wrap_pass_zero_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decc_dfail_repl_comp_greater_or_equal_back_fail_keep_pass_zero_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decc_dfail_inv_comp_not_equal_back_fail_decc_pass_decc_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decc_dfail_keep_comp_not_equal_back_fail_decc_pass_decc_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_inv_dfail_wrap_comp_less_or_equal_back_fail_decw_pass_decc_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_zero_dfail_incc_comp_less_or_equal_back_fail_zero_pass_inv_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_keep_dfail_repl_comp_greater_or_equal_back_fail_repl_pass_zero_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decw_dfail_decc_comp_less_back_fail_keep_pass_keep_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decc_dfail_decc_comp_greater_or_equal_back_fail_wrap_pass_decw_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_repl_dfail_decw_comp_never_back_fail_incc_pass_decc_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_incc_dfail_incc_comp_not_equal_back_fail_wrap_pass_repl_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_zero_dfail_inv_comp_not_equal_back_fail_wrap_pass_incc_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_repl_dfail_repl_comp_less_or_equal_back_fail_inv_pass_zero_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_keep_dfail_keep_comp_less_back_fail_decc_pass_repl_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_wrap_dfail_zero_comp_equal_back_fail_zero_pass_keep_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_zero_dfail_decw_comp_less_or_equal_back_fail_decc_pass_wrap_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_incc_dfail_decw_comp_greater_back_fail_keep_pass_zero_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_zero_dfail_zero_comp_greater_back_fail_keep_pass_incc_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_wrap_dfail_decc_comp_always_back_fail_incc_pass_zero_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_wrap_dfail_decc_comp_greater_back_fail_inv_pass_wrap_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_zero_dfail_keep_comp_not_equal_back_fail_repl_pass_wrap_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decc_dfail_incc_comp_not_equal_back_fail_decc_pass_zero_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_wrap_dfail_zero_comp_greater_back_fail_keep_pass_decc_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_incc_dfail_inv_comp_greater_or_equal_back_fail_incc_pass_wrap_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_repl_dfail_incc_comp_equal_back_fail_repl_pass_incc_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_incc_dfail_decc_comp_equal_back_fail_repl_pass_repl_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_zero_dfail_decc_comp_not_equal_back_fail_incc_pass_incc_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decc_dfail_inv_comp_greater_back_fail_inv_pass_zero_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_wrap_dfail_decw_comp_equal_back_fail_decw_pass_decc_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_repl_dfail_repl_comp_less_back_fail_incc_pass_wrap_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_keep_dfail_decc_comp_always_back_fail_repl_pass_repl_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decw_dfail_zero_comp_not_equal_back_fail_zero_pass_keep_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decw_dfail_keep_comp_greater_or_equal_back_fail_decw_pass_decw_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_wrap_dfail_incc_comp_equal_back_fail_wrap_pass_decw_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_repl_dfail_repl_comp_always_back_fail_zero_pass_wrap_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decc_dfail_zero_comp_equal_back_fail_decw_pass_repl_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_keep_dfail_repl_comp_greater_or_equal_back_fail_incc_pass_decc_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_repl_dfail_inv_comp_less_or_equal_back_fail_decc_pass_keep_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decc_dfail_incc_comp_greater_or_equal_back_fail_incc_pass_repl_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_wrap_dfail_inv_comp_not_equal_back_fail_repl_pass_decc_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decc_dfail_decc_comp_greater_or_equal_back_fail_keep_pass_wrap_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_keep_dfail_inv_comp_greater_back_fail_keep_pass_decc_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_wrap_dfail_inv_comp_always_back_fail_inv_pass_keep_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_inv_dfail_decw_comp_equal_back_fail_incc_pass_wrap_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decc_dfail_inv_comp_never_back_fail_repl_pass_inv_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_incc_dfail_wrap_comp_greater_or_equal_back_fail_decw_pass_decc_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_inv_dfail_wrap_comp_greater_back_fail_wrap_pass_incc_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decw_dfail_keep_comp_greater_back_fail_wrap_pass_inv_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decw_dfail_decw_comp_equal_back_fail_zero_pass_decw_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_incc_dfail_decc_comp_less_or_equal_back_fail_keep_pass_decw_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_keep_dfail_decc_comp_greater_back_fail_wrap_pass_incc_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_inv_dfail_keep_comp_greater_back_fail_wrap_pass_keep_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_zero_dfail_decw_comp_less_back_fail_inv_pass_inv_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decw_dfail_repl_comp_less_or_equal_back_fail_inv_pass_zero_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_zero_dfail_wrap_comp_never_back_fail_inv_pass_decw_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_repl_dfail_inv_comp_always_back_fail_incc_pass_zero_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_keep_dfail_keep_comp_greater_or_equal_back_fail_repl_pass_repl_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_repl_dfail_inv_comp_greater_back_fail_incc_pass_keep_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_inv_dfail_incc_comp_greater_or_equal_back_fail_keep_pass_repl_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_zero_dfail_keep_comp_not_equal_back_fail_decc_pass_inv_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_incc_dfail_wrap_comp_greater_back_fail_zero_pass_zero_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_repl_dfail_inv_comp_greater_back_fail_keep_pass_incc_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_zero_dfail_decw_comp_greater_or_equal_back_fail_decw_pass_repl_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_keep_dfail_incc_comp_greater_or_equal_back_fail_keep_pass_zero_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_zero_dfail_zero_comp_less_or_equal_back_fail_decw_pass_keep_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_zero_dfail_incc_comp_greater_or_equal_back_fail_wrap_pass_zero_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_repl_dfail_zero_comp_less_back_fail_zero_pass_zero_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_repl_dfail_inv_comp_not_equal_back_fail_incc_pass_repl_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_incc_dfail_keep_comp_greater_or_equal_back_fail_incc_pass_repl_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decc_dfail_incc_comp_less_or_equal_back_fail_incc_pass_incc_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decw_dfail_repl_comp_greater_back_fail_zero_pass_decc_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_repl_dfail_incc_comp_equal_back_fail_zero_pass_decw_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_zero_dfail_incc_comp_greater_back_fail_decw_pass_repl_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_keep_dfail_decw_comp_always_back_fail_inv_pass_zero_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_keep_dfail_wrap_comp_always_back_fail_inv_pass_keep_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_zero_dfail_zero_comp_never_back_fail_decc_pass_keep_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_repl_dfail_repl_comp_always_back_fail_wrap_pass_zero_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decc_dfail_incc_comp_never_back_fail_wrap_pass_repl_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decc_dfail_repl_comp_greater_back_fail_incc_pass_decc_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decw_dfail_keep_comp_greater_back_fail_zero_pass_decc_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_keep_dfail_zero_comp_greater_back_fail_wrap_pass_decw_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_keep_dfail_inv_comp_never_back_fail_decc_pass_keep_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_incc_dfail_zero_comp_greater_or_equal_back_fail_decc_pass_keep_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_zero_dfail_decc_comp_always_back_fail_incc_pass_incc_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_incc_dfail_repl_comp_less_back_fail_keep_pass_zero_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_wrap_dfail_decw_comp_less_back_fail_wrap_pass_incc_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decw_dfail_decc_comp_less_or_equal_back_fail_inv_pass_wrap_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_inv_dfail_keep_comp_never_back_fail_repl_pass_decw_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decc_dfail_decw_comp_less_back_fail_decw_pass_inv_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decw_dfail_decw_comp_never_back_fail_inv_pass_decc_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_wrap_dfail_repl_comp_equal_back_fail_keep_pass_decw_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decw_dfail_inv_comp_always_back_fail_decc_pass_wrap_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_inv_dfail_zero_comp_equal_back_fail_inv_pass_decw_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decw_dfail_zero_comp_greater_or_equal_back_fail_keep_pass_inv_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_incc_dfail_decw_comp_greater_back_fail_decc_pass_decw_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_zero_dfail_wrap_comp_less_back_fail_wrap_pass_incc_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_incc_dfail_keep_comp_less_back_fail_wrap_pass_zero_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_inv_dfail_decw_comp_greater_back_fail_zero_pass_incc_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_incc_dfail_incc_comp_less_back_fail_zero_pass_inv_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_zero_dfail_wrap_comp_less_or_equal_back_fail_zero_pass_incc_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decw_dfail_zero_comp_always_back_fail_inv_pass_zero_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_wrap_dfail_wrap_comp_not_equal_back_fail_decw_pass_decw_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decc_dfail_decc_comp_not_equal_back_fail_zero_pass_wrap_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_incc_dfail_decc_comp_greater_back_fail_decw_pass_decc_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decc_dfail_decw_comp_equal_back_fail_keep_pass_incc_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_incc_dfail_inv_comp_always_back_fail_incc_pass_decc_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decc_dfail_decw_comp_always_back_fail_zero_pass_incc_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_wrap_dfail_decw_comp_greater_or_equal_back_fail_zero_pass_decc_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_incc_dfail_keep_comp_always_back_fail_repl_pass_wrap_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_zero_dfail_repl_comp_never_back_fail_wrap_pass_incc_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_wrap_dfail_wrap_comp_greater_back_fail_decc_pass_zero_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decw_dfail_inv_comp_never_back_fail_repl_pass_wrap_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_repl_dfail_repl_comp_less_or_equal_back_fail_incc_pass_decw_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_incc_dfail_decw_comp_greater_or_equal_back_fail_incc_pass_repl_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_incc_dfail_decw_comp_not_equal_back_fail_inv_pass_incc_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_zero_dfail_decw_comp_equal_back_fail_keep_pass_incc_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_keep_dfail_incc_comp_equal_back_fail_keep_pass_zero_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_inv_dfail_decc_comp_equal_back_fail_decc_pass_keep_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_incc_dfail_repl_comp_greater_or_equal_back_fail_keep_pass_inv_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_keep_dfail_zero_comp_never_back_fail_inv_pass_incc_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_incc_dfail_inv_comp_greater_or_equal_back_fail_wrap_pass_keep_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_wrap_dfail_wrap_comp_always_back_fail_inv_pass_incc_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_zero_dfail_zero_comp_greater_or_equal_back_fail_decc_pass_wrap_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_keep_dfail_decc_comp_equal_back_fail_decc_pass_zero_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_zero_dfail_decw_comp_not_equal_back_fail_incc_pass_keep_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_keep_dfail_decw_comp_less_back_fail_repl_pass_zero_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_keep_dfail_repl_comp_equal_back_fail_inv_pass_keep_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_wrap_dfail_inv_comp_greater_back_fail_zero_pass_keep_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_inv_dfail_zero_comp_less_back_fail_decw_pass_wrap_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_incc_dfail_repl_comp_not_equal_back_fail_wrap_pass_inv_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decw_dfail_incc_comp_greater_or_equal_back_fail_inv_pass_incc_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_wrap_dfail_repl_comp_less_or_equal_back_fail_decc_pass_decw_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_incc_dfail_inv_comp_always_back_fail_decc_pass_wrap_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_zero_dfail_incc_comp_equal_back_fail_incc_pass_incc_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decw_dfail_incc_comp_less_or_equal_back_fail_decc_pass_zero_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_inv_dfail_wrap_comp_always_back_fail_decw_pass_decw_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_inv_dfail_decw_comp_less_or_equal_back_fail_keep_pass_inv_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decw_dfail_decc_comp_always_back_fail_wrap_pass_inv_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decc_dfail_repl_comp_less_back_fail_incc_pass_decw_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decw_dfail_decc_comp_greater_back_fail_repl_pass_decc_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decw_dfail_keep_comp_equal_back_fail_wrap_pass_decw_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_incc_dfail_repl_comp_less_back_fail_wrap_pass_decw_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_inv_dfail_decw_comp_greater_or_equal_back_fail_zero_pass_incc_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decw_dfail_inv_comp_always_back_fail_wrap_pass_inv_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_inv_dfail_decc_comp_greater_or_equal_back_fail_incc_pass_decw_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decc_dfail_decw_comp_less_back_fail_incc_pass_inv_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_incc_dfail_wrap_comp_always_back_fail_decw_pass_decc_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_keep_dfail_incc_comp_greater_back_fail_decw_pass_incc_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_incc_dfail_inv_comp_less_back_fail_inv_pass_keep_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_keep_dfail_wrap_comp_greater_or_equal_back_fail_wrap_pass_incc_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_incc_dfail_wrap_comp_always_back_fail_inv_pass_keep_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decc_dfail_incc_comp_never_back_fail_wrap_pass_incc_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decw_dfail_decw_comp_equal_back_fail_repl_pass_decc_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_keep_dfail_wrap_comp_less_back_fail_decc_pass_decw_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decw_dfail_keep_comp_less_or_equal_back_fail_decc_pass_keep_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_zero_dfail_keep_comp_greater_or_equal_back_fail_incc_pass_decw_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_wrap_dfail_incc_comp_never_back_fail_repl_pass_zero_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_zero_dfail_zero_comp_less_back_fail_decw_pass_wrap_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_inv_dfail_keep_comp_greater_or_equal_back_fail_inv_pass_zero_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_repl_dfail_wrap_comp_not_equal_back_fail_inv_pass_inv_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decc_dfail_decc_comp_always_back_fail_incc_pass_repl_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decc_dfail_keep_comp_equal_back_fail_incc_pass_decc_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_keep_dfail_wrap_comp_equal_back_fail_repl_pass_decc_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decw_dfail_keep_comp_always_back_fail_decw_pass_keep_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decw_dfail_decc_comp_greater_or_equal_back_fail_inv_pass_decw_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decc_dfail_keep_comp_less_back_fail_repl_pass_decw_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decw_dfail_decc_comp_equal_back_fail_decw_pass_decc_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_incc_dfail_incc_comp_never_back_fail_keep_pass_decw_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_inv_dfail_incc_comp_never_back_fail_zero_pass_incc_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_incc_dfail_decc_comp_greater_or_equal_back_fail_wrap_pass_inv_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_keep_dfail_incc_comp_equal_back_fail_decw_pass_incc_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_zero_dfail_decc_comp_less_or_equal_back_fail_repl_pass_keep_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_inv_dfail_keep_comp_not_equal_back_fail_decc_pass_zero_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decc_dfail_decc_comp_not_equal_back_fail_decw_pass_inv_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_repl_dfail_decc_comp_not_equal_back_fail_repl_pass_decc_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_keep_dfail_keep_comp_less_back_fail_inv_pass_repl_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_keep_dfail_zero_comp_greater_back_fail_keep_pass_keep_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_repl_dfail_decw_comp_equal_back_fail_incc_pass_keep_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_repl_dfail_inv_comp_less_back_fail_keep_pass_repl_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_zero_dfail_wrap_comp_always_back_fail_incc_pass_repl_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_repl_dfail_incc_comp_never_back_fail_wrap_pass_zero_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_zero_dfail_inv_comp_never_back_fail_decw_pass_repl_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_inv_dfail_keep_comp_less_back_fail_repl_pass_zero_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_incc_dfail_wrap_comp_not_equal_back_fail_repl_pass_inv_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_incc_dfail_decw_comp_equal_back_fail_zero_pass_incc_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_keep_dfail_inv_comp_equal_back_fail_incc_pass_incc_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decc_dfail_wrap_comp_always_back_fail_keep_pass_keep_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_inv_dfail_inv_comp_less_or_equal_back_fail_zero_pass_decc_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decc_dfail_decw_comp_equal_back_fail_inv_pass_inv_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_repl_dfail_decc_comp_never_back_fail_decc_pass_decc_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decc_dfail_wrap_comp_less_or_equal_back_fail_wrap_pass_repl_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_incc_dfail_inv_comp_less_back_fail_repl_pass_decc_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_keep_dfail_incc_comp_less_back_fail_incc_pass_incc_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_zero_dfail_decw_comp_greater_back_fail_zero_pass_keep_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_incc_dfail_keep_comp_greater_or_equal_back_fail_decc_pass_zero_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_repl_dfail_inv_comp_less_back_fail_repl_pass_incc_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decw_dfail_decw_comp_less_or_equal_back_fail_repl_pass_repl_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decc_dfail_zero_comp_greater_back_fail_decc_pass_decw_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_incc_dfail_decc_comp_greater_or_equal_back_fail_inv_pass_decc_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decw_dfail_decc_comp_greater_back_fail_wrap_pass_incc_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_inv_dfail_repl_comp_greater_or_equal_back_fail_zero_pass_decw_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_repl_dfail_decc_comp_less_or_equal_back_fail_decw_pass_inv_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decw_dfail_repl_comp_less_back_fail_zero_pass_repl_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_zero_dfail_inv_comp_greater_back_fail_zero_pass_decw_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_inv_dfail_decc_comp_greater_or_equal_back_fail_incc_pass_zero_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decc_dfail_decc_comp_not_equal_back_fail_zero_pass_inv_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decw_dfail_inv_comp_less_or_equal_back_fail_keep_pass_decc_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_incc_dfail_repl_comp_less_or_equal_back_fail_repl_pass_decw_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_incc_dfail_decw_comp_less_or_equal_back_fail_decc_pass_incc_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_wrap_dfail_zero_comp_never_back_fail_inv_pass_incc_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decc_dfail_decc_comp_equal_back_fail_wrap_pass_wrap_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decw_dfail_zero_comp_less_or_equal_back_fail_incc_pass_decc_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_zero_dfail_zero_comp_equal_back_fail_wrap_pass_decw_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_incc_dfail_inv_comp_less_or_equal_back_fail_inv_pass_zero_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_incc_dfail_zero_comp_never_back_fail_keep_pass_incc_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_inv_dfail_inv_comp_always_back_fail_decw_pass_incc_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_zero_dfail_inv_comp_equal_back_fail_keep_pass_inv_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_repl_dfail_zero_comp_always_back_fail_decw_pass_zero_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_zero_dfail_inv_comp_greater_back_fail_decw_pass_repl_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_wrap_dfail_zero_comp_not_equal_back_fail_decw_pass_zero_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_zero_dfail_repl_comp_greater_or_equal_back_fail_repl_pass_wrap_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_keep_dfail_decw_comp_less_back_fail_incc_pass_zero_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_wrap_dfail_keep_comp_less_or_equal_back_fail_repl_pass_keep_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decw_dfail_incc_comp_not_equal_back_fail_wrap_pass_wrap_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decc_dfail_repl_comp_always_back_fail_repl_pass_decw_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_repl_dfail_repl_comp_not_equal_back_fail_decw_pass_decc_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_zero_dfail_decc_comp_less_back_fail_incc_pass_repl_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_keep_dfail_decc_comp_not_equal_back_fail_zero_pass_zero_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decw_dfail_decc_comp_greater_back_fail_repl_pass_keep_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_inv_dfail_decc_comp_equal_back_fail_inv_pass_decw_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decc_dfail_zero_comp_never_back_fail_repl_pass_inv_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_inv_dfail_keep_comp_always_back_fail_decw_pass_decc_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_wrap_dfail_decw_comp_greater_back_fail_decw_pass_inv_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_wrap_dfail_inv_comp_equal_back_fail_decc_pass_wrap_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_repl_dfail_keep_comp_less_or_equal_back_fail_inv_pass_wrap_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_keep_dfail_wrap_comp_not_equal_back_fail_repl_pass_repl_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_repl_dfail_incc_comp_greater_back_fail_keep_pass_keep_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decc_dfail_repl_comp_greater_back_fail_inv_pass_repl_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_zero_dfail_keep_comp_greater_back_fail_incc_pass_decc_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_wrap_dfail_repl_comp_equal_back_fail_wrap_pass_zero_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_repl_dfail_decw_comp_never_back_fail_decw_pass_wrap_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_incc_dfail_inv_comp_always_back_fail_decw_pass_repl_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_zero_dfail_repl_comp_greater_back_fail_decw_pass_incc_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decw_dfail_keep_comp_equal_back_fail_wrap_pass_zero_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decw_dfail_incc_comp_less_or_equal_back_fail_incc_pass_decw_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_wrap_dfail_wrap_comp_never_back_fail_inv_pass_decw_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_repl_dfail_wrap_comp_always_back_fail_inv_pass_wrap_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_repl_dfail_keep_comp_less_or_equal_back_fail_wrap_pass_repl_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_keep_dfail_zero_comp_always_back_fail_decw_pass_repl_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_incc_dfail_keep_comp_equal_back_fail_zero_pass_keep_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_wrap_dfail_repl_comp_greater_back_fail_decc_pass_incc_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decw_dfail_decc_comp_never_back_fail_decc_pass_wrap_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_keep_dfail_decw_comp_greater_back_fail_incc_pass_decw_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_wrap_dfail_wrap_comp_never_back_fail_wrap_pass_keep_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_inv_dfail_inv_comp_not_equal_back_fail_wrap_pass_wrap_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_inv_dfail_repl_comp_never_back_fail_keep_pass_inv_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_keep_dfail_inv_comp_less_or_equal_back_fail_decc_pass_inv_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decc_dfail_incc_comp_less_or_equal_back_fail_repl_pass_keep_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_keep_dfail_zero_comp_equal_back_fail_decc_pass_decc_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decc_dfail_keep_comp_greater_or_equal_back_fail_decc_pass_keep_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decw_dfail_decc_comp_greater_back_fail_repl_pass_decc_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_keep_dfail_wrap_comp_never_back_fail_keep_pass_decw_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_zero_dfail_inv_comp_less_back_fail_keep_pass_keep_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_inv_dfail_inv_comp_greater_back_fail_inv_pass_zero_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_zero_dfail_repl_comp_never_back_fail_inv_pass_inv_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_wrap_dfail_repl_comp_equal_back_fail_repl_pass_zero_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_keep_dfail_repl_comp_less_or_equal_back_fail_repl_pass_wrap_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_incc_dfail_zero_comp_equal_back_fail_wrap_pass_keep_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_wrap_dfail_inv_comp_less_or_equal_back_fail_decc_pass_incc_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_inv_dfail_zero_comp_never_back_fail_zero_pass_wrap_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_inv_dfail_decw_comp_less_or_equal_back_fail_decw_pass_inv_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_wrap_dfail_repl_comp_equal_back_fail_incc_pass_inv_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_zero_dfail_wrap_comp_less_back_fail_zero_pass_wrap_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_zero_dfail_repl_comp_never_back_fail_decc_pass_zero_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_keep_dfail_wrap_comp_less_or_equal_back_fail_decw_pass_zero_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_zero_dfail_incc_comp_less_or_equal_back_fail_incc_pass_keep_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decc_dfail_decc_comp_always_back_fail_zero_pass_zero_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_zero_dfail_zero_comp_less_back_fail_repl_pass_decc_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_repl_dfail_decc_comp_greater_or_equal_back_fail_wrap_pass_zero_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_keep_dfail_decc_comp_less_back_fail_decw_pass_repl_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_repl_dfail_repl_comp_always_back_fail_decc_pass_keep_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_incc_dfail_incc_comp_never_back_fail_incc_pass_repl_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_repl_dfail_zero_comp_equal_back_fail_keep_pass_incc_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_wrap_dfail_repl_comp_greater_or_equal_back_fail_keep_pass_repl_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_repl_dfail_inv_comp_equal_back_fail_inv_pass_wrap_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_incc_dfail_zero_comp_less_back_fail_zero_pass_repl_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_keep_dfail_incc_comp_greater_or_equal_back_fail_wrap_pass_incc_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_zero_dfail_keep_comp_greater_or_equal_back_fail_decc_pass_keep_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_incc_dfail_decc_comp_greater_or_equal_back_fail_decc_pass_zero_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_incc_dfail_decw_comp_always_back_fail_repl_pass_incc_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_incc_dfail_incc_comp_never_back_fail_repl_pass_incc_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decw_dfail_repl_comp_always_back_fail_wrap_pass_incc_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_repl_dfail_wrap_comp_never_back_fail_repl_pass_decw_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decw_dfail_keep_comp_never_back_fail_decw_pass_repl_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_repl_dfail_decc_comp_greater_or_equal_back_fail_keep_pass_decw_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_keep_dfail_zero_comp_less_or_equal_back_fail_inv_pass_repl_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_wrap_dfail_inv_comp_greater_or_equal_back_fail_decw_pass_keep_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_keep_dfail_inv_comp_greater_or_equal_back_fail_keep_pass_wrap_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_incc_dfail_repl_comp_greater_or_equal_back_fail_inv_pass_keep_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_repl_dfail_zero_comp_always_back_fail_keep_pass_incc_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_repl_dfail_zero_comp_greater_back_fail_zero_pass_repl_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_wrap_dfail_decw_comp_equal_back_fail_zero_pass_repl_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_wrap_dfail_keep_comp_greater_or_equal_back_fail_decc_pass_wrap_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_repl_dfail_decc_comp_not_equal_back_fail_decw_pass_wrap_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decc_dfail_repl_comp_greater_or_equal_back_fail_wrap_pass_repl_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_wrap_dfail_incc_comp_greater_back_fail_repl_pass_decc_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_keep_dfail_keep_comp_equal_back_fail_keep_pass_wrap_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_incc_dfail_incc_comp_greater_back_fail_repl_pass_keep_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decc_dfail_wrap_comp_less_or_equal_back_fail_decc_pass_incc_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_wrap_dfail_wrap_comp_less_or_equal_back_fail_keep_pass_decc_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_repl_dfail_inv_comp_greater_or_equal_back_fail_keep_pass_wrap_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_inv_dfail_inv_comp_less_back_fail_incc_pass_repl_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_incc_dfail_repl_comp_not_equal_back_fail_repl_pass_inv_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_keep_dfail_zero_comp_greater_or_equal_back_fail_zero_pass_incc_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decc_dfail_inv_comp_less_back_fail_repl_pass_keep_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_inv_dfail_incc_comp_greater_back_fail_wrap_pass_decc_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_repl_dfail_inv_comp_always_back_fail_inv_pass_inv_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decc_dfail_keep_comp_greater_or_equal_back_fail_decc_pass_repl_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_incc_dfail_decc_comp_equal_back_fail_decw_pass_decc_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_keep_dfail_inv_comp_greater_or_equal_back_fail_decw_pass_incc_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_zero_dfail_incc_comp_not_equal_back_fail_decw_pass_keep_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_keep_dfail_decc_comp_greater_back_fail_incc_pass_zero_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_repl_dfail_wrap_comp_greater_back_fail_zero_pass_keep_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decw_dfail_decw_comp_less_or_equal_back_fail_decw_pass_repl_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_wrap_dfail_decw_comp_never_back_fail_zero_pass_decw_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_repl_dfail_incc_comp_greater_or_equal_back_fail_inv_pass_wrap_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_repl_dfail_keep_comp_less_back_fail_wrap_pass_repl_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_keep_dfail_incc_comp_greater_or_equal_back_fail_decw_pass_repl_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_incc_dfail_wrap_comp_not_equal_back_fail_repl_pass_keep_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_keep_dfail_inv_comp_always_back_fail_decc_pass_incc_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_wrap_dfail_wrap_comp_equal_back_fail_zero_pass_keep_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_wrap_dfail_repl_comp_greater_back_fail_inv_pass_wrap_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_inv_dfail_decw_comp_equal_back_fail_decw_pass_wrap_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_repl_dfail_incc_comp_greater_or_equal_back_fail_incc_pass_inv_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_inv_dfail_decw_comp_greater_or_equal_back_fail_incc_pass_repl_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_wrap_dfail_repl_comp_not_equal_back_fail_inv_pass_inv_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decw_dfail_incc_comp_always_back_fail_inv_pass_wrap_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_keep_dfail_keep_comp_greater_or_equal_back_fail_decc_pass_decw_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_repl_dfail_incc_comp_always_back_fail_decc_pass_keep_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_incc_dfail_zero_comp_less_back_fail_wrap_pass_repl_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_zero_dfail_wrap_comp_greater_or_equal_back_fail_keep_pass_incc_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_wrap_dfail_decw_comp_greater_or_equal_back_fail_repl_pass_zero_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decc_dfail_inv_comp_less_back_fail_decc_pass_wrap_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_keep_dfail_repl_comp_less_back_fail_repl_pass_decc_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_wrap_dfail_decc_comp_less_back_fail_inv_pass_keep_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_wrap_dfail_incc_comp_always_back_fail_zero_pass_wrap_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_wrap_dfail_zero_comp_greater_back_fail_zero_pass_wrap_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_wrap_dfail_wrap_comp_always_back_fail_keep_pass_wrap_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_repl_dfail_inv_comp_not_equal_back_fail_wrap_pass_wrap_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_keep_dfail_keep_comp_less_back_fail_inv_pass_repl_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_inv_dfail_keep_comp_less_or_equal_back_fail_decw_pass_keep_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decw_dfail_decc_comp_not_equal_back_fail_keep_pass_inv_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_repl_dfail_decc_comp_equal_back_fail_zero_pass_decw_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_inv_dfail_repl_comp_not_equal_back_fail_wrap_pass_repl_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_keep_dfail_decw_comp_less_or_equal_back_fail_inv_pass_inv_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_inv_dfail_decc_comp_greater_back_fail_decw_pass_keep_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_wrap_dfail_inv_comp_never_back_fail_decw_pass_inv_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_keep_dfail_repl_comp_not_equal_back_fail_keep_pass_wrap_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decc_dfail_keep_comp_always_back_fail_inv_pass_keep_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_wrap_dfail_decw_comp_not_equal_back_fail_decc_pass_decc_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decc_dfail_repl_comp_less_or_equal_back_fail_repl_pass_wrap_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decw_dfail_zero_comp_less_or_equal_back_fail_decw_pass_decc_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decw_dfail_inv_comp_never_back_fail_decc_pass_decw_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_repl_dfail_decw_comp_less_or_equal_back_fail_inv_pass_decw_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decw_dfail_zero_comp_less_or_equal_back_fail_zero_pass_repl_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_inv_dfail_wrap_comp_always_back_fail_keep_pass_decw_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decw_dfail_incc_comp_greater_or_equal_back_fail_wrap_pass_inv_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_wrap_dfail_zero_comp_less_or_equal_back_fail_wrap_pass_decw_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_zero_dfail_repl_comp_always_back_fail_keep_pass_wrap_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_zero_dfail_repl_comp_less_or_equal_back_fail_zero_pass_zero_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_repl_dfail_decw_comp_never_back_fail_inv_pass_zero_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_zero_dfail_wrap_comp_less_or_equal_back_fail_incc_pass_repl_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decc_dfail_repl_comp_always_back_fail_decc_pass_zero_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decw_dfail_zero_comp_less_back_fail_repl_pass_decc_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_wrap_dfail_wrap_comp_greater_back_fail_wrap_pass_decw_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_keep_dfail_decc_comp_not_equal_back_fail_decw_pass_wrap_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_keep_dfail_decw_comp_always_back_fail_keep_pass_keep_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_keep_dfail_repl_comp_not_equal_back_fail_wrap_pass_keep_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decw_dfail_inv_comp_not_equal_back_fail_zero_pass_keep_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_keep_dfail_wrap_comp_greater_or_equal_back_fail_decc_pass_decw_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_zero_dfail_repl_comp_less_or_equal_back_fail_decw_pass_keep_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_incc_dfail_wrap_comp_less_back_fail_decc_pass_zero_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_incc_dfail_decw_comp_never_back_fail_incc_pass_incc_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_incc_dfail_decc_comp_greater_back_fail_repl_pass_incc_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_incc_dfail_decc_comp_not_equal_back_fail_wrap_pass_incc_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_repl_dfail_repl_comp_greater_or_equal_back_fail_inv_pass_incc_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decc_dfail_inv_comp_greater_or_equal_back_fail_repl_pass_repl_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_inv_dfail_repl_comp_never_back_fail_decw_pass_decc_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_repl_dfail_wrap_comp_less_back_fail_keep_pass_inv_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decc_dfail_incc_comp_greater_or_equal_back_fail_wrap_pass_repl_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decw_dfail_wrap_comp_less_back_fail_inv_pass_decc_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_zero_dfail_inv_comp_not_equal_back_fail_repl_pass_decw_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_keep_dfail_wrap_comp_greater_back_fail_wrap_pass_zero_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_inv_dfail_keep_comp_less_back_fail_decc_pass_keep_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decw_dfail_keep_comp_always_back_fail_decw_pass_inv_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_incc_dfail_inv_comp_greater_back_fail_incc_pass_decw_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_repl_dfail_incc_comp_less_back_fail_wrap_pass_incc_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decw_dfail_repl_comp_not_equal_back_fail_keep_pass_repl_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_keep_dfail_wrap_comp_less_or_equal_back_fail_repl_pass_decw_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decw_dfail_keep_comp_equal_back_fail_zero_pass_keep_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_inv_dfail_wrap_comp_less_or_equal_back_fail_decc_pass_decw_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_inv_dfail_decc_comp_always_back_fail_inv_pass_inv_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_zero_dfail_repl_comp_greater_or_equal_back_fail_repl_pass_inv_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_repl_dfail_decw_comp_not_equal_back_fail_decc_pass_zero_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_inv_dfail_keep_comp_greater_or_equal_back_fail_wrap_pass_repl_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decw_dfail_inv_comp_less_back_fail_keep_pass_inv_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decw_dfail_inv_comp_never_back_fail_decw_pass_decw_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_keep_dfail_incc_comp_less_back_fail_decw_pass_decw_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_keep_dfail_incc_comp_greater_back_fail_inv_pass_keep_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_repl_dfail_wrap_comp_less_back_fail_repl_pass_keep_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_repl_dfail_decw_comp_not_equal_back_fail_decc_pass_repl_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_inv_dfail_incc_comp_greater_back_fail_repl_pass_repl_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_zero_dfail_decw_comp_equal_back_fail_decw_pass_inv_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_incc_dfail_decc_comp_less_back_fail_zero_pass_zero_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_keep_dfail_decc_comp_not_equal_back_fail_decw_pass_incc_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decc_dfail_decw_comp_less_or_equal_back_fail_inv_pass_keep_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_repl_dfail_decw_comp_not_equal_back_fail_keep_pass_decc_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_wrap_dfail_inv_comp_never_back_fail_decc_pass_repl_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_inv_dfail_repl_comp_not_equal_back_fail_repl_pass_wrap_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decc_dfail_decc_comp_never_back_fail_zero_pass_inv_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_incc_dfail_incc_comp_less_back_fail_incc_pass_decc_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_incc_dfail_decc_comp_not_equal_back_fail_keep_pass_incc_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_incc_dfail_inv_comp_never_back_fail_wrap_pass_incc_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_zero_dfail_incc_comp_greater_back_fail_keep_pass_incc_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_inv_dfail_keep_comp_equal_back_fail_keep_pass_zero_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_keep_dfail_zero_comp_less_back_fail_decc_pass_inv_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decc_dfail_inv_comp_less_or_equal_back_fail_zero_pass_keep_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_zero_dfail_zero_comp_never_back_fail_decw_pass_decc_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_inv_dfail_keep_comp_always_back_fail_decw_pass_zero_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_repl_dfail_repl_comp_less_or_equal_back_fail_zero_pass_inv_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_incc_dfail_decw_comp_greater_back_fail_repl_pass_repl_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decc_dfail_incc_comp_never_back_fail_inv_pass_incc_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_wrap_dfail_keep_comp_not_equal_back_fail_zero_pass_decc_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_incc_dfail_inv_comp_equal_back_fail_incc_pass_wrap_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_incc_dfail_decw_comp_less_or_equal_back_fail_wrap_pass_incc_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_zero_dfail_wrap_comp_equal_back_fail_keep_pass_incc_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_incc_dfail_decc_comp_less_back_fail_decc_pass_zero_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_repl_dfail_incc_comp_not_equal_back_fail_keep_pass_incc_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_zero_dfail_keep_comp_greater_back_fail_repl_pass_repl_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_inv_dfail_decw_comp_always_back_fail_zero_pass_zero_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decc_dfail_keep_comp_not_equal_back_fail_repl_pass_inv_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_inv_dfail_keep_comp_less_back_fail_wrap_pass_decc_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decc_dfail_decw_comp_greater_back_fail_decc_pass_inv_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_repl_dfail_keep_comp_less_back_fail_decc_pass_decc_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decw_dfail_inv_comp_never_back_fail_wrap_pass_repl_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_keep_dfail_decw_comp_never_back_fail_wrap_pass_decw_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_keep_dfail_repl_comp_always_back_fail_decc_pass_keep_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decc_dfail_keep_comp_less_back_fail_inv_pass_keep_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_repl_dfail_inv_comp_not_equal_back_fail_inv_pass_decc_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_repl_dfail_zero_comp_greater_or_equal_back_fail_repl_pass_repl_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decc_dfail_keep_comp_always_back_fail_zero_pass_repl_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_incc_dfail_repl_comp_less_back_fail_inv_pass_decc_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_inv_dfail_decw_comp_greater_back_fail_inv_pass_incc_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decc_dfail_zero_comp_never_back_fail_repl_pass_inv_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_zero_dfail_zero_comp_less_or_equal_back_fail_repl_pass_decc_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decc_dfail_keep_comp_always_back_fail_keep_pass_zero_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decw_dfail_decw_comp_always_back_fail_incc_pass_decc_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_repl_dfail_keep_comp_not_equal_back_fail_decc_pass_decw_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_keep_dfail_zero_comp_less_or_equal_back_fail_inv_pass_repl_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_zero_dfail_repl_comp_less_or_equal_back_fail_repl_pass_keep_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_wrap_dfail_keep_comp_less_back_fail_keep_pass_zero_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_wrap_dfail_incc_comp_greater_or_equal_back_fail_incc_pass_wrap_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_wrap_dfail_incc_comp_less_or_equal_back_fail_decc_pass_wrap_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_incc_dfail_repl_comp_less_back_fail_wrap_pass_wrap_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_wrap_dfail_decw_comp_never_back_fail_decc_pass_incc_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_incc_dfail_incc_comp_greater_back_fail_zero_pass_wrap_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decw_dfail_incc_comp_less_back_fail_keep_pass_incc_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decw_dfail_decc_comp_equal_back_fail_wrap_pass_decw_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_zero_dfail_decw_comp_not_equal_back_fail_decw_pass_decw_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_wrap_dfail_wrap_comp_equal_back_fail_inv_pass_zero_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_zero_dfail_repl_comp_always_back_fail_repl_pass_wrap_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decc_dfail_decc_comp_equal_back_fail_inv_pass_zero_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decw_dfail_decw_comp_always_back_fail_decc_pass_decc_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decw_dfail_decc_comp_not_equal_back_fail_incc_pass_decw_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_repl_dfail_zero_comp_less_back_fail_keep_pass_decw_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_inv_dfail_decc_comp_greater_or_equal_back_fail_wrap_pass_repl_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_incc_dfail_decc_comp_greater_or_equal_back_fail_repl_pass_inv_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_incc_dfail_inv_comp_less_back_fail_decc_pass_incc_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_keep_dfail_incc_comp_never_back_fail_keep_pass_incc_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_incc_dfail_incc_comp_greater_or_equal_back_fail_incc_pass_keep_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_inv_dfail_decc_comp_less_back_fail_wrap_pass_incc_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_inv_dfail_keep_comp_greater_back_fail_keep_pass_inv_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_zero_dfail_keep_comp_never_back_fail_keep_pass_inv_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_incc_dfail_inv_comp_equal_back_fail_repl_pass_zero_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_repl_dfail_incc_comp_greater_or_equal_back_fail_repl_pass_incc_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_incc_dfail_zero_comp_less_back_fail_zero_pass_repl_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_zero_dfail_incc_comp_not_equal_back_fail_decc_pass_incc_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decw_dfail_repl_comp_equal_back_fail_zero_pass_zero_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_repl_dfail_decw_comp_greater_back_fail_wrap_pass_decw_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_keep_dfail_zero_comp_greater_back_fail_decw_pass_repl_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_inv_dfail_keep_comp_greater_or_equal_back_fail_wrap_pass_keep_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_repl_dfail_inv_comp_never_back_fail_incc_pass_inv_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_repl_dfail_decw_comp_always_back_fail_decw_pass_repl_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decw_dfail_wrap_comp_less_or_equal_back_fail_decw_pass_repl_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_keep_dfail_decw_comp_not_equal_back_fail_decw_pass_decw_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_keep_dfail_repl_comp_less_back_fail_repl_pass_keep_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decc_dfail_decw_comp_greater_back_fail_keep_pass_keep_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decw_dfail_repl_comp_never_back_fail_incc_pass_decc_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_incc_dfail_incc_comp_not_equal_back_fail_inv_pass_decw_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decc_dfail_repl_comp_equal_back_fail_incc_pass_incc_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_inv_dfail_wrap_comp_greater_or_equal_back_fail_decw_pass_decc_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_zero_dfail_zero_comp_less_or_equal_back_fail_keep_pass_inv_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_wrap_dfail_decw_comp_never_back_fail_repl_pass_zero_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_incc_dfail_decc_comp_greater_or_equal_back_fail_incc_pass_wrap_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_zero_dfail_decc_comp_greater_back_fail_incc_pass_incc_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_repl_dfail_wrap_comp_greater_back_fail_incc_pass_zero_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_wrap_dfail_decw_comp_greater_or_equal_back_fail_wrap_pass_repl_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_repl_dfail_inv_comp_not_equal_back_fail_wrap_pass_wrap_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_wrap_dfail_wrap_comp_less_or_equal_back_fail_wrap_pass_repl_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_zero_dfail_zero_comp_always_back_fail_decc_pass_wrap_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_zero_dfail_incc_comp_equal_back_fail_wrap_pass_zero_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_wrap_dfail_incc_comp_less_back_fail_inv_pass_zero_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_incc_dfail_zero_comp_never_back_fail_keep_pass_wrap_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_incc_dfail_decw_comp_not_equal_back_fail_inv_pass_incc_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_incc_dfail_zero_comp_less_back_fail_decw_pass_incc_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_keep_dfail_incc_comp_always_back_fail_inv_pass_incc_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decc_dfail_inv_comp_greater_back_fail_incc_pass_keep_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decc_dfail_decw_comp_less_or_equal_back_fail_keep_pass_decc_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decc_dfail_zero_comp_always_back_fail_zero_pass_decc_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_inv_dfail_decc_comp_less_or_equal_back_fail_inv_pass_decc_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_keep_dfail_wrap_comp_always_back_fail_inv_pass_inv_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_incc_dfail_inv_comp_equal_back_fail_incc_pass_keep_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_keep_dfail_zero_comp_always_back_fail_incc_pass_incc_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_inv_dfail_keep_comp_not_equal_back_fail_keep_pass_keep_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_wrap_dfail_incc_comp_not_equal_back_fail_inv_pass_inv_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_repl_dfail_incc_comp_less_or_equal_back_fail_repl_pass_wrap_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_keep_dfail_decc_comp_not_equal_back_fail_decc_pass_repl_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_zero_dfail_inv_comp_never_back_fail_decw_pass_keep_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_wrap_dfail_inv_comp_always_back_fail_keep_pass_zero_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_keep_dfail_wrap_comp_not_equal_back_fail_decc_pass_wrap_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_repl_dfail_wrap_comp_always_back_fail_incc_pass_keep_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decw_dfail_wrap_comp_less_or_equal_back_fail_keep_pass_repl_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decw_dfail_zero_comp_always_back_fail_keep_pass_decw_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_repl_dfail_inv_comp_greater_or_equal_back_fail_incc_pass_decw_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decc_dfail_inv_comp_equal_back_fail_zero_pass_repl_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_zero_dfail_repl_comp_not_equal_back_fail_incc_pass_decc_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_wrap_dfail_wrap_comp_equal_back_fail_inv_pass_zero_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_inv_dfail_keep_comp_not_equal_back_fail_keep_pass_wrap_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_repl_dfail_incc_comp_greater_or_equal_back_fail_decc_pass_inv_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_inv_dfail_repl_comp_equal_back_fail_keep_pass_repl_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decw_dfail_repl_comp_never_back_fail_wrap_pass_inv_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_wrap_dfail_inv_comp_less_or_equal_back_fail_wrap_pass_decw_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decw_dfail_decc_comp_equal_back_fail_incc_pass_wrap_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decw_dfail_decw_comp_always_back_fail_inv_pass_decw_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_inv_dfail_inv_comp_greater_back_fail_wrap_pass_decw_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_repl_dfail_zero_comp_not_equal_back_fail_zero_pass_inv_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_wrap_dfail_zero_comp_always_back_fail_decw_pass_repl_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decc_dfail_incc_comp_equal_back_fail_wrap_pass_wrap_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decc_dfail_zero_comp_always_back_fail_zero_pass_decc_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_wrap_dfail_inv_comp_always_back_fail_repl_pass_decc_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decw_dfail_incc_comp_always_back_fail_inv_pass_wrap_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_inv_dfail_decc_comp_equal_back_fail_keep_pass_decw_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_inv_dfail_decw_comp_greater_or_equal_back_fail_zero_pass_inv_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_zero_dfail_keep_comp_greater_back_fail_incc_pass_inv_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_keep_dfail_decc_comp_not_equal_back_fail_inv_pass_zero_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decw_dfail_keep_comp_less_or_equal_back_fail_incc_pass_keep_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_wrap_dfail_incc_comp_equal_back_fail_keep_pass_decw_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decw_dfail_zero_comp_never_back_fail_wrap_pass_wrap_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_zero_dfail_decw_comp_never_back_fail_wrap_pass_decw_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_incc_dfail_zero_comp_equal_back_fail_decw_pass_zero_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_incc_dfail_decw_comp_never_back_fail_incc_pass_incc_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decw_dfail_decc_comp_less_or_equal_back_fail_zero_pass_incc_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_keep_dfail_wrap_comp_greater_back_fail_keep_pass_decw_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_keep_dfail_keep_comp_always_back_fail_decw_pass_keep_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_repl_dfail_decc_comp_equal_back_fail_keep_pass_keep_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decc_dfail_decc_comp_never_back_fail_keep_pass_repl_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_keep_dfail_incc_comp_not_equal_back_fail_inv_pass_decc_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_zero_dfail_decw_comp_greater_back_fail_keep_pass_keep_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_incc_dfail_repl_comp_less_or_equal_back_fail_incc_pass_zero_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decc_dfail_inv_comp_greater_or_equal_back_fail_incc_pass_incc_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_repl_dfail_inv_comp_equal_back_fail_keep_pass_decc_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decc_dfail_inv_comp_always_back_fail_decc_pass_repl_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decc_dfail_incc_comp_less_or_equal_back_fail_inv_pass_decc_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decc_dfail_inv_comp_less_back_fail_decw_pass_decc_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_keep_dfail_keep_comp_greater_or_equal_back_fail_inv_pass_decc_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_zero_dfail_inv_comp_greater_or_equal_back_fail_repl_pass_keep_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_incc_dfail_zero_comp_greater_or_equal_back_fail_wrap_pass_zero_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decw_dfail_zero_comp_always_back_fail_inv_pass_incc_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_zero_dfail_repl_comp_less_back_fail_keep_pass_decw_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decw_dfail_wrap_comp_equal_back_fail_wrap_pass_zero_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_zero_dfail_decw_comp_less_or_equal_back_fail_keep_pass_decw_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_keep_dfail_incc_comp_less_back_fail_inv_pass_zero_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_keep_dfail_inv_comp_greater_back_fail_wrap_pass_keep_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_wrap_dfail_zero_comp_equal_back_fail_incc_pass_keep_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_wrap_dfail_decc_comp_less_or_equal_back_fail_zero_pass_wrap_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_zero_dfail_inv_comp_never_back_fail_wrap_pass_wrap_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_wrap_dfail_decc_comp_less_back_fail_decw_pass_zero_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_inv_dfail_decw_comp_not_equal_back_fail_keep_pass_wrap_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decc_dfail_decw_comp_never_back_fail_zero_pass_inv_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decw_dfail_repl_comp_not_equal_back_fail_decc_pass_decc_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_keep_dfail_decw_comp_equal_back_fail_wrap_pass_decw_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_repl_dfail_decc_comp_not_equal_back_fail_zero_pass_keep_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_incc_dfail_wrap_comp_equal_back_fail_repl_pass_repl_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decw_dfail_wrap_comp_less_or_equal_back_fail_decc_pass_incc_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_incc_dfail_zero_comp_always_back_fail_zero_pass_decw_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decc_dfail_incc_comp_less_back_fail_decc_pass_incc_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_incc_dfail_zero_comp_less_or_equal_back_fail_decw_pass_decc_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_keep_dfail_decw_comp_greater_or_equal_back_fail_decc_pass_incc_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_keep_dfail_decw_comp_greater_back_fail_repl_pass_keep_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_keep_dfail_repl_comp_never_back_fail_decw_pass_keep_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_repl_dfail_keep_comp_equal_back_fail_decc_pass_keep_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_incc_dfail_zero_comp_greater_back_fail_zero_pass_repl_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decw_dfail_decw_comp_greater_or_equal_back_fail_zero_pass_incc_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decw_dfail_incc_comp_equal_back_fail_incc_pass_decw_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_repl_dfail_inv_comp_equal_back_fail_incc_pass_decw_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_wrap_dfail_wrap_comp_not_equal_back_fail_incc_pass_repl_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_wrap_dfail_inv_comp_never_back_fail_inv_pass_wrap_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decc_dfail_wrap_comp_greater_back_fail_zero_pass_wrap_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_incc_dfail_inv_comp_greater_back_fail_decc_pass_decc_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_wrap_dfail_repl_comp_never_back_fail_keep_pass_incc_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decw_dfail_wrap_comp_equal_back_fail_inv_pass_wrap_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_inv_dfail_zero_comp_always_back_fail_decc_pass_decw_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_repl_dfail_decc_comp_less_or_equal_back_fail_decc_pass_inv_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_keep_dfail_decc_comp_always_back_fail_inv_pass_repl_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_repl_dfail_zero_comp_greater_back_fail_inv_pass_keep_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_incc_dfail_incc_comp_always_back_fail_keep_pass_repl_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_wrap_dfail_wrap_comp_not_equal_back_fail_zero_pass_incc_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decc_dfail_keep_comp_less_back_fail_wrap_pass_wrap_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_wrap_dfail_zero_comp_greater_back_fail_repl_pass_decc_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_repl_dfail_decc_comp_equal_back_fail_zero_pass_wrap_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_zero_dfail_repl_comp_less_back_fail_decw_pass_repl_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_keep_dfail_wrap_comp_greater_back_fail_keep_pass_zero_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_keep_dfail_incc_comp_greater_back_fail_keep_pass_keep_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_incc_dfail_decc_comp_greater_back_fail_wrap_pass_keep_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_inv_dfail_decw_comp_always_back_fail_decc_pass_incc_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_repl_dfail_decc_comp_never_back_fail_wrap_pass_inv_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_incc_dfail_decw_comp_equal_back_fail_decw_pass_repl_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_wrap_dfail_keep_comp_equal_back_fail_zero_pass_incc_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_repl_dfail_repl_comp_less_or_equal_back_fail_decw_pass_wrap_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decc_dfail_keep_comp_greater_back_fail_zero_pass_repl_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_wrap_dfail_decc_comp_greater_or_equal_back_fail_wrap_pass_decc_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_incc_dfail_wrap_comp_less_or_equal_back_fail_repl_pass_wrap_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_incc_dfail_repl_comp_equal_back_fail_incc_pass_incc_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decc_dfail_wrap_comp_greater_back_fail_keep_pass_incc_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_keep_dfail_zero_comp_never_back_fail_incc_pass_decc_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_incc_dfail_keep_comp_never_back_fail_repl_pass_keep_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_wrap_dfail_wrap_comp_less_or_equal_back_fail_incc_pass_incc_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_wrap_dfail_decc_comp_always_back_fail_incc_pass_wrap_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_wrap_dfail_wrap_comp_never_back_fail_decw_pass_wrap_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decw_dfail_keep_comp_greater_back_fail_decc_pass_wrap_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_inv_dfail_decc_comp_greater_back_fail_decw_pass_decw_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decw_dfail_zero_comp_less_back_fail_zero_pass_inv_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_inv_dfail_zero_comp_less_or_equal_back_fail_inv_pass_decw_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decw_dfail_incc_comp_less_or_equal_back_fail_incc_pass_inv_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_incc_dfail_inv_comp_not_equal_back_fail_incc_pass_decw_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_zero_dfail_repl_comp_always_back_fail_keep_pass_incc_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decc_dfail_keep_comp_equal_back_fail_incc_pass_zero_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_inv_dfail_inv_comp_less_back_fail_inv_pass_decc_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_incc_dfail_decw_comp_always_back_fail_wrap_pass_inv_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_zero_dfail_keep_comp_always_back_fail_decc_pass_incc_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_zero_dfail_decc_comp_less_back_fail_repl_pass_zero_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_keep_dfail_repl_comp_not_equal_back_fail_keep_pass_zero_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_wrap_dfail_repl_comp_less_or_equal_back_fail_decc_pass_keep_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_incc_dfail_decc_comp_not_equal_back_fail_keep_pass_wrap_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_zero_dfail_decw_comp_less_or_equal_back_fail_repl_pass_incc_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_wrap_dfail_wrap_comp_equal_back_fail_incc_pass_zero_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decc_dfail_decc_comp_never_back_fail_decw_pass_wrap_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_inv_dfail_decc_comp_always_back_fail_repl_pass_decc_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_inv_dfail_decw_comp_not_equal_back_fail_keep_pass_inv_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_inv_dfail_incc_comp_less_or_equal_back_fail_wrap_pass_inv_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decw_dfail_keep_comp_not_equal_back_fail_decc_pass_inv_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_inv_dfail_inv_comp_not_equal_back_fail_wrap_pass_decw_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decc_dfail_repl_comp_less_or_equal_back_fail_incc_pass_inv_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_inv_dfail_repl_comp_greater_back_fail_zero_pass_decc_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_repl_dfail_decc_comp_equal_back_fail_decc_pass_inv_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_keep_dfail_incc_comp_greater_back_fail_inv_pass_repl_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_repl_dfail_wrap_comp_less_or_equal_back_fail_incc_pass_keep_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_inv_dfail_wrap_comp_greater_back_fail_keep_pass_repl_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_inv_dfail_wrap_comp_less_back_fail_keep_pass_inv_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_incc_dfail_keep_comp_greater_back_fail_decw_pass_inv_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_repl_dfail_decw_comp_not_equal_back_fail_inv_pass_incc_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_zero_dfail_keep_comp_greater_or_equal_back_fail_zero_pass_repl_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_incc_dfail_keep_comp_greater_back_fail_incc_pass_zero_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_repl_dfail_decc_comp_never_back_fail_decc_pass_incc_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_wrap_dfail_repl_comp_not_equal_back_fail_repl_pass_repl_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_wrap_dfail_repl_comp_greater_back_fail_repl_pass_wrap_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_inv_dfail_keep_comp_never_back_fail_inv_pass_wrap_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_incc_dfail_decc_comp_greater_back_fail_zero_pass_inv_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_incc_dfail_inv_comp_not_equal_back_fail_inv_pass_incc_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_wrap_dfail_decc_comp_greater_or_equal_back_fail_decc_pass_incc_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_incc_dfail_incc_comp_less_back_fail_wrap_pass_wrap_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decc_dfail_keep_comp_less_back_fail_decc_pass_incc_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_zero_dfail_incc_comp_greater_back_fail_incc_pass_decc_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_zero_dfail_repl_comp_greater_or_equal_back_fail_decw_pass_zero_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_keep_dfail_incc_comp_not_equal_back_fail_decw_pass_zero_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decw_dfail_decw_comp_less_or_equal_back_fail_decw_pass_keep_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decw_dfail_wrap_comp_less_or_equal_back_fail_wrap_pass_decw_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_inv_dfail_incc_comp_not_equal_back_fail_repl_pass_decw_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decc_dfail_incc_comp_less_back_fail_zero_pass_inv_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_wrap_dfail_keep_comp_not_equal_back_fail_wrap_pass_decc_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_zero_dfail_inv_comp_not_equal_back_fail_decc_pass_wrap_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decc_dfail_inv_comp_never_back_fail_incc_pass_zero_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_incc_dfail_incc_comp_equal_back_fail_incc_pass_decc_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_repl_dfail_decc_comp_greater_or_equal_back_fail_keep_pass_incc_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decc_dfail_repl_comp_not_equal_back_fail_repl_pass_repl_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_repl_dfail_wrap_comp_greater_or_equal_back_fail_keep_pass_decc_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decc_dfail_decw_comp_less_back_fail_inv_pass_repl_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_keep_dfail_incc_comp_less_or_equal_back_fail_repl_pass_decc_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_repl_dfail_wrap_comp_greater_or_equal_back_fail_keep_pass_keep_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_wrap_dfail_inv_comp_less_back_fail_decc_pass_repl_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_wrap_dfail_wrap_comp_greater_or_equal_back_fail_incc_pass_wrap_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decc_dfail_zero_comp_greater_or_equal_back_fail_incc_pass_wrap_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_repl_dfail_inv_comp_less_or_equal_back_fail_wrap_pass_decc_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decc_dfail_zero_comp_equal_back_fail_keep_pass_repl_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_wrap_dfail_wrap_comp_less_back_fail_decc_pass_decc_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_zero_dfail_repl_comp_always_back_fail_zero_pass_wrap_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_repl_dfail_wrap_comp_less_or_equal_back_fail_decw_pass_zero_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_wrap_dfail_decc_comp_less_back_fail_inv_pass_repl_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decw_dfail_decw_comp_always_back_fail_wrap_pass_wrap_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decw_dfail_keep_comp_less_or_equal_back_fail_zero_pass_decw_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decw_dfail_repl_comp_never_back_fail_decc_pass_decw_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_keep_dfail_keep_comp_never_back_fail_repl_pass_decw_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_inv_dfail_keep_comp_greater_back_fail_wrap_pass_keep_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_incc_dfail_keep_comp_equal_back_fail_decc_pass_inv_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_incc_dfail_wrap_comp_less_or_equal_back_fail_keep_pass_incc_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_incc_dfail_decw_comp_less_back_fail_inv_pass_incc_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_incc_dfail_keep_comp_equal_back_fail_decc_pass_incc_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_wrap_dfail_decc_comp_always_back_fail_wrap_pass_incc_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_incc_dfail_incc_comp_equal_back_fail_decc_pass_wrap_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_repl_dfail_keep_comp_less_back_fail_decc_pass_incc_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_wrap_dfail_zero_comp_less_back_fail_incc_pass_repl_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_repl_dfail_incc_comp_greater_or_equal_back_fail_zero_pass_wrap_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_keep_dfail_incc_comp_never_back_fail_repl_pass_repl_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_wrap_dfail_decw_comp_never_back_fail_decc_pass_keep_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_repl_dfail_wrap_comp_always_back_fail_decc_pass_wrap_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_repl_dfail_incc_comp_greater_back_fail_zero_pass_repl_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_keep_dfail_zero_comp_not_equal_back_fail_repl_pass_repl_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_wrap_dfail_zero_comp_equal_back_fail_incc_pass_keep_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_incc_dfail_incc_comp_equal_back_fail_incc_pass_wrap_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_keep_dfail_wrap_comp_always_back_fail_zero_pass_incc_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_inv_dfail_wrap_comp_never_back_fail_repl_pass_keep_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_wrap_dfail_repl_comp_less_or_equal_back_fail_decc_pass_inv_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_zero_dfail_repl_comp_never_back_fail_repl_pass_wrap_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_repl_dfail_wrap_comp_less_or_equal_back_fail_wrap_pass_zero_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decw_dfail_wrap_comp_less_or_equal_back_fail_wrap_pass_repl_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decw_dfail_inv_comp_greater_back_fail_decc_pass_decw_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decc_dfail_inv_comp_less_or_equal_back_fail_wrap_pass_decw_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_keep_dfail_decw_comp_equal_back_fail_zero_pass_decc_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_repl_dfail_keep_comp_less_back_fail_repl_pass_keep_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decw_dfail_keep_comp_never_back_fail_keep_pass_repl_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_incc_dfail_repl_comp_not_equal_back_fail_inv_pass_decw_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_keep_dfail_wrap_comp_never_back_fail_decc_pass_incc_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_repl_dfail_wrap_comp_not_equal_back_fail_incc_pass_keep_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_repl_dfail_wrap_comp_equal_back_fail_wrap_pass_repl_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_keep_dfail_incc_comp_never_back_fail_zero_pass_repl_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decw_dfail_wrap_comp_equal_back_fail_inv_pass_keep_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_repl_dfail_keep_comp_always_back_fail_inv_pass_decw_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_repl_dfail_keep_comp_greater_back_fail_wrap_pass_repl_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decc_dfail_incc_comp_less_back_fail_inv_pass_repl_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decw_dfail_wrap_comp_greater_back_fail_inv_pass_decc_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_repl_dfail_zero_comp_less_back_fail_zero_pass_decw_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decc_dfail_zero_comp_always_back_fail_zero_pass_repl_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_inv_dfail_incc_comp_equal_back_fail_decc_pass_decc_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_inv_dfail_zero_comp_always_back_fail_decw_pass_inv_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_wrap_dfail_incc_comp_always_back_fail_repl_pass_inv_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_zero_dfail_inv_comp_never_back_fail_repl_pass_wrap_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_keep_dfail_decc_comp_less_or_equal_back_fail_zero_pass_zero_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_wrap_dfail_inv_comp_not_equal_back_fail_wrap_pass_keep_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_incc_dfail_keep_comp_greater_back_fail_zero_pass_wrap_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_repl_dfail_keep_comp_less_or_equal_back_fail_keep_pass_incc_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decw_dfail_keep_comp_always_back_fail_keep_pass_repl_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decc_dfail_wrap_comp_always_back_fail_decc_pass_decw_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_inv_dfail_incc_comp_equal_back_fail_repl_pass_decc_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_zero_dfail_decw_comp_greater_back_fail_inv_pass_inv_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decc_dfail_decw_comp_less_back_fail_decw_pass_zero_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decc_dfail_decc_comp_greater_back_fail_wrap_pass_decc_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_keep_dfail_incc_comp_always_back_fail_incc_pass_decc_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decc_dfail_wrap_comp_greater_or_equal_back_fail_keep_pass_keep_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_keep_dfail_keep_comp_never_back_fail_keep_pass_decc_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_zero_dfail_incc_comp_less_back_fail_keep_pass_keep_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_keep_dfail_decw_comp_less_back_fail_repl_pass_zero_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_zero_dfail_incc_comp_greater_or_equal_back_fail_keep_pass_keep_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_repl_dfail_repl_comp_never_back_fail_inv_pass_zero_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_inv_dfail_decc_comp_less_back_fail_repl_pass_repl_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decc_dfail_incc_comp_greater_or_equal_back_fail_decw_pass_inv_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_zero_dfail_decw_comp_less_back_fail_decw_pass_decc_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_wrap_dfail_repl_comp_less_back_fail_wrap_pass_zero_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_incc_dfail_keep_comp_less_or_equal_back_fail_decc_pass_wrap_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_repl_dfail_zero_comp_less_or_equal_back_fail_incc_pass_incc_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_incc_dfail_keep_comp_less_or_equal_back_fail_decc_pass_repl_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_wrap_dfail_decc_comp_greater_back_fail_decc_pass_incc_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_zero_dfail_wrap_comp_not_equal_back_fail_zero_pass_wrap_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_inv_dfail_repl_comp_greater_back_fail_repl_pass_zero_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_inv_dfail_decw_comp_never_back_fail_decw_pass_inv_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_wrap_dfail_zero_comp_less_back_fail_decw_pass_inv_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_repl_dfail_decw_comp_greater_back_fail_incc_pass_wrap_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_inv_dfail_incc_comp_greater_or_equal_back_fail_decc_pass_repl_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_inv_dfail_repl_comp_less_or_equal_back_fail_keep_pass_inv_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_zero_dfail_decw_comp_less_back_fail_incc_pass_inv_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_incc_dfail_decc_comp_less_or_equal_back_fail_keep_pass_zero_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_inv_dfail_zero_comp_greater_or_equal_back_fail_keep_pass_incc_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_incc_dfail_zero_comp_not_equal_back_fail_zero_pass_inv_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_zero_dfail_incc_comp_less_back_fail_zero_pass_incc_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_wrap_dfail_inv_comp_never_back_fail_wrap_pass_zero_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_keep_dfail_decw_comp_greater_or_equal_back_fail_wrap_pass_wrap_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_zero_dfail_keep_comp_less_back_fail_decw_pass_keep_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_incc_dfail_zero_comp_greater_or_equal_back_fail_wrap_pass_zero_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_keep_dfail_inv_comp_greater_back_fail_repl_pass_incc_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_zero_dfail_decc_comp_equal_back_fail_decw_pass_keep_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_wrap_dfail_decc_comp_less_or_equal_back_fail_wrap_pass_zero_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_incc_dfail_repl_comp_never_back_fail_repl_pass_wrap_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decc_dfail_wrap_comp_equal_back_fail_keep_pass_incc_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_keep_dfail_decw_comp_greater_back_fail_decw_pass_decc_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_incc_dfail_inv_comp_not_equal_back_fail_incc_pass_keep_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_wrap_dfail_wrap_comp_greater_or_equal_back_fail_wrap_pass_incc_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_inv_dfail_decc_comp_not_equal_back_fail_inv_pass_wrap_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decw_dfail_wrap_comp_greater_back_fail_incc_pass_inv_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_repl_dfail_inv_comp_never_back_fail_wrap_pass_decw_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_keep_dfail_repl_comp_less_back_fail_repl_pass_repl_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decc_dfail_keep_comp_less_or_equal_back_fail_repl_pass_keep_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decw_dfail_decc_comp_never_back_fail_zero_pass_decc_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decw_dfail_decw_comp_greater_back_fail_decw_pass_decw_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_repl_dfail_zero_comp_always_back_fail_decc_pass_decw_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decc_dfail_zero_comp_greater_or_equal_back_fail_keep_pass_repl_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_keep_dfail_decw_comp_greater_or_equal_back_fail_zero_pass_decc_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decw_dfail_inv_comp_not_equal_back_fail_keep_pass_keep_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_keep_dfail_decw_comp_less_or_equal_back_fail_zero_pass_decw_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decc_dfail_inv_comp_greater_back_fail_repl_pass_keep_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_keep_dfail_incc_comp_always_back_fail_decc_pass_decc_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decw_dfail_incc_comp_never_back_fail_zero_pass_keep_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_wrap_dfail_incc_comp_less_or_equal_back_fail_decc_pass_decw_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_incc_dfail_repl_comp_always_back_fail_zero_pass_wrap_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_inv_dfail_decc_comp_less_or_equal_back_fail_incc_pass_incc_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_inv_dfail_wrap_comp_never_back_fail_wrap_pass_inv_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decw_dfail_incc_comp_less_back_fail_inv_pass_inv_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_inv_dfail_repl_comp_less_or_equal_back_fail_keep_pass_decw_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_keep_dfail_keep_comp_less_or_equal_back_fail_repl_pass_inv_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_inv_dfail_wrap_comp_not_equal_back_fail_incc_pass_keep_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_repl_dfail_keep_comp_less_back_fail_keep_pass_inv_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_repl_dfail_incc_comp_not_equal_back_fail_inv_pass_repl_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decc_dfail_zero_comp_less_or_equal_back_fail_zero_pass_repl_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decw_dfail_incc_comp_never_back_fail_wrap_pass_decc_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decw_dfail_keep_comp_equal_back_fail_incc_pass_decw_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_inv_dfail_decc_comp_less_or_equal_back_fail_keep_pass_decw_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_zero_dfail_repl_comp_not_equal_back_fail_repl_pass_inv_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_wrap_dfail_decw_comp_equal_back_fail_wrap_pass_zero_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_zero_dfail_incc_comp_never_back_fail_inv_pass_wrap_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_zero_dfail_zero_comp_greater_or_equal_back_fail_incc_pass_zero_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_wrap_dfail_zero_comp_not_equal_back_fail_decw_pass_zero_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_keep_dfail_repl_comp_never_back_fail_incc_pass_wrap_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_wrap_dfail_incc_comp_never_back_fail_zero_pass_keep_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_zero_dfail_decc_comp_never_back_fail_repl_pass_wrap_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_inv_dfail_repl_comp_always_back_fail_decw_pass_zero_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_keep_dfail_repl_comp_less_back_fail_inv_pass_inv_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_incc_dfail_decw_comp_less_or_equal_back_fail_wrap_pass_keep_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_keep_dfail_decw_comp_not_equal_back_fail_repl_pass_incc_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decw_dfail_inv_comp_greater_back_fail_inv_pass_keep_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_keep_dfail_decc_comp_less_back_fail_zero_pass_decw_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_incc_dfail_zero_comp_less_back_fail_decw_pass_keep_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_wrap_dfail_decc_comp_less_back_fail_decw_pass_incc_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_zero_dfail_decw_comp_always_back_fail_decc_pass_wrap_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_repl_dfail_decw_comp_less_or_equal_back_fail_repl_pass_zero_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_incc_dfail_decc_comp_greater_or_equal_back_fail_decw_pass_repl_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_inv_dfail_inv_comp_always_back_fail_inv_pass_incc_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_incc_dfail_repl_comp_not_equal_back_fail_zero_pass_inv_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_inv_dfail_zero_comp_always_back_fail_keep_pass_incc_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_zero_dfail_decw_comp_always_back_fail_inv_pass_inv_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_zero_dfail_zero_comp_not_equal_back_fail_keep_pass_zero_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_wrap_dfail_keep_comp_always_back_fail_incc_pass_zero_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_repl_dfail_inv_comp_less_back_fail_incc_pass_wrap_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_keep_dfail_keep_comp_less_or_equal_back_fail_keep_pass_repl_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decc_dfail_zero_comp_never_back_fail_keep_pass_keep_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_inv_dfail_inv_comp_greater_back_fail_zero_pass_decc_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_repl_dfail_decw_comp_less_or_equal_back_fail_decw_pass_inv_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_zero_dfail_incc_comp_not_equal_back_fail_keep_pass_repl_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_wrap_dfail_repl_comp_never_back_fail_decw_pass_zero_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_keep_dfail_zero_comp_always_back_fail_zero_pass_wrap_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_incc_dfail_decc_comp_less_or_equal_back_fail_wrap_pass_keep_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decw_dfail_decw_comp_less_or_equal_back_fail_decw_pass_incc_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decw_dfail_wrap_comp_not_equal_back_fail_keep_pass_decw_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_inv_dfail_zero_comp_never_back_fail_inv_pass_decw_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_incc_dfail_inv_comp_not_equal_back_fail_decc_pass_inv_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_keep_dfail_keep_comp_always_back_fail_inv_pass_incc_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_wrap_dfail_decw_comp_less_or_equal_back_fail_decc_pass_keep_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_keep_dfail_wrap_comp_never_back_fail_inv_pass_wrap_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_keep_dfail_wrap_comp_never_back_fail_zero_pass_keep_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_wrap_dfail_zero_comp_less_back_fail_wrap_pass_keep_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_zero_dfail_zero_comp_equal_back_fail_decw_pass_wrap_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_wrap_dfail_zero_comp_not_equal_back_fail_keep_pass_zero_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_inv_dfail_inv_comp_never_back_fail_inv_pass_wrap_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decw_dfail_decw_comp_never_back_fail_repl_pass_inv_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_inv_dfail_incc_comp_greater_back_fail_wrap_pass_decw_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_zero_dfail_decc_comp_not_equal_back_fail_incc_pass_inv_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_repl_dfail_wrap_comp_always_back_fail_decw_pass_zero_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_inv_dfail_zero_comp_greater_or_equal_back_fail_incc_pass_repl_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_incc_dfail_keep_comp_always_back_fail_inv_pass_inv_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decc_dfail_inv_comp_less_back_fail_decc_pass_incc_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_incc_dfail_wrap_comp_never_back_fail_zero_pass_decc_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_wrap_dfail_zero_comp_not_equal_back_fail_inv_pass_incc_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_zero_dfail_keep_comp_not_equal_back_fail_decc_pass_wrap_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_incc_dfail_keep_comp_not_equal_back_fail_inv_pass_zero_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_keep_dfail_incc_comp_always_back_fail_keep_pass_incc_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_repl_dfail_wrap_comp_greater_back_fail_decw_pass_keep_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_zero_dfail_zero_comp_greater_or_equal_back_fail_repl_pass_repl_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_inv_dfail_repl_comp_not_equal_back_fail_wrap_pass_zero_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_repl_dfail_decw_comp_less_or_equal_back_fail_keep_pass_inv_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_incc_dfail_wrap_comp_greater_back_fail_decc_pass_repl_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decc_dfail_decw_comp_greater_back_fail_decc_pass_incc_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decw_dfail_wrap_comp_not_equal_back_fail_zero_pass_decc_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_keep_dfail_inv_comp_greater_back_fail_incc_pass_decw_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_repl_dfail_zero_comp_less_back_fail_repl_pass_keep_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_inv_dfail_repl_comp_equal_back_fail_inv_pass_repl_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decw_dfail_inv_comp_less_or_equal_back_fail_incc_pass_inv_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_zero_dfail_zero_comp_equal_back_fail_decc_pass_decw_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_keep_dfail_zero_comp_greater_or_equal_back_fail_repl_pass_zero_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_wrap_dfail_inv_comp_greater_back_fail_keep_pass_keep_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decw_dfail_zero_comp_always_back_fail_inv_pass_wrap_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_keep_dfail_decc_comp_never_back_fail_wrap_pass_decw_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_wrap_dfail_repl_comp_greater_back_fail_zero_pass_keep_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_wrap_dfail_decc_comp_not_equal_back_fail_keep_pass_wrap_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_incc_dfail_wrap_comp_always_back_fail_decw_pass_wrap_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_repl_dfail_zero_comp_never_back_fail_decc_pass_incc_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_wrap_dfail_keep_comp_never_back_fail_incc_pass_repl_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_repl_dfail_zero_comp_greater_back_fail_wrap_pass_wrap_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decc_dfail_incc_comp_never_back_fail_decw_pass_repl_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_zero_dfail_repl_comp_less_back_fail_wrap_pass_decc_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_wrap_dfail_incc_comp_greater_or_equal_back_fail_decw_pass_zero_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_inv_dfail_inv_comp_never_back_fail_keep_pass_wrap_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_zero_dfail_repl_comp_greater_back_fail_decw_pass_inv_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_inv_dfail_zero_comp_never_back_fail_incc_pass_zero_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_zero_dfail_incc_comp_less_back_fail_keep_pass_inv_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decc_dfail_repl_comp_equal_back_fail_inv_pass_zero_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_incc_dfail_keep_comp_greater_or_equal_back_fail_zero_pass_decc_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_inv_dfail_zero_comp_greater_back_fail_decc_pass_incc_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_keep_dfail_decc_comp_equal_back_fail_zero_pass_inv_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_incc_dfail_repl_comp_less_back_fail_wrap_pass_keep_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decw_dfail_decw_comp_never_back_fail_incc_pass_incc_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_wrap_dfail_decc_comp_less_back_fail_repl_pass_decw_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decw_dfail_inv_comp_equal_back_fail_repl_pass_wrap_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decc_dfail_incc_comp_not_equal_back_fail_keep_pass_decw_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_inv_dfail_incc_comp_greater_or_equal_back_fail_repl_pass_decc_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_wrap_dfail_incc_comp_less_back_fail_wrap_pass_inv_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_keep_dfail_repl_comp_always_back_fail_decc_pass_wrap_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_repl_dfail_keep_comp_greater_back_fail_repl_pass_keep_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_incc_dfail_decc_comp_less_back_fail_incc_pass_repl_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_zero_dfail_incc_comp_greater_back_fail_repl_pass_incc_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_keep_dfail_incc_comp_always_back_fail_repl_pass_zero_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_wrap_dfail_decw_comp_never_back_fail_decc_pass_keep_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_incc_dfail_keep_comp_never_back_fail_repl_pass_wrap_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_repl_dfail_keep_comp_greater_or_equal_back_fail_inv_pass_incc_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decc_dfail_zero_comp_never_back_fail_decc_pass_repl_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_wrap_dfail_wrap_comp_less_or_equal_back_fail_inv_pass_decc_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decw_dfail_wrap_comp_not_equal_back_fail_repl_pass_wrap_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decc_dfail_wrap_comp_equal_back_fail_wrap_pass_decw_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_incc_dfail_decc_comp_greater_back_fail_keep_pass_decc_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_incc_dfail_keep_comp_never_back_fail_decw_pass_incc_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_zero_dfail_decw_comp_less_back_fail_decw_pass_incc_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_zero_dfail_keep_comp_less_back_fail_zero_pass_zero_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_repl_dfail_incc_comp_greater_back_fail_incc_pass_zero_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decw_dfail_zero_comp_greater_or_equal_back_fail_decc_pass_repl_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_repl_dfail_repl_comp_less_back_fail_inv_pass_decw_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_incc_dfail_inv_comp_greater_or_equal_back_fail_decw_pass_repl_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decw_dfail_decc_comp_greater_or_equal_back_fail_keep_pass_incc_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decc_dfail_decc_comp_less_or_equal_back_fail_wrap_pass_decw_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_repl_dfail_keep_comp_greater_or_equal_back_fail_decw_pass_decc_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_repl_dfail_decc_comp_never_back_fail_decw_pass_repl_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_repl_dfail_repl_comp_greater_or_equal_back_fail_decc_pass_repl_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decw_dfail_keep_comp_greater_or_equal_back_fail_zero_pass_repl_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_inv_dfail_decc_comp_never_back_fail_zero_pass_decw_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_wrap_dfail_repl_comp_less_back_fail_wrap_pass_inv_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decc_dfail_repl_comp_never_back_fail_zero_pass_wrap_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decw_dfail_keep_comp_less_back_fail_decw_pass_decc_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_zero_dfail_decw_comp_not_equal_back_fail_wrap_pass_decw_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_inv_dfail_incc_comp_greater_back_fail_decw_pass_zero_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_zero_dfail_inv_comp_greater_back_fail_zero_pass_inv_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_repl_dfail_repl_comp_not_equal_back_fail_zero_pass_zero_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_repl_dfail_repl_comp_equal_back_fail_decc_pass_repl_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_wrap_dfail_repl_comp_never_back_fail_zero_pass_repl_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decw_dfail_decw_comp_never_back_fail_incc_pass_wrap_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_repl_dfail_wrap_comp_equal_back_fail_incc_pass_decw_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_zero_dfail_keep_comp_less_or_equal_back_fail_wrap_pass_repl_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_zero_dfail_inv_comp_never_back_fail_incc_pass_zero_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_incc_dfail_incc_comp_equal_back_fail_wrap_pass_zero_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_zero_dfail_incc_comp_greater_or_equal_back_fail_wrap_pass_incc_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_incc_dfail_inv_comp_always_back_fail_keep_pass_zero_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_inv_dfail_wrap_comp_not_equal_back_fail_repl_pass_incc_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_inv_dfail_decw_comp_greater_or_equal_back_fail_decw_pass_inv_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_wrap_dfail_inv_comp_less_or_equal_back_fail_decw_pass_inv_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_incc_dfail_inv_comp_not_equal_back_fail_decc_pass_wrap_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_incc_dfail_decw_comp_equal_back_fail_incc_pass_incc_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_keep_dfail_wrap_comp_equal_back_fail_decc_pass_incc_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_keep_dfail_decc_comp_greater_or_equal_back_fail_zero_pass_keep_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_wrap_dfail_zero_comp_greater_back_fail_repl_pass_keep_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decw_dfail_repl_comp_equal_back_fail_decc_pass_wrap_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decw_dfail_decw_comp_less_back_fail_incc_pass_decw_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decc_dfail_incc_comp_not_equal_back_fail_decc_pass_decw_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decc_dfail_repl_comp_greater_or_equal_back_fail_wrap_pass_decc_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decc_dfail_repl_comp_never_back_fail_zero_pass_decc_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_wrap_dfail_decc_comp_greater_back_fail_incc_pass_decc_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decc_dfail_keep_comp_equal_back_fail_keep_pass_wrap_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_keep_dfail_decw_comp_never_back_fail_keep_pass_decc_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_incc_dfail_decw_comp_less_back_fail_repl_pass_keep_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_keep_dfail_zero_comp_greater_back_fail_repl_pass_incc_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decc_dfail_decw_comp_greater_or_equal_back_fail_inv_pass_keep_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_zero_dfail_wrap_comp_greater_or_equal_back_fail_inv_pass_decc_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_wrap_dfail_wrap_comp_less_back_fail_wrap_pass_zero_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decw_dfail_keep_comp_less_or_equal_back_fail_incc_pass_wrap_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_repl_dfail_zero_comp_never_back_fail_zero_pass_decw_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_wrap_dfail_zero_comp_equal_back_fail_repl_pass_repl_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_wrap_dfail_wrap_comp_not_equal_back_fail_decw_pass_wrap_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decw_dfail_repl_comp_not_equal_back_fail_incc_pass_wrap_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_repl_dfail_keep_comp_not_equal_back_fail_decc_pass_decw_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_inv_dfail_repl_comp_less_back_fail_repl_pass_repl_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decw_dfail_inv_comp_always_back_fail_wrap_pass_inv_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_keep_dfail_decc_comp_equal_back_fail_repl_pass_decw_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_zero_dfail_wrap_comp_less_back_fail_keep_pass_keep_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decw_dfail_wrap_comp_never_back_fail_decw_pass_zero_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decc_dfail_incc_comp_not_equal_back_fail_decc_pass_decw_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_wrap_dfail_incc_comp_greater_or_equal_back_fail_incc_pass_decc_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_incc_dfail_keep_comp_less_or_equal_back_fail_zero_pass_wrap_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_inv_dfail_wrap_comp_less_back_fail_keep_pass_incc_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decw_dfail_zero_comp_not_equal_back_fail_repl_pass_inv_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_keep_dfail_incc_comp_not_equal_back_fail_inv_pass_decw_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decc_dfail_zero_comp_less_or_equal_back_fail_incc_pass_keep_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_zero_dfail_zero_comp_never_back_fail_decc_pass_decc_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_inv_dfail_decw_comp_never_back_fail_keep_pass_zero_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_repl_dfail_decc_comp_not_equal_back_fail_keep_pass_inv_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decw_dfail_wrap_comp_equal_back_fail_incc_pass_repl_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decc_dfail_zero_comp_never_back_fail_repl_pass_decw_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decc_dfail_decc_comp_equal_back_fail_keep_pass_decc_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decw_dfail_zero_comp_less_back_fail_zero_pass_decc_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_zero_dfail_decw_comp_greater_back_fail_decc_pass_decw_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_wrap_dfail_repl_comp_less_back_fail_inv_pass_zero_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_repl_dfail_decc_comp_greater_or_equal_back_fail_decw_pass_wrap_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_repl_dfail_wrap_comp_greater_or_equal_back_fail_zero_pass_repl_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_wrap_dfail_inv_comp_less_or_equal_back_fail_wrap_pass_repl_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decw_dfail_incc_comp_not_equal_back_fail_keep_pass_wrap_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_repl_dfail_repl_comp_equal_back_fail_incc_pass_decw_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_inv_dfail_incc_comp_greater_back_fail_wrap_pass_repl_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_inv_dfail_repl_comp_less_or_equal_back_fail_keep_pass_inv_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_incc_dfail_inv_comp_less_back_fail_decw_pass_inv_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decw_dfail_incc_comp_less_back_fail_decw_pass_incc_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_incc_dfail_keep_comp_not_equal_back_fail_repl_pass_decw_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_keep_dfail_inv_comp_always_back_fail_wrap_pass_incc_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decw_dfail_decw_comp_not_equal_back_fail_decc_pass_keep_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decc_dfail_decw_comp_always_back_fail_keep_pass_decw_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decc_dfail_incc_comp_equal_back_fail_wrap_pass_decc_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_inv_dfail_zero_comp_greater_back_fail_wrap_pass_decc_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_wrap_dfail_repl_comp_always_back_fail_wrap_pass_inv_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_repl_dfail_keep_comp_less_or_equal_back_fail_incc_pass_wrap_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decw_dfail_wrap_comp_less_or_equal_back_fail_wrap_pass_repl_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decw_dfail_inv_comp_less_or_equal_back_fail_incc_pass_decw_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_incc_dfail_repl_comp_greater_back_fail_decw_pass_decw_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_wrap_dfail_incc_comp_less_back_fail_decw_pass_incc_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_incc_dfail_repl_comp_greater_or_equal_back_fail_repl_pass_wrap_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_inv_dfail_decw_comp_equal_back_fail_wrap_pass_incc_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decw_dfail_zero_comp_less_or_equal_back_fail_inv_pass_inv_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decw_dfail_keep_comp_not_equal_back_fail_inv_pass_decw_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decw_dfail_wrap_comp_greater_or_equal_back_fail_inv_pass_decw_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_keep_dfail_wrap_comp_not_equal_back_fail_decc_pass_decw_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_keep_dfail_keep_comp_equal_back_fail_decw_pass_keep_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_inv_dfail_zero_comp_not_equal_back_fail_incc_pass_keep_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_inv_dfail_keep_comp_less_back_fail_decw_pass_inv_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decw_dfail_zero_comp_never_back_fail_incc_pass_inv_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_zero_dfail_zero_comp_greater_back_fail_zero_pass_decw_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decc_dfail_inv_comp_greater_or_equal_back_fail_decw_pass_zero_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_inv_dfail_keep_comp_not_equal_back_fail_decc_pass_decc_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_wrap_dfail_zero_comp_less_back_fail_repl_pass_inv_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decw_dfail_wrap_comp_less_back_fail_keep_pass_wrap_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_zero_dfail_decw_comp_never_back_fail_decw_pass_decw_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decw_dfail_inv_comp_less_back_fail_zero_pass_zero_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decc_dfail_incc_comp_greater_or_equal_back_fail_keep_pass_decw_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_repl_dfail_zero_comp_less_or_equal_back_fail_decc_pass_decc_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_keep_dfail_inv_comp_not_equal_back_fail_repl_pass_repl_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decw_dfail_wrap_comp_always_back_fail_zero_pass_keep_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_incc_dfail_decw_comp_less_or_equal_back_fail_decw_pass_decw_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_repl_dfail_keep_comp_always_back_fail_wrap_pass_incc_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decc_dfail_inv_comp_equal_back_fail_keep_pass_repl_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_wrap_dfail_keep_comp_less_back_fail_decw_pass_decc_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decc_dfail_zero_comp_not_equal_back_fail_decc_pass_wrap_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decw_dfail_decc_comp_equal_back_fail_repl_pass_decc_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_zero_dfail_repl_comp_always_back_fail_wrap_pass_decw_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_incc_dfail_inv_comp_greater_or_equal_back_fail_keep_pass_zero_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_incc_dfail_wrap_comp_always_back_fail_wrap_pass_incc_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_repl_dfail_repl_comp_not_equal_back_fail_incc_pass_incc_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_repl_dfail_keep_comp_always_back_fail_decw_pass_repl_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_zero_dfail_decc_comp_less_back_fail_decw_pass_repl_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_incc_dfail_inv_comp_less_or_equal_back_fail_decc_pass_zero_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_repl_dfail_decc_comp_less_or_equal_back_fail_decc_pass_incc_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_zero_dfail_wrap_comp_not_equal_back_fail_decw_pass_repl_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_keep_dfail_decc_comp_less_back_fail_decw_pass_zero_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_repl_dfail_repl_comp_less_or_equal_back_fail_inv_pass_keep_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decw_dfail_inv_comp_greater_back_fail_keep_pass_repl_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_wrap_dfail_decc_comp_greater_or_equal_back_fail_repl_pass_decw_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_inv_dfail_decw_comp_never_back_fail_decw_pass_wrap_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_incc_dfail_zero_comp_not_equal_back_fail_zero_pass_inv_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decc_dfail_decc_comp_less_back_fail_inv_pass_incc_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_wrap_dfail_decc_comp_never_back_fail_repl_pass_decc_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_wrap_dfail_repl_comp_always_back_fail_keep_pass_wrap_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_wrap_dfail_decw_comp_less_back_fail_zero_pass_wrap_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decc_dfail_incc_comp_less_back_fail_zero_pass_wrap_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_keep_dfail_repl_comp_less_or_equal_back_fail_decc_pass_decc_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_repl_dfail_repl_comp_equal_back_fail_decw_pass_keep_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_inv_dfail_decw_comp_greater_back_fail_repl_pass_repl_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_incc_dfail_repl_comp_less_or_equal_back_fail_keep_pass_inv_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_keep_dfail_incc_comp_greater_or_equal_back_fail_repl_pass_incc_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_zero_dfail_wrap_comp_never_back_fail_keep_pass_keep_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_wrap_dfail_decw_comp_less_or_equal_back_fail_repl_pass_zero_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_zero_dfail_inv_comp_never_back_fail_zero_pass_wrap_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_incc_dfail_decw_comp_not_equal_back_fail_incc_pass_zero_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_wrap_dfail_decc_comp_less_or_equal_back_fail_zero_pass_incc_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decc_dfail_decc_comp_never_back_fail_zero_pass_wrap_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_repl_dfail_wrap_comp_never_back_fail_decc_pass_decc_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decc_dfail_inv_comp_less_back_fail_zero_pass_repl_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_incc_dfail_decc_comp_less_back_fail_decw_pass_decc_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decc_dfail_keep_comp_greater_or_equal_back_fail_zero_pass_incc_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_incc_dfail_decw_comp_greater_or_equal_back_fail_incc_pass_decc_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_zero_dfail_keep_comp_greater_or_equal_back_fail_incc_pass_incc_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decc_dfail_decc_comp_less_back_fail_zero_pass_zero_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_keep_dfail_repl_comp_less_back_fail_inv_pass_decc_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decc_dfail_keep_comp_greater_back_fail_zero_pass_keep_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_repl_dfail_zero_comp_greater_or_equal_back_fail_inv_pass_decc_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_repl_dfail_incc_comp_not_equal_back_fail_inv_pass_repl_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decw_dfail_keep_comp_greater_back_fail_wrap_pass_repl_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_wrap_dfail_keep_comp_greater_back_fail_keep_pass_decw_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_inv_dfail_wrap_comp_always_back_fail_decc_pass_wrap_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_wrap_dfail_wrap_comp_less_or_equal_back_fail_zero_pass_inv_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_zero_dfail_wrap_comp_less_or_equal_back_fail_decw_pass_wrap_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_inv_dfail_incc_comp_never_back_fail_incc_pass_zero_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_inv_dfail_incc_comp_equal_back_fail_zero_pass_inv_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decw_dfail_keep_comp_greater_back_fail_repl_pass_inv_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_wrap_dfail_repl_comp_less_or_equal_back_fail_decc_pass_decw_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decw_dfail_incc_comp_not_equal_back_fail_zero_pass_wrap_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_repl_dfail_repl_comp_greater_back_fail_zero_pass_decw_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_inv_dfail_repl_comp_greater_back_fail_zero_pass_repl_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_zero_dfail_incc_comp_greater_or_equal_back_fail_zero_pass_inv_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decc_dfail_keep_comp_greater_or_equal_back_fail_incc_pass_zero_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_wrap_dfail_wrap_comp_not_equal_back_fail_keep_pass_decc_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_wrap_dfail_wrap_comp_less_back_fail_decw_pass_wrap_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decc_dfail_repl_comp_equal_back_fail_repl_pass_wrap_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decc_dfail_incc_comp_greater_or_equal_back_fail_keep_pass_decc_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_incc_dfail_repl_comp_always_back_fail_zero_pass_decc_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decw_dfail_zero_comp_less_back_fail_repl_pass_incc_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_keep_dfail_wrap_comp_less_back_fail_incc_pass_decw_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_repl_dfail_decw_comp_never_back_fail_wrap_pass_keep_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_wrap_dfail_decc_comp_greater_or_equal_back_fail_keep_pass_repl_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_keep_dfail_inv_comp_greater_or_equal_back_fail_incc_pass_wrap_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_wrap_dfail_repl_comp_less_or_equal_back_fail_keep_pass_keep_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_wrap_dfail_wrap_comp_greater_back_fail_incc_pass_wrap_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_inv_dfail_incc_comp_less_back_fail_keep_pass_wrap_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decw_dfail_keep_comp_greater_or_equal_back_fail_zero_pass_inv_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_inv_dfail_inv_comp_less_or_equal_back_fail_inv_pass_decw_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_wrap_dfail_decw_comp_less_back_fail_decc_pass_inv_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_repl_dfail_zero_comp_equal_back_fail_incc_pass_wrap_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_zero_dfail_wrap_comp_never_back_fail_decw_pass_repl_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_wrap_dfail_zero_comp_always_back_fail_decc_pass_zero_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decw_dfail_decw_comp_greater_or_equal_back_fail_incc_pass_wrap_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_keep_dfail_decw_comp_less_back_fail_decc_pass_decw_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_keep_dfail_repl_comp_greater_back_fail_incc_pass_keep_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_repl_dfail_zero_comp_always_back_fail_wrap_pass_keep_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_incc_dfail_zero_comp_always_back_fail_repl_pass_repl_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_inv_dfail_wrap_comp_less_or_equal_back_fail_decw_pass_incc_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_wrap_dfail_decc_comp_not_equal_back_fail_decc_pass_inv_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decw_dfail_decw_comp_greater_back_fail_zero_pass_wrap_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_wrap_dfail_repl_comp_never_back_fail_inv_pass_decw_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_repl_dfail_decc_comp_less_back_fail_repl_pass_wrap_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decw_dfail_zero_comp_greater_or_equal_back_fail_wrap_pass_repl_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_incc_dfail_decw_comp_not_equal_back_fail_keep_pass_decw_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decc_dfail_decw_comp_always_back_fail_repl_pass_incc_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decw_dfail_wrap_comp_not_equal_back_fail_decc_pass_decc_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_keep_dfail_wrap_comp_greater_or_equal_back_fail_decw_pass_decw_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decc_dfail_decc_comp_never_back_fail_wrap_pass_keep_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_keep_dfail_wrap_comp_greater_or_equal_back_fail_zero_pass_decc_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_inv_dfail_incc_comp_always_back_fail_incc_pass_keep_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decw_dfail_decw_comp_less_back_fail_inv_pass_inv_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_inv_dfail_wrap_comp_not_equal_back_fail_keep_pass_decw_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_keep_dfail_inv_comp_always_back_fail_decc_pass_inv_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_inv_dfail_wrap_comp_never_back_fail_keep_pass_keep_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_repl_dfail_repl_comp_never_back_fail_wrap_pass_inv_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_repl_dfail_decw_comp_greater_back_fail_zero_pass_repl_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_wrap_dfail_decc_comp_not_equal_back_fail_inv_pass_repl_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_keep_dfail_inv_comp_less_back_fail_keep_pass_wrap_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decw_dfail_repl_comp_less_back_fail_wrap_pass_keep_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_inv_dfail_wrap_comp_always_back_fail_keep_pass_decw_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_zero_dfail_incc_comp_not_equal_back_fail_inv_pass_inv_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_wrap_dfail_incc_comp_not_equal_back_fail_repl_pass_zero_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_incc_dfail_zero_comp_equal_back_fail_decw_pass_wrap_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_keep_dfail_decw_comp_not_equal_back_fail_wrap_pass_incc_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_repl_dfail_incc_comp_greater_or_equal_back_fail_incc_pass_keep_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decw_dfail_decc_comp_less_back_fail_inv_pass_repl_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_inv_dfail_decc_comp_never_back_fail_zero_pass_decw_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_repl_dfail_decc_comp_greater_back_fail_decw_pass_inv_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_repl_dfail_incc_comp_less_or_equal_back_fail_zero_pass_repl_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_repl_dfail_decw_comp_less_or_equal_back_fail_decw_pass_repl_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_zero_dfail_repl_comp_greater_back_fail_incc_pass_repl_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_inv_dfail_decc_comp_greater_back_fail_decc_pass_zero_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_zero_dfail_decc_comp_equal_back_fail_wrap_pass_inv_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decc_dfail_zero_comp_not_equal_back_fail_inv_pass_zero_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_wrap_dfail_incc_comp_equal_back_fail_inv_pass_decc_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_wrap_dfail_zero_comp_less_back_fail_keep_pass_wrap_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_wrap_dfail_inv_comp_greater_back_fail_inv_pass_wrap_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_wrap_dfail_decw_comp_not_equal_back_fail_decc_pass_wrap_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_zero_dfail_inv_comp_less_back_fail_zero_pass_wrap_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decc_dfail_keep_comp_never_back_fail_incc_pass_zero_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decc_dfail_decc_comp_less_back_fail_decc_pass_decc_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decw_dfail_zero_comp_greater_back_fail_decc_pass_decc_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decw_dfail_wrap_comp_always_back_fail_decc_pass_decw_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_wrap_dfail_decc_comp_not_equal_back_fail_wrap_pass_decw_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_repl_dfail_keep_comp_always_back_fail_decc_pass_wrap_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_zero_dfail_keep_comp_equal_back_fail_repl_pass_repl_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decc_dfail_decc_comp_less_or_equal_back_fail_decw_pass_zero_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_repl_dfail_zero_comp_less_or_equal_back_fail_repl_pass_decc_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_inv_dfail_decc_comp_equal_back_fail_zero_pass_repl_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decc_dfail_inv_comp_always_back_fail_decw_pass_inv_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_repl_dfail_inv_comp_greater_or_equal_back_fail_wrap_pass_decc_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_wrap_dfail_decw_comp_always_back_fail_decc_pass_repl_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_inv_dfail_decc_comp_always_back_fail_decc_pass_wrap_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_keep_dfail_decw_comp_less_or_equal_back_fail_decw_pass_inv_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_incc_dfail_zero_comp_greater_or_equal_back_fail_zero_pass_keep_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_wrap_dfail_incc_comp_less_back_fail_keep_pass_incc_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decc_dfail_incc_comp_never_back_fail_decw_pass_wrap_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decw_dfail_repl_comp_greater_or_equal_back_fail_keep_pass_decc_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_keep_dfail_decw_comp_less_or_equal_back_fail_repl_pass_decw_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_inv_dfail_repl_comp_not_equal_back_fail_wrap_pass_keep_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_inv_dfail_wrap_comp_less_or_equal_back_fail_decw_pass_inv_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_incc_dfail_incc_comp_not_equal_back_fail_wrap_pass_inv_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_zero_dfail_inv_comp_never_back_fail_zero_pass_incc_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_wrap_dfail_keep_comp_not_equal_back_fail_decc_pass_zero_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_keep_dfail_keep_comp_greater_back_fail_inv_pass_wrap_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_keep_dfail_repl_comp_greater_back_fail_decc_pass_keep_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decc_dfail_repl_comp_less_back_fail_decw_pass_keep_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_repl_dfail_repl_comp_always_back_fail_incc_pass_decc_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_incc_dfail_repl_comp_less_back_fail_zero_pass_repl_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_wrap_dfail_keep_comp_greater_or_equal_back_fail_keep_pass_incc_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decw_dfail_decc_comp_not_equal_back_fail_incc_pass_wrap_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_repl_dfail_inv_comp_greater_or_equal_back_fail_inv_pass_decw_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decc_dfail_incc_comp_less_back_fail_decw_pass_repl_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_incc_dfail_wrap_comp_always_back_fail_incc_pass_decc_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_keep_dfail_keep_comp_greater_back_fail_repl_pass_incc_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_repl_dfail_repl_comp_not_equal_back_fail_zero_pass_keep_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_zero_dfail_incc_comp_not_equal_back_fail_wrap_pass_repl_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decc_dfail_wrap_comp_never_back_fail_inv_pass_zero_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_zero_dfail_repl_comp_always_back_fail_wrap_pass_decc_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_zero_dfail_zero_comp_equal_back_fail_repl_pass_zero_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_incc_dfail_incc_comp_less_back_fail_decc_pass_zero_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decw_dfail_inv_comp_never_back_fail_decw_pass_incc_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_repl_dfail_zero_comp_never_back_fail_decc_pass_decw_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_inv_dfail_decc_comp_equal_back_fail_zero_pass_repl_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_zero_dfail_decc_comp_not_equal_back_fail_incc_pass_inv_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decc_dfail_repl_comp_not_equal_back_fail_zero_pass_zero_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_zero_dfail_decw_comp_greater_or_equal_back_fail_decc_pass_decc_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decw_dfail_inv_comp_equal_back_fail_decc_pass_zero_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decc_dfail_keep_comp_not_equal_back_fail_decw_pass_decw_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_keep_dfail_inv_comp_less_or_equal_back_fail_repl_pass_decc_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_incc_dfail_inv_comp_always_back_fail_keep_pass_keep_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_repl_dfail_decc_comp_always_back_fail_wrap_pass_incc_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_inv_dfail_repl_comp_equal_back_fail_keep_pass_repl_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decw_dfail_repl_comp_not_equal_back_fail_zero_pass_inv_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_repl_dfail_inv_comp_greater_back_fail_decw_pass_decw_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_zero_dfail_keep_comp_not_equal_back_fail_repl_pass_repl_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_repl_dfail_incc_comp_less_back_fail_repl_pass_zero_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_keep_dfail_wrap_comp_never_back_fail_inv_pass_repl_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_wrap_dfail_incc_comp_greater_or_equal_back_fail_decw_pass_keep_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_inv_dfail_zero_comp_less_back_fail_repl_pass_wrap_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_wrap_dfail_keep_comp_less_or_equal_back_fail_decw_pass_inv_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_repl_dfail_wrap_comp_always_back_fail_repl_pass_wrap_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decc_dfail_inv_comp_always_back_fail_repl_pass_repl_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decc_dfail_wrap_comp_less_back_fail_incc_pass_decc_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_keep_dfail_keep_comp_equal_back_fail_inv_pass_decc_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decw_dfail_incc_comp_less_back_fail_keep_pass_keep_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_incc_dfail_inv_comp_less_or_equal_back_fail_inv_pass_decw_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_inv_dfail_repl_comp_never_back_fail_wrap_pass_incc_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_keep_dfail_repl_comp_never_back_fail_repl_pass_inv_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_repl_dfail_decc_comp_less_back_fail_keep_pass_keep_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_repl_dfail_incc_comp_less_or_equal_back_fail_decc_pass_repl_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_wrap_dfail_zero_comp_less_or_equal_back_fail_zero_pass_repl_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_keep_dfail_decc_comp_always_back_fail_decw_pass_wrap_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decc_dfail_decc_comp_less_or_equal_back_fail_incc_pass_keep_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_inv_dfail_wrap_comp_less_or_equal_back_fail_wrap_pass_decc_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_zero_dfail_wrap_comp_not_equal_back_fail_repl_pass_inv_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decw_dfail_incc_comp_not_equal_back_fail_decc_pass_zero_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decw_dfail_repl_comp_less_back_fail_wrap_pass_decw_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decc_dfail_keep_comp_greater_back_fail_incc_pass_decw_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decw_dfail_zero_comp_greater_or_equal_back_fail_decc_pass_decc_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_repl_dfail_wrap_comp_greater_back_fail_incc_pass_decw_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_zero_dfail_decc_comp_greater_back_fail_inv_pass_repl_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_wrap_dfail_decc_comp_greater_or_equal_back_fail_wrap_pass_zero_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_zero_dfail_keep_comp_less_back_fail_decc_pass_wrap_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_zero_dfail_incc_comp_greater_or_equal_back_fail_decw_pass_zero_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_inv_dfail_decw_comp_always_back_fail_decc_pass_zero_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_zero_dfail_decc_comp_greater_or_equal_back_fail_incc_pass_inv_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_wrap_dfail_inv_comp_greater_or_equal_back_fail_incc_pass_zero_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_incc_dfail_zero_comp_greater_back_fail_inv_pass_wrap_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_wrap_dfail_wrap_comp_never_back_fail_decc_pass_incc_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_wrap_dfail_wrap_comp_greater_or_equal_back_fail_incc_pass_wrap_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_wrap_dfail_incc_comp_equal_back_fail_wrap_pass_wrap_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_inv_dfail_decc_comp_less_or_equal_back_fail_decw_pass_wrap_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_keep_dfail_zero_comp_always_back_fail_decw_pass_inv_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_inv_dfail_wrap_comp_equal_back_fail_repl_pass_keep_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decw_dfail_inv_comp_less_back_fail_repl_pass_inv_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_keep_dfail_repl_comp_equal_back_fail_decc_pass_decw_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_inv_dfail_incc_comp_less_back_fail_repl_pass_keep_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_incc_dfail_repl_comp_always_back_fail_decc_pass_inv_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_inv_dfail_decw_comp_always_back_fail_zero_pass_incc_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_zero_dfail_wrap_comp_less_or_equal_back_fail_decw_pass_inv_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decw_dfail_wrap_comp_less_or_equal_back_fail_wrap_pass_zero_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_inv_dfail_zero_comp_greater_or_equal_back_fail_wrap_pass_decw_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_incc_dfail_wrap_comp_not_equal_back_fail_repl_pass_inv_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_keep_dfail_wrap_comp_equal_back_fail_decw_pass_incc_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_inv_dfail_wrap_comp_less_back_fail_keep_pass_keep_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_wrap_dfail_repl_comp_less_or_equal_back_fail_keep_pass_inv_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_wrap_dfail_repl_comp_less_or_equal_back_fail_inv_pass_wrap_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decw_dfail_zero_comp_greater_back_fail_wrap_pass_wrap_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_keep_dfail_decw_comp_not_equal_back_fail_incc_pass_decw_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_inv_dfail_decw_comp_always_back_fail_decc_pass_keep_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_zero_dfail_inv_comp_equal_back_fail_decc_pass_inv_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_zero_dfail_decw_comp_less_or_equal_back_fail_keep_pass_zero_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_incc_dfail_repl_comp_always_back_fail_decc_pass_zero_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_inv_dfail_zero_comp_equal_back_fail_inv_pass_incc_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_repl_dfail_incc_comp_greater_back_fail_decc_pass_inv_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decc_dfail_decc_comp_always_back_fail_wrap_pass_repl_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_wrap_dfail_keep_comp_less_back_fail_decc_pass_decc_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_zero_dfail_inv_comp_less_back_fail_wrap_pass_wrap_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decc_dfail_incc_comp_greater_back_fail_repl_pass_zero_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_repl_dfail_wrap_comp_greater_or_equal_back_fail_incc_pass_decc_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decc_dfail_decw_comp_always_back_fail_zero_pass_repl_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decc_dfail_zero_comp_less_or_equal_back_fail_keep_pass_decc_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_repl_dfail_repl_comp_greater_or_equal_back_fail_decw_pass_decc_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_wrap_dfail_decw_comp_not_equal_back_fail_wrap_pass_repl_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_keep_dfail_wrap_comp_never_back_fail_decw_pass_wrap_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_zero_dfail_decw_comp_always_back_fail_decc_pass_keep_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_incc_dfail_decc_comp_always_back_fail_inv_pass_zero_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_inv_dfail_decc_comp_always_back_fail_keep_pass_incc_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_incc_dfail_decw_comp_less_back_fail_inv_pass_inv_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_wrap_dfail_repl_comp_greater_or_equal_back_fail_inv_pass_incc_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_wrap_dfail_decw_comp_greater_back_fail_zero_pass_wrap_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_incc_dfail_incc_comp_greater_or_equal_back_fail_incc_pass_wrap_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decw_dfail_wrap_comp_less_back_fail_decc_pass_incc_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_keep_dfail_keep_comp_never_back_fail_keep_pass_decw_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_repl_dfail_incc_comp_always_back_fail_repl_pass_keep_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decw_dfail_wrap_comp_equal_back_fail_incc_pass_repl_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_inv_dfail_inv_comp_not_equal_back_fail_decw_pass_decw_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_inv_dfail_inv_comp_less_back_fail_decw_pass_inv_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decw_dfail_decc_comp_not_equal_back_fail_zero_pass_inv_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_inv_dfail_inv_comp_greater_or_equal_back_fail_decw_pass_decw_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decc_dfail_decc_comp_greater_back_fail_decw_pass_inv_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_wrap_dfail_decw_comp_greater_back_fail_keep_pass_decc_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decw_dfail_incc_comp_greater_back_fail_zero_pass_wrap_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decw_dfail_wrap_comp_greater_back_fail_inv_pass_decw_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_repl_dfail_decc_comp_not_equal_back_fail_decc_pass_decw_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_keep_dfail_decw_comp_less_or_equal_back_fail_zero_pass_repl_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_inv_dfail_zero_comp_less_back_fail_decc_pass_keep_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_zero_dfail_wrap_comp_always_back_fail_inv_pass_inv_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_incc_dfail_keep_comp_never_back_fail_decw_pass_zero_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_wrap_dfail_incc_comp_never_back_fail_wrap_pass_incc_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_zero_dfail_repl_comp_less_or_equal_back_fail_wrap_pass_wrap_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_wrap_dfail_keep_comp_greater_back_fail_decw_pass_zero_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decc_dfail_decc_comp_greater_back_fail_incc_pass_wrap_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_keep_dfail_zero_comp_not_equal_back_fail_wrap_pass_decc_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decc_dfail_decc_comp_greater_back_fail_keep_pass_keep_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_incc_dfail_decw_comp_greater_back_fail_inv_pass_decc_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decc_dfail_keep_comp_greater_back_fail_incc_pass_incc_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_keep_dfail_wrap_comp_not_equal_back_fail_decw_pass_decc_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decw_dfail_decc_comp_greater_back_fail_wrap_pass_keep_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_keep_dfail_decc_comp_less_back_fail_decw_pass_decw_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decw_dfail_decc_comp_less_back_fail_incc_pass_keep_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decc_dfail_keep_comp_always_back_fail_decc_pass_decw_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_keep_dfail_zero_comp_always_back_fail_repl_pass_decc_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_wrap_dfail_zero_comp_less_or_equal_back_fail_decc_pass_keep_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_inv_dfail_wrap_comp_greater_or_equal_back_fail_decc_pass_wrap_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_incc_dfail_repl_comp_not_equal_back_fail_decw_pass_inv_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decc_dfail_wrap_comp_never_back_fail_wrap_pass_incc_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_zero_dfail_decw_comp_never_back_fail_incc_pass_decc_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_wrap_dfail_keep_comp_never_back_fail_inv_pass_zero_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decw_dfail_decc_comp_never_back_fail_repl_pass_wrap_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_repl_dfail_repl_comp_not_equal_back_fail_wrap_pass_decw_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decc_dfail_decc_comp_equal_back_fail_keep_pass_repl_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_wrap_dfail_decw_comp_never_back_fail_decw_pass_decc_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_wrap_dfail_incc_comp_less_or_equal_back_fail_keep_pass_wrap_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decw_dfail_keep_comp_greater_or_equal_back_fail_inv_pass_wrap_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_repl_dfail_decw_comp_always_back_fail_repl_pass_decw_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_inv_dfail_repl_comp_less_back_fail_keep_pass_repl_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_wrap_dfail_keep_comp_always_back_fail_inv_pass_inv_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decw_dfail_incc_comp_always_back_fail_keep_pass_wrap_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_keep_dfail_decc_comp_less_or_equal_back_fail_repl_pass_decw_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_keep_dfail_zero_comp_greater_or_equal_back_fail_incc_pass_keep_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_wrap_dfail_wrap_comp_never_back_fail_wrap_pass_keep_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decc_dfail_repl_comp_not_equal_back_fail_zero_pass_wrap_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_keep_dfail_keep_comp_less_back_fail_repl_pass_decc_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_keep_dfail_decc_comp_greater_or_equal_back_fail_decc_pass_keep_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_inv_dfail_keep_comp_equal_back_fail_zero_pass_keep_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_zero_dfail_decc_comp_always_back_fail_zero_pass_inv_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_wrap_dfail_incc_comp_less_back_fail_decw_pass_zero_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_wrap_dfail_zero_comp_less_back_fail_incc_pass_wrap_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decc_dfail_decc_comp_less_or_equal_back_fail_wrap_pass_wrap_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_zero_dfail_decw_comp_equal_back_fail_zero_pass_decc_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_wrap_dfail_keep_comp_equal_back_fail_decc_pass_zero_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decc_dfail_decw_comp_less_or_equal_back_fail_inv_pass_wrap_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decw_dfail_repl_comp_greater_back_fail_decw_pass_decc_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_keep_dfail_inv_comp_greater_or_equal_back_fail_keep_pass_decw_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decw_dfail_incc_comp_always_back_fail_repl_pass_keep_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_zero_dfail_wrap_comp_always_back_fail_wrap_pass_decw_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_repl_dfail_zero_comp_equal_back_fail_decc_pass_zero_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_incc_dfail_decw_comp_never_back_fail_wrap_pass_repl_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_zero_dfail_decc_comp_greater_back_fail_inv_pass_incc_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_repl_dfail_decc_comp_always_back_fail_keep_pass_zero_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_incc_dfail_zero_comp_not_equal_back_fail_incc_pass_repl_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_wrap_dfail_repl_comp_less_back_fail_incc_pass_incc_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_zero_dfail_repl_comp_greater_back_fail_wrap_pass_wrap_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decw_dfail_wrap_comp_less_back_fail_decw_pass_zero_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decc_dfail_inv_comp_greater_back_fail_decc_pass_decw_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_keep_dfail_decc_comp_greater_or_equal_back_fail_wrap_pass_decc_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_repl_dfail_repl_comp_greater_back_fail_wrap_pass_keep_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_wrap_dfail_decw_comp_less_or_equal_back_fail_incc_pass_repl_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decw_dfail_decw_comp_always_back_fail_decw_pass_wrap_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_repl_dfail_incc_comp_equal_back_fail_inv_pass_decw_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_keep_dfail_decw_comp_greater_back_fail_inv_pass_repl_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_repl_dfail_zero_comp_never_back_fail_zero_pass_keep_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_wrap_dfail_keep_comp_less_back_fail_decw_pass_repl_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_inv_dfail_keep_comp_greater_back_fail_repl_pass_wrap_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_zero_dfail_repl_comp_equal_back_fail_decw_pass_inv_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decc_dfail_incc_comp_greater_back_fail_wrap_pass_zero_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_inv_dfail_decw_comp_greater_back_fail_decc_pass_decc_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_inv_dfail_wrap_comp_greater_back_fail_inv_pass_inv_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decc_dfail_wrap_comp_not_equal_back_fail_zero_pass_inv_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_wrap_dfail_zero_comp_not_equal_back_fail_keep_pass_decc_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_inv_dfail_decw_comp_not_equal_back_fail_decw_pass_wrap_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_inv_dfail_inv_comp_equal_back_fail_keep_pass_inv_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_incc_dfail_wrap_comp_equal_back_fail_keep_pass_inv_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_inv_dfail_incc_comp_always_back_fail_zero_pass_incc_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_repl_dfail_decc_comp_never_back_fail_zero_pass_inv_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_wrap_dfail_inv_comp_greater_or_equal_back_fail_inv_pass_repl_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_wrap_dfail_repl_comp_always_back_fail_incc_pass_wrap_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_repl_dfail_wrap_comp_greater_back_fail_decw_pass_wrap_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_repl_dfail_decw_comp_equal_back_fail_decc_pass_repl_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_keep_dfail_zero_comp_greater_or_equal_back_fail_zero_pass_repl_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decw_dfail_zero_comp_greater_back_fail_decw_pass_keep_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_zero_dfail_keep_comp_less_back_fail_keep_pass_decw_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_keep_dfail_decc_comp_greater_or_equal_back_fail_repl_pass_zero_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_keep_dfail_keep_comp_equal_back_fail_incc_pass_keep_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_zero_dfail_decw_comp_never_back_fail_zero_pass_keep_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_wrap_dfail_inv_comp_less_back_fail_repl_pass_zero_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decc_dfail_repl_comp_always_back_fail_keep_pass_wrap_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decc_dfail_inv_comp_less_back_fail_inv_pass_decc_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decw_dfail_decc_comp_always_back_fail_keep_pass_decc_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_incc_dfail_decc_comp_less_or_equal_back_fail_repl_pass_decw_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_inv_dfail_keep_comp_always_back_fail_decc_pass_incc_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_zero_dfail_decw_comp_greater_or_equal_back_fail_decc_pass_inv_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_zero_dfail_decw_comp_less_back_fail_decw_pass_zero_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_zero_dfail_wrap_comp_equal_back_fail_incc_pass_zero_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_inv_dfail_inv_comp_greater_or_equal_back_fail_keep_pass_zero_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decw_dfail_repl_comp_less_or_equal_back_fail_repl_pass_inv_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decc_dfail_wrap_comp_less_back_fail_zero_pass_decw_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_wrap_dfail_inv_comp_less_back_fail_zero_pass_decc_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_zero_dfail_wrap_comp_less_or_equal_back_fail_zero_pass_wrap_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_inv_dfail_decc_comp_never_back_fail_zero_pass_zero_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_zero_dfail_keep_comp_less_or_equal_back_fail_incc_pass_inv_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decc_dfail_keep_comp_always_back_fail_zero_pass_zero_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_zero_dfail_keep_comp_equal_back_fail_zero_pass_decc_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_incc_dfail_wrap_comp_less_or_equal_back_fail_repl_pass_zero_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_incc_dfail_decw_comp_equal_back_fail_decc_pass_incc_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_inv_dfail_keep_comp_never_back_fail_inv_pass_incc_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_incc_dfail_repl_comp_greater_back_fail_keep_pass_inv_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decc_dfail_inv_comp_greater_back_fail_incc_pass_incc_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_wrap_dfail_decw_comp_not_equal_back_fail_repl_pass_decc_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_keep_dfail_keep_comp_greater_or_equal_back_fail_incc_pass_wrap_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decw_dfail_decw_comp_never_back_fail_decw_pass_keep_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decc_dfail_zero_comp_less_back_fail_decw_pass_decw_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_repl_dfail_keep_comp_equal_back_fail_inv_pass_decc_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decw_dfail_inv_comp_not_equal_back_fail_wrap_pass_repl_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_zero_dfail_repl_comp_equal_back_fail_inv_pass_decw_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_keep_dfail_decw_comp_greater_or_equal_back_fail_inv_pass_zero_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decw_dfail_inv_comp_not_equal_back_fail_decc_pass_keep_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decc_dfail_decc_comp_equal_back_fail_keep_pass_decw_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decw_dfail_incc_comp_never_back_fail_wrap_pass_decc_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_inv_dfail_keep_comp_less_or_equal_back_fail_keep_pass_decw_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_repl_dfail_repl_comp_less_or_equal_back_fail_wrap_pass_inv_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_incc_dfail_repl_comp_greater_back_fail_wrap_pass_repl_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_inv_dfail_wrap_comp_equal_back_fail_wrap_pass_incc_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_wrap_dfail_repl_comp_less_back_fail_decw_pass_inv_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_incc_dfail_inv_comp_equal_back_fail_incc_pass_wrap_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decw_dfail_wrap_comp_greater_or_equal_back_fail_decc_pass_incc_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_inv_dfail_wrap_comp_greater_back_fail_keep_pass_decw_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_keep_dfail_decc_comp_less_back_fail_decc_pass_inv_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_inv_dfail_wrap_comp_equal_back_fail_repl_pass_keep_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_incc_dfail_keep_comp_greater_or_equal_back_fail_inv_pass_inv_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_wrap_dfail_keep_comp_always_back_fail_decw_pass_incc_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_inv_dfail_zero_comp_never_back_fail_zero_pass_wrap_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_keep_dfail_wrap_comp_greater_back_fail_zero_pass_inv_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_wrap_dfail_decw_comp_greater_or_equal_back_fail_repl_pass_keep_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_zero_dfail_inv_comp_greater_or_equal_back_fail_inv_pass_wrap_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_wrap_dfail_decc_comp_less_or_equal_back_fail_decc_pass_zero_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_keep_dfail_decw_comp_less_back_fail_incc_pass_wrap_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_inv_dfail_repl_comp_greater_or_equal_back_fail_zero_pass_keep_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decc_dfail_inv_comp_equal_back_fail_wrap_pass_inv_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_incc_dfail_wrap_comp_equal_back_fail_keep_pass_decc_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decw_dfail_decw_comp_greater_or_equal_back_fail_incc_pass_incc_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_wrap_dfail_incc_comp_not_equal_back_fail_keep_pass_decw_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_wrap_dfail_decc_comp_not_equal_back_fail_decc_pass_wrap_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decc_dfail_keep_comp_not_equal_back_fail_inv_pass_wrap_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_wrap_dfail_wrap_comp_always_back_fail_zero_pass_decc_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_zero_dfail_wrap_comp_less_or_equal_back_fail_inv_pass_wrap_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_keep_dfail_wrap_comp_less_or_equal_back_fail_decw_pass_zero_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_repl_dfail_zero_comp_greater_back_fail_wrap_pass_keep_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_wrap_dfail_incc_comp_greater_or_equal_back_fail_inv_pass_repl_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_inv_dfail_incc_comp_less_back_fail_incc_pass_wrap_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_incc_dfail_wrap_comp_less_back_fail_keep_pass_inv_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decw_dfail_decc_comp_greater_back_fail_zero_pass_incc_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_inv_dfail_keep_comp_greater_back_fail_repl_pass_decw_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_repl_dfail_decw_comp_less_back_fail_repl_pass_inv_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_keep_dfail_decc_comp_always_back_fail_inv_pass_repl_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_repl_dfail_zero_comp_less_or_equal_back_fail_decw_pass_keep_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_keep_dfail_keep_comp_less_or_equal_back_fail_wrap_pass_repl_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_inv_dfail_incc_comp_equal_back_fail_repl_pass_keep_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_repl_dfail_wrap_comp_equal_back_fail_wrap_pass_inv_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_wrap_dfail_zero_comp_less_or_equal_back_fail_keep_pass_repl_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decw_dfail_decc_comp_equal_back_fail_incc_pass_wrap_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decc_dfail_zero_comp_equal_back_fail_zero_pass_decw_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_zero_dfail_decc_comp_less_or_equal_back_fail_decw_pass_decc_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_inv_dfail_incc_comp_not_equal_back_fail_repl_pass_zero_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_wrap_dfail_decc_comp_always_back_fail_keep_pass_inv_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_repl_dfail_inv_comp_equal_back_fail_keep_pass_wrap_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_repl_dfail_wrap_comp_always_back_fail_inv_pass_repl_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decc_dfail_zero_comp_not_equal_back_fail_decc_pass_repl_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_incc_dfail_repl_comp_equal_back_fail_decw_pass_decc_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_repl_dfail_repl_comp_greater_or_equal_back_fail_inv_pass_incc_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decw_dfail_decw_comp_less_or_equal_back_fail_keep_pass_repl_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_repl_dfail_decw_comp_always_back_fail_incc_pass_decw_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_keep_dfail_repl_comp_greater_back_fail_incc_pass_repl_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_repl_dfail_wrap_comp_less_back_fail_keep_pass_keep_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decc_dfail_wrap_comp_not_equal_back_fail_inv_pass_repl_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_inv_dfail_wrap_comp_never_back_fail_repl_pass_decc_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_inv_dfail_keep_comp_less_back_fail_decw_pass_inv_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_keep_dfail_decw_comp_never_back_fail_wrap_pass_inv_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decc_dfail_decw_comp_greater_back_fail_decw_pass_keep_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_wrap_dfail_inv_comp_not_equal_back_fail_repl_pass_decc_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_wrap_dfail_decw_comp_less_back_fail_repl_pass_wrap_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_incc_dfail_inv_comp_greater_back_fail_wrap_pass_wrap_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_zero_dfail_repl_comp_less_or_equal_back_fail_repl_pass_incc_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_keep_dfail_wrap_comp_not_equal_back_fail_wrap_pass_zero_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_repl_dfail_inv_comp_less_back_fail_decc_pass_keep_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_zero_dfail_decc_comp_greater_back_fail_decc_pass_repl_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_inv_dfail_repl_comp_greater_or_equal_back_fail_repl_pass_zero_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decc_dfail_zero_comp_greater_back_fail_repl_pass_inv_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_wrap_dfail_zero_comp_never_back_fail_zero_pass_decc_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_repl_dfail_decc_comp_less_or_equal_back_fail_inv_pass_wrap_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decw_dfail_keep_comp_less_or_equal_back_fail_decc_pass_repl_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decc_dfail_wrap_comp_less_or_equal_back_fail_inv_pass_decw_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_keep_dfail_inv_comp_greater_or_equal_back_fail_inv_pass_decc_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_incc_dfail_wrap_comp_less_or_equal_back_fail_decc_pass_keep_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_zero_dfail_zero_comp_less_back_fail_wrap_pass_incc_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decc_dfail_inv_comp_not_equal_back_fail_keep_pass_zero_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_repl_dfail_repl_comp_always_back_fail_incc_pass_decc_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_zero_dfail_decc_comp_greater_or_equal_back_fail_inv_pass_repl_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decw_dfail_zero_comp_greater_or_equal_back_fail_zero_pass_zero_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decw_dfail_repl_comp_less_back_fail_wrap_pass_decw_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decw_dfail_incc_comp_greater_back_fail_repl_pass_decw_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_repl_dfail_wrap_comp_not_equal_back_fail_repl_pass_decw_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_keep_dfail_zero_comp_less_back_fail_decw_pass_repl_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decw_dfail_inv_comp_less_back_fail_wrap_pass_keep_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_inv_dfail_zero_comp_not_equal_back_fail_wrap_pass_decw_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_repl_dfail_wrap_comp_always_back_fail_wrap_pass_inv_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_wrap_dfail_repl_comp_less_back_fail_decw_pass_repl_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decc_dfail_wrap_comp_less_or_equal_back_fail_keep_pass_wrap_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decc_dfail_repl_comp_less_back_fail_wrap_pass_decc_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_inv_dfail_zero_comp_always_back_fail_wrap_pass_decc_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_inv_dfail_decc_comp_less_or_equal_back_fail_wrap_pass_inv_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decc_dfail_keep_comp_equal_back_fail_decc_pass_inv_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_incc_dfail_zero_comp_less_or_equal_back_fail_decw_pass_decc_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decc_dfail_repl_comp_never_back_fail_wrap_pass_incc_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_inv_dfail_inv_comp_greater_or_equal_back_fail_wrap_pass_decc_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_keep_dfail_decw_comp_never_back_fail_keep_pass_inv_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_repl_dfail_decw_comp_greater_or_equal_back_fail_incc_pass_keep_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_wrap_dfail_inv_comp_greater_back_fail_incc_pass_repl_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decc_dfail_keep_comp_equal_back_fail_zero_pass_wrap_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_wrap_dfail_incc_comp_not_equal_back_fail_incc_pass_decc_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_repl_dfail_decw_comp_equal_back_fail_keep_pass_wrap_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_wrap_dfail_wrap_comp_less_or_equal_back_fail_incc_pass_repl_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_repl_dfail_keep_comp_less_back_fail_zero_pass_wrap_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_inv_dfail_inv_comp_greater_or_equal_back_fail_repl_pass_repl_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_repl_dfail_zero_comp_not_equal_back_fail_inv_pass_inv_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_inv_dfail_zero_comp_less_back_fail_inv_pass_repl_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_incc_dfail_decw_comp_equal_back_fail_zero_pass_inv_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_wrap_dfail_inv_comp_less_or_equal_back_fail_decw_pass_incc_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_wrap_dfail_repl_comp_greater_or_equal_back_fail_repl_pass_wrap_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_incc_dfail_wrap_comp_greater_or_equal_back_fail_decw_pass_wrap_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_inv_dfail_inv_comp_less_back_fail_decc_pass_incc_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_wrap_dfail_decw_comp_not_equal_back_fail_incc_pass_inv_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_incc_dfail_zero_comp_equal_back_fail_decc_pass_wrap_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_zero_dfail_incc_comp_not_equal_back_fail_repl_pass_incc_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_wrap_dfail_zero_comp_greater_or_equal_back_fail_keep_pass_zero_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_inv_dfail_wrap_comp_not_equal_back_fail_inv_pass_wrap_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_incc_dfail_incc_comp_always_back_fail_wrap_pass_inv_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_zero_dfail_decc_comp_equal_back_fail_inv_pass_incc_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_zero_dfail_keep_comp_not_equal_back_fail_decc_pass_zero_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_repl_dfail_decw_comp_equal_back_fail_wrap_pass_zero_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_inv_dfail_decw_comp_always_back_fail_decc_pass_repl_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_inv_dfail_repl_comp_greater_back_fail_inv_pass_inv_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decw_dfail_zero_comp_less_back_fail_wrap_pass_inv_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_wrap_dfail_decw_comp_less_or_equal_back_fail_repl_pass_decw_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_incc_dfail_keep_comp_less_back_fail_decc_pass_wrap_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_inv_dfail_repl_comp_less_back_fail_incc_pass_incc_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decc_dfail_incc_comp_greater_or_equal_back_fail_decw_pass_inv_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_keep_dfail_repl_comp_less_or_equal_back_fail_incc_pass_decc_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decw_dfail_repl_comp_less_back_fail_repl_pass_keep_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_inv_dfail_keep_comp_always_back_fail_decw_pass_decw_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_zero_dfail_inv_comp_equal_back_fail_repl_pass_inv_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decw_dfail_zero_comp_not_equal_back_fail_zero_pass_zero_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_incc_dfail_wrap_comp_equal_back_fail_zero_pass_decw_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_zero_dfail_keep_comp_greater_or_equal_back_fail_inv_pass_incc_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_incc_dfail_repl_comp_equal_back_fail_inv_pass_zero_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_wrap_dfail_wrap_comp_greater_or_equal_back_fail_incc_pass_incc_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decc_dfail_incc_comp_greater_or_equal_back_fail_repl_pass_wrap_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_incc_dfail_wrap_comp_not_equal_back_fail_wrap_pass_decc_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_incc_dfail_incc_comp_always_back_fail_wrap_pass_incc_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_repl_dfail_wrap_comp_greater_back_fail_decw_pass_incc_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_repl_dfail_incc_comp_not_equal_back_fail_incc_pass_repl_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decc_dfail_keep_comp_less_back_fail_decc_pass_repl_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_repl_dfail_keep_comp_greater_or_equal_back_fail_wrap_pass_decc_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_inv_dfail_repl_comp_never_back_fail_incc_pass_repl_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_repl_dfail_inv_comp_less_back_fail_incc_pass_inv_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_incc_dfail_keep_comp_never_back_fail_decw_pass_repl_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decc_dfail_decc_comp_greater_back_fail_zero_pass_incc_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_repl_dfail_decc_comp_less_or_equal_back_fail_zero_pass_decc_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_repl_dfail_keep_comp_equal_back_fail_keep_pass_repl_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_keep_dfail_wrap_comp_always_back_fail_incc_pass_repl_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_repl_dfail_decc_comp_always_back_fail_wrap_pass_keep_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_wrap_dfail_repl_comp_greater_back_fail_decw_pass_repl_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_zero_dfail_inv_comp_less_or_equal_back_fail_repl_pass_wrap_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decc_dfail_incc_comp_not_equal_back_fail_keep_pass_zero_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_wrap_dfail_inv_comp_equal_back_fail_decw_pass_decc_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_zero_dfail_incc_comp_less_back_fail_keep_pass_wrap_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decw_dfail_repl_comp_greater_back_fail_incc_pass_zero_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_zero_dfail_repl_comp_greater_or_equal_back_fail_decw_pass_decw_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_zero_dfail_keep_comp_greater_or_equal_back_fail_zero_pass_zero_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_incc_dfail_inv_comp_never_back_fail_wrap_pass_zero_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_inv_dfail_decc_comp_not_equal_back_fail_decw_pass_incc_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_keep_dfail_decc_comp_greater_back_fail_decw_pass_inv_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decc_dfail_decw_comp_greater_back_fail_keep_pass_keep_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decw_dfail_decc_comp_greater_or_equal_back_fail_inv_pass_decc_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_keep_dfail_repl_comp_not_equal_back_fail_zero_pass_decw_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_wrap_dfail_incc_comp_less_back_fail_decw_pass_keep_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_keep_dfail_wrap_comp_not_equal_back_fail_wrap_pass_wrap_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decc_dfail_wrap_comp_never_back_fail_zero_pass_keep_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decc_dfail_keep_comp_not_equal_back_fail_decw_pass_decc_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_wrap_dfail_decw_comp_equal_back_fail_inv_pass_decc_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_zero_dfail_keep_comp_not_equal_back_fail_repl_pass_wrap_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_inv_dfail_decc_comp_equal_back_fail_decw_pass_zero_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decw_dfail_wrap_comp_always_back_fail_inv_pass_inv_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decw_dfail_keep_comp_less_or_equal_back_fail_repl_pass_decw_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_repl_dfail_inv_comp_equal_back_fail_decw_pass_decw_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_keep_dfail_decw_comp_always_back_fail_wrap_pass_repl_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_repl_dfail_incc_comp_equal_back_fail_decw_pass_keep_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_repl_dfail_repl_comp_greater_or_equal_back_fail_decc_pass_repl_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_repl_dfail_inv_comp_always_back_fail_inv_pass_repl_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_keep_dfail_zero_comp_less_or_equal_back_fail_incc_pass_repl_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_incc_dfail_zero_comp_greater_back_fail_keep_pass_keep_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_incc_dfail_decw_comp_always_back_fail_inv_pass_incc_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_keep_dfail_incc_comp_less_or_equal_back_fail_decw_pass_incc_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_wrap_dfail_inv_comp_less_or_equal_back_fail_decc_pass_keep_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_zero_dfail_repl_comp_less_back_fail_decw_pass_wrap_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decc_dfail_keep_comp_never_back_fail_inv_pass_zero_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_inv_dfail_zero_comp_greater_back_fail_wrap_pass_decc_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decc_dfail_repl_comp_greater_or_equal_back_fail_inv_pass_inv_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_inv_dfail_decw_comp_less_back_fail_keep_pass_decc_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_inv_dfail_inv_comp_not_equal_back_fail_decw_pass_inv_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_zero_dfail_zero_comp_less_back_fail_inv_pass_inv_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_zero_dfail_wrap_comp_not_equal_back_fail_repl_pass_zero_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_repl_dfail_inv_comp_equal_back_fail_zero_pass_zero_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_incc_dfail_decc_comp_never_back_fail_keep_pass_repl_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_repl_dfail_decc_comp_greater_back_fail_wrap_pass_incc_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decw_dfail_decc_comp_greater_or_equal_back_fail_decw_pass_repl_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_zero_dfail_repl_comp_equal_back_fail_inv_pass_decw_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_repl_dfail_inv_comp_never_back_fail_decc_pass_zero_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decc_dfail_incc_comp_equal_back_fail_incc_pass_repl_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_incc_dfail_incc_comp_greater_or_equal_back_fail_decc_pass_decc_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_inv_dfail_keep_comp_always_back_fail_incc_pass_incc_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_incc_dfail_incc_comp_less_back_fail_inv_pass_inv_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_repl_dfail_inv_comp_less_or_equal_back_fail_inv_pass_incc_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_inv_dfail_repl_comp_always_back_fail_zero_pass_repl_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_wrap_dfail_wrap_comp_greater_back_fail_incc_pass_inv_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_inv_dfail_zero_comp_less_or_equal_back_fail_incc_pass_wrap_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_wrap_dfail_inv_comp_greater_or_equal_back_fail_wrap_pass_inv_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_incc_dfail_decw_comp_less_back_fail_decc_pass_wrap_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_incc_dfail_decw_comp_equal_back_fail_wrap_pass_incc_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_keep_dfail_decw_comp_less_or_equal_back_fail_wrap_pass_incc_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_inv_dfail_repl_comp_greater_or_equal_back_fail_incc_pass_keep_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_zero_dfail_incc_comp_greater_or_equal_back_fail_keep_pass_inv_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_incc_dfail_wrap_comp_greater_back_fail_repl_pass_zero_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_repl_dfail_decc_comp_less_or_equal_back_fail_incc_pass_incc_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_repl_dfail_inv_comp_always_back_fail_incc_pass_repl_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_incc_dfail_inv_comp_less_back_fail_inv_pass_repl_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_repl_dfail_keep_comp_not_equal_back_fail_inv_pass_incc_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_repl_dfail_wrap_comp_never_back_fail_keep_pass_repl_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decw_dfail_keep_comp_never_back_fail_incc_pass_repl_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_zero_dfail_inv_comp_less_back_fail_incc_pass_decw_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_incc_dfail_inv_comp_less_or_equal_back_fail_decc_pass_zero_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_wrap_dfail_inv_comp_greater_back_fail_repl_pass_incc_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_repl_dfail_wrap_comp_equal_back_fail_repl_pass_wrap_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decc_dfail_decc_comp_always_back_fail_incc_pass_repl_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_incc_dfail_keep_comp_less_back_fail_inv_pass_decc_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_incc_dfail_decw_comp_not_equal_back_fail_decc_pass_incc_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_incc_dfail_wrap_comp_never_back_fail_decc_pass_incc_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_incc_dfail_decw_comp_greater_or_equal_back_fail_incc_pass_incc_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_keep_dfail_decw_comp_greater_back_fail_repl_pass_incc_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_incc_dfail_decc_comp_equal_back_fail_inv_pass_keep_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_wrap_dfail_keep_comp_not_equal_back_fail_zero_pass_incc_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_repl_dfail_keep_comp_equal_back_fail_repl_pass_wrap_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decw_dfail_keep_comp_never_back_fail_inv_pass_repl_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_keep_dfail_inv_comp_less_back_fail_decw_pass_decw_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_inv_dfail_repl_comp_less_or_equal_back_fail_decw_pass_keep_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decc_dfail_zero_comp_greater_or_equal_back_fail_decc_pass_inv_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_incc_dfail_inv_comp_not_equal_back_fail_repl_pass_decc_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_repl_dfail_incc_comp_greater_back_fail_repl_pass_incc_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_incc_dfail_decc_comp_greater_or_equal_back_fail_zero_pass_repl_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_wrap_dfail_inv_comp_always_back_fail_keep_pass_incc_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_incc_dfail_wrap_comp_greater_or_equal_back_fail_wrap_pass_wrap_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decc_dfail_incc_comp_always_back_fail_repl_pass_incc_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decc_dfail_zero_comp_less_back_fail_inv_pass_decc_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decc_dfail_wrap_comp_always_back_fail_decc_pass_decc_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_zero_dfail_incc_comp_never_back_fail_keep_pass_decc_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_repl_dfail_incc_comp_equal_back_fail_keep_pass_zero_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_inv_dfail_decc_comp_equal_back_fail_keep_pass_repl_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_zero_dfail_incc_comp_never_back_fail_decc_pass_inv_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_wrap_dfail_decc_comp_never_back_fail_decw_pass_zero_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_inv_dfail_wrap_comp_never_back_fail_decw_pass_wrap_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decc_dfail_zero_comp_not_equal_back_fail_repl_pass_inv_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_wrap_dfail_decc_comp_greater_back_fail_zero_pass_decc_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_repl_dfail_wrap_comp_less_back_fail_decc_pass_wrap_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_wrap_dfail_repl_comp_greater_back_fail_repl_pass_repl_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decw_dfail_incc_comp_always_back_fail_zero_pass_wrap_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_repl_dfail_repl_comp_greater_or_equal_back_fail_incc_pass_decw_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_repl_dfail_repl_comp_greater_back_fail_decc_pass_repl_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_incc_dfail_repl_comp_less_or_equal_back_fail_inv_pass_repl_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_keep_dfail_wrap_comp_always_back_fail_keep_pass_incc_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decc_dfail_decw_comp_greater_or_equal_back_fail_zero_pass_keep_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decw_dfail_keep_comp_greater_back_fail_repl_pass_decc_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decc_dfail_zero_comp_equal_back_fail_incc_pass_decw_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_zero_dfail_repl_comp_equal_back_fail_inv_pass_decc_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_repl_dfail_wrap_comp_greater_back_fail_repl_pass_zero_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decc_dfail_keep_comp_less_or_equal_back_fail_zero_pass_repl_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_repl_dfail_incc_comp_less_back_fail_repl_pass_decc_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_incc_dfail_decc_comp_less_back_fail_decc_pass_repl_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_incc_dfail_inv_comp_less_or_equal_back_fail_incc_pass_incc_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_incc_dfail_decc_comp_always_back_fail_zero_pass_incc_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_wrap_dfail_zero_comp_never_back_fail_decw_pass_incc_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decc_dfail_inv_comp_not_equal_back_fail_decc_pass_wrap_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_zero_dfail_inv_comp_less_back_fail_zero_pass_decc_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_wrap_dfail_keep_comp_greater_or_equal_back_fail_wrap_pass_zero_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_inv_dfail_keep_comp_less_or_equal_back_fail_decc_pass_wrap_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_wrap_dfail_keep_comp_never_back_fail_decc_pass_inv_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decc_dfail_wrap_comp_not_equal_back_fail_decc_pass_wrap_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decc_dfail_wrap_comp_always_back_fail_inv_pass_decc_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_repl_dfail_decw_comp_not_equal_back_fail_decc_pass_decc_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_incc_dfail_decc_comp_less_back_fail_decw_pass_repl_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_incc_dfail_repl_comp_never_back_fail_wrap_pass_incc_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decc_dfail_keep_comp_equal_back_fail_incc_pass_incc_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_wrap_dfail_decc_comp_greater_back_fail_zero_pass_decc_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_zero_dfail_inv_comp_less_or_equal_back_fail_incc_pass_wrap_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decw_dfail_incc_comp_greater_back_fail_zero_pass_zero_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_zero_dfail_incc_comp_less_back_fail_zero_pass_decw_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_keep_dfail_decc_comp_equal_back_fail_decc_pass_zero_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_keep_dfail_repl_comp_not_equal_back_fail_decc_pass_keep_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_repl_dfail_incc_comp_never_back_fail_incc_pass_keep_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decw_dfail_wrap_comp_always_back_fail_repl_pass_repl_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_repl_dfail_decw_comp_never_back_fail_decc_pass_decw_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_zero_dfail_zero_comp_not_equal_back_fail_decc_pass_repl_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decc_dfail_zero_comp_greater_back_fail_wrap_pass_zero_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_inv_dfail_inv_comp_always_back_fail_wrap_pass_decc_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decw_dfail_inv_comp_never_back_fail_decw_pass_inv_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_repl_dfail_decc_comp_greater_or_equal_back_fail_zero_pass_decw_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_keep_dfail_repl_comp_always_back_fail_decc_pass_repl_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_repl_dfail_inv_comp_greater_or_equal_back_fail_decc_pass_keep_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_incc_dfail_decw_comp_less_back_fail_inv_pass_repl_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_incc_dfail_wrap_comp_not_equal_back_fail_incc_pass_incc_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_incc_dfail_wrap_comp_not_equal_back_fail_repl_pass_incc_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_incc_dfail_wrap_comp_greater_or_equal_back_fail_incc_pass_incc_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_keep_dfail_inv_comp_always_back_fail_zero_pass_incc_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decw_dfail_decw_comp_equal_back_fail_decw_pass_keep_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_keep_dfail_zero_comp_equal_back_fail_repl_pass_decw_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decc_dfail_keep_comp_equal_back_fail_zero_pass_keep_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_zero_dfail_incc_comp_equal_back_fail_wrap_pass_decc_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decc_dfail_inv_comp_less_or_equal_back_fail_incc_pass_zero_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decc_dfail_keep_comp_greater_back_fail_keep_pass_decc_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_repl_dfail_decc_comp_never_back_fail_repl_pass_decc_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decw_dfail_keep_comp_less_back_fail_zero_pass_repl_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_wrap_dfail_incc_comp_less_or_equal_back_fail_decc_pass_decw_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_zero_dfail_keep_comp_greater_back_fail_repl_pass_wrap_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decc_dfail_decw_comp_greater_or_equal_back_fail_repl_pass_zero_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_inv_dfail_inv_comp_always_back_fail_incc_pass_decc_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_wrap_dfail_repl_comp_greater_or_equal_back_fail_repl_pass_inv_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_wrap_dfail_decw_comp_greater_or_equal_back_fail_keep_pass_wrap_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decc_dfail_wrap_comp_never_back_fail_incc_pass_wrap_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_wrap_dfail_zero_comp_equal_back_fail_decc_pass_decc_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_zero_dfail_decw_comp_equal_back_fail_inv_pass_wrap_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_incc_dfail_wrap_comp_less_or_equal_back_fail_decw_pass_zero_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decw_dfail_repl_comp_not_equal_back_fail_keep_pass_incc_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_incc_dfail_keep_comp_never_back_fail_inv_pass_decw_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_zero_dfail_incc_comp_less_or_equal_back_fail_keep_pass_incc_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_wrap_dfail_keep_comp_greater_back_fail_inv_pass_zero_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_wrap_dfail_decw_comp_never_back_fail_wrap_pass_wrap_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_zero_dfail_repl_comp_greater_or_equal_back_fail_decw_pass_wrap_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_wrap_dfail_inv_comp_always_back_fail_keep_pass_zero_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_zero_dfail_incc_comp_equal_back_fail_zero_pass_wrap_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_repl_dfail_incc_comp_less_or_equal_back_fail_keep_pass_zero_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decw_dfail_inv_comp_equal_back_fail_wrap_pass_repl_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_inv_dfail_wrap_comp_greater_or_equal_back_fail_incc_pass_decw_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_wrap_dfail_incc_comp_less_or_equal_back_fail_zero_pass_inv_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_keep_dfail_inv_comp_not_equal_back_fail_keep_pass_wrap_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_zero_dfail_decw_comp_greater_back_fail_keep_pass_keep_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_inv_dfail_zero_comp_less_or_equal_back_fail_wrap_pass_zero_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_zero_dfail_keep_comp_less_or_equal_back_fail_inv_pass_inv_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decw_dfail_incc_comp_greater_back_fail_decw_pass_zero_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_incc_dfail_decc_comp_never_back_fail_wrap_pass_decw_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_incc_dfail_keep_comp_not_equal_back_fail_repl_pass_incc_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_wrap_dfail_incc_comp_equal_back_fail_inv_pass_incc_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_zero_dfail_incc_comp_always_back_fail_inv_pass_wrap_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_inv_dfail_decw_comp_less_back_fail_decc_pass_zero_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_inv_dfail_decc_comp_less_back_fail_inv_pass_inv_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_wrap_dfail_keep_comp_greater_back_fail_zero_pass_inv_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decc_dfail_keep_comp_greater_or_equal_back_fail_keep_pass_wrap_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_inv_dfail_decw_comp_greater_back_fail_zero_pass_decc_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_keep_dfail_repl_comp_less_back_fail_decc_pass_inv_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_keep_dfail_decc_comp_greater_or_equal_back_fail_decc_pass_keep_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_inv_dfail_incc_comp_never_back_fail_keep_pass_keep_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_repl_dfail_decc_comp_greater_back_fail_inv_pass_inv_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decc_dfail_incc_comp_less_or_equal_back_fail_wrap_pass_repl_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decw_dfail_repl_comp_always_back_fail_incc_pass_decc_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_keep_dfail_decc_comp_always_back_fail_decc_pass_decw_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_keep_dfail_repl_comp_greater_or_equal_back_fail_wrap_pass_keep_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_inv_dfail_keep_comp_less_or_equal_back_fail_zero_pass_keep_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_repl_dfail_decw_comp_not_equal_back_fail_zero_pass_inv_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decc_dfail_decw_comp_equal_back_fail_incc_pass_repl_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_inv_dfail_decc_comp_greater_back_fail_repl_pass_decc_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_zero_dfail_incc_comp_always_back_fail_inv_pass_inv_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_inv_dfail_decw_comp_less_back_fail_keep_pass_zero_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_incc_dfail_zero_comp_not_equal_back_fail_incc_pass_inv_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decw_dfail_repl_comp_less_or_equal_back_fail_decc_pass_incc_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_wrap_dfail_wrap_comp_greater_back_fail_repl_pass_decw_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_inv_dfail_inv_comp_not_equal_back_fail_wrap_pass_wrap_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_keep_dfail_keep_comp_greater_back_fail_repl_pass_inv_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_wrap_dfail_decc_comp_equal_back_fail_keep_pass_keep_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_incc_dfail_keep_comp_not_equal_back_fail_repl_pass_wrap_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_keep_dfail_inv_comp_less_or_equal_back_fail_zero_pass_incc_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_incc_dfail_incc_comp_greater_or_equal_back_fail_zero_pass_keep_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decc_dfail_decw_comp_not_equal_back_fail_keep_pass_incc_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_keep_dfail_keep_comp_greater_back_fail_inv_pass_decc_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_incc_dfail_decc_comp_not_equal_back_fail_wrap_pass_keep_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_incc_dfail_inv_comp_greater_back_fail_decw_pass_incc_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decc_dfail_wrap_comp_greater_or_equal_back_fail_decc_pass_incc_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_keep_dfail_keep_comp_never_back_fail_repl_pass_decc_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_inv_dfail_repl_comp_greater_or_equal_back_fail_zero_pass_keep_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_zero_dfail_decw_comp_never_back_fail_inv_pass_inv_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decc_dfail_keep_comp_greater_or_equal_back_fail_wrap_pass_zero_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_keep_dfail_incc_comp_greater_back_fail_inv_pass_decc_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_wrap_dfail_incc_comp_less_back_fail_decc_pass_keep_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_keep_dfail_decw_comp_not_equal_back_fail_zero_pass_wrap_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_zero_dfail_wrap_comp_never_back_fail_wrap_pass_keep_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_incc_dfail_keep_comp_not_equal_back_fail_zero_pass_zero_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_repl_dfail_zero_comp_never_back_fail_decw_pass_incc_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_keep_dfail_zero_comp_always_back_fail_wrap_pass_repl_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_zero_dfail_inv_comp_greater_or_equal_back_fail_incc_pass_keep_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_repl_dfail_zero_comp_not_equal_back_fail_inv_pass_zero_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_zero_dfail_inv_comp_less_or_equal_back_fail_incc_pass_repl_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_repl_dfail_wrap_comp_not_equal_back_fail_wrap_pass_zero_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decc_dfail_decw_comp_less_back_fail_keep_pass_repl_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_incc_dfail_zero_comp_never_back_fail_keep_pass_decc_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decc_dfail_wrap_comp_less_or_equal_back_fail_decc_pass_incc_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_inv_dfail_repl_comp_less_or_equal_back_fail_decc_pass_decc_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decw_dfail_inv_comp_greater_or_equal_back_fail_inv_pass_inv_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_repl_dfail_zero_comp_greater_or_equal_back_fail_incc_pass_decw_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decc_dfail_zero_comp_always_back_fail_keep_pass_repl_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decc_dfail_zero_comp_equal_back_fail_keep_pass_decc_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_wrap_dfail_keep_comp_equal_back_fail_wrap_pass_decc_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_repl_dfail_inv_comp_less_back_fail_repl_pass_wrap_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_incc_dfail_incc_comp_less_or_equal_back_fail_zero_pass_repl_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_incc_dfail_repl_comp_not_equal_back_fail_decc_pass_incc_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_inv_dfail_decc_comp_greater_or_equal_back_fail_decw_pass_incc_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_repl_dfail_zero_comp_less_or_equal_back_fail_inv_pass_inv_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decw_dfail_keep_comp_less_or_equal_back_fail_decw_pass_repl_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_wrap_dfail_incc_comp_equal_back_fail_wrap_pass_decw_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_inv_dfail_incc_comp_equal_back_fail_repl_pass_wrap_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_incc_dfail_decc_comp_greater_or_equal_back_fail_keep_pass_inv_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_inv_dfail_inv_comp_less_or_equal_back_fail_zero_pass_incc_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decw_dfail_decw_comp_not_equal_back_fail_keep_pass_inv_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_inv_dfail_repl_comp_less_back_fail_decc_pass_decw_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_incc_dfail_zero_comp_less_or_equal_back_fail_keep_pass_inv_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_repl_dfail_keep_comp_less_or_equal_back_fail_keep_pass_incc_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decc_dfail_wrap_comp_equal_back_fail_zero_pass_repl_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_incc_dfail_decw_comp_always_back_fail_wrap_pass_decc_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_incc_dfail_wrap_comp_greater_or_equal_back_fail_zero_pass_incc_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_repl_dfail_inv_comp_never_back_fail_decw_pass_incc_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_zero_dfail_wrap_comp_less_back_fail_zero_pass_repl_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_inv_dfail_inv_comp_not_equal_back_fail_inv_pass_zero_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_incc_dfail_decc_comp_less_or_equal_back_fail_wrap_pass_inv_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_keep_dfail_keep_comp_equal_back_fail_incc_pass_incc_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_zero_dfail_repl_comp_not_equal_back_fail_inv_pass_keep_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_keep_dfail_incc_comp_less_or_equal_back_fail_incc_pass_zero_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_zero_dfail_wrap_comp_equal_back_fail_repl_pass_keep_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_inv_dfail_inv_comp_always_back_fail_incc_pass_zero_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_keep_dfail_zero_comp_less_or_equal_back_fail_decc_pass_inv_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_repl_dfail_inv_comp_less_back_fail_incc_pass_keep_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_keep_dfail_decc_comp_greater_back_fail_inv_pass_repl_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decw_dfail_keep_comp_greater_or_equal_back_fail_repl_pass_keep_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_keep_dfail_decw_comp_always_back_fail_decc_pass_decw_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_zero_dfail_decc_comp_less_back_fail_zero_pass_keep_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_zero_dfail_decc_comp_not_equal_back_fail_inv_pass_zero_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_incc_dfail_incc_comp_equal_back_fail_keep_pass_zero_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_inv_dfail_decc_comp_less_back_fail_incc_pass_incc_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_repl_dfail_keep_comp_always_back_fail_repl_pass_inv_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_inv_dfail_zero_comp_not_equal_back_fail_inv_pass_repl_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_inv_dfail_decw_comp_greater_back_fail_decc_pass_inv_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_inv_dfail_keep_comp_less_or_equal_back_fail_decw_pass_inv_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decc_dfail_inv_comp_equal_back_fail_inv_pass_inv_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_zero_dfail_decc_comp_never_back_fail_wrap_pass_decc_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_keep_dfail_zero_comp_equal_back_fail_zero_pass_zero_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decw_dfail_repl_comp_equal_back_fail_inv_pass_keep_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decw_dfail_keep_comp_not_equal_back_fail_decw_pass_decw_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_incc_dfail_wrap_comp_greater_or_equal_back_fail_decw_pass_decw_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_keep_dfail_decc_comp_equal_back_fail_inv_pass_incc_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_zero_dfail_decc_comp_not_equal_back_fail_repl_pass_keep_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decc_dfail_wrap_comp_never_back_fail_repl_pass_zero_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_wrap_dfail_incc_comp_equal_back_fail_keep_pass_decc_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_keep_dfail_inv_comp_less_or_equal_back_fail_incc_pass_wrap_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_inv_dfail_decc_comp_less_back_fail_decw_pass_keep_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_incc_dfail_keep_comp_equal_back_fail_decc_pass_inv_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_keep_dfail_zero_comp_never_back_fail_decw_pass_incc_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_zero_dfail_zero_comp_equal_back_fail_zero_pass_keep_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_keep_dfail_wrap_comp_always_back_fail_incc_pass_zero_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_keep_dfail_zero_comp_equal_back_fail_keep_pass_keep_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_keep_dfail_incc_comp_less_back_fail_wrap_pass_keep_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_inv_dfail_decc_comp_always_back_fail_decw_pass_keep_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_keep_dfail_decw_comp_greater_or_equal_back_fail_zero_pass_inv_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decc_dfail_decw_comp_never_back_fail_incc_pass_keep_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_keep_dfail_incc_comp_not_equal_back_fail_keep_pass_decc_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_inv_dfail_zero_comp_equal_back_fail_wrap_pass_keep_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_wrap_dfail_repl_comp_not_equal_back_fail_repl_pass_inv_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decw_dfail_inv_comp_less_or_equal_back_fail_incc_pass_wrap_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_zero_dfail_keep_comp_greater_back_fail_zero_pass_decw_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_zero_dfail_wrap_comp_less_or_equal_back_fail_keep_pass_zero_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decc_dfail_incc_comp_less_back_fail_repl_pass_zero_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_incc_dfail_repl_comp_less_or_equal_back_fail_zero_pass_decc_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_zero_dfail_decw_comp_never_back_fail_decw_pass_incc_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decc_dfail_decw_comp_less_or_equal_back_fail_incc_pass_zero_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_wrap_dfail_decw_comp_always_back_fail_repl_pass_decc_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decw_dfail_zero_comp_less_or_equal_back_fail_decw_pass_wrap_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_wrap_dfail_decc_comp_less_or_equal_back_fail_repl_pass_decw_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_wrap_dfail_repl_comp_not_equal_back_fail_keep_pass_wrap_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_wrap_dfail_repl_comp_less_back_fail_zero_pass_wrap_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decc_dfail_repl_comp_greater_back_fail_inv_pass_wrap_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_zero_dfail_repl_comp_always_back_fail_decw_pass_decc_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_repl_dfail_zero_comp_greater_back_fail_decc_pass_zero_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_zero_dfail_repl_comp_equal_back_fail_repl_pass_repl_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_wrap_dfail_repl_comp_always_back_fail_keep_pass_zero_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decw_dfail_inv_comp_less_back_fail_repl_pass_wrap_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decw_dfail_repl_comp_always_back_fail_zero_pass_decw_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_keep_dfail_zero_comp_greater_back_fail_decw_pass_decw_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_repl_dfail_incc_comp_always_back_fail_decw_pass_keep_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_incc_dfail_keep_comp_equal_back_fail_zero_pass_repl_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_inv_dfail_decw_comp_less_or_equal_back_fail_inv_pass_incc_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_keep_dfail_decc_comp_less_or_equal_back_fail_repl_pass_inv_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_incc_dfail_inv_comp_equal_back_fail_keep_pass_keep_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_keep_dfail_wrap_comp_less_back_fail_decw_pass_incc_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decw_dfail_decc_comp_greater_or_equal_back_fail_keep_pass_keep_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_zero_dfail_wrap_comp_equal_back_fail_incc_pass_decw_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_inv_dfail_decw_comp_greater_or_equal_back_fail_inv_pass_zero_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_inv_dfail_decw_comp_never_back_fail_keep_pass_inv_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decw_dfail_inv_comp_less_back_fail_repl_pass_inv_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_zero_dfail_inv_comp_greater_or_equal_back_fail_inv_pass_decw_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_zero_dfail_zero_comp_greater_back_fail_keep_pass_zero_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_zero_dfail_decw_comp_greater_or_equal_back_fail_zero_pass_zero_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_zero_dfail_decc_comp_greater_back_fail_inv_pass_zero_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_inv_dfail_inv_comp_less_back_fail_decc_pass_zero_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_wrap_dfail_decc_comp_greater_back_fail_keep_pass_inv_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_zero_dfail_keep_comp_equal_back_fail_decw_pass_wrap_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_keep_dfail_wrap_comp_equal_back_fail_incc_pass_zero_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_zero_dfail_keep_comp_less_or_equal_back_fail_decc_pass_keep_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decw_dfail_keep_comp_equal_back_fail_wrap_pass_zero_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_repl_dfail_wrap_comp_not_equal_back_fail_inv_pass_decw_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_inv_dfail_incc_comp_less_back_fail_inv_pass_repl_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_repl_dfail_wrap_comp_not_equal_back_fail_wrap_pass_inv_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_inv_dfail_zero_comp_less_back_fail_zero_pass_repl_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decw_dfail_inv_comp_greater_back_fail_incc_pass_inv_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_keep_dfail_incc_comp_never_back_fail_incc_pass_decw_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_zero_dfail_decc_comp_greater_or_equal_back_fail_repl_pass_keep_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decw_dfail_decc_comp_not_equal_back_fail_decw_pass_zero_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_repl_dfail_inv_comp_always_back_fail_incc_pass_decw_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_zero_dfail_repl_comp_greater_back_fail_wrap_pass_repl_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decc_dfail_repl_comp_greater_or_equal_back_fail_repl_pass_zero_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_zero_dfail_zero_comp_greater_or_equal_back_fail_wrap_pass_decc_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_zero_dfail_keep_comp_always_back_fail_repl_pass_zero_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_inv_dfail_decc_comp_greater_or_equal_back_fail_decw_pass_zero_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_wrap_dfail_repl_comp_greater_back_fail_wrap_pass_inv_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_inv_dfail_keep_comp_equal_back_fail_incc_pass_wrap_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_wrap_dfail_inv_comp_less_back_fail_keep_pass_inv_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decc_dfail_decc_comp_not_equal_back_fail_inv_pass_wrap_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_inv_dfail_decw_comp_less_or_equal_back_fail_inv_pass_decc_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decc_dfail_decc_comp_never_back_fail_decc_pass_inv_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_zero_dfail_inv_comp_not_equal_back_fail_wrap_pass_decc_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_wrap_dfail_decc_comp_not_equal_back_fail_decc_pass_zero_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decc_dfail_wrap_comp_less_back_fail_repl_pass_wrap_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_wrap_dfail_zero_comp_greater_back_fail_repl_pass_decc_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_wrap_dfail_wrap_comp_equal_back_fail_repl_pass_wrap_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_repl_dfail_inv_comp_always_back_fail_decc_pass_wrap_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decw_dfail_wrap_comp_less_back_fail_decw_pass_repl_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decw_dfail_keep_comp_greater_back_fail_zero_pass_decw_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decw_dfail_incc_comp_equal_back_fail_repl_pass_decw_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_zero_dfail_decc_comp_never_back_fail_repl_pass_decw_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_keep_dfail_zero_comp_never_back_fail_inv_pass_zero_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_incc_dfail_keep_comp_less_back_fail_decw_pass_keep_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_incc_dfail_zero_comp_not_equal_back_fail_keep_pass_incc_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_inv_dfail_decc_comp_greater_or_equal_back_fail_decw_pass_incc_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_wrap_dfail_zero_comp_always_back_fail_keep_pass_inv_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_keep_dfail_keep_comp_less_back_fail_decc_pass_wrap_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_zero_dfail_wrap_comp_equal_back_fail_wrap_pass_keep_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_keep_dfail_inv_comp_always_back_fail_repl_pass_zero_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_repl_dfail_zero_comp_less_back_fail_repl_pass_keep_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decw_dfail_zero_comp_never_back_fail_repl_pass_repl_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_inv_dfail_incc_comp_never_back_fail_incc_pass_decw_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decw_dfail_keep_comp_greater_or_equal_back_fail_keep_pass_inv_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_wrap_dfail_decw_comp_less_or_equal_back_fail_incc_pass_decw_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decc_dfail_decw_comp_not_equal_back_fail_wrap_pass_wrap_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_keep_dfail_repl_comp_not_equal_back_fail_decc_pass_decc_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_keep_dfail_zero_comp_always_back_fail_wrap_pass_keep_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_wrap_dfail_zero_comp_equal_back_fail_decw_pass_keep_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_inv_dfail_wrap_comp_equal_back_fail_keep_pass_wrap_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_keep_dfail_zero_comp_greater_back_fail_keep_pass_inv_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_keep_dfail_decc_comp_greater_back_fail_keep_pass_keep_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_repl_dfail_repl_comp_always_back_fail_decw_pass_keep_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_wrap_dfail_decw_comp_less_back_fail_keep_pass_repl_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_zero_dfail_keep_comp_always_back_fail_decc_pass_wrap_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_inv_dfail_keep_comp_less_back_fail_zero_pass_zero_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_wrap_dfail_repl_comp_never_back_fail_zero_pass_inv_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decc_dfail_decc_comp_always_back_fail_keep_pass_wrap_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_incc_dfail_zero_comp_less_back_fail_decw_pass_decc_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_incc_dfail_zero_comp_never_back_fail_incc_pass_incc_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_zero_dfail_wrap_comp_never_back_fail_incc_pass_incc_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decw_dfail_repl_comp_never_back_fail_decw_pass_zero_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_zero_dfail_keep_comp_always_back_fail_incc_pass_decw_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_incc_dfail_repl_comp_less_or_equal_back_fail_decc_pass_zero_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_keep_dfail_inv_comp_greater_or_equal_back_fail_wrap_pass_incc_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_wrap_dfail_incc_comp_always_back_fail_wrap_pass_keep_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decc_dfail_decc_comp_less_or_equal_back_fail_decw_pass_wrap_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_wrap_dfail_decw_comp_always_back_fail_inv_pass_decc_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decw_dfail_keep_comp_always_back_fail_inv_pass_wrap_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_repl_dfail_keep_comp_never_back_fail_zero_pass_decw_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decc_dfail_repl_comp_greater_back_fail_repl_pass_repl_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_zero_dfail_zero_comp_greater_back_fail_keep_pass_decc_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_inv_dfail_keep_comp_equal_back_fail_decc_pass_zero_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_inv_dfail_repl_comp_equal_back_fail_inv_pass_inv_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decc_dfail_decw_comp_less_or_equal_back_fail_decc_pass_inv_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_wrap_dfail_decw_comp_equal_back_fail_decc_pass_decc_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_zero_dfail_incc_comp_always_back_fail_keep_pass_wrap_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_keep_dfail_zero_comp_less_back_fail_zero_pass_zero_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_zero_dfail_decc_comp_equal_back_fail_decc_pass_keep_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_inv_dfail_decc_comp_greater_back_fail_keep_pass_zero_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decw_dfail_zero_comp_equal_back_fail_keep_pass_inv_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_keep_dfail_inv_comp_less_back_fail_inv_pass_decw_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decw_dfail_wrap_comp_greater_back_fail_keep_pass_keep_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_keep_dfail_incc_comp_equal_back_fail_repl_pass_decw_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_repl_dfail_keep_comp_greater_or_equal_back_fail_zero_pass_keep_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_zero_dfail_wrap_comp_never_back_fail_keep_pass_repl_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_incc_dfail_zero_comp_always_back_fail_inv_pass_zero_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_wrap_dfail_keep_comp_greater_or_equal_back_fail_inv_pass_incc_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decc_dfail_zero_comp_never_back_fail_wrap_pass_wrap_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_incc_dfail_zero_comp_greater_or_equal_back_fail_wrap_pass_decc_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_wrap_dfail_keep_comp_less_back_fail_zero_pass_incc_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_inv_dfail_keep_comp_not_equal_back_fail_decw_pass_wrap_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decc_dfail_incc_comp_greater_or_equal_back_fail_zero_pass_inv_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decc_dfail_decw_comp_not_equal_back_fail_keep_pass_decc_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_inv_dfail_incc_comp_greater_or_equal_back_fail_wrap_pass_decc_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decc_dfail_decw_comp_not_equal_back_fail_inv_pass_inv_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decw_dfail_incc_comp_greater_back_fail_repl_pass_decc_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_incc_dfail_inv_comp_less_back_fail_keep_pass_decw_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_wrap_dfail_zero_comp_less_back_fail_zero_pass_incc_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_inv_dfail_zero_comp_less_or_equal_back_fail_repl_pass_wrap_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_zero_dfail_decw_comp_not_equal_back_fail_decw_pass_inv_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decc_dfail_wrap_comp_greater_or_equal_back_fail_incc_pass_zero_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_zero_dfail_decw_comp_always_back_fail_zero_pass_decc_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_inv_dfail_keep_comp_less_back_fail_decc_pass_zero_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_inv_dfail_decc_comp_not_equal_back_fail_keep_pass_inv_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decc_dfail_repl_comp_less_or_equal_back_fail_inv_pass_inv_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_keep_dfail_inv_comp_always_back_fail_keep_pass_decc_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decc_dfail_inv_comp_never_back_fail_incc_pass_keep_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_incc_dfail_repl_comp_equal_back_fail_inv_pass_decc_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_zero_dfail_inv_comp_always_back_fail_decw_pass_incc_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_wrap_dfail_zero_comp_less_or_equal_back_fail_incc_pass_zero_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_repl_dfail_incc_comp_less_back_fail_repl_pass_wrap_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_inv_dfail_decw_comp_less_back_fail_repl_pass_repl_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_keep_dfail_keep_comp_less_or_equal_back_fail_zero_pass_inv_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_wrap_dfail_incc_comp_greater_back_fail_zero_pass_keep_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decw_dfail_decw_comp_less_or_equal_back_fail_zero_pass_wrap_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_inv_dfail_keep_comp_never_back_fail_repl_pass_decw_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_repl_dfail_repl_comp_less_back_fail_incc_pass_inv_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decw_dfail_zero_comp_less_or_equal_back_fail_zero_pass_repl_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_inv_dfail_wrap_comp_always_back_fail_decw_pass_decw_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_inv_dfail_incc_comp_always_back_fail_decc_pass_inv_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_incc_dfail_incc_comp_always_back_fail_incc_pass_inv_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_zero_dfail_incc_comp_less_back_fail_decc_pass_incc_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_wrap_dfail_keep_comp_not_equal_back_fail_keep_pass_zero_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_wrap_dfail_repl_comp_not_equal_back_fail_keep_pass_wrap_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decw_dfail_decw_comp_less_back_fail_wrap_pass_wrap_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_zero_dfail_repl_comp_never_back_fail_incc_pass_decw_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_zero_dfail_keep_comp_always_back_fail_zero_pass_zero_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_wrap_dfail_decw_comp_equal_back_fail_inv_pass_zero_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_repl_dfail_decw_comp_greater_back_fail_decw_pass_wrap_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_repl_dfail_decc_comp_greater_or_equal_back_fail_incc_pass_repl_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_zero_dfail_repl_comp_never_back_fail_keep_pass_repl_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_repl_dfail_incc_comp_equal_back_fail_incc_pass_zero_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_repl_dfail_decc_comp_greater_back_fail_incc_pass_repl_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decw_dfail_decc_comp_greater_or_equal_back_fail_keep_pass_repl_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decw_dfail_inv_comp_greater_back_fail_keep_pass_decw_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_incc_dfail_repl_comp_never_back_fail_decc_pass_decw_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_inv_dfail_wrap_comp_equal_back_fail_repl_pass_incc_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_keep_dfail_incc_comp_never_back_fail_decc_pass_inv_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_inv_dfail_incc_comp_not_equal_back_fail_wrap_pass_keep_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_zero_dfail_incc_comp_less_or_equal_back_fail_decw_pass_inv_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_wrap_dfail_incc_comp_not_equal_back_fail_keep_pass_zero_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_repl_dfail_repl_comp_never_back_fail_wrap_pass_wrap_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_inv_dfail_inv_comp_equal_back_fail_inv_pass_repl_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decc_dfail_incc_comp_equal_back_fail_repl_pass_inv_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_incc_dfail_decw_comp_always_back_fail_inv_pass_decc_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decc_dfail_repl_comp_less_or_equal_back_fail_wrap_pass_incc_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_repl_dfail_keep_comp_equal_back_fail_repl_pass_decc_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decc_dfail_keep_comp_always_back_fail_repl_pass_repl_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_repl_dfail_decc_comp_never_back_fail_decw_pass_decc_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_repl_dfail_incc_comp_not_equal_back_fail_keep_pass_repl_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_zero_dfail_zero_comp_less_back_fail_inv_pass_repl_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_keep_dfail_keep_comp_never_back_fail_incc_pass_zero_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decw_dfail_wrap_comp_greater_back_fail_incc_pass_keep_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_zero_dfail_incc_comp_never_back_fail_inv_pass_decw_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_repl_dfail_incc_comp_less_back_fail_zero_pass_zero_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_keep_dfail_repl_comp_never_back_fail_wrap_pass_repl_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decc_dfail_decw_comp_less_back_fail_decw_pass_keep_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_repl_dfail_incc_comp_always_back_fail_decc_pass_decc_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_incc_dfail_decc_comp_equal_back_fail_decw_pass_repl_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_zero_dfail_zero_comp_greater_or_equal_back_fail_repl_pass_incc_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_incc_dfail_repl_comp_greater_back_fail_inv_pass_zero_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_wrap_dfail_repl_comp_less_or_equal_back_fail_decc_pass_incc_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_inv_dfail_incc_comp_always_back_fail_decw_pass_wrap_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decw_dfail_keep_comp_less_back_fail_decc_pass_inv_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_incc_dfail_decc_comp_equal_back_fail_incc_pass_decw_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_keep_dfail_zero_comp_greater_or_equal_back_fail_inv_pass_incc_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decw_dfail_incc_comp_not_equal_back_fail_incc_pass_keep_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_incc_dfail_wrap_comp_greater_back_fail_inv_pass_decw_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_repl_dfail_keep_comp_not_equal_back_fail_repl_pass_incc_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_zero_dfail_wrap_comp_greater_or_equal_back_fail_incc_pass_repl_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_inv_dfail_incc_comp_not_equal_back_fail_keep_pass_zero_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_zero_dfail_decc_comp_always_back_fail_decc_pass_inv_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_keep_dfail_wrap_comp_greater_or_equal_back_fail_repl_pass_zero_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_repl_dfail_zero_comp_not_equal_back_fail_repl_pass_keep_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_repl_dfail_decw_comp_greater_or_equal_back_fail_wrap_pass_repl_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_zero_dfail_incc_comp_never_back_fail_wrap_pass_repl_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_inv_dfail_keep_comp_less_or_equal_back_fail_repl_pass_zero_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decw_dfail_incc_comp_greater_back_fail_repl_pass_inv_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decw_dfail_keep_comp_never_back_fail_incc_pass_decw_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_incc_dfail_zero_comp_never_back_fail_decc_pass_decw_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_inv_dfail_zero_comp_never_back_fail_repl_pass_incc_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_incc_dfail_wrap_comp_always_back_fail_repl_pass_inv_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_keep_dfail_keep_comp_greater_back_fail_zero_pass_incc_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_wrap_dfail_decw_comp_greater_or_equal_back_fail_incc_pass_keep_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_incc_dfail_keep_comp_less_or_equal_back_fail_decw_pass_wrap_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_zero_dfail_wrap_comp_greater_back_fail_wrap_pass_incc_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_inv_dfail_wrap_comp_never_back_fail_decc_pass_zero_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decc_dfail_zero_comp_always_back_fail_zero_pass_inv_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_repl_dfail_repl_comp_not_equal_back_fail_wrap_pass_decc_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_wrap_dfail_decw_comp_greater_or_equal_back_fail_inv_pass_repl_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decc_dfail_decc_comp_greater_or_equal_back_fail_zero_pass_wrap_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_keep_dfail_decw_comp_equal_back_fail_decw_pass_decc_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_inv_dfail_wrap_comp_less_back_fail_decc_pass_keep_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_zero_dfail_decc_comp_never_back_fail_wrap_pass_inv_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decc_dfail_inv_comp_greater_or_equal_back_fail_incc_pass_zero_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decc_dfail_decw_comp_never_back_fail_zero_pass_decc_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decw_dfail_repl_comp_not_equal_back_fail_incc_pass_decc_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decc_dfail_incc_comp_always_back_fail_keep_pass_decw_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decw_dfail_zero_comp_never_back_fail_zero_pass_decc_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_zero_dfail_inv_comp_not_equal_back_fail_decc_pass_decw_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_repl_dfail_zero_comp_equal_back_fail_zero_pass_zero_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decw_dfail_repl_comp_never_back_fail_incc_pass_repl_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_wrap_dfail_zero_comp_less_back_fail_keep_pass_decw_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_repl_dfail_repl_comp_always_back_fail_decc_pass_wrap_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_zero_dfail_decw_comp_greater_back_fail_decc_pass_repl_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_wrap_dfail_inv_comp_less_back_fail_repl_pass_zero_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_repl_dfail_keep_comp_greater_back_fail_decw_pass_wrap_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decw_dfail_decw_comp_less_back_fail_decc_pass_repl_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_inv_dfail_decc_comp_greater_back_fail_inv_pass_decw_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decw_dfail_incc_comp_less_or_equal_back_fail_repl_pass_inv_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decc_dfail_zero_comp_greater_or_equal_back_fail_repl_pass_decw_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_zero_dfail_keep_comp_never_back_fail_inv_pass_decc_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decc_dfail_inv_comp_equal_back_fail_keep_pass_zero_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_repl_dfail_decc_comp_always_back_fail_zero_pass_decc_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_keep_dfail_keep_comp_not_equal_back_fail_wrap_pass_repl_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_repl_dfail_incc_comp_not_equal_back_fail_repl_pass_keep_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decc_dfail_repl_comp_not_equal_back_fail_keep_pass_repl_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_keep_dfail_zero_comp_less_or_equal_back_fail_wrap_pass_decc_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_zero_dfail_decc_comp_less_or_equal_back_fail_inv_pass_keep_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_keep_dfail_decc_comp_greater_back_fail_keep_pass_zero_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_incc_dfail_repl_comp_always_back_fail_decc_pass_keep_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_keep_dfail_zero_comp_equal_back_fail_decw_pass_incc_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decc_dfail_wrap_comp_never_back_fail_incc_pass_keep_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_incc_dfail_repl_comp_less_or_equal_back_fail_inv_pass_decc_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_zero_dfail_repl_comp_greater_or_equal_back_fail_zero_pass_incc_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_zero_dfail_inv_comp_never_back_fail_wrap_pass_zero_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decc_dfail_decc_comp_less_or_equal_back_fail_inv_pass_zero_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_zero_dfail_keep_comp_equal_back_fail_incc_pass_decc_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_inv_dfail_zero_comp_less_or_equal_back_fail_wrap_pass_zero_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_inv_dfail_decc_comp_always_back_fail_zero_pass_inv_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_zero_dfail_decw_comp_greater_or_equal_back_fail_wrap_pass_inv_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_wrap_dfail_repl_comp_less_back_fail_repl_pass_zero_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_repl_dfail_inv_comp_always_back_fail_repl_pass_wrap_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_zero_dfail_decc_comp_equal_back_fail_zero_pass_repl_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_inv_dfail_repl_comp_always_back_fail_repl_pass_zero_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_wrap_dfail_incc_comp_never_back_fail_keep_pass_inv_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decw_dfail_wrap_comp_never_back_fail_incc_pass_wrap_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_incc_dfail_zero_comp_less_or_equal_back_fail_inv_pass_decw_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_repl_dfail_decw_comp_less_back_fail_inv_pass_incc_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_incc_dfail_repl_comp_never_back_fail_incc_pass_repl_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_keep_dfail_inv_comp_less_back_fail_zero_pass_incc_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_incc_dfail_incc_comp_less_or_equal_back_fail_repl_pass_keep_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_zero_dfail_wrap_comp_never_back_fail_zero_pass_incc_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_keep_dfail_inv_comp_equal_back_fail_keep_pass_zero_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decc_dfail_decw_comp_greater_back_fail_decc_pass_keep_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_repl_dfail_decw_comp_greater_back_fail_decw_pass_decc_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_inv_dfail_repl_comp_less_back_fail_wrap_pass_repl_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_inv_dfail_inv_comp_less_back_fail_zero_pass_inv_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_zero_dfail_decc_comp_always_back_fail_decw_pass_inv_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_inv_dfail_zero_comp_less_or_equal_back_fail_inv_pass_zero_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_keep_dfail_incc_comp_greater_back_fail_keep_pass_inv_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_inv_dfail_decw_comp_equal_back_fail_zero_pass_keep_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_incc_dfail_decc_comp_always_back_fail_keep_pass_inv_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_wrap_dfail_wrap_comp_not_equal_back_fail_decc_pass_incc_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decc_dfail_decw_comp_always_back_fail_decc_pass_wrap_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_incc_dfail_decc_comp_not_equal_back_fail_repl_pass_decc_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_keep_dfail_decc_comp_always_back_fail_decc_pass_incc_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_repl_dfail_incc_comp_always_back_fail_repl_pass_keep_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_inv_dfail_wrap_comp_not_equal_back_fail_decc_pass_repl_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_zero_dfail_keep_comp_not_equal_back_fail_zero_pass_inv_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_zero_dfail_decw_comp_not_equal_back_fail_keep_pass_zero_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_repl_dfail_zero_comp_not_equal_back_fail_wrap_pass_zero_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_incc_dfail_incc_comp_not_equal_back_fail_decc_pass_repl_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decc_dfail_decw_comp_never_back_fail_decw_pass_incc_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decc_dfail_decc_comp_equal_back_fail_zero_pass_decc_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_zero_dfail_incc_comp_less_back_fail_repl_pass_decc_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_zero_dfail_wrap_comp_not_equal_back_fail_decw_pass_zero_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_inv_dfail_keep_comp_not_equal_back_fail_keep_pass_zero_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_keep_dfail_keep_comp_never_back_fail_wrap_pass_inv_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decc_dfail_incc_comp_never_back_fail_decc_pass_keep_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_repl_dfail_decc_comp_less_back_fail_decc_pass_decc_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_incc_dfail_wrap_comp_equal_back_fail_decw_pass_repl_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decc_dfail_inv_comp_equal_back_fail_keep_pass_incc_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_keep_dfail_zero_comp_not_equal_back_fail_decc_pass_decc_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_repl_dfail_zero_comp_never_back_fail_decw_pass_keep_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_zero_dfail_zero_comp_always_back_fail_inv_pass_repl_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_repl_dfail_zero_comp_always_back_fail_incc_pass_zero_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decw_dfail_decc_comp_less_back_fail_incc_pass_repl_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_inv_dfail_decw_comp_equal_back_fail_incc_pass_decw_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decw_dfail_decc_comp_not_equal_back_fail_decc_pass_inv_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_wrap_dfail_decc_comp_greater_back_fail_wrap_pass_decw_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_zero_dfail_decc_comp_less_or_equal_back_fail_inv_pass_wrap_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_keep_dfail_wrap_comp_equal_back_fail_inv_pass_zero_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_wrap_dfail_decc_comp_greater_or_equal_back_fail_wrap_pass_keep_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_inv_dfail_decc_comp_greater_or_equal_back_fail_keep_pass_wrap_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_repl_dfail_inv_comp_less_or_equal_back_fail_decw_pass_inv_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_incc_dfail_inv_comp_never_back_fail_decc_pass_repl_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_wrap_dfail_repl_comp_always_back_fail_repl_pass_incc_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_inv_dfail_decc_comp_greater_or_equal_back_fail_decc_pass_wrap_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_wrap_dfail_inv_comp_greater_back_fail_decc_pass_inv_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_zero_dfail_inv_comp_less_or_equal_back_fail_incc_pass_wrap_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_inv_dfail_incc_comp_less_back_fail_inv_pass_zero_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_wrap_dfail_zero_comp_not_equal_back_fail_incc_pass_inv_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_keep_dfail_inv_comp_equal_back_fail_zero_pass_wrap_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_wrap_dfail_wrap_comp_not_equal_back_fail_decw_pass_keep_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_wrap_dfail_wrap_comp_always_back_fail_keep_pass_wrap_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_inv_dfail_repl_comp_not_equal_back_fail_incc_pass_wrap_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_zero_dfail_decw_comp_less_or_equal_back_fail_wrap_pass_inv_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_keep_dfail_zero_comp_less_or_equal_back_fail_zero_pass_zero_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_keep_dfail_keep_comp_not_equal_back_fail_decc_pass_keep_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decw_dfail_repl_comp_equal_back_fail_keep_pass_keep_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decw_dfail_zero_comp_never_back_fail_inv_pass_decw_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_inv_dfail_decw_comp_always_back_fail_keep_pass_decw_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_keep_dfail_inv_comp_always_back_fail_keep_pass_inv_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_repl_dfail_decc_comp_equal_back_fail_inv_pass_keep_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_keep_dfail_zero_comp_not_equal_back_fail_incc_pass_repl_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_zero_dfail_decc_comp_less_back_fail_repl_pass_keep_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_incc_dfail_keep_comp_always_back_fail_repl_pass_zero_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_inv_dfail_decc_comp_less_back_fail_repl_pass_incc_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_incc_dfail_keep_comp_greater_back_fail_wrap_pass_inv_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_zero_dfail_inv_comp_greater_or_equal_back_fail_decw_pass_incc_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_incc_dfail_repl_comp_always_back_fail_zero_pass_zero_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_repl_dfail_incc_comp_always_back_fail_keep_pass_incc_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decc_dfail_inv_comp_less_or_equal_back_fail_inv_pass_repl_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_incc_dfail_repl_comp_equal_back_fail_incc_pass_decc_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decw_dfail_keep_comp_less_back_fail_zero_pass_incc_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decc_dfail_decw_comp_equal_back_fail_inv_pass_decw_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decc_dfail_repl_comp_less_back_fail_keep_pass_decc_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decc_dfail_zero_comp_never_back_fail_decc_pass_decc_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_wrap_dfail_incc_comp_always_back_fail_incc_pass_decc_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_keep_dfail_repl_comp_equal_back_fail_inv_pass_wrap_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_wrap_dfail_decw_comp_greater_back_fail_decc_pass_keep_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_incc_dfail_decc_comp_less_or_equal_back_fail_repl_pass_wrap_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decw_dfail_keep_comp_never_back_fail_inv_pass_incc_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_repl_dfail_repl_comp_equal_back_fail_repl_pass_decw_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_incc_dfail_wrap_comp_not_equal_back_fail_incc_pass_repl_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decw_dfail_keep_comp_greater_back_fail_keep_pass_incc_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decw_dfail_inv_comp_never_back_fail_inv_pass_decw_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decw_dfail_decc_comp_greater_back_fail_keep_pass_decw_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_wrap_dfail_keep_comp_equal_back_fail_incc_pass_decw_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_incc_dfail_repl_comp_never_back_fail_wrap_pass_wrap_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_repl_dfail_inv_comp_greater_back_fail_inv_pass_incc_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_zero_dfail_inv_comp_always_back_fail_incc_pass_repl_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_repl_dfail_keep_comp_less_or_equal_back_fail_repl_pass_zero_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_wrap_dfail_wrap_comp_greater_or_equal_back_fail_incc_pass_repl_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_repl_dfail_repl_comp_never_back_fail_zero_pass_wrap_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_repl_dfail_decw_comp_not_equal_back_fail_incc_pass_repl_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_zero_dfail_decw_comp_less_back_fail_keep_pass_repl_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decc_dfail_wrap_comp_less_or_equal_back_fail_repl_pass_zero_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_inv_dfail_inv_comp_equal_back_fail_zero_pass_decc_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decw_dfail_decw_comp_never_back_fail_zero_pass_inv_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_zero_dfail_inv_comp_not_equal_back_fail_inv_pass_decw_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_keep_dfail_wrap_comp_not_equal_back_fail_decw_pass_zero_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_repl_dfail_decw_comp_never_back_fail_inv_pass_keep_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_inv_dfail_inv_comp_never_back_fail_inv_pass_repl_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_incc_dfail_wrap_comp_equal_back_fail_incc_pass_inv_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_keep_dfail_keep_comp_less_back_fail_wrap_pass_incc_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decw_dfail_decc_comp_never_back_fail_incc_pass_keep_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_repl_dfail_repl_comp_greater_back_fail_keep_pass_decw_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decc_dfail_repl_comp_less_or_equal_back_fail_wrap_pass_repl_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_zero_dfail_keep_comp_less_back_fail_decc_pass_decc_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_inv_dfail_inv_comp_never_back_fail_keep_pass_zero_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_inv_dfail_zero_comp_not_equal_back_fail_zero_pass_inv_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_incc_dfail_keep_comp_greater_back_fail_zero_pass_inv_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_repl_dfail_keep_comp_always_back_fail_zero_pass_incc_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decw_dfail_zero_comp_greater_back_fail_incc_pass_repl_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_repl_dfail_wrap_comp_less_or_equal_back_fail_inv_pass_decw_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_inv_dfail_inv_comp_not_equal_back_fail_incc_pass_repl_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decw_dfail_incc_comp_always_back_fail_zero_pass_inv_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decw_dfail_incc_comp_less_or_equal_back_fail_inv_pass_decw_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_zero_dfail_inv_comp_greater_back_fail_zero_pass_decw_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_inv_dfail_wrap_comp_less_back_fail_decc_pass_zero_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_inv_dfail_wrap_comp_less_or_equal_back_fail_inv_pass_inv_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decc_dfail_wrap_comp_not_equal_back_fail_incc_pass_inv_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_zero_dfail_incc_comp_equal_back_fail_incc_pass_decc_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_inv_dfail_incc_comp_always_back_fail_wrap_pass_zero_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_keep_dfail_incc_comp_never_back_fail_wrap_pass_inv_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_inv_dfail_incc_comp_less_back_fail_zero_pass_keep_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_repl_dfail_inv_comp_greater_back_fail_decw_pass_inv_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_wrap_dfail_decc_comp_equal_back_fail_decc_pass_repl_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_incc_dfail_decw_comp_equal_back_fail_decw_pass_wrap_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_repl_dfail_repl_comp_not_equal_back_fail_repl_pass_incc_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_repl_dfail_inv_comp_never_back_fail_repl_pass_repl_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_zero_dfail_wrap_comp_not_equal_back_fail_decc_pass_repl_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_wrap_dfail_keep_comp_greater_or_equal_back_fail_inv_pass_zero_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decc_dfail_repl_comp_less_back_fail_repl_pass_wrap_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_wrap_dfail_keep_comp_greater_or_equal_back_fail_zero_pass_decc_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_incc_dfail_inv_comp_equal_back_fail_zero_pass_wrap_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_repl_dfail_decw_comp_less_back_fail_keep_pass_incc_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decc_dfail_decw_comp_always_back_fail_zero_pass_repl_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decc_dfail_zero_comp_equal_back_fail_inv_pass_decc_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_repl_dfail_decw_comp_greater_or_equal_back_fail_zero_pass_decc_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_repl_dfail_wrap_comp_greater_or_equal_back_fail_decw_pass_repl_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_incc_dfail_incc_comp_always_back_fail_incc_pass_repl_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_wrap_dfail_inv_comp_equal_back_fail_repl_pass_incc_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_wrap_dfail_zero_comp_less_or_equal_back_fail_incc_pass_wrap_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decc_dfail_incc_comp_less_or_equal_back_fail_zero_pass_wrap_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_repl_dfail_decc_comp_greater_back_fail_keep_pass_decc_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_zero_dfail_inv_comp_greater_back_fail_decc_pass_repl_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_zero_dfail_zero_comp_never_back_fail_wrap_pass_zero_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_keep_dfail_wrap_comp_greater_back_fail_decc_pass_zero_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_wrap_dfail_repl_comp_greater_or_equal_back_fail_zero_pass_keep_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decw_dfail_zero_comp_less_back_fail_decc_pass_wrap_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_incc_dfail_zero_comp_equal_back_fail_keep_pass_decw_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decc_dfail_keep_comp_less_back_fail_inv_pass_incc_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decw_dfail_decw_comp_equal_back_fail_keep_pass_decc_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_inv_dfail_incc_comp_equal_back_fail_decw_pass_decw_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decc_dfail_inv_comp_less_or_equal_back_fail_incc_pass_inv_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decw_dfail_zero_comp_greater_or_equal_back_fail_inv_pass_decc_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_repl_dfail_decw_comp_greater_or_equal_back_fail_repl_pass_decw_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_wrap_dfail_incc_comp_greater_or_equal_back_fail_zero_pass_repl_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_keep_dfail_inv_comp_never_back_fail_inv_pass_wrap_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decw_dfail_wrap_comp_not_equal_back_fail_zero_pass_keep_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_keep_dfail_repl_comp_equal_back_fail_repl_pass_decw_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_zero_dfail_inv_comp_less_or_equal_back_fail_decw_pass_keep_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decw_dfail_zero_comp_not_equal_back_fail_decw_pass_zero_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decc_dfail_inv_comp_greater_or_equal_back_fail_repl_pass_decw_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_inv_dfail_wrap_comp_greater_back_fail_inv_pass_decc_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_wrap_dfail_incc_comp_always_back_fail_repl_pass_inv_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_zero_dfail_repl_comp_equal_back_fail_keep_pass_wrap_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decw_dfail_inv_comp_greater_back_fail_incc_pass_zero_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_inv_dfail_keep_comp_never_back_fail_decw_pass_decw_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decc_dfail_repl_comp_not_equal_back_fail_wrap_pass_inv_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decc_dfail_keep_comp_less_or_equal_back_fail_decw_pass_decc_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decw_dfail_inv_comp_equal_back_fail_keep_pass_decc_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decw_dfail_decw_comp_less_back_fail_repl_pass_decw_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_inv_dfail_repl_comp_greater_or_equal_back_fail_zero_pass_decw_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_wrap_dfail_wrap_comp_equal_back_fail_zero_pass_inv_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_zero_dfail_incc_comp_greater_or_equal_back_fail_zero_pass_wrap_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_keep_dfail_keep_comp_not_equal_back_fail_wrap_pass_zero_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_incc_dfail_incc_comp_never_back_fail_decc_pass_keep_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_incc_dfail_decc_comp_always_back_fail_decc_pass_incc_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_wrap_dfail_decc_comp_less_back_fail_incc_pass_incc_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_incc_dfail_decw_comp_greater_or_equal_back_fail_inv_pass_wrap_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decw_dfail_keep_comp_not_equal_back_fail_wrap_pass_incc_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_inv_dfail_repl_comp_always_back_fail_incc_pass_decw_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_zero_dfail_zero_comp_less_or_equal_back_fail_zero_pass_inv_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_repl_dfail_repl_comp_never_back_fail_incc_pass_zero_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_wrap_dfail_wrap_comp_never_back_fail_decc_pass_repl_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decw_dfail_incc_comp_never_back_fail_decw_pass_wrap_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decc_dfail_zero_comp_less_or_equal_back_fail_wrap_pass_decw_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_repl_dfail_inv_comp_never_back_fail_incc_pass_decc_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decw_dfail_decc_comp_less_or_equal_back_fail_inv_pass_repl_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_zero_dfail_decc_comp_never_back_fail_wrap_pass_decw_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_keep_dfail_zero_comp_never_back_fail_decc_pass_zero_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_keep_dfail_repl_comp_greater_back_fail_incc_pass_keep_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_incc_dfail_decc_comp_never_back_fail_inv_pass_keep_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decc_dfail_zero_comp_greater_back_fail_decc_pass_incc_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_incc_dfail_wrap_comp_less_back_fail_keep_pass_decc_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decc_dfail_inv_comp_always_back_fail_wrap_pass_incc_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_inv_dfail_inv_comp_less_or_equal_back_fail_decc_pass_decc_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_keep_dfail_incc_comp_equal_back_fail_wrap_pass_inv_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decc_dfail_inv_comp_equal_back_fail_decw_pass_keep_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_zero_dfail_keep_comp_always_back_fail_repl_pass_decc_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decw_dfail_decc_comp_greater_back_fail_incc_pass_zero_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_zero_dfail_zero_comp_equal_back_fail_decc_pass_decw_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_repl_dfail_decw_comp_less_back_fail_zero_pass_zero_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_zero_dfail_repl_comp_less_or_equal_back_fail_decw_pass_repl_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decw_dfail_zero_comp_always_back_fail_incc_pass_zero_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_zero_dfail_keep_comp_not_equal_back_fail_decc_pass_decw_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_keep_dfail_keep_comp_always_back_fail_incc_pass_zero_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_zero_dfail_zero_comp_less_back_fail_repl_pass_keep_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decw_dfail_repl_comp_greater_or_equal_back_fail_decw_pass_zero_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decw_dfail_decw_comp_less_back_fail_inv_pass_decw_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decw_dfail_incc_comp_never_back_fail_repl_pass_decw_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_repl_dfail_wrap_comp_less_or_equal_back_fail_inv_pass_decw_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decc_dfail_keep_comp_never_back_fail_repl_pass_repl_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_keep_dfail_wrap_comp_greater_or_equal_back_fail_repl_pass_decc_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decw_dfail_decw_comp_greater_or_equal_back_fail_keep_pass_keep_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_wrap_dfail_incc_comp_greater_back_fail_repl_pass_decw_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decc_dfail_zero_comp_not_equal_back_fail_decc_pass_wrap_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_wrap_dfail_wrap_comp_equal_back_fail_decc_pass_decc_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_keep_dfail_decc_comp_greater_or_equal_back_fail_wrap_pass_wrap_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_zero_dfail_repl_comp_greater_or_equal_back_fail_inv_pass_keep_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_inv_dfail_wrap_comp_less_or_equal_back_fail_inv_pass_zero_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_inv_dfail_inv_comp_less_or_equal_back_fail_decw_pass_inv_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_incc_dfail_inv_comp_greater_back_fail_incc_pass_inv_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_inv_dfail_incc_comp_never_back_fail_inv_pass_incc_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_keep_dfail_incc_comp_less_back_fail_decc_pass_inv_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_wrap_dfail_zero_comp_never_back_fail_keep_pass_keep_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_incc_dfail_decw_comp_less_or_equal_back_fail_keep_pass_wrap_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_inv_dfail_keep_comp_greater_or_equal_back_fail_incc_pass_incc_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decc_dfail_decw_comp_equal_back_fail_repl_pass_inv_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_incc_dfail_keep_comp_never_back_fail_inv_pass_decc_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_zero_dfail_keep_comp_greater_back_fail_repl_pass_incc_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_repl_dfail_decc_comp_never_back_fail_decw_pass_zero_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decc_dfail_repl_comp_always_back_fail_incc_pass_repl_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_keep_dfail_repl_comp_always_back_fail_incc_pass_decc_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decw_dfail_incc_comp_not_equal_back_fail_wrap_pass_keep_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decw_dfail_decw_comp_greater_back_fail_keep_pass_decw_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_inv_dfail_decc_comp_not_equal_back_fail_incc_pass_decw_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_wrap_dfail_repl_comp_greater_or_equal_back_fail_keep_pass_inv_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_inv_dfail_repl_comp_less_or_equal_back_fail_repl_pass_wrap_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_repl_dfail_decw_comp_less_or_equal_back_fail_keep_pass_inv_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_wrap_dfail_zero_comp_not_equal_back_fail_repl_pass_repl_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decw_dfail_decw_comp_never_back_fail_wrap_pass_wrap_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_keep_dfail_zero_comp_less_back_fail_decc_pass_decw_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decw_dfail_incc_comp_greater_back_fail_keep_pass_keep_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_zero_dfail_decw_comp_greater_back_fail_decw_pass_decw_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decc_dfail_incc_comp_less_back_fail_zero_pass_zero_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decc_dfail_incc_comp_less_back_fail_keep_pass_decc_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_wrap_dfail_keep_comp_less_back_fail_repl_pass_decc_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decw_dfail_repl_comp_equal_back_fail_zero_pass_wrap_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_keep_dfail_incc_comp_always_back_fail_keep_pass_decw_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decw_dfail_incc_comp_less_or_equal_back_fail_inv_pass_keep_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_inv_dfail_decc_comp_not_equal_back_fail_wrap_pass_decw_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_zero_dfail_keep_comp_equal_back_fail_repl_pass_inv_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_inv_dfail_repl_comp_greater_back_fail_zero_pass_zero_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_wrap_dfail_decc_comp_less_or_equal_back_fail_inv_pass_inv_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_zero_dfail_decc_comp_less_or_equal_back_fail_decc_pass_wrap_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_keep_dfail_decc_comp_always_back_fail_wrap_pass_zero_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_keep_dfail_keep_comp_not_equal_back_fail_keep_pass_keep_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_repl_dfail_inv_comp_equal_back_fail_zero_pass_keep_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_wrap_dfail_wrap_comp_always_back_fail_repl_pass_repl_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_inv_dfail_decc_comp_never_back_fail_repl_pass_wrap_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_repl_dfail_inv_comp_not_equal_back_fail_repl_pass_inv_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_incc_dfail_wrap_comp_never_back_fail_zero_pass_repl_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decw_dfail_decc_comp_never_back_fail_decw_pass_incc_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_incc_dfail_repl_comp_greater_or_equal_back_fail_inv_pass_decw_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_inv_dfail_inv_comp_greater_or_equal_back_fail_incc_pass_incc_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_inv_dfail_keep_comp_greater_or_equal_back_fail_decc_pass_inv_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_repl_dfail_repl_comp_never_back_fail_decw_pass_inv_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decw_dfail_incc_comp_equal_back_fail_wrap_pass_repl_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decc_dfail_repl_comp_equal_back_fail_decc_pass_decw_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_repl_dfail_repl_comp_never_back_fail_decc_pass_decc_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_keep_dfail_decw_comp_never_back_fail_keep_pass_repl_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_inv_dfail_decw_comp_not_equal_back_fail_wrap_pass_keep_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_wrap_dfail_zero_comp_greater_or_equal_back_fail_repl_pass_inv_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_inv_dfail_zero_comp_always_back_fail_zero_pass_wrap_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_inv_dfail_repl_comp_always_back_fail_decw_pass_inv_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_wrap_dfail_keep_comp_not_equal_back_fail_decw_pass_inv_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_wrap_dfail_inv_comp_equal_back_fail_zero_pass_wrap_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decw_dfail_zero_comp_equal_back_fail_decc_pass_wrap_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decw_dfail_decw_comp_greater_or_equal_back_fail_zero_pass_decw_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decc_dfail_decw_comp_never_back_fail_inv_pass_decw_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_keep_dfail_keep_comp_less_back_fail_wrap_pass_decc_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_zero_dfail_zero_comp_never_back_fail_inv_pass_keep_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_keep_dfail_incc_comp_never_back_fail_incc_pass_zero_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decw_dfail_keep_comp_less_or_equal_back_fail_keep_pass_keep_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decw_dfail_decw_comp_not_equal_back_fail_repl_pass_decw_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_repl_dfail_repl_comp_never_back_fail_incc_pass_decw_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_keep_dfail_keep_comp_always_back_fail_decw_pass_repl_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_incc_dfail_zero_comp_less_or_equal_back_fail_decw_pass_keep_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_zero_dfail_zero_comp_less_back_fail_repl_pass_incc_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decw_dfail_inv_comp_equal_back_fail_zero_pass_zero_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_zero_dfail_decc_comp_less_back_fail_inv_pass_decw_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decc_dfail_keep_comp_not_equal_back_fail_incc_pass_zero_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_wrap_dfail_keep_comp_never_back_fail_keep_pass_decc_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_keep_dfail_zero_comp_less_or_equal_back_fail_zero_pass_wrap_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decc_dfail_zero_comp_not_equal_back_fail_wrap_pass_keep_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_incc_dfail_wrap_comp_greater_or_equal_back_fail_incc_pass_decc_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_keep_dfail_inv_comp_greater_or_equal_back_fail_keep_pass_incc_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_keep_dfail_incc_comp_equal_back_fail_incc_pass_keep_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_zero_dfail_decw_comp_always_back_fail_incc_pass_keep_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_incc_dfail_wrap_comp_equal_back_fail_zero_pass_zero_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_wrap_dfail_wrap_comp_greater_or_equal_back_fail_repl_pass_incc_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_repl_dfail_wrap_comp_greater_or_equal_back_fail_decc_pass_wrap_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_wrap_dfail_zero_comp_always_back_fail_repl_pass_repl_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_wrap_dfail_inv_comp_greater_or_equal_back_fail_inv_pass_wrap_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_incc_dfail_wrap_comp_less_or_equal_back_fail_wrap_pass_wrap_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_incc_dfail_decw_comp_always_back_fail_zero_pass_incc_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_inv_dfail_keep_comp_equal_back_fail_keep_pass_incc_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_incc_dfail_decw_comp_greater_back_fail_decw_pass_inv_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_keep_dfail_zero_comp_greater_or_equal_back_fail_repl_pass_incc_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_repl_dfail_incc_comp_greater_back_fail_inv_pass_keep_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decw_dfail_repl_comp_equal_back_fail_decw_pass_repl_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_zero_dfail_decc_comp_less_or_equal_back_fail_repl_pass_decw_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_zero_dfail_decw_comp_less_or_equal_back_fail_decw_pass_zero_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decc_dfail_inv_comp_greater_back_fail_decw_pass_zero_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_incc_dfail_repl_comp_greater_or_equal_back_fail_zero_pass_decc_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_keep_dfail_repl_comp_never_back_fail_decc_pass_incc_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_repl_dfail_wrap_comp_never_back_fail_incc_pass_keep_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decc_dfail_zero_comp_always_back_fail_wrap_pass_repl_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_inv_dfail_incc_comp_always_back_fail_incc_pass_decc_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_incc_dfail_inv_comp_greater_back_fail_repl_pass_inv_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_zero_dfail_inv_comp_less_back_fail_decw_pass_incc_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decw_dfail_decw_comp_always_back_fail_zero_pass_zero_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_zero_dfail_zero_comp_not_equal_back_fail_repl_pass_decw_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_inv_dfail_keep_comp_equal_back_fail_inv_pass_zero_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_repl_dfail_wrap_comp_never_back_fail_repl_pass_inv_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_keep_dfail_repl_comp_less_or_equal_back_fail_decc_pass_repl_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_keep_dfail_decc_comp_greater_or_equal_back_fail_decc_pass_keep_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decc_dfail_decc_comp_less_or_equal_back_fail_decw_pass_keep_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_zero_dfail_decc_comp_greater_or_equal_back_fail_keep_pass_decc_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_repl_dfail_keep_comp_less_back_fail_inv_pass_zero_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_wrap_dfail_decw_comp_greater_or_equal_back_fail_zero_pass_repl_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_zero_dfail_repl_comp_always_back_fail_keep_pass_wrap_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decw_dfail_repl_comp_less_back_fail_wrap_pass_zero_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decw_dfail_incc_comp_equal_back_fail_decc_pass_decw_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decc_dfail_wrap_comp_less_back_fail_inv_pass_decw_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_wrap_dfail_decw_comp_less_back_fail_decw_pass_decc_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decc_dfail_repl_comp_greater_back_fail_repl_pass_wrap_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_incc_dfail_incc_comp_greater_or_equal_back_fail_wrap_pass_decc_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_zero_dfail_wrap_comp_greater_or_equal_back_fail_zero_pass_incc_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_incc_dfail_incc_comp_greater_back_fail_incc_pass_zero_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_incc_dfail_repl_comp_less_back_fail_inv_pass_incc_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_repl_dfail_keep_comp_equal_back_fail_decw_pass_incc_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_repl_dfail_decw_comp_greater_or_equal_back_fail_decw_pass_repl_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_keep_dfail_keep_comp_always_back_fail_keep_pass_repl_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_incc_dfail_repl_comp_never_back_fail_incc_pass_keep_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_keep_dfail_decc_comp_less_or_equal_back_fail_wrap_pass_incc_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_wrap_dfail_inv_comp_greater_or_equal_back_fail_decc_pass_keep_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_inv_dfail_decw_comp_never_back_fail_decw_pass_wrap_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decc_dfail_repl_comp_greater_back_fail_decc_pass_inv_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_zero_dfail_zero_comp_always_back_fail_inv_pass_decc_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_inv_dfail_keep_comp_greater_or_equal_back_fail_zero_pass_zero_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_keep_dfail_inv_comp_less_back_fail_zero_pass_inv_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_inv_dfail_zero_comp_always_back_fail_inv_pass_keep_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_wrap_dfail_repl_comp_greater_back_fail_incc_pass_inv_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_zero_dfail_inv_comp_not_equal_back_fail_wrap_pass_wrap_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_wrap_dfail_inv_comp_greater_or_equal_back_fail_keep_pass_zero_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decw_dfail_decw_comp_always_back_fail_zero_pass_wrap_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_wrap_dfail_zero_comp_always_back_fail_decw_pass_decw_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_keep_dfail_keep_comp_equal_back_fail_repl_pass_wrap_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_repl_dfail_keep_comp_never_back_fail_decw_pass_keep_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_repl_dfail_inv_comp_greater_or_equal_back_fail_decw_pass_repl_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_incc_dfail_decw_comp_less_or_equal_back_fail_repl_pass_repl_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decw_dfail_inv_comp_always_back_fail_decw_pass_incc_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decc_dfail_wrap_comp_always_back_fail_keep_pass_decw_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_inv_dfail_inv_comp_greater_back_fail_incc_pass_decc_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_wrap_dfail_decc_comp_never_back_fail_repl_pass_inv_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_repl_dfail_wrap_comp_never_back_fail_incc_pass_wrap_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_keep_dfail_incc_comp_less_or_equal_back_fail_keep_pass_repl_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_zero_dfail_inv_comp_greater_back_fail_wrap_pass_keep_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_incc_dfail_decc_comp_less_back_fail_inv_pass_zero_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_repl_dfail_zero_comp_less_back_fail_decc_pass_incc_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_keep_dfail_repl_comp_greater_or_equal_back_fail_decw_pass_repl_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_inv_dfail_wrap_comp_greater_or_equal_back_fail_wrap_pass_keep_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decc_dfail_decw_comp_greater_or_equal_back_fail_incc_pass_inv_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decc_dfail_repl_comp_greater_or_equal_back_fail_keep_pass_decc_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_inv_dfail_incc_comp_less_or_equal_back_fail_inv_pass_decc_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_zero_dfail_incc_comp_less_or_equal_back_fail_repl_pass_inv_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_repl_dfail_wrap_comp_not_equal_back_fail_decc_pass_zero_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_repl_dfail_incc_comp_less_back_fail_decc_pass_repl_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decc_dfail_incc_comp_equal_back_fail_zero_pass_repl_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_zero_dfail_wrap_comp_always_back_fail_keep_pass_decc_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decw_dfail_zero_comp_greater_back_fail_incc_pass_zero_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_inv_dfail_inv_comp_never_back_fail_wrap_pass_decw_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_repl_dfail_inv_comp_greater_or_equal_back_fail_wrap_pass_inv_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_repl_dfail_wrap_comp_less_back_fail_wrap_pass_repl_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decw_dfail_incc_comp_greater_or_equal_back_fail_incc_pass_repl_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_incc_dfail_incc_comp_greater_back_fail_repl_pass_decw_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_wrap_dfail_keep_comp_equal_back_fail_repl_pass_incc_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_incc_dfail_wrap_comp_greater_or_equal_back_fail_decc_pass_wrap_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decc_dfail_repl_comp_less_or_equal_back_fail_incc_pass_incc_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_inv_dfail_inv_comp_less_back_fail_wrap_pass_decc_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_wrap_dfail_decw_comp_equal_back_fail_inv_pass_inv_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_zero_dfail_wrap_comp_always_back_fail_zero_pass_wrap_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decc_dfail_decw_comp_greater_back_fail_repl_pass_zero_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_repl_dfail_decw_comp_always_back_fail_keep_pass_decc_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_zero_dfail_keep_comp_never_back_fail_inv_pass_repl_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decc_dfail_wrap_comp_equal_back_fail_zero_pass_zero_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_keep_dfail_wrap_comp_never_back_fail_repl_pass_decc_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_inv_dfail_decw_comp_less_back_fail_inv_pass_keep_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_keep_dfail_inv_comp_never_back_fail_decc_pass_inv_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_keep_dfail_incc_comp_less_or_equal_back_fail_decw_pass_keep_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decw_dfail_incc_comp_never_back_fail_incc_pass_keep_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_wrap_dfail_decw_comp_not_equal_back_fail_decw_pass_decw_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_zero_dfail_incc_comp_greater_back_fail_inv_pass_wrap_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_wrap_dfail_keep_comp_never_back_fail_zero_pass_zero_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_repl_dfail_wrap_comp_greater_back_fail_incc_pass_wrap_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_keep_dfail_wrap_comp_greater_back_fail_keep_pass_repl_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_inv_dfail_decw_comp_less_or_equal_back_fail_wrap_pass_keep_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decw_dfail_decw_comp_not_equal_back_fail_inv_pass_inv_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_repl_dfail_keep_comp_always_back_fail_decw_pass_decw_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_inv_dfail_decc_comp_equal_back_fail_decc_pass_repl_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_wrap_dfail_inv_comp_greater_or_equal_back_fail_wrap_pass_inv_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_wrap_dfail_keep_comp_less_back_fail_repl_pass_wrap_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_incc_dfail_keep_comp_less_or_equal_back_fail_inv_pass_wrap_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_repl_dfail_incc_comp_never_back_fail_decw_pass_incc_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_wrap_dfail_decc_comp_always_back_fail_decc_pass_repl_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_wrap_dfail_incc_comp_never_back_fail_incc_pass_wrap_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decw_dfail_incc_comp_greater_or_equal_back_fail_decc_pass_wrap_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_inv_dfail_zero_comp_equal_back_fail_inv_pass_decw_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decw_dfail_decc_comp_less_or_equal_back_fail_incc_pass_inv_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_inv_dfail_incc_comp_not_equal_back_fail_incc_pass_decw_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_wrap_dfail_decc_comp_less_or_equal_back_fail_inv_pass_inv_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_incc_dfail_repl_comp_greater_or_equal_back_fail_inv_pass_wrap_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_inv_dfail_zero_comp_less_or_equal_back_fail_zero_pass_incc_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_incc_dfail_decc_comp_always_back_fail_decc_pass_inv_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_inv_dfail_repl_comp_never_back_fail_repl_pass_incc_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_zero_dfail_zero_comp_always_back_fail_inv_pass_inv_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_zero_dfail_repl_comp_equal_back_fail_decc_pass_zero_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_repl_dfail_incc_comp_greater_or_equal_back_fail_decw_pass_zero_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_inv_dfail_keep_comp_always_back_fail_decc_pass_repl_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_repl_dfail_zero_comp_not_equal_back_fail_wrap_pass_inv_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decw_dfail_keep_comp_never_back_fail_keep_pass_repl_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decw_dfail_incc_comp_always_back_fail_zero_pass_decw_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_incc_dfail_decc_comp_less_or_equal_back_fail_decw_pass_decw_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_wrap_dfail_incc_comp_greater_back_fail_repl_pass_incc_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_keep_dfail_zero_comp_less_back_fail_decw_pass_wrap_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_incc_dfail_decc_comp_greater_back_fail_inv_pass_keep_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_wrap_dfail_incc_comp_less_or_equal_back_fail_repl_pass_incc_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_inv_dfail_zero_comp_always_back_fail_decw_pass_wrap_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decc_dfail_keep_comp_greater_or_equal_back_fail_zero_pass_inv_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_zero_dfail_repl_comp_less_or_equal_back_fail_wrap_pass_decc_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_keep_dfail_wrap_comp_greater_back_fail_repl_pass_zero_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_repl_dfail_zero_comp_equal_back_fail_incc_pass_keep_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_repl_dfail_incc_comp_never_back_fail_repl_pass_repl_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_zero_dfail_repl_comp_greater_back_fail_wrap_pass_repl_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decw_dfail_inv_comp_less_or_equal_back_fail_keep_pass_zero_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_inv_dfail_zero_comp_equal_back_fail_wrap_pass_decw_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decc_dfail_wrap_comp_greater_or_equal_back_fail_inv_pass_inv_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_repl_dfail_repl_comp_equal_back_fail_decw_pass_decc_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decw_dfail_inv_comp_greater_or_equal_back_fail_decc_pass_repl_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decc_dfail_keep_comp_never_back_fail_repl_pass_decw_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decc_dfail_keep_comp_not_equal_back_fail_decw_pass_decc_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_repl_dfail_repl_comp_greater_back_fail_decc_pass_decc_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decw_dfail_decw_comp_less_or_equal_back_fail_decw_pass_repl_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decw_dfail_repl_comp_never_back_fail_decw_pass_decw_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_keep_dfail_incc_comp_less_or_equal_back_fail_decw_pass_decw_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_incc_dfail_wrap_comp_greater_back_fail_inv_pass_keep_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_inv_dfail_repl_comp_not_equal_back_fail_decw_pass_incc_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_incc_dfail_incc_comp_less_back_fail_incc_pass_inv_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decw_dfail_repl_comp_always_back_fail_repl_pass_incc_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decc_dfail_wrap_comp_equal_back_fail_wrap_pass_decw_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decw_dfail_decw_comp_never_back_fail_decc_pass_decc_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_zero_dfail_repl_comp_less_back_fail_zero_pass_decw_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_repl_dfail_keep_comp_not_equal_back_fail_repl_pass_zero_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_repl_dfail_decc_comp_greater_or_equal_back_fail_decc_pass_repl_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decc_dfail_incc_comp_greater_back_fail_wrap_pass_repl_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_zero_dfail_inv_comp_equal_back_fail_decw_pass_decc_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_wrap_dfail_keep_comp_less_or_equal_back_fail_decc_pass_zero_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decc_dfail_inv_comp_less_back_fail_decc_pass_wrap_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_zero_dfail_wrap_comp_less_or_equal_back_fail_incc_pass_decc_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decw_dfail_incc_comp_greater_or_equal_back_fail_keep_pass_zero_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decw_dfail_decc_comp_less_back_fail_incc_pass_decw_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_zero_dfail_inv_comp_less_back_fail_inv_pass_decw_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decc_dfail_inv_comp_greater_or_equal_back_fail_keep_pass_zero_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_incc_dfail_decw_comp_not_equal_back_fail_incc_pass_decc_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decc_dfail_inv_comp_never_back_fail_incc_pass_incc_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_zero_dfail_zero_comp_less_or_equal_back_fail_repl_pass_decc_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_inv_dfail_zero_comp_greater_back_fail_decc_pass_zero_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_zero_dfail_wrap_comp_greater_back_fail_repl_pass_inv_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_inv_dfail_wrap_comp_always_back_fail_repl_pass_zero_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_inv_dfail_incc_comp_greater_back_fail_repl_pass_inv_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decc_dfail_wrap_comp_always_back_fail_wrap_pass_inv_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decw_dfail_repl_comp_greater_or_equal_back_fail_inv_pass_decc_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_repl_dfail_repl_comp_always_back_fail_zero_pass_decw_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_zero_dfail_inv_comp_always_back_fail_repl_pass_repl_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_repl_dfail_keep_comp_greater_back_fail_zero_pass_zero_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_keep_dfail_zero_comp_not_equal_back_fail_keep_pass_repl_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_repl_dfail_incc_comp_never_back_fail_wrap_pass_keep_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_wrap_dfail_repl_comp_equal_back_fail_zero_pass_repl_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_keep_dfail_keep_comp_equal_back_fail_keep_pass_wrap_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_zero_dfail_incc_comp_never_back_fail_decc_pass_keep_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decc_dfail_inv_comp_equal_back_fail_wrap_pass_zero_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_repl_dfail_incc_comp_equal_back_fail_inv_pass_decc_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_wrap_dfail_keep_comp_always_back_fail_zero_pass_repl_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_inv_dfail_decw_comp_not_equal_back_fail_wrap_pass_wrap_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decc_dfail_repl_comp_always_back_fail_decc_pass_inv_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_zero_dfail_zero_comp_never_back_fail_decc_pass_decc_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_keep_dfail_wrap_comp_never_back_fail_inv_pass_zero_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_zero_dfail_incc_comp_equal_back_fail_repl_pass_keep_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decw_dfail_keep_comp_equal_back_fail_repl_pass_zero_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_inv_dfail_zero_comp_greater_or_equal_back_fail_zero_pass_decw_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_zero_dfail_keep_comp_never_back_fail_keep_pass_inv_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_repl_dfail_keep_comp_greater_back_fail_wrap_pass_zero_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_inv_dfail_inv_comp_less_or_equal_back_fail_repl_pass_repl_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_wrap_dfail_inv_comp_less_or_equal_back_fail_decw_pass_inv_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_zero_dfail_decc_comp_greater_back_fail_wrap_pass_wrap_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_incc_dfail_decw_comp_greater_back_fail_inv_pass_zero_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decw_dfail_repl_comp_never_back_fail_decw_pass_incc_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_incc_dfail_wrap_comp_equal_back_fail_zero_pass_decw_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_wrap_dfail_keep_comp_less_or_equal_back_fail_decw_pass_incc_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_zero_dfail_incc_comp_never_back_fail_incc_pass_wrap_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_incc_dfail_incc_comp_not_equal_back_fail_decc_pass_zero_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_zero_dfail_decc_comp_greater_back_fail_decc_pass_incc_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decc_dfail_decw_comp_equal_back_fail_zero_pass_zero_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_keep_dfail_decw_comp_equal_back_fail_decw_pass_decc_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decw_dfail_wrap_comp_less_back_fail_wrap_pass_keep_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_wrap_dfail_wrap_comp_never_back_fail_incc_pass_decw_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_zero_dfail_wrap_comp_always_back_fail_keep_pass_wrap_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_keep_dfail_incc_comp_always_back_fail_inv_pass_zero_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_inv_dfail_zero_comp_not_equal_back_fail_repl_pass_keep_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_wrap_dfail_inv_comp_never_back_fail_inv_pass_inv_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decc_dfail_decc_comp_never_back_fail_inv_pass_wrap_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_zero_dfail_decw_comp_greater_back_fail_decw_pass_decc_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_repl_dfail_wrap_comp_less_or_equal_back_fail_keep_pass_zero_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_incc_dfail_repl_comp_less_back_fail_decc_pass_repl_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_wrap_dfail_inv_comp_not_equal_back_fail_repl_pass_incc_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_zero_dfail_repl_comp_less_or_equal_back_fail_incc_pass_wrap_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_wrap_dfail_zero_comp_equal_back_fail_zero_pass_zero_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_repl_dfail_zero_comp_greater_back_fail_repl_pass_wrap_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_wrap_dfail_decc_comp_equal_back_fail_decc_pass_repl_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decc_dfail_decc_comp_greater_back_fail_wrap_pass_wrap_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decw_dfail_wrap_comp_always_back_fail_decw_pass_decc_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_wrap_dfail_zero_comp_never_back_fail_keep_pass_decw_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_inv_dfail_incc_comp_never_back_fail_decw_pass_wrap_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decw_dfail_zero_comp_equal_back_fail_decw_pass_inv_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_zero_dfail_zero_comp_never_back_fail_repl_pass_decw_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_incc_dfail_repl_comp_always_back_fail_zero_pass_zero_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decc_dfail_inv_comp_not_equal_back_fail_decc_pass_incc_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_zero_dfail_wrap_comp_not_equal_back_fail_wrap_pass_decc_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_keep_dfail_keep_comp_less_back_fail_incc_pass_zero_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decw_dfail_decc_comp_always_back_fail_repl_pass_keep_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_keep_dfail_decc_comp_equal_back_fail_wrap_pass_decw_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_incc_dfail_zero_comp_greater_back_fail_zero_pass_keep_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_inv_dfail_decc_comp_always_back_fail_decw_pass_incc_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_incc_dfail_zero_comp_equal_back_fail_incc_pass_inv_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_zero_dfail_wrap_comp_less_back_fail_decw_pass_incc_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_wrap_dfail_zero_comp_equal_back_fail_repl_pass_zero_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_incc_dfail_keep_comp_always_back_fail_wrap_pass_wrap_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decw_dfail_decc_comp_always_back_fail_zero_pass_incc_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_inv_dfail_incc_comp_less_or_equal_back_fail_inv_pass_decw_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_incc_dfail_decw_comp_greater_back_fail_decw_pass_inv_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_keep_dfail_decw_comp_equal_back_fail_decc_pass_incc_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decc_dfail_repl_comp_greater_or_equal_back_fail_incc_pass_keep_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_repl_dfail_inv_comp_less_or_equal_back_fail_decw_pass_decc_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decw_dfail_zero_comp_less_back_fail_decw_pass_repl_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_inv_dfail_inv_comp_never_back_fail_decw_pass_decw_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decc_dfail_wrap_comp_less_or_equal_back_fail_keep_pass_inv_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_inv_dfail_wrap_comp_equal_back_fail_incc_pass_decc_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decc_dfail_incc_comp_equal_back_fail_zero_pass_inv_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_wrap_dfail_wrap_comp_equal_back_fail_incc_pass_decc_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_incc_dfail_inv_comp_less_or_equal_back_fail_incc_pass_wrap_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_keep_dfail_repl_comp_equal_back_fail_incc_pass_incc_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_repl_dfail_keep_comp_not_equal_back_fail_keep_pass_keep_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decw_dfail_wrap_comp_greater_back_fail_wrap_pass_repl_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decw_dfail_incc_comp_less_or_equal_back_fail_keep_pass_decw_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_keep_dfail_decw_comp_less_or_equal_back_fail_decc_pass_decw_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decc_dfail_decc_comp_not_equal_back_fail_inv_pass_keep_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_repl_dfail_incc_comp_greater_back_fail_decc_pass_decc_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_incc_dfail_repl_comp_greater_back_fail_keep_pass_repl_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_repl_dfail_decw_comp_greater_or_equal_back_fail_repl_pass_incc_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decc_dfail_incc_comp_greater_back_fail_repl_pass_repl_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decc_dfail_wrap_comp_greater_or_equal_back_fail_repl_pass_decc_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_wrap_dfail_keep_comp_less_or_equal_back_fail_decc_pass_decc_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_inv_dfail_decw_comp_less_or_equal_back_fail_keep_pass_wrap_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_repl_dfail_incc_comp_not_equal_back_fail_keep_pass_inv_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_inv_dfail_zero_comp_not_equal_back_fail_decw_pass_repl_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decw_dfail_zero_comp_less_back_fail_repl_pass_inv_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_wrap_dfail_keep_comp_equal_back_fail_zero_pass_decw_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_repl_dfail_keep_comp_never_back_fail_keep_pass_wrap_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_incc_dfail_repl_comp_not_equal_back_fail_keep_pass_repl_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decw_dfail_keep_comp_less_back_fail_incc_pass_incc_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_zero_dfail_zero_comp_always_back_fail_keep_pass_decw_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_inv_dfail_repl_comp_less_back_fail_decw_pass_zero_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_wrap_dfail_keep_comp_less_or_equal_back_fail_incc_pass_inv_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_inv_dfail_wrap_comp_greater_or_equal_back_fail_inv_pass_wrap_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decc_dfail_inv_comp_not_equal_back_fail_wrap_pass_inv_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decc_dfail_repl_comp_equal_back_fail_repl_pass_decc_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_zero_dfail_incc_comp_greater_back_fail_incc_pass_decc_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decw_dfail_inv_comp_greater_or_equal_back_fail_wrap_pass_zero_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_inv_dfail_incc_comp_less_or_equal_back_fail_wrap_pass_decw_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decw_dfail_inv_comp_greater_back_fail_incc_pass_inv_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_decc_dfail_incc_comp_always_back_fail_keep_pass_decw_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_decc_dfail_incc_comp_equal_back_fail_decc_pass_decc_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_repl_dfail_incc_comp_less_back_fail_repl_pass_decc_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_wrap_dfail_wrap_comp_less_back_fail_incc_pass_repl_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_zero_dfail_zero_comp_equal_back_fail_inv_pass_wrap_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_wrap_dfail_inv_comp_less_back_fail_wrap_pass_zero_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_decw_dfail_repl_comp_always_back_fail_wrap_pass_wrap_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_keep_dfail_inv_comp_not_equal_back_fail_zero_pass_decw_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_wrap_dfail_decw_comp_equal_back_fail_repl_pass_keep_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_zero_dfail_incc_comp_always_back_fail_wrap_pass_wrap_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_repl_dfail_decc_comp_always_back_fail_wrap_pass_zero_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_decc_dfail_repl_comp_not_equal_back_fail_decc_pass_repl_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_repl_dfail_decc_comp_always_back_fail_incc_pass_decc_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_repl_dfail_decw_comp_never_back_fail_inv_pass_repl_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_zero_dfail_decc_comp_greater_back_fail_repl_pass_repl_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decc_dfail_repl_comp_not_equal_back_fail_decw_pass_zero_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_keep_dfail_keep_comp_less_or_equal_back_fail_inv_pass_decc_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_inv_dfail_decc_comp_always_back_fail_wrap_pass_keep_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_zero_pass_wrap_dfail_keep_comp_greater_back_fail_decc_pass_inv_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_wrap_dfail_incc_comp_greater_back_fail_zero_pass_wrap_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_repl_dfail_inv_comp_greater_back_fail_repl_pass_wrap_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_wrap_dfail_zero_comp_never_back_fail_wrap_pass_repl_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_repl_dfail_zero_comp_less_or_equal_back_fail_incc_pass_wrap_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_decw_dfail_inv_comp_greater_or_equal_back_fail_incc_pass_repl_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_wrap_dfail_keep_comp_always_back_fail_decw_pass_decw_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_wrap_dfail_incc_comp_always_back_fail_decw_pass_wrap_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_repl_dfail_wrap_comp_never_back_fail_wrap_pass_wrap_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decw_pass_incc_dfail_zero_comp_less_or_equal_back_fail_inv_pass_repl_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_incc_dfail_repl_comp_equal_back_fail_decw_pass_incc_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_wrap_pass_decc_dfail_wrap_comp_greater_back_fail_decc_pass_incc_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decw_dfail_keep_comp_always_back_fail_wrap_pass_decc_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_incc_pass_inv_dfail_incc_comp_not_equal_back_fail_keep_pass_decw_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_repl_dfail_inv_comp_greater_or_equal_back_fail_incc_pass_inv_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_repl_pass_wrap_dfail_keep_comp_always_back_fail_keep_pass_repl_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_inv_pass_decc_dfail_inv_comp_not_equal_back_fail_repl_pass_wrap_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_keep_pass_decc_dfail_zero_comp_less_back_fail_inv_pass_decc_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.s8_uint.states.front_fail_decc_pass_repl_dfail_keep_comp_less_back_fail_keep_pass_decc_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_inv_comp_not_equal_back_fail_decc_pass_repl_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_inv_comp_not_equal_back_fail_decc_pass_repl_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_wrap_comp_less_back_fail_incc_pass_keep_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_keep_comp_greater_or_equal_back_fail_wrap_pass_decw_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_wrap_comp_equal_back_fail_inv_pass_incc_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_repl_comp_always_back_fail_incc_pass_keep_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_decc_comp_not_equal_back_fail_repl_pass_inv_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_incc_comp_greater_or_equal_back_fail_zero_pass_incc_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_keep_comp_equal_back_fail_incc_pass_keep_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_decw_comp_less_or_equal_back_fail_decc_pass_zero_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_zero_comp_greater_back_fail_keep_pass_wrap_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_decw_comp_less_or_equal_back_fail_inv_pass_zero_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_decc_comp_equal_back_fail_incc_pass_wrap_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_decc_comp_less_or_equal_back_fail_wrap_pass_incc_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_decc_comp_never_back_fail_decc_pass_decc_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_decw_comp_greater_or_equal_back_fail_decc_pass_wrap_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_incc_comp_greater_or_equal_back_fail_wrap_pass_decw_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_decw_comp_always_back_fail_decw_pass_decw_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_incc_comp_less_back_fail_keep_pass_decw_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_inv_comp_always_back_fail_repl_pass_keep_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_repl_comp_never_back_fail_inv_pass_zero_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_inv_comp_less_back_fail_decw_pass_wrap_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_decc_comp_equal_back_fail_decc_pass_incc_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_wrap_comp_less_back_fail_decc_pass_incc_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_decc_comp_equal_back_fail_decw_pass_wrap_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_wrap_comp_less_back_fail_inv_pass_wrap_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_incc_comp_greater_back_fail_zero_pass_inv_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_inv_comp_greater_back_fail_wrap_pass_decc_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_wrap_comp_greater_or_equal_back_fail_keep_pass_keep_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_decc_comp_less_or_equal_back_fail_inv_pass_decc_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_repl_comp_greater_or_equal_back_fail_zero_pass_inv_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_keep_comp_always_back_fail_decc_pass_inv_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_decc_comp_never_back_fail_wrap_pass_keep_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_zero_comp_never_back_fail_wrap_pass_zero_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_decw_comp_never_back_fail_keep_pass_incc_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_inv_comp_never_back_fail_incc_pass_incc_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_wrap_comp_less_back_fail_incc_pass_keep_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_zero_comp_greater_or_equal_back_fail_keep_pass_repl_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_decw_comp_equal_back_fail_decc_pass_decc_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_zero_comp_not_equal_back_fail_wrap_pass_zero_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_zero_comp_not_equal_back_fail_keep_pass_wrap_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_repl_comp_never_back_fail_keep_pass_decc_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_inv_comp_greater_back_fail_inv_pass_decc_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_inv_comp_always_back_fail_wrap_pass_inv_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_repl_comp_greater_back_fail_decw_pass_decw_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_decw_comp_equal_back_fail_incc_pass_keep_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_keep_comp_less_or_equal_back_fail_zero_pass_decc_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_wrap_comp_always_back_fail_decc_pass_repl_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_incc_comp_less_or_equal_back_fail_zero_pass_decw_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_decc_comp_never_back_fail_incc_pass_incc_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_inv_comp_greater_or_equal_back_fail_incc_pass_incc_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_decw_comp_greater_back_fail_incc_pass_incc_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_repl_comp_never_back_fail_wrap_pass_decc_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_decc_comp_equal_back_fail_wrap_pass_keep_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_incc_comp_not_equal_back_fail_keep_pass_wrap_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_repl_comp_greater_back_fail_decc_pass_decc_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_zero_comp_not_equal_back_fail_decc_pass_decw_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_incc_comp_not_equal_back_fail_zero_pass_zero_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_incc_comp_always_back_fail_inv_pass_keep_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_incc_comp_greater_back_fail_keep_pass_decc_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_wrap_comp_greater_back_fail_zero_pass_decc_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_wrap_comp_less_or_equal_back_fail_zero_pass_incc_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_decw_comp_not_equal_back_fail_repl_pass_keep_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_inv_comp_less_back_fail_wrap_pass_wrap_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_keep_comp_less_back_fail_repl_pass_incc_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_zero_comp_not_equal_back_fail_inv_pass_incc_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_wrap_comp_less_or_equal_back_fail_incc_pass_inv_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_wrap_comp_greater_or_equal_back_fail_wrap_pass_wrap_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_repl_comp_equal_back_fail_inv_pass_zero_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_repl_comp_always_back_fail_repl_pass_decc_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_decw_comp_never_back_fail_zero_pass_keep_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_incc_comp_equal_back_fail_incc_pass_inv_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_inv_comp_equal_back_fail_decw_pass_incc_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_zero_comp_greater_or_equal_back_fail_zero_pass_decw_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_inv_comp_less_back_fail_decc_pass_wrap_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_zero_comp_greater_or_equal_back_fail_wrap_pass_repl_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_wrap_comp_always_back_fail_incc_pass_zero_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_keep_comp_never_back_fail_decw_pass_keep_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_keep_comp_less_or_equal_back_fail_inv_pass_zero_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_keep_comp_never_back_fail_decc_pass_decc_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_wrap_comp_greater_back_fail_keep_pass_wrap_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_wrap_comp_equal_back_fail_inv_pass_keep_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_inv_comp_never_back_fail_zero_pass_decw_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_decw_comp_greater_or_equal_back_fail_wrap_pass_repl_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_keep_comp_greater_or_equal_back_fail_inv_pass_repl_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_repl_comp_never_back_fail_wrap_pass_inv_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_repl_comp_greater_or_equal_back_fail_wrap_pass_wrap_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_decw_comp_greater_back_fail_decc_pass_decw_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_incc_comp_never_back_fail_decw_pass_wrap_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_inv_comp_always_back_fail_keep_pass_repl_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_repl_comp_equal_back_fail_keep_pass_zero_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_decc_comp_greater_back_fail_decc_pass_decw_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_keep_comp_not_equal_back_fail_inv_pass_repl_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_inv_comp_always_back_fail_decc_pass_incc_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_inv_comp_greater_or_equal_back_fail_keep_pass_wrap_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_zero_comp_always_back_fail_wrap_pass_inv_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_wrap_comp_greater_or_equal_back_fail_zero_pass_decc_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_decc_comp_always_back_fail_decc_pass_keep_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_repl_comp_not_equal_back_fail_keep_pass_decw_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_wrap_comp_equal_back_fail_decc_pass_wrap_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_keep_comp_less_or_equal_back_fail_zero_pass_decc_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_decw_comp_equal_back_fail_repl_pass_zero_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_wrap_comp_greater_or_equal_back_fail_wrap_pass_decc_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_incc_comp_greater_or_equal_back_fail_decc_pass_zero_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_repl_comp_not_equal_back_fail_decw_pass_zero_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_keep_comp_greater_or_equal_back_fail_decw_pass_wrap_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_incc_comp_less_or_equal_back_fail_keep_pass_keep_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_inv_comp_greater_or_equal_back_fail_repl_pass_decc_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_incc_comp_greater_or_equal_back_fail_repl_pass_decc_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_inv_comp_greater_or_equal_back_fail_inv_pass_keep_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_repl_comp_less_or_equal_back_fail_repl_pass_zero_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_wrap_comp_greater_back_fail_incc_pass_decw_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_keep_comp_greater_back_fail_inv_pass_incc_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_repl_comp_equal_back_fail_decw_pass_repl_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_keep_comp_less_back_fail_zero_pass_decw_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_wrap_comp_equal_back_fail_repl_pass_decw_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_zero_comp_always_back_fail_inv_pass_keep_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_repl_comp_never_back_fail_inv_pass_repl_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_keep_comp_never_back_fail_zero_pass_decc_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_inv_comp_equal_back_fail_inv_pass_inv_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_decw_comp_equal_back_fail_inv_pass_zero_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_decc_comp_less_or_equal_back_fail_decw_pass_repl_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_inv_comp_never_back_fail_incc_pass_zero_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_zero_comp_less_or_equal_back_fail_inv_pass_incc_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_decw_comp_always_back_fail_keep_pass_decc_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_incc_comp_less_or_equal_back_fail_wrap_pass_wrap_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_wrap_comp_not_equal_back_fail_inv_pass_inv_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_decc_comp_less_or_equal_back_fail_repl_pass_repl_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_keep_comp_greater_back_fail_decw_pass_decw_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_decc_comp_less_or_equal_back_fail_wrap_pass_inv_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_repl_comp_equal_back_fail_repl_pass_keep_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_decc_comp_less_back_fail_inv_pass_repl_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_repl_comp_less_back_fail_incc_pass_wrap_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_zero_comp_never_back_fail_inv_pass_decc_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_inv_comp_never_back_fail_keep_pass_repl_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_decw_comp_not_equal_back_fail_repl_pass_decw_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_inv_comp_greater_back_fail_inv_pass_repl_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_zero_comp_never_back_fail_inv_pass_repl_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_inv_comp_greater_or_equal_back_fail_repl_pass_wrap_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_decw_comp_always_back_fail_decc_pass_decw_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_inv_comp_less_or_equal_back_fail_incc_pass_incc_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_repl_comp_less_or_equal_back_fail_repl_pass_decc_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_inv_comp_greater_back_fail_decw_pass_repl_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_keep_comp_greater_or_equal_back_fail_zero_pass_repl_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_decc_comp_less_or_equal_back_fail_zero_pass_keep_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_decc_comp_greater_or_equal_back_fail_repl_pass_repl_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_incc_comp_less_or_equal_back_fail_decw_pass_decw_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_wrap_comp_never_back_fail_keep_pass_repl_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_zero_comp_never_back_fail_repl_pass_decc_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_inv_comp_greater_back_fail_decc_pass_decc_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_keep_comp_always_back_fail_incc_pass_inv_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_incc_comp_equal_back_fail_inv_pass_wrap_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_incc_comp_never_back_fail_inv_pass_keep_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_keep_comp_always_back_fail_inv_pass_decc_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_incc_comp_always_back_fail_incc_pass_incc_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_decw_comp_less_back_fail_decw_pass_decc_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_zero_comp_not_equal_back_fail_decw_pass_zero_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_repl_comp_greater_or_equal_back_fail_incc_pass_decw_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_keep_comp_equal_back_fail_repl_pass_incc_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_zero_comp_always_back_fail_wrap_pass_keep_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_incc_comp_always_back_fail_decw_pass_decc_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_decc_comp_equal_back_fail_repl_pass_zero_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_repl_comp_never_back_fail_decc_pass_wrap_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_decc_comp_greater_or_equal_back_fail_decc_pass_incc_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_zero_comp_always_back_fail_repl_pass_zero_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_keep_comp_not_equal_back_fail_wrap_pass_repl_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_keep_comp_less_or_equal_back_fail_zero_pass_decw_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_incc_comp_never_back_fail_decc_pass_zero_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_decc_comp_less_or_equal_back_fail_repl_pass_decw_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_decc_comp_less_back_fail_decw_pass_keep_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_wrap_comp_not_equal_back_fail_zero_pass_decc_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_inv_comp_less_or_equal_back_fail_zero_pass_decw_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_incc_comp_greater_back_fail_wrap_pass_decc_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_wrap_comp_less_back_fail_keep_pass_keep_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_decc_comp_not_equal_back_fail_decc_pass_inv_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_zero_comp_greater_or_equal_back_fail_zero_pass_keep_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_decw_comp_always_back_fail_decw_pass_inv_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_wrap_comp_always_back_fail_inv_pass_incc_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_wrap_comp_never_back_fail_keep_pass_incc_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_keep_comp_not_equal_back_fail_zero_pass_decw_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_repl_comp_less_or_equal_back_fail_inv_pass_keep_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_decw_comp_greater_back_fail_keep_pass_decw_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_decc_comp_less_or_equal_back_fail_incc_pass_inv_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_decw_comp_less_back_fail_wrap_pass_repl_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_inv_comp_always_back_fail_decc_pass_zero_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_inv_comp_greater_or_equal_back_fail_decw_pass_zero_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_decw_comp_always_back_fail_incc_pass_zero_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_wrap_comp_not_equal_back_fail_incc_pass_wrap_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_decc_comp_less_back_fail_inv_pass_inv_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_keep_comp_equal_back_fail_inv_pass_inv_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_wrap_comp_equal_back_fail_keep_pass_repl_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_repl_comp_greater_back_fail_decw_pass_repl_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_keep_comp_never_back_fail_repl_pass_decc_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_inv_comp_equal_back_fail_inv_pass_wrap_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_zero_comp_greater_back_fail_decc_pass_inv_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_decc_comp_always_back_fail_incc_pass_repl_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_decc_comp_equal_back_fail_decw_pass_decw_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_wrap_comp_less_back_fail_incc_pass_zero_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_incc_comp_less_or_equal_back_fail_keep_pass_incc_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_decc_comp_never_back_fail_incc_pass_zero_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_inv_comp_not_equal_back_fail_repl_pass_keep_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_decc_comp_always_back_fail_zero_pass_incc_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_wrap_comp_not_equal_back_fail_decc_pass_decw_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_inv_comp_not_equal_back_fail_incc_pass_inv_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_zero_comp_always_back_fail_decw_pass_keep_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_decc_comp_greater_back_fail_decc_pass_repl_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_incc_comp_not_equal_back_fail_incc_pass_inv_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_wrap_comp_less_or_equal_back_fail_inv_pass_wrap_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_zero_comp_never_back_fail_decw_pass_keep_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_decc_comp_not_equal_back_fail_decw_pass_decw_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_repl_comp_not_equal_back_fail_decc_pass_repl_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_repl_comp_less_or_equal_back_fail_repl_pass_keep_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_wrap_comp_less_back_fail_decw_pass_decw_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_decw_comp_greater_back_fail_inv_pass_incc_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_decw_comp_not_equal_back_fail_wrap_pass_decw_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_keep_comp_equal_back_fail_inv_pass_incc_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_incc_comp_greater_or_equal_back_fail_decc_pass_decc_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_zero_comp_less_or_equal_back_fail_zero_pass_decw_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_decw_comp_not_equal_back_fail_repl_pass_inv_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_keep_comp_greater_or_equal_back_fail_wrap_pass_decw_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_wrap_comp_never_back_fail_inv_pass_wrap_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_zero_comp_greater_or_equal_back_fail_repl_pass_wrap_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_zero_comp_not_equal_back_fail_decw_pass_incc_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_inv_comp_greater_back_fail_repl_pass_zero_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_wrap_comp_not_equal_back_fail_wrap_pass_keep_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_repl_comp_never_back_fail_repl_pass_inv_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_decc_comp_less_back_fail_inv_pass_zero_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_repl_comp_greater_back_fail_zero_pass_keep_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_decc_comp_never_back_fail_keep_pass_incc_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_zero_comp_less_or_equal_back_fail_inv_pass_inv_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_inv_comp_less_back_fail_decw_pass_zero_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_keep_comp_always_back_fail_repl_pass_decw_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_zero_comp_never_back_fail_incc_pass_inv_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_keep_comp_greater_or_equal_back_fail_inv_pass_inv_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_decc_comp_never_back_fail_inv_pass_keep_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_inv_comp_less_back_fail_decc_pass_keep_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_decw_comp_not_equal_back_fail_decc_pass_keep_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_zero_comp_not_equal_back_fail_zero_pass_decc_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_keep_comp_greater_or_equal_back_fail_keep_pass_incc_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_zero_comp_greater_or_equal_back_fail_decc_pass_decc_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_decc_comp_greater_or_equal_back_fail_decc_pass_keep_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_decc_comp_greater_back_fail_zero_pass_wrap_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_decc_comp_equal_back_fail_incc_pass_incc_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_zero_comp_always_back_fail_inv_pass_keep_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_inv_comp_always_back_fail_inv_pass_keep_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_inv_comp_always_back_fail_incc_pass_inv_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_keep_comp_always_back_fail_wrap_pass_decw_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_inv_comp_equal_back_fail_decw_pass_decw_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_keep_comp_always_back_fail_zero_pass_incc_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_wrap_comp_never_back_fail_keep_pass_decc_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_decw_comp_greater_back_fail_zero_pass_incc_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_wrap_comp_never_back_fail_wrap_pass_wrap_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_keep_comp_greater_back_fail_repl_pass_repl_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_wrap_comp_less_or_equal_back_fail_incc_pass_zero_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_inv_comp_less_or_equal_back_fail_decw_pass_repl_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_incc_comp_equal_back_fail_decw_pass_incc_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_decw_comp_equal_back_fail_decc_pass_inv_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_zero_comp_greater_back_fail_keep_pass_incc_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_zero_comp_equal_back_fail_wrap_pass_zero_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_keep_comp_less_or_equal_back_fail_repl_pass_keep_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_repl_comp_never_back_fail_inv_pass_zero_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_inv_comp_equal_back_fail_zero_pass_inv_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_decw_comp_less_or_equal_back_fail_decw_pass_wrap_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_inv_comp_not_equal_back_fail_wrap_pass_zero_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_wrap_comp_less_or_equal_back_fail_inv_pass_wrap_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_repl_comp_greater_or_equal_back_fail_zero_pass_repl_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_wrap_comp_always_back_fail_incc_pass_repl_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_incc_comp_less_or_equal_back_fail_decw_pass_inv_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_keep_comp_greater_or_equal_back_fail_inv_pass_incc_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_incc_comp_greater_back_fail_decw_pass_decw_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_incc_comp_equal_back_fail_keep_pass_decc_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_repl_comp_greater_back_fail_wrap_pass_keep_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_repl_comp_never_back_fail_incc_pass_decw_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_decc_comp_not_equal_back_fail_decc_pass_wrap_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_keep_comp_greater_back_fail_wrap_pass_decc_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_keep_comp_greater_or_equal_back_fail_incc_pass_inv_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_zero_comp_less_back_fail_wrap_pass_incc_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_decc_comp_never_back_fail_repl_pass_inv_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_zero_comp_greater_back_fail_inv_pass_keep_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_keep_comp_always_back_fail_decw_pass_wrap_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_decc_comp_always_back_fail_inv_pass_incc_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_zero_comp_not_equal_back_fail_zero_pass_decw_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_inv_comp_equal_back_fail_decc_pass_keep_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_decw_comp_greater_back_fail_decc_pass_decw_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_inv_comp_never_back_fail_repl_pass_keep_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_zero_comp_less_back_fail_inv_pass_keep_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_decc_comp_not_equal_back_fail_wrap_pass_decc_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_decw_comp_less_or_equal_back_fail_incc_pass_wrap_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_keep_comp_never_back_fail_decw_pass_inv_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_decc_comp_less_back_fail_repl_pass_inv_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_zero_comp_less_or_equal_back_fail_inv_pass_repl_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_incc_comp_less_back_fail_inv_pass_decc_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_decc_comp_greater_or_equal_back_fail_decw_pass_decw_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_incc_comp_never_back_fail_wrap_pass_decc_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_keep_comp_greater_back_fail_repl_pass_incc_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_incc_comp_always_back_fail_decw_pass_keep_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_keep_comp_greater_back_fail_zero_pass_decw_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_decc_comp_not_equal_back_fail_incc_pass_incc_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_incc_comp_less_or_equal_back_fail_incc_pass_decc_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_keep_comp_never_back_fail_inv_pass_decc_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_zero_comp_less_or_equal_back_fail_wrap_pass_repl_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_zero_comp_greater_or_equal_back_fail_zero_pass_decw_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_keep_comp_equal_back_fail_repl_pass_wrap_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_repl_comp_greater_back_fail_decc_pass_repl_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_inv_comp_greater_back_fail_repl_pass_keep_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_zero_comp_always_back_fail_keep_pass_zero_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_decc_comp_always_back_fail_keep_pass_zero_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_keep_comp_less_back_fail_wrap_pass_incc_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_keep_comp_greater_back_fail_zero_pass_decw_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_decc_comp_greater_back_fail_zero_pass_inv_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_decc_comp_greater_or_equal_back_fail_inv_pass_keep_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_decc_comp_less_or_equal_back_fail_decc_pass_keep_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_decw_comp_equal_back_fail_decw_pass_wrap_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_wrap_comp_greater_or_equal_back_fail_zero_pass_inv_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_keep_comp_never_back_fail_keep_pass_repl_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_wrap_comp_less_or_equal_back_fail_inv_pass_repl_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_zero_comp_less_or_equal_back_fail_keep_pass_inv_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_keep_comp_less_back_fail_inv_pass_wrap_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_inv_comp_not_equal_back_fail_zero_pass_decc_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_zero_comp_never_back_fail_decc_pass_inv_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_inv_comp_less_or_equal_back_fail_repl_pass_decw_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_keep_comp_less_or_equal_back_fail_decc_pass_keep_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_repl_comp_equal_back_fail_keep_pass_zero_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_repl_comp_greater_back_fail_keep_pass_repl_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_decw_comp_greater_back_fail_zero_pass_incc_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_keep_comp_not_equal_back_fail_keep_pass_repl_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_zero_comp_greater_back_fail_decw_pass_wrap_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_decw_comp_greater_or_equal_back_fail_repl_pass_decw_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_keep_comp_never_back_fail_decc_pass_incc_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_incc_comp_less_or_equal_back_fail_decc_pass_zero_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_inv_comp_always_back_fail_incc_pass_repl_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_incc_comp_always_back_fail_decc_pass_zero_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_repl_comp_greater_or_equal_back_fail_incc_pass_zero_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_decw_comp_less_or_equal_back_fail_keep_pass_decw_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_incc_comp_always_back_fail_keep_pass_keep_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_incc_comp_always_back_fail_incc_pass_wrap_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_decc_comp_less_or_equal_back_fail_keep_pass_inv_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_keep_comp_never_back_fail_zero_pass_zero_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_decc_comp_equal_back_fail_inv_pass_keep_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_decc_comp_always_back_fail_keep_pass_incc_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_wrap_comp_never_back_fail_wrap_pass_wrap_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_keep_comp_less_back_fail_decc_pass_incc_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_repl_comp_never_back_fail_inv_pass_inv_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_zero_comp_greater_or_equal_back_fail_keep_pass_zero_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_decc_comp_equal_back_fail_keep_pass_decc_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_decc_comp_less_back_fail_zero_pass_wrap_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_keep_comp_equal_back_fail_incc_pass_decc_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_inv_comp_always_back_fail_zero_pass_incc_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_repl_comp_less_or_equal_back_fail_inv_pass_inv_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_incc_comp_greater_or_equal_back_fail_inv_pass_keep_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_wrap_comp_less_back_fail_zero_pass_keep_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_inv_comp_equal_back_fail_incc_pass_inv_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_inv_comp_equal_back_fail_inv_pass_incc_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_decc_comp_not_equal_back_fail_decw_pass_repl_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_wrap_comp_greater_or_equal_back_fail_wrap_pass_inv_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_repl_comp_less_back_fail_decc_pass_inv_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_decw_comp_less_back_fail_wrap_pass_repl_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_zero_comp_equal_back_fail_incc_pass_decc_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_zero_comp_greater_back_fail_wrap_pass_decw_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_decw_comp_equal_back_fail_keep_pass_incc_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_wrap_comp_never_back_fail_incc_pass_zero_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_zero_comp_greater_back_fail_zero_pass_decc_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_incc_comp_always_back_fail_incc_pass_incc_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_incc_comp_less_back_fail_repl_pass_repl_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_wrap_comp_never_back_fail_zero_pass_zero_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_inv_comp_equal_back_fail_keep_pass_inv_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_keep_comp_not_equal_back_fail_wrap_pass_keep_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_keep_comp_less_back_fail_zero_pass_repl_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_decw_comp_greater_or_equal_back_fail_wrap_pass_incc_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_incc_comp_greater_or_equal_back_fail_zero_pass_decc_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_decw_comp_always_back_fail_decw_pass_wrap_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_decc_comp_equal_back_fail_keep_pass_wrap_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_zero_comp_equal_back_fail_decw_pass_zero_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_decw_comp_less_or_equal_back_fail_incc_pass_decw_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_incc_comp_never_back_fail_decc_pass_incc_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_decc_comp_greater_back_fail_repl_pass_inv_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_inv_comp_not_equal_back_fail_wrap_pass_wrap_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_repl_comp_greater_or_equal_back_fail_decw_pass_decc_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_repl_comp_never_back_fail_incc_pass_decw_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_repl_comp_greater_or_equal_back_fail_repl_pass_keep_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_decc_comp_never_back_fail_incc_pass_decc_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_keep_comp_less_back_fail_decc_pass_decw_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_inv_comp_equal_back_fail_repl_pass_incc_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_keep_comp_less_back_fail_incc_pass_keep_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_inv_comp_never_back_fail_keep_pass_wrap_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_repl_comp_less_back_fail_decc_pass_decc_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_decc_comp_not_equal_back_fail_inv_pass_decw_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_inv_comp_never_back_fail_decc_pass_keep_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_keep_comp_equal_back_fail_decc_pass_wrap_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_incc_comp_never_back_fail_incc_pass_incc_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_decc_comp_less_back_fail_incc_pass_incc_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_repl_comp_never_back_fail_incc_pass_repl_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_wrap_comp_always_back_fail_decc_pass_decw_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_keep_comp_less_or_equal_back_fail_decw_pass_decc_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_wrap_comp_less_or_equal_back_fail_inv_pass_incc_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_wrap_comp_less_or_equal_back_fail_decw_pass_incc_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_decw_comp_never_back_fail_inv_pass_wrap_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_decw_comp_equal_back_fail_decc_pass_zero_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_decw_comp_greater_or_equal_back_fail_inv_pass_keep_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_repl_comp_less_back_fail_incc_pass_zero_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_decw_comp_greater_back_fail_decc_pass_zero_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_keep_comp_not_equal_back_fail_decw_pass_decw_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_zero_comp_less_back_fail_incc_pass_incc_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_inv_comp_less_back_fail_repl_pass_incc_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_decc_comp_less_back_fail_decc_pass_inv_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_decc_comp_less_back_fail_keep_pass_decw_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_decc_comp_not_equal_back_fail_decw_pass_wrap_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_keep_comp_equal_back_fail_wrap_pass_keep_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_incc_comp_not_equal_back_fail_repl_pass_decw_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_keep_comp_equal_back_fail_keep_pass_incc_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_decc_comp_not_equal_back_fail_keep_pass_zero_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_repl_comp_never_back_fail_wrap_pass_zero_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_repl_comp_not_equal_back_fail_wrap_pass_inv_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_zero_comp_greater_or_equal_back_fail_decw_pass_zero_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_incc_comp_greater_back_fail_keep_pass_wrap_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_decc_comp_greater_or_equal_back_fail_incc_pass_incc_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_inv_comp_always_back_fail_keep_pass_zero_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_keep_comp_not_equal_back_fail_zero_pass_decc_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_inv_comp_always_back_fail_decc_pass_decw_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_repl_comp_not_equal_back_fail_decc_pass_decw_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_decw_comp_less_back_fail_decc_pass_inv_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_decc_comp_always_back_fail_decw_pass_keep_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_wrap_comp_never_back_fail_zero_pass_wrap_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_repl_comp_less_back_fail_repl_pass_decw_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_decw_comp_less_back_fail_repl_pass_inv_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_wrap_comp_always_back_fail_keep_pass_inv_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_decc_comp_equal_back_fail_wrap_pass_decc_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_incc_comp_greater_or_equal_back_fail_zero_pass_zero_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_inv_comp_always_back_fail_decw_pass_incc_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_zero_comp_greater_back_fail_keep_pass_incc_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_keep_comp_less_or_equal_back_fail_incc_pass_decc_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_wrap_comp_greater_or_equal_back_fail_decw_pass_decc_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_repl_comp_never_back_fail_repl_pass_decw_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_decw_comp_less_or_equal_back_fail_inv_pass_keep_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_decw_comp_not_equal_back_fail_zero_pass_inv_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_zero_comp_always_back_fail_keep_pass_zero_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_keep_comp_not_equal_back_fail_wrap_pass_incc_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_repl_comp_greater_or_equal_back_fail_incc_pass_inv_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_incc_comp_greater_back_fail_wrap_pass_wrap_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_inv_comp_greater_back_fail_inv_pass_wrap_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_keep_comp_greater_or_equal_back_fail_incc_pass_incc_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_zero_comp_equal_back_fail_keep_pass_wrap_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_zero_comp_greater_back_fail_inv_pass_repl_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_zero_comp_greater_back_fail_wrap_pass_wrap_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_zero_comp_never_back_fail_repl_pass_decc_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_decc_comp_greater_or_equal_back_fail_repl_pass_zero_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_decw_comp_not_equal_back_fail_decc_pass_decc_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_incc_comp_not_equal_back_fail_zero_pass_decw_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_keep_comp_greater_back_fail_decc_pass_decw_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_wrap_comp_greater_or_equal_back_fail_zero_pass_repl_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_keep_comp_not_equal_back_fail_inv_pass_inv_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_decw_comp_not_equal_back_fail_decw_pass_repl_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_decw_comp_greater_or_equal_back_fail_keep_pass_decc_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_repl_comp_equal_back_fail_inv_pass_keep_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_repl_comp_greater_back_fail_incc_pass_wrap_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_inv_comp_always_back_fail_keep_pass_inv_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_decw_comp_equal_back_fail_repl_pass_wrap_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_wrap_comp_greater_back_fail_wrap_pass_repl_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_incc_comp_not_equal_back_fail_keep_pass_decc_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_keep_comp_greater_or_equal_back_fail_incc_pass_repl_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_decc_comp_less_back_fail_zero_pass_repl_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_decw_comp_less_back_fail_repl_pass_repl_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_repl_comp_equal_back_fail_wrap_pass_decw_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_incc_comp_not_equal_back_fail_inv_pass_wrap_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_keep_comp_not_equal_back_fail_decc_pass_zero_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_repl_comp_always_back_fail_decw_pass_keep_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_inv_comp_equal_back_fail_wrap_pass_decc_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_wrap_comp_less_back_fail_zero_pass_keep_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_incc_comp_less_or_equal_back_fail_zero_pass_repl_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_keep_comp_not_equal_back_fail_keep_pass_inv_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_inv_comp_greater_or_equal_back_fail_keep_pass_decw_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_zero_comp_less_back_fail_zero_pass_incc_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_decw_comp_always_back_fail_zero_pass_decc_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_zero_comp_not_equal_back_fail_repl_pass_keep_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_keep_comp_less_or_equal_back_fail_repl_pass_repl_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_zero_comp_not_equal_back_fail_decw_pass_wrap_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_decw_comp_never_back_fail_zero_pass_keep_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_decw_comp_never_back_fail_keep_pass_zero_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_inv_comp_not_equal_back_fail_zero_pass_repl_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_decc_comp_equal_back_fail_decc_pass_keep_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_wrap_comp_always_back_fail_incc_pass_decw_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_repl_comp_less_back_fail_inv_pass_repl_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_incc_comp_always_back_fail_wrap_pass_decw_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_inv_comp_greater_or_equal_back_fail_incc_pass_decc_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_decw_comp_greater_or_equal_back_fail_keep_pass_decw_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_incc_comp_greater_back_fail_wrap_pass_zero_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_repl_comp_less_or_equal_back_fail_decw_pass_keep_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_inv_comp_never_back_fail_keep_pass_keep_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_inv_comp_greater_or_equal_back_fail_wrap_pass_keep_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_keep_comp_greater_or_equal_back_fail_decw_pass_zero_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_keep_comp_greater_back_fail_inv_pass_repl_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_wrap_comp_greater_back_fail_wrap_pass_incc_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_wrap_comp_greater_back_fail_incc_pass_decw_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_wrap_comp_not_equal_back_fail_zero_pass_zero_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_wrap_comp_equal_back_fail_inv_pass_incc_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_wrap_comp_equal_back_fail_inv_pass_repl_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_keep_comp_less_back_fail_repl_pass_keep_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_zero_comp_never_back_fail_decw_pass_incc_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_keep_comp_always_back_fail_incc_pass_inv_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_keep_comp_equal_back_fail_decc_pass_wrap_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_zero_comp_always_back_fail_wrap_pass_inv_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_zero_comp_never_back_fail_zero_pass_wrap_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_keep_comp_greater_back_fail_zero_pass_wrap_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_wrap_comp_never_back_fail_repl_pass_incc_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_decc_comp_not_equal_back_fail_wrap_pass_incc_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_wrap_comp_not_equal_back_fail_incc_pass_zero_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_incc_comp_less_back_fail_repl_pass_keep_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_incc_comp_greater_or_equal_back_fail_incc_pass_keep_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_inv_comp_not_equal_back_fail_wrap_pass_keep_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_wrap_comp_greater_or_equal_back_fail_decw_pass_incc_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_decw_comp_equal_back_fail_decw_pass_wrap_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_wrap_comp_never_back_fail_zero_pass_decw_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_keep_comp_always_back_fail_incc_pass_inv_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_repl_comp_less_or_equal_back_fail_keep_pass_inv_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_inv_comp_never_back_fail_wrap_pass_inv_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_zero_comp_greater_back_fail_decc_pass_inv_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_decw_comp_not_equal_back_fail_keep_pass_inv_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_decc_comp_less_back_fail_repl_pass_decw_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_decc_comp_greater_or_equal_back_fail_wrap_pass_decc_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_decc_comp_greater_back_fail_inv_pass_decc_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_incc_comp_not_equal_back_fail_incc_pass_keep_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_wrap_comp_equal_back_fail_zero_pass_decc_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_repl_comp_equal_back_fail_inv_pass_decc_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_incc_comp_less_or_equal_back_fail_inv_pass_inv_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_wrap_comp_never_back_fail_inv_pass_repl_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_zero_comp_greater_back_fail_repl_pass_incc_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_repl_comp_greater_back_fail_decw_pass_inv_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_decc_comp_less_or_equal_back_fail_decc_pass_decc_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_zero_comp_less_back_fail_keep_pass_inv_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_zero_comp_greater_or_equal_back_fail_keep_pass_repl_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_keep_comp_less_or_equal_back_fail_decc_pass_incc_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_incc_comp_less_back_fail_decw_pass_inv_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_decc_comp_less_or_equal_back_fail_inv_pass_wrap_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_repl_comp_greater_or_equal_back_fail_zero_pass_incc_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_zero_comp_always_back_fail_decw_pass_incc_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_repl_comp_less_back_fail_keep_pass_incc_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_repl_comp_less_back_fail_keep_pass_repl_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_wrap_comp_not_equal_back_fail_incc_pass_zero_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_inv_comp_not_equal_back_fail_decc_pass_decc_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_decc_comp_greater_or_equal_back_fail_wrap_pass_decw_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_wrap_comp_never_back_fail_incc_pass_repl_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_wrap_comp_greater_back_fail_decw_pass_decw_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_zero_comp_greater_back_fail_zero_pass_wrap_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_keep_comp_greater_or_equal_back_fail_decc_pass_decc_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_zero_comp_not_equal_back_fail_wrap_pass_repl_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_keep_comp_greater_back_fail_wrap_pass_incc_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_decc_comp_less_or_equal_back_fail_decc_pass_zero_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_repl_comp_equal_back_fail_zero_pass_keep_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_zero_comp_greater_back_fail_wrap_pass_decc_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_decc_comp_greater_back_fail_wrap_pass_incc_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_keep_comp_less_or_equal_back_fail_zero_pass_incc_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_repl_comp_greater_back_fail_wrap_pass_decc_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_inv_comp_greater_back_fail_inv_pass_incc_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_inv_comp_less_or_equal_back_fail_inv_pass_decc_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_keep_comp_greater_or_equal_back_fail_inv_pass_incc_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_decc_comp_equal_back_fail_keep_pass_incc_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_zero_comp_always_back_fail_incc_pass_wrap_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_zero_comp_less_or_equal_back_fail_zero_pass_incc_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_keep_comp_equal_back_fail_repl_pass_decc_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_repl_comp_less_back_fail_inv_pass_zero_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_decc_comp_less_back_fail_decw_pass_keep_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_decw_comp_greater_or_equal_back_fail_decw_pass_zero_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_inv_comp_less_back_fail_keep_pass_incc_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_inv_comp_less_or_equal_back_fail_decc_pass_decc_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_incc_comp_equal_back_fail_wrap_pass_keep_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_decc_comp_always_back_fail_decw_pass_decc_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_incc_comp_not_equal_back_fail_wrap_pass_zero_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_inv_comp_less_or_equal_back_fail_wrap_pass_zero_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_repl_comp_less_back_fail_incc_pass_decw_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_inv_comp_always_back_fail_incc_pass_keep_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_inv_comp_never_back_fail_wrap_pass_keep_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_decw_comp_equal_back_fail_repl_pass_keep_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_repl_comp_greater_back_fail_decw_pass_keep_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_wrap_comp_equal_back_fail_inv_pass_decw_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_incc_comp_equal_back_fail_decc_pass_repl_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_keep_comp_greater_back_fail_keep_pass_keep_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_inv_comp_not_equal_back_fail_decw_pass_wrap_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_wrap_comp_less_back_fail_repl_pass_decw_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_decc_comp_equal_back_fail_keep_pass_zero_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_decc_comp_never_back_fail_inv_pass_decc_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_zero_comp_less_back_fail_keep_pass_decc_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_repl_comp_not_equal_back_fail_incc_pass_keep_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_repl_comp_less_back_fail_zero_pass_repl_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_decw_comp_greater_back_fail_decc_pass_repl_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_zero_comp_less_back_fail_repl_pass_decw_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_repl_comp_greater_back_fail_decw_pass_decc_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_keep_comp_greater_back_fail_keep_pass_repl_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_inv_comp_not_equal_back_fail_inv_pass_wrap_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_decw_comp_less_back_fail_keep_pass_repl_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_inv_comp_always_back_fail_decc_pass_keep_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_decw_comp_greater_or_equal_back_fail_wrap_pass_zero_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_incc_comp_never_back_fail_decw_pass_incc_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_decc_comp_greater_or_equal_back_fail_inv_pass_zero_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_zero_comp_not_equal_back_fail_wrap_pass_zero_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_incc_comp_never_back_fail_inv_pass_keep_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_keep_comp_less_or_equal_back_fail_incc_pass_repl_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_decc_comp_less_or_equal_back_fail_decw_pass_keep_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_decc_comp_less_back_fail_incc_pass_inv_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_zero_comp_less_or_equal_back_fail_keep_pass_keep_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_zero_comp_equal_back_fail_wrap_pass_wrap_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_incc_comp_equal_back_fail_zero_pass_inv_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_decw_comp_never_back_fail_wrap_pass_decw_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_keep_comp_equal_back_fail_wrap_pass_incc_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_decw_comp_greater_back_fail_zero_pass_wrap_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_decc_comp_never_back_fail_zero_pass_decw_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_decc_comp_greater_back_fail_repl_pass_zero_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_repl_comp_greater_back_fail_incc_pass_repl_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_wrap_comp_greater_back_fail_decc_pass_keep_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_zero_comp_greater_or_equal_back_fail_inv_pass_inv_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_incc_comp_never_back_fail_repl_pass_repl_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_inv_comp_not_equal_back_fail_decw_pass_decc_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_decw_comp_never_back_fail_keep_pass_decc_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_incc_comp_never_back_fail_keep_pass_incc_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_wrap_comp_greater_or_equal_back_fail_inv_pass_incc_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_repl_comp_always_back_fail_zero_pass_decw_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_decw_comp_never_back_fail_incc_pass_keep_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_decw_comp_not_equal_back_fail_decc_pass_incc_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_wrap_comp_greater_or_equal_back_fail_zero_pass_keep_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_repl_comp_equal_back_fail_incc_pass_decw_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_inv_comp_never_back_fail_zero_pass_zero_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_zero_comp_greater_or_equal_back_fail_zero_pass_incc_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_inv_comp_less_back_fail_incc_pass_wrap_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_decc_comp_less_back_fail_zero_pass_keep_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_decw_comp_less_back_fail_wrap_pass_zero_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_decc_comp_less_or_equal_back_fail_repl_pass_repl_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_incc_comp_not_equal_back_fail_inv_pass_decw_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_keep_comp_less_or_equal_back_fail_decc_pass_keep_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_wrap_comp_greater_or_equal_back_fail_inv_pass_keep_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_inv_comp_less_or_equal_back_fail_zero_pass_zero_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_decw_comp_never_back_fail_inv_pass_keep_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_incc_comp_greater_or_equal_back_fail_repl_pass_decc_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_incc_comp_equal_back_fail_decw_pass_inv_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_keep_comp_equal_back_fail_decc_pass_wrap_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_repl_comp_less_back_fail_decw_pass_decw_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_decw_comp_greater_or_equal_back_fail_decw_pass_decc_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_decc_comp_always_back_fail_wrap_pass_decc_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_decc_comp_less_or_equal_back_fail_zero_pass_repl_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_repl_comp_greater_or_equal_back_fail_inv_pass_keep_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_decw_comp_equal_back_fail_repl_pass_keep_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_decw_comp_never_back_fail_repl_pass_zero_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_decc_comp_greater_or_equal_back_fail_wrap_pass_inv_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_decw_comp_equal_back_fail_inv_pass_wrap_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_incc_comp_not_equal_back_fail_inv_pass_decw_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_repl_comp_greater_back_fail_repl_pass_inv_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_inv_comp_always_back_fail_wrap_pass_decw_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_decw_comp_greater_back_fail_decc_pass_incc_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_inv_comp_never_back_fail_keep_pass_decw_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_decw_comp_always_back_fail_decw_pass_wrap_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_zero_comp_less_back_fail_keep_pass_keep_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_decc_comp_not_equal_back_fail_decc_pass_repl_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_keep_comp_less_back_fail_keep_pass_incc_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_repl_comp_greater_back_fail_decc_pass_zero_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_decc_comp_equal_back_fail_zero_pass_keep_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_repl_comp_greater_or_equal_back_fail_decw_pass_keep_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_keep_comp_greater_or_equal_back_fail_decw_pass_repl_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_inv_comp_never_back_fail_decc_pass_inv_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_keep_comp_always_back_fail_wrap_pass_incc_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_repl_comp_equal_back_fail_wrap_pass_decw_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_repl_comp_not_equal_back_fail_inv_pass_decc_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_decw_comp_equal_back_fail_repl_pass_incc_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_decc_comp_never_back_fail_incc_pass_decw_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_decc_comp_not_equal_back_fail_zero_pass_wrap_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_repl_comp_not_equal_back_fail_incc_pass_incc_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_inv_comp_less_or_equal_back_fail_zero_pass_decw_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_zero_comp_less_back_fail_inv_pass_decw_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_repl_comp_never_back_fail_keep_pass_inv_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_wrap_comp_not_equal_back_fail_keep_pass_decc_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_decw_comp_greater_or_equal_back_fail_keep_pass_decw_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_inv_comp_greater_back_fail_decc_pass_inv_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_keep_comp_greater_back_fail_zero_pass_keep_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_wrap_comp_never_back_fail_repl_pass_keep_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_repl_comp_always_back_fail_incc_pass_decw_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_incc_comp_not_equal_back_fail_incc_pass_decw_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_inv_comp_less_or_equal_back_fail_zero_pass_wrap_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_wrap_comp_equal_back_fail_keep_pass_decw_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_repl_comp_not_equal_back_fail_decw_pass_zero_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_decw_comp_less_or_equal_back_fail_repl_pass_zero_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_zero_comp_never_back_fail_inv_pass_decc_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_repl_comp_always_back_fail_keep_pass_keep_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_keep_comp_never_back_fail_decw_pass_keep_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_decc_comp_greater_back_fail_incc_pass_decc_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_keep_comp_always_back_fail_repl_pass_decc_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_repl_comp_always_back_fail_wrap_pass_zero_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_wrap_comp_greater_back_fail_keep_pass_decw_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_inv_comp_less_or_equal_back_fail_repl_pass_decc_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_wrap_comp_less_back_fail_wrap_pass_repl_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_incc_comp_equal_back_fail_keep_pass_decc_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_decc_comp_greater_back_fail_inv_pass_incc_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_inv_comp_equal_back_fail_decc_pass_inv_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_inv_comp_never_back_fail_inv_pass_inv_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_keep_comp_never_back_fail_keep_pass_decc_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_repl_comp_less_back_fail_decw_pass_keep_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_decw_comp_greater_back_fail_inv_pass_repl_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_inv_comp_always_back_fail_repl_pass_repl_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_wrap_comp_less_or_equal_back_fail_repl_pass_decc_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_wrap_comp_greater_back_fail_inv_pass_decw_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_decc_comp_always_back_fail_wrap_pass_zero_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_repl_comp_equal_back_fail_repl_pass_repl_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_decc_comp_never_back_fail_wrap_pass_wrap_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_inv_comp_never_back_fail_decc_pass_inv_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_decc_comp_never_back_fail_wrap_pass_decc_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_zero_comp_less_or_equal_back_fail_repl_pass_decw_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_incc_comp_equal_back_fail_zero_pass_incc_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_inv_comp_less_back_fail_wrap_pass_repl_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_keep_comp_never_back_fail_decw_pass_zero_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_repl_comp_never_back_fail_decc_pass_repl_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_decw_comp_equal_back_fail_decc_pass_decc_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_decw_comp_not_equal_back_fail_inv_pass_repl_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_keep_comp_never_back_fail_incc_pass_decc_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_keep_comp_less_back_fail_wrap_pass_decw_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_repl_comp_not_equal_back_fail_decc_pass_decc_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_wrap_comp_greater_back_fail_incc_pass_decw_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_incc_comp_less_back_fail_wrap_pass_incc_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_inv_comp_less_back_fail_incc_pass_decw_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_repl_comp_less_or_equal_back_fail_incc_pass_decw_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_zero_comp_always_back_fail_zero_pass_keep_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_keep_comp_greater_or_equal_back_fail_inv_pass_decw_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_repl_comp_less_or_equal_back_fail_repl_pass_repl_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_decw_comp_less_or_equal_back_fail_inv_pass_repl_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_keep_comp_greater_or_equal_back_fail_wrap_pass_decc_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_zero_comp_greater_or_equal_back_fail_zero_pass_incc_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_decw_comp_less_or_equal_back_fail_decw_pass_repl_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_decc_comp_greater_or_equal_back_fail_repl_pass_zero_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_zero_comp_greater_or_equal_back_fail_decc_pass_decw_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_incc_comp_always_back_fail_zero_pass_zero_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_decc_comp_always_back_fail_decc_pass_wrap_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_zero_comp_not_equal_back_fail_keep_pass_decc_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_inv_comp_greater_or_equal_back_fail_wrap_pass_decw_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_decc_comp_not_equal_back_fail_decw_pass_incc_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_repl_comp_not_equal_back_fail_repl_pass_decw_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_decc_comp_equal_back_fail_keep_pass_zero_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_incc_comp_always_back_fail_decc_pass_decw_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_incc_comp_not_equal_back_fail_wrap_pass_decc_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_wrap_comp_never_back_fail_decw_pass_decw_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_keep_comp_always_back_fail_keep_pass_incc_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_keep_comp_not_equal_back_fail_wrap_pass_decc_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_inv_comp_equal_back_fail_incc_pass_decc_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_decc_comp_equal_back_fail_inv_pass_keep_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_decc_comp_not_equal_back_fail_repl_pass_decw_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_zero_comp_less_or_equal_back_fail_decc_pass_inv_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_inv_comp_never_back_fail_keep_pass_repl_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_inv_comp_equal_back_fail_zero_pass_decc_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_zero_comp_greater_or_equal_back_fail_wrap_pass_inv_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_repl_comp_greater_back_fail_incc_pass_decc_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_inv_comp_less_or_equal_back_fail_repl_pass_decw_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_inv_comp_less_or_equal_back_fail_incc_pass_zero_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_zero_comp_always_back_fail_inv_pass_wrap_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_zero_comp_less_back_fail_keep_pass_wrap_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_incc_comp_less_or_equal_back_fail_decw_pass_keep_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_inv_comp_less_or_equal_back_fail_incc_pass_wrap_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_decc_comp_less_or_equal_back_fail_incc_pass_keep_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_wrap_comp_never_back_fail_decc_pass_decw_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_wrap_comp_greater_or_equal_back_fail_wrap_pass_decw_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_zero_comp_equal_back_fail_repl_pass_inv_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_incc_comp_less_or_equal_back_fail_decw_pass_decw_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_decw_comp_greater_or_equal_back_fail_wrap_pass_incc_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_zero_comp_greater_back_fail_zero_pass_decw_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_inv_comp_not_equal_back_fail_repl_pass_keep_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_keep_comp_not_equal_back_fail_decw_pass_wrap_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_zero_comp_never_back_fail_repl_pass_decw_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_incc_comp_equal_back_fail_inv_pass_keep_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_keep_comp_less_back_fail_decw_pass_zero_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_decc_comp_greater_back_fail_inv_pass_zero_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_wrap_comp_always_back_fail_decc_pass_decc_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_decw_comp_less_back_fail_keep_pass_zero_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_decw_comp_never_back_fail_keep_pass_repl_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_repl_comp_always_back_fail_decw_pass_incc_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_wrap_comp_less_back_fail_inv_pass_decw_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_decc_comp_never_back_fail_keep_pass_wrap_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_incc_comp_never_back_fail_repl_pass_wrap_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_inv_comp_greater_back_fail_zero_pass_wrap_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_decc_comp_never_back_fail_keep_pass_inv_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_decw_comp_less_or_equal_back_fail_zero_pass_decw_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_inv_comp_not_equal_back_fail_zero_pass_incc_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_wrap_comp_greater_back_fail_decc_pass_wrap_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_incc_comp_less_or_equal_back_fail_decc_pass_wrap_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_incc_comp_less_back_fail_wrap_pass_decc_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_zero_comp_never_back_fail_decc_pass_keep_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_inv_comp_less_or_equal_back_fail_wrap_pass_incc_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_keep_comp_greater_or_equal_back_fail_repl_pass_inv_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_repl_comp_greater_back_fail_wrap_pass_keep_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_zero_comp_equal_back_fail_repl_pass_repl_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_zero_comp_greater_back_fail_keep_pass_decw_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_decc_comp_always_back_fail_zero_pass_keep_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_decw_comp_always_back_fail_wrap_pass_decc_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_incc_comp_always_back_fail_repl_pass_wrap_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_wrap_comp_equal_back_fail_keep_pass_incc_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_incc_comp_always_back_fail_wrap_pass_zero_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_inv_comp_never_back_fail_wrap_pass_keep_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_repl_comp_greater_or_equal_back_fail_inv_pass_inv_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_decw_comp_greater_back_fail_incc_pass_keep_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_incc_comp_equal_back_fail_keep_pass_keep_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_wrap_comp_less_back_fail_repl_pass_incc_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_incc_comp_greater_back_fail_zero_pass_zero_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_incc_comp_never_back_fail_incc_pass_zero_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_repl_comp_never_back_fail_decw_pass_keep_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_inv_comp_greater_back_fail_decw_pass_inv_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_zero_comp_not_equal_back_fail_decc_pass_keep_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_inv_comp_equal_back_fail_decc_pass_zero_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_repl_comp_less_or_equal_back_fail_decw_pass_inv_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_keep_comp_never_back_fail_wrap_pass_decw_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_incc_comp_equal_back_fail_keep_pass_decc_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_decw_comp_less_back_fail_decw_pass_decw_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_incc_comp_less_or_equal_back_fail_keep_pass_wrap_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_decw_comp_not_equal_back_fail_zero_pass_keep_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_decw_comp_equal_back_fail_wrap_pass_incc_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_zero_comp_greater_or_equal_back_fail_inv_pass_zero_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_zero_comp_always_back_fail_decw_pass_decc_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_decc_comp_always_back_fail_inv_pass_zero_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_keep_comp_never_back_fail_incc_pass_zero_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_incc_comp_equal_back_fail_zero_pass_decc_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_decw_comp_less_back_fail_zero_pass_decw_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_incc_comp_equal_back_fail_decw_pass_incc_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_decc_comp_never_back_fail_keep_pass_decw_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_wrap_comp_not_equal_back_fail_decw_pass_keep_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_keep_comp_never_back_fail_repl_pass_wrap_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_inv_comp_always_back_fail_incc_pass_repl_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_repl_comp_not_equal_back_fail_decw_pass_wrap_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_wrap_comp_greater_back_fail_keep_pass_keep_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_zero_comp_less_back_fail_inv_pass_decc_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_zero_comp_equal_back_fail_repl_pass_decc_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_inv_comp_always_back_fail_zero_pass_repl_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_wrap_comp_always_back_fail_keep_pass_decc_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_inv_comp_never_back_fail_zero_pass_wrap_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_wrap_comp_greater_or_equal_back_fail_keep_pass_repl_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_keep_comp_not_equal_back_fail_inv_pass_decw_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_zero_comp_less_back_fail_incc_pass_keep_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_inv_comp_less_or_equal_back_fail_repl_pass_keep_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_zero_comp_equal_back_fail_decc_pass_decc_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_zero_comp_always_back_fail_decc_pass_repl_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_decc_comp_never_back_fail_repl_pass_decw_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_wrap_comp_less_or_equal_back_fail_inv_pass_incc_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_wrap_comp_less_back_fail_keep_pass_keep_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_decw_comp_greater_back_fail_incc_pass_zero_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_incc_comp_less_or_equal_back_fail_decc_pass_keep_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_keep_comp_less_or_equal_back_fail_zero_pass_inv_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_decc_comp_less_back_fail_incc_pass_inv_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_decw_comp_never_back_fail_keep_pass_decc_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_zero_comp_not_equal_back_fail_decw_pass_decc_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_incc_comp_less_or_equal_back_fail_keep_pass_decw_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_repl_comp_greater_back_fail_decw_pass_zero_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_decw_comp_less_back_fail_zero_pass_zero_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_decw_comp_never_back_fail_decw_pass_decw_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_inv_comp_equal_back_fail_wrap_pass_wrap_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_incc_comp_less_or_equal_back_fail_incc_pass_inv_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_zero_comp_greater_or_equal_back_fail_decw_pass_keep_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_incc_comp_greater_back_fail_wrap_pass_incc_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_decc_comp_never_back_fail_repl_pass_inv_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_decw_comp_always_back_fail_decw_pass_incc_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_repl_comp_less_or_equal_back_fail_decc_pass_repl_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_wrap_comp_greater_back_fail_inv_pass_incc_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_wrap_comp_less_back_fail_decw_pass_decw_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_decw_comp_not_equal_back_fail_inv_pass_decw_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_zero_comp_equal_back_fail_keep_pass_keep_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_incc_comp_not_equal_back_fail_decw_pass_zero_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_decc_comp_always_back_fail_inv_pass_incc_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_wrap_comp_greater_back_fail_zero_pass_decc_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_incc_comp_not_equal_back_fail_decw_pass_inv_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_inv_comp_always_back_fail_incc_pass_wrap_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_incc_comp_greater_or_equal_back_fail_wrap_pass_inv_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_incc_comp_greater_or_equal_back_fail_decw_pass_repl_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_inv_comp_greater_back_fail_zero_pass_inv_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_zero_comp_equal_back_fail_inv_pass_decw_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_zero_comp_not_equal_back_fail_wrap_pass_inv_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_decw_comp_less_back_fail_decc_pass_decw_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_zero_comp_greater_or_equal_back_fail_wrap_pass_keep_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_incc_comp_less_back_fail_incc_pass_inv_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_zero_comp_equal_back_fail_decc_pass_decw_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_incc_comp_always_back_fail_decc_pass_decw_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_repl_comp_less_back_fail_repl_pass_decc_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_wrap_comp_equal_back_fail_incc_pass_repl_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_decw_comp_equal_back_fail_incc_pass_inv_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_inv_comp_less_back_fail_repl_pass_repl_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_incc_comp_less_back_fail_repl_pass_wrap_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_decw_comp_greater_or_equal_back_fail_inv_pass_inv_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_decw_comp_always_back_fail_wrap_pass_keep_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_zero_comp_always_back_fail_wrap_pass_repl_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_decw_comp_less_or_equal_back_fail_incc_pass_incc_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_keep_comp_not_equal_back_fail_incc_pass_decc_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_decc_comp_not_equal_back_fail_keep_pass_inv_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_wrap_comp_equal_back_fail_decw_pass_repl_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_decc_comp_not_equal_back_fail_wrap_pass_inv_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_decw_comp_not_equal_back_fail_zero_pass_inv_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_zero_comp_equal_back_fail_decw_pass_keep_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_wrap_comp_not_equal_back_fail_repl_pass_decc_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_inv_comp_not_equal_back_fail_zero_pass_decc_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_incc_comp_always_back_fail_incc_pass_decw_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_repl_comp_equal_back_fail_incc_pass_incc_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_decc_comp_not_equal_back_fail_keep_pass_inv_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_keep_comp_less_back_fail_decc_pass_zero_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_wrap_comp_less_back_fail_decw_pass_decw_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_decw_comp_less_or_equal_back_fail_decc_pass_incc_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_zero_comp_not_equal_back_fail_repl_pass_wrap_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_incc_comp_always_back_fail_repl_pass_incc_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_decc_comp_always_back_fail_inv_pass_zero_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_repl_comp_equal_back_fail_repl_pass_wrap_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_incc_comp_not_equal_back_fail_wrap_pass_keep_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_keep_comp_always_back_fail_repl_pass_keep_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_inv_comp_never_back_fail_zero_pass_keep_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_wrap_comp_less_back_fail_keep_pass_keep_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_inv_comp_greater_or_equal_back_fail_decw_pass_incc_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_keep_comp_greater_back_fail_decc_pass_incc_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_incc_comp_always_back_fail_inv_pass_keep_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_inv_comp_not_equal_back_fail_wrap_pass_incc_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_repl_comp_always_back_fail_wrap_pass_wrap_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_keep_comp_never_back_fail_decc_pass_inv_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_decw_comp_never_back_fail_decc_pass_inv_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_inv_comp_always_back_fail_inv_pass_keep_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_decw_comp_always_back_fail_inv_pass_incc_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_wrap_comp_greater_back_fail_incc_pass_keep_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_repl_comp_equal_back_fail_decw_pass_zero_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_keep_comp_greater_back_fail_repl_pass_inv_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_inv_comp_greater_or_equal_back_fail_wrap_pass_repl_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_repl_comp_not_equal_back_fail_wrap_pass_decc_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_keep_comp_never_back_fail_zero_pass_zero_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_inv_comp_greater_or_equal_back_fail_decw_pass_zero_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_keep_comp_greater_or_equal_back_fail_inv_pass_decw_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_decw_comp_always_back_fail_keep_pass_zero_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_keep_comp_always_back_fail_zero_pass_wrap_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_wrap_comp_less_or_equal_back_fail_repl_pass_decw_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_wrap_comp_greater_back_fail_decw_pass_decc_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_inv_comp_always_back_fail_keep_pass_zero_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_incc_comp_greater_or_equal_back_fail_keep_pass_repl_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_zero_comp_always_back_fail_repl_pass_inv_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_incc_comp_never_back_fail_decw_pass_wrap_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_wrap_comp_greater_or_equal_back_fail_keep_pass_wrap_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_wrap_comp_less_back_fail_decw_pass_repl_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_keep_comp_less_or_equal_back_fail_repl_pass_incc_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_zero_comp_greater_back_fail_zero_pass_wrap_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_decc_comp_equal_back_fail_repl_pass_incc_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_zero_comp_not_equal_back_fail_repl_pass_repl_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_repl_comp_always_back_fail_wrap_pass_decc_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_decw_comp_greater_or_equal_back_fail_keep_pass_wrap_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_incc_comp_less_or_equal_back_fail_decc_pass_decc_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_zero_comp_greater_or_equal_back_fail_wrap_pass_zero_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_repl_comp_equal_back_fail_decw_pass_wrap_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_inv_comp_never_back_fail_decw_pass_inv_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_wrap_comp_equal_back_fail_decc_pass_incc_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_repl_comp_less_back_fail_repl_pass_repl_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_wrap_comp_greater_back_fail_zero_pass_zero_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_zero_comp_less_back_fail_inv_pass_wrap_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_repl_comp_greater_or_equal_back_fail_incc_pass_decc_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_zero_comp_greater_or_equal_back_fail_decw_pass_keep_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_zero_comp_greater_or_equal_back_fail_zero_pass_decw_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_zero_comp_always_back_fail_incc_pass_repl_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_decc_comp_less_back_fail_zero_pass_decw_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_decc_comp_never_back_fail_repl_pass_decw_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_incc_comp_greater_back_fail_keep_pass_inv_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_zero_comp_less_or_equal_back_fail_decc_pass_zero_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_zero_comp_less_back_fail_incc_pass_decw_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_repl_comp_never_back_fail_zero_pass_incc_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_wrap_comp_never_back_fail_decw_pass_incc_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_decw_comp_less_or_equal_back_fail_keep_pass_decw_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_keep_comp_greater_back_fail_inv_pass_repl_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_inv_comp_not_equal_back_fail_keep_pass_decc_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_inv_comp_greater_or_equal_back_fail_decw_pass_decw_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_keep_comp_less_or_equal_back_fail_zero_pass_decw_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_decc_comp_always_back_fail_zero_pass_incc_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_incc_comp_less_back_fail_decc_pass_zero_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_keep_comp_never_back_fail_incc_pass_incc_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_keep_comp_never_back_fail_inv_pass_decc_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_wrap_comp_not_equal_back_fail_zero_pass_repl_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_incc_comp_less_back_fail_wrap_pass_zero_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_decw_comp_always_back_fail_decw_pass_repl_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_wrap_comp_greater_back_fail_decc_pass_keep_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_keep_comp_greater_or_equal_back_fail_inv_pass_zero_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_wrap_comp_always_back_fail_keep_pass_decw_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_incc_comp_less_or_equal_back_fail_incc_pass_decw_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_decc_comp_never_back_fail_keep_pass_decw_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_decc_comp_never_back_fail_keep_pass_keep_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_zero_comp_equal_back_fail_keep_pass_zero_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_wrap_comp_greater_back_fail_zero_pass_incc_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_decc_comp_less_back_fail_incc_pass_zero_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_decc_comp_always_back_fail_inv_pass_incc_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_repl_comp_always_back_fail_zero_pass_incc_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_zero_comp_less_or_equal_back_fail_keep_pass_decc_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_zero_comp_equal_back_fail_zero_pass_zero_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_zero_comp_not_equal_back_fail_keep_pass_incc_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_inv_comp_greater_back_fail_decw_pass_zero_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_zero_comp_equal_back_fail_zero_pass_incc_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_wrap_comp_greater_or_equal_back_fail_decw_pass_keep_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_keep_comp_never_back_fail_zero_pass_keep_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_keep_comp_less_or_equal_back_fail_decc_pass_incc_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_incc_comp_always_back_fail_incc_pass_decc_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_wrap_comp_equal_back_fail_keep_pass_repl_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_decw_comp_less_back_fail_incc_pass_decc_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_keep_comp_less_or_equal_back_fail_repl_pass_inv_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_repl_comp_greater_back_fail_inv_pass_decc_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_wrap_comp_greater_or_equal_back_fail_inv_pass_zero_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_decw_comp_equal_back_fail_wrap_pass_decc_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_repl_comp_not_equal_back_fail_wrap_pass_inv_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_wrap_comp_greater_back_fail_keep_pass_wrap_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_wrap_comp_less_back_fail_zero_pass_decc_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_decw_comp_less_back_fail_incc_pass_decc_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_keep_comp_less_or_equal_back_fail_keep_pass_incc_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_incc_comp_greater_or_equal_back_fail_inv_pass_repl_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_wrap_comp_greater_or_equal_back_fail_repl_pass_incc_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_zero_comp_always_back_fail_decw_pass_zero_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_incc_comp_equal_back_fail_keep_pass_inv_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_zero_comp_not_equal_back_fail_zero_pass_inv_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_repl_comp_greater_back_fail_zero_pass_repl_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_keep_comp_always_back_fail_repl_pass_inv_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_decw_comp_greater_or_equal_back_fail_zero_pass_repl_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_keep_comp_greater_back_fail_zero_pass_incc_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_incc_comp_greater_back_fail_repl_pass_wrap_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_wrap_comp_less_or_equal_back_fail_decw_pass_incc_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_repl_comp_less_or_equal_back_fail_repl_pass_incc_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_inv_comp_less_back_fail_incc_pass_decc_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_decc_comp_greater_or_equal_back_fail_incc_pass_keep_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_keep_comp_equal_back_fail_zero_pass_decc_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_wrap_comp_greater_or_equal_back_fail_incc_pass_inv_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_incc_comp_not_equal_back_fail_keep_pass_wrap_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_keep_comp_always_back_fail_wrap_pass_inv_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_decw_comp_greater_back_fail_inv_pass_keep_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_decw_comp_less_back_fail_inv_pass_wrap_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_keep_comp_greater_back_fail_zero_pass_decc_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_zero_comp_less_or_equal_back_fail_zero_pass_decc_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_decw_comp_greater_back_fail_inv_pass_zero_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_decc_comp_less_or_equal_back_fail_zero_pass_incc_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_zero_comp_less_or_equal_back_fail_zero_pass_decw_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_decw_comp_less_back_fail_inv_pass_repl_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_incc_comp_less_back_fail_decc_pass_repl_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_zero_comp_greater_back_fail_zero_pass_decw_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_wrap_comp_less_back_fail_inv_pass_wrap_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_keep_comp_less_back_fail_incc_pass_keep_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_decw_comp_greater_or_equal_back_fail_zero_pass_zero_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_repl_comp_greater_or_equal_back_fail_decw_pass_decw_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_decw_comp_greater_back_fail_repl_pass_zero_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_decw_comp_always_back_fail_wrap_pass_inv_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_wrap_comp_always_back_fail_repl_pass_repl_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_repl_comp_equal_back_fail_zero_pass_zero_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_repl_comp_always_back_fail_inv_pass_keep_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_decw_comp_not_equal_back_fail_wrap_pass_wrap_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_incc_comp_never_back_fail_inv_pass_inv_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_zero_comp_always_back_fail_decw_pass_incc_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_zero_comp_greater_or_equal_back_fail_repl_pass_incc_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_incc_comp_less_or_equal_back_fail_decc_pass_repl_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_wrap_comp_always_back_fail_keep_pass_incc_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_wrap_comp_greater_or_equal_back_fail_keep_pass_wrap_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_inv_comp_greater_or_equal_back_fail_wrap_pass_decw_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_incc_comp_always_back_fail_zero_pass_inv_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_inv_comp_greater_back_fail_decw_pass_inv_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_decw_comp_never_back_fail_decc_pass_inv_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_inv_comp_not_equal_back_fail_inv_pass_decc_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_inv_comp_greater_back_fail_inv_pass_keep_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_zero_comp_greater_back_fail_wrap_pass_wrap_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_incc_comp_never_back_fail_decc_pass_inv_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_repl_comp_equal_back_fail_zero_pass_decw_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_decw_comp_not_equal_back_fail_decw_pass_repl_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_wrap_comp_less_back_fail_incc_pass_inv_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_repl_comp_equal_back_fail_wrap_pass_wrap_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_decc_comp_equal_back_fail_repl_pass_incc_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_incc_comp_less_or_equal_back_fail_keep_pass_decc_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_decc_comp_not_equal_back_fail_decw_pass_incc_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_repl_comp_less_or_equal_back_fail_zero_pass_decc_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_incc_comp_equal_back_fail_inv_pass_decc_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_wrap_comp_always_back_fail_zero_pass_zero_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_incc_comp_greater_back_fail_inv_pass_keep_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_decw_comp_greater_or_equal_back_fail_inv_pass_decc_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_keep_comp_not_equal_back_fail_zero_pass_keep_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_inv_comp_equal_back_fail_wrap_pass_wrap_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_incc_comp_less_or_equal_back_fail_wrap_pass_decw_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_wrap_comp_not_equal_back_fail_wrap_pass_inv_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_incc_comp_greater_back_fail_wrap_pass_decc_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_wrap_comp_always_back_fail_zero_pass_incc_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_inv_comp_equal_back_fail_incc_pass_inv_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_incc_comp_greater_back_fail_wrap_pass_wrap_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_repl_comp_greater_or_equal_back_fail_incc_pass_wrap_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_zero_comp_never_back_fail_incc_pass_inv_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_wrap_comp_less_back_fail_wrap_pass_inv_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_zero_comp_less_or_equal_back_fail_zero_pass_keep_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_decc_comp_never_back_fail_zero_pass_decc_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_zero_comp_equal_back_fail_inv_pass_wrap_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_decc_comp_never_back_fail_keep_pass_decc_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_decw_comp_not_equal_back_fail_keep_pass_incc_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_decc_comp_never_back_fail_inv_pass_decw_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_decc_comp_less_back_fail_wrap_pass_keep_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_decw_comp_not_equal_back_fail_wrap_pass_keep_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_wrap_comp_less_or_equal_back_fail_decw_pass_inv_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_zero_comp_greater_or_equal_back_fail_decc_pass_keep_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_decw_comp_always_back_fail_decc_pass_inv_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_zero_comp_greater_or_equal_back_fail_decw_pass_decc_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_inv_comp_not_equal_back_fail_wrap_pass_inv_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_zero_comp_greater_back_fail_decw_pass_repl_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_incc_comp_never_back_fail_wrap_pass_repl_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_incc_comp_less_or_equal_back_fail_inv_pass_wrap_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_repl_comp_greater_or_equal_back_fail_decc_pass_wrap_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_repl_comp_greater_back_fail_wrap_pass_decw_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_inv_comp_less_back_fail_incc_pass_inv_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_decc_comp_never_back_fail_decc_pass_wrap_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_zero_comp_greater_back_fail_zero_pass_incc_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_incc_comp_greater_back_fail_decw_pass_decc_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_decw_comp_equal_back_fail_wrap_pass_wrap_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_repl_comp_equal_back_fail_wrap_pass_decw_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_incc_comp_never_back_fail_incc_pass_keep_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_decw_comp_greater_or_equal_back_fail_incc_pass_inv_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_keep_comp_always_back_fail_repl_pass_inv_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_incc_comp_greater_or_equal_back_fail_keep_pass_zero_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_inv_comp_equal_back_fail_inv_pass_incc_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_zero_comp_never_back_fail_repl_pass_wrap_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_wrap_comp_always_back_fail_inv_pass_decw_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_repl_comp_less_or_equal_back_fail_decw_pass_wrap_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_repl_comp_greater_or_equal_back_fail_zero_pass_inv_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_decc_comp_never_back_fail_incc_pass_wrap_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_wrap_comp_never_back_fail_wrap_pass_wrap_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_decw_comp_not_equal_back_fail_wrap_pass_zero_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_repl_comp_always_back_fail_keep_pass_wrap_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_inv_comp_not_equal_back_fail_wrap_pass_incc_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_incc_comp_greater_back_fail_wrap_pass_keep_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_inv_comp_never_back_fail_wrap_pass_incc_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_inv_comp_not_equal_back_fail_incc_pass_wrap_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_inv_comp_greater_back_fail_repl_pass_zero_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_decc_comp_less_back_fail_keep_pass_wrap_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_repl_comp_not_equal_back_fail_incc_pass_inv_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_wrap_comp_less_back_fail_repl_pass_inv_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_incc_comp_not_equal_back_fail_decw_pass_repl_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_decc_comp_not_equal_back_fail_inv_pass_decc_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_zero_comp_equal_back_fail_keep_pass_repl_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_wrap_comp_always_back_fail_decw_pass_inv_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_decw_comp_never_back_fail_inv_pass_incc_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_wrap_comp_greater_back_fail_keep_pass_keep_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_wrap_comp_less_back_fail_incc_pass_inv_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_decc_comp_greater_back_fail_wrap_pass_decc_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_inv_comp_always_back_fail_repl_pass_repl_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_wrap_comp_equal_back_fail_decw_pass_decc_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_decw_comp_never_back_fail_incc_pass_decw_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_decw_comp_less_back_fail_inv_pass_inv_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_decw_comp_not_equal_back_fail_wrap_pass_inv_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_repl_comp_greater_or_equal_back_fail_zero_pass_zero_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_decc_comp_always_back_fail_decw_pass_decw_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_inv_comp_greater_back_fail_inv_pass_incc_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_zero_comp_always_back_fail_incc_pass_decc_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_inv_comp_less_or_equal_back_fail_repl_pass_zero_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_decw_comp_greater_or_equal_back_fail_zero_pass_inv_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_wrap_comp_equal_back_fail_zero_pass_zero_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_zero_comp_less_or_equal_back_fail_wrap_pass_decw_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_zero_comp_greater_back_fail_zero_pass_keep_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_inv_comp_greater_or_equal_back_fail_keep_pass_zero_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_incc_comp_greater_back_fail_zero_pass_keep_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_incc_comp_less_or_equal_back_fail_decc_pass_decw_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_repl_comp_greater_or_equal_back_fail_repl_pass_repl_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_decw_comp_less_back_fail_inv_pass_keep_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_decw_comp_greater_or_equal_back_fail_decw_pass_wrap_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_decw_comp_greater_or_equal_back_fail_decw_pass_decc_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_repl_comp_less_back_fail_zero_pass_inv_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_zero_comp_equal_back_fail_decc_pass_inv_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_repl_comp_less_back_fail_keep_pass_keep_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_incc_comp_greater_or_equal_back_fail_keep_pass_decc_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_decw_comp_greater_or_equal_back_fail_keep_pass_decw_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_keep_comp_greater_back_fail_decc_pass_repl_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_wrap_comp_equal_back_fail_incc_pass_decc_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_zero_comp_greater_or_equal_back_fail_zero_pass_zero_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_decw_comp_always_back_fail_zero_pass_keep_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_inv_comp_less_or_equal_back_fail_incc_pass_decc_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_inv_comp_greater_back_fail_decc_pass_zero_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_zero_comp_never_back_fail_repl_pass_zero_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_decw_comp_less_or_equal_back_fail_zero_pass_incc_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_decw_comp_less_or_equal_back_fail_inv_pass_decw_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_inv_comp_equal_back_fail_wrap_pass_repl_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_zero_comp_never_back_fail_incc_pass_zero_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_repl_comp_always_back_fail_decc_pass_repl_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_zero_comp_greater_or_equal_back_fail_keep_pass_keep_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_inv_comp_greater_or_equal_back_fail_wrap_pass_wrap_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_repl_comp_greater_back_fail_incc_pass_inv_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_keep_comp_never_back_fail_decc_pass_repl_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_zero_comp_greater_or_equal_back_fail_decw_pass_wrap_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_inv_comp_equal_back_fail_wrap_pass_repl_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_zero_comp_less_back_fail_zero_pass_wrap_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_decw_comp_equal_back_fail_decc_pass_inv_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_decc_comp_always_back_fail_keep_pass_keep_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_zero_comp_less_or_equal_back_fail_zero_pass_zero_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_incc_comp_less_or_equal_back_fail_incc_pass_incc_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_repl_comp_equal_back_fail_repl_pass_incc_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_zero_comp_less_back_fail_wrap_pass_incc_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_decw_comp_greater_back_fail_decc_pass_zero_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_repl_comp_not_equal_back_fail_keep_pass_wrap_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_repl_comp_less_or_equal_back_fail_decc_pass_zero_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_zero_comp_greater_or_equal_back_fail_incc_pass_keep_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_decc_comp_never_back_fail_decw_pass_decw_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_keep_comp_equal_back_fail_incc_pass_keep_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_zero_comp_greater_back_fail_repl_pass_incc_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_keep_comp_always_back_fail_repl_pass_zero_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_keep_comp_not_equal_back_fail_decw_pass_incc_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_repl_comp_always_back_fail_repl_pass_incc_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_keep_comp_less_or_equal_back_fail_inv_pass_wrap_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_incc_comp_greater_or_equal_back_fail_decc_pass_keep_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_zero_comp_greater_back_fail_wrap_pass_wrap_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_zero_comp_greater_back_fail_incc_pass_inv_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_decw_comp_always_back_fail_zero_pass_decw_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_inv_comp_less_or_equal_back_fail_zero_pass_repl_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_incc_comp_less_back_fail_inv_pass_repl_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_inv_comp_equal_back_fail_wrap_pass_incc_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_keep_comp_equal_back_fail_repl_pass_zero_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_wrap_comp_greater_or_equal_back_fail_incc_pass_wrap_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_decc_comp_less_back_fail_decw_pass_decw_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_keep_comp_always_back_fail_decw_pass_decc_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_wrap_comp_less_back_fail_keep_pass_incc_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_keep_comp_less_or_equal_back_fail_decc_pass_decc_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_decw_comp_always_back_fail_repl_pass_incc_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_wrap_comp_not_equal_back_fail_wrap_pass_zero_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_decc_comp_always_back_fail_decw_pass_decc_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_inv_comp_less_or_equal_back_fail_decc_pass_keep_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_wrap_comp_less_back_fail_repl_pass_repl_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_repl_comp_less_or_equal_back_fail_repl_pass_keep_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_zero_comp_greater_back_fail_decc_pass_decw_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_decw_comp_greater_back_fail_decw_pass_decw_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_decc_comp_never_back_fail_zero_pass_repl_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_repl_comp_always_back_fail_zero_pass_inv_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_zero_comp_not_equal_back_fail_zero_pass_decc_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_zero_comp_never_back_fail_keep_pass_zero_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_decc_comp_less_back_fail_decc_pass_keep_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_wrap_comp_always_back_fail_zero_pass_repl_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_incc_comp_greater_or_equal_back_fail_inv_pass_decw_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_incc_comp_not_equal_back_fail_incc_pass_inv_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_decc_comp_greater_or_equal_back_fail_repl_pass_incc_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_decw_comp_always_back_fail_decc_pass_zero_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_decw_comp_always_back_fail_zero_pass_inv_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_incc_comp_less_back_fail_decw_pass_zero_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_wrap_comp_less_or_equal_back_fail_repl_pass_inv_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_repl_comp_not_equal_back_fail_inv_pass_keep_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_incc_comp_not_equal_back_fail_zero_pass_decc_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_inv_comp_always_back_fail_zero_pass_keep_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_keep_comp_never_back_fail_zero_pass_decw_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_keep_comp_not_equal_back_fail_incc_pass_zero_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_wrap_comp_greater_or_equal_back_fail_wrap_pass_keep_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_wrap_comp_not_equal_back_fail_incc_pass_decc_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_decc_comp_not_equal_back_fail_decc_pass_decw_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_keep_comp_greater_or_equal_back_fail_wrap_pass_wrap_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_decw_comp_less_back_fail_decw_pass_zero_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_wrap_comp_less_back_fail_wrap_pass_repl_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_inv_comp_less_or_equal_back_fail_decc_pass_wrap_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_incc_comp_never_back_fail_repl_pass_zero_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_decw_comp_never_back_fail_inv_pass_repl_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_decc_comp_greater_or_equal_back_fail_zero_pass_keep_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_decc_comp_less_back_fail_repl_pass_decc_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_wrap_comp_less_back_fail_keep_pass_repl_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_repl_comp_never_back_fail_inv_pass_keep_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_inv_comp_equal_back_fail_repl_pass_decc_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_inv_comp_never_back_fail_repl_pass_keep_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_decw_comp_equal_back_fail_incc_pass_incc_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_decc_comp_not_equal_back_fail_decw_pass_inv_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_decc_comp_equal_back_fail_decc_pass_decw_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_incc_comp_always_back_fail_decc_pass_repl_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_decc_comp_equal_back_fail_decw_pass_zero_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_decw_comp_less_back_fail_zero_pass_repl_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_decw_comp_not_equal_back_fail_zero_pass_incc_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_repl_comp_always_back_fail_decw_pass_decc_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_zero_comp_not_equal_back_fail_wrap_pass_inv_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_decc_comp_less_back_fail_keep_pass_inv_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_incc_comp_greater_back_fail_decw_pass_decw_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_decw_comp_not_equal_back_fail_incc_pass_repl_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_incc_comp_greater_back_fail_decc_pass_zero_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_wrap_comp_greater_back_fail_decc_pass_inv_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_decw_comp_always_back_fail_decw_pass_decc_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_wrap_comp_less_back_fail_incc_pass_zero_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_inv_comp_equal_back_fail_decw_pass_keep_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_zero_comp_greater_or_equal_back_fail_wrap_pass_zero_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_repl_comp_greater_or_equal_back_fail_keep_pass_zero_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_inv_comp_not_equal_back_fail_decc_pass_decc_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_keep_comp_not_equal_back_fail_decc_pass_decc_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_wrap_comp_less_or_equal_back_fail_decw_pass_decc_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_incc_comp_less_or_equal_back_fail_zero_pass_inv_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_repl_comp_greater_or_equal_back_fail_repl_pass_zero_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_decc_comp_less_back_fail_keep_pass_keep_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_decc_comp_greater_or_equal_back_fail_wrap_pass_decw_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_decw_comp_never_back_fail_incc_pass_decc_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_incc_comp_not_equal_back_fail_wrap_pass_repl_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_inv_comp_not_equal_back_fail_wrap_pass_incc_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_repl_comp_less_or_equal_back_fail_inv_pass_zero_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_keep_comp_less_back_fail_decc_pass_repl_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_zero_comp_equal_back_fail_zero_pass_keep_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_decw_comp_less_or_equal_back_fail_decc_pass_wrap_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_decw_comp_greater_back_fail_keep_pass_zero_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_zero_comp_greater_back_fail_keep_pass_incc_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_decc_comp_always_back_fail_incc_pass_zero_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_decc_comp_greater_back_fail_inv_pass_wrap_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_keep_comp_not_equal_back_fail_repl_pass_wrap_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_incc_comp_not_equal_back_fail_decc_pass_zero_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_zero_comp_greater_back_fail_keep_pass_decc_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_inv_comp_greater_or_equal_back_fail_incc_pass_wrap_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_incc_comp_equal_back_fail_repl_pass_incc_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_decc_comp_equal_back_fail_repl_pass_repl_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_decc_comp_not_equal_back_fail_incc_pass_incc_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_inv_comp_greater_back_fail_inv_pass_zero_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_decw_comp_equal_back_fail_decw_pass_decc_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_repl_comp_less_back_fail_incc_pass_wrap_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_decc_comp_always_back_fail_repl_pass_repl_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_zero_comp_not_equal_back_fail_zero_pass_keep_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_keep_comp_greater_or_equal_back_fail_decw_pass_decw_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_incc_comp_equal_back_fail_wrap_pass_decw_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_repl_comp_always_back_fail_zero_pass_wrap_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_zero_comp_equal_back_fail_decw_pass_repl_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_repl_comp_greater_or_equal_back_fail_incc_pass_decc_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_inv_comp_less_or_equal_back_fail_decc_pass_keep_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_incc_comp_greater_or_equal_back_fail_incc_pass_repl_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_inv_comp_not_equal_back_fail_repl_pass_decc_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_decc_comp_greater_or_equal_back_fail_keep_pass_wrap_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_inv_comp_greater_back_fail_keep_pass_decc_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_inv_comp_always_back_fail_inv_pass_keep_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_decw_comp_equal_back_fail_incc_pass_wrap_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_inv_comp_never_back_fail_repl_pass_inv_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_wrap_comp_greater_or_equal_back_fail_decw_pass_decc_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_wrap_comp_greater_back_fail_wrap_pass_incc_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_keep_comp_greater_back_fail_wrap_pass_inv_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_decw_comp_equal_back_fail_zero_pass_decw_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_decc_comp_less_or_equal_back_fail_keep_pass_decw_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_decc_comp_greater_back_fail_wrap_pass_incc_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_keep_comp_greater_back_fail_wrap_pass_keep_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_decw_comp_less_back_fail_inv_pass_inv_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_repl_comp_less_or_equal_back_fail_inv_pass_zero_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_wrap_comp_never_back_fail_inv_pass_decw_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_inv_comp_always_back_fail_incc_pass_zero_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_keep_comp_greater_or_equal_back_fail_repl_pass_repl_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_inv_comp_greater_back_fail_incc_pass_keep_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_incc_comp_greater_or_equal_back_fail_keep_pass_repl_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_keep_comp_not_equal_back_fail_decc_pass_inv_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_wrap_comp_greater_back_fail_zero_pass_zero_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_inv_comp_greater_back_fail_keep_pass_incc_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_decw_comp_greater_or_equal_back_fail_decw_pass_repl_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_incc_comp_greater_or_equal_back_fail_keep_pass_zero_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_zero_comp_less_or_equal_back_fail_decw_pass_keep_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_incc_comp_greater_or_equal_back_fail_wrap_pass_zero_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_zero_comp_less_back_fail_zero_pass_zero_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_inv_comp_not_equal_back_fail_incc_pass_repl_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_keep_comp_greater_or_equal_back_fail_incc_pass_repl_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_incc_comp_less_or_equal_back_fail_incc_pass_incc_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_repl_comp_greater_back_fail_zero_pass_decc_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_incc_comp_equal_back_fail_zero_pass_decw_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_incc_comp_greater_back_fail_decw_pass_repl_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_decw_comp_always_back_fail_inv_pass_zero_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_wrap_comp_always_back_fail_inv_pass_keep_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_zero_comp_never_back_fail_decc_pass_keep_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_repl_comp_always_back_fail_wrap_pass_zero_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_incc_comp_never_back_fail_wrap_pass_repl_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_repl_comp_greater_back_fail_incc_pass_decc_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_keep_comp_greater_back_fail_zero_pass_decc_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_zero_comp_greater_back_fail_wrap_pass_decw_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_inv_comp_never_back_fail_decc_pass_keep_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_zero_comp_greater_or_equal_back_fail_decc_pass_keep_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_decc_comp_always_back_fail_incc_pass_incc_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_repl_comp_less_back_fail_keep_pass_zero_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_decw_comp_less_back_fail_wrap_pass_incc_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_decc_comp_less_or_equal_back_fail_inv_pass_wrap_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_keep_comp_never_back_fail_repl_pass_decw_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_decw_comp_less_back_fail_decw_pass_inv_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_decw_comp_never_back_fail_inv_pass_decc_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_repl_comp_equal_back_fail_keep_pass_decw_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_inv_comp_always_back_fail_decc_pass_wrap_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_zero_comp_equal_back_fail_inv_pass_decw_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_zero_comp_greater_or_equal_back_fail_keep_pass_inv_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_decw_comp_greater_back_fail_decc_pass_decw_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_wrap_comp_less_back_fail_wrap_pass_incc_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_keep_comp_less_back_fail_wrap_pass_zero_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_decw_comp_greater_back_fail_zero_pass_incc_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_incc_comp_less_back_fail_zero_pass_inv_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_wrap_comp_less_or_equal_back_fail_zero_pass_incc_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_zero_comp_always_back_fail_inv_pass_zero_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_wrap_comp_not_equal_back_fail_decw_pass_decw_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_decc_comp_not_equal_back_fail_zero_pass_wrap_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_decc_comp_greater_back_fail_decw_pass_decc_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_decw_comp_equal_back_fail_keep_pass_incc_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_inv_comp_always_back_fail_incc_pass_decc_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_decw_comp_always_back_fail_zero_pass_incc_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_decw_comp_greater_or_equal_back_fail_zero_pass_decc_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_keep_comp_always_back_fail_repl_pass_wrap_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_repl_comp_never_back_fail_wrap_pass_incc_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_wrap_comp_greater_back_fail_decc_pass_zero_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_inv_comp_never_back_fail_repl_pass_wrap_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_repl_comp_less_or_equal_back_fail_incc_pass_decw_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_decw_comp_greater_or_equal_back_fail_incc_pass_repl_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_decw_comp_not_equal_back_fail_inv_pass_incc_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_decw_comp_equal_back_fail_keep_pass_incc_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_incc_comp_equal_back_fail_keep_pass_zero_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_decc_comp_equal_back_fail_decc_pass_keep_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_repl_comp_greater_or_equal_back_fail_keep_pass_inv_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_zero_comp_never_back_fail_inv_pass_incc_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_inv_comp_greater_or_equal_back_fail_wrap_pass_keep_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_wrap_comp_always_back_fail_inv_pass_incc_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_zero_comp_greater_or_equal_back_fail_decc_pass_wrap_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_decc_comp_equal_back_fail_decc_pass_zero_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_decw_comp_not_equal_back_fail_incc_pass_keep_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_decw_comp_less_back_fail_repl_pass_zero_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_repl_comp_equal_back_fail_inv_pass_keep_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_inv_comp_greater_back_fail_zero_pass_keep_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_zero_comp_less_back_fail_decw_pass_wrap_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_repl_comp_not_equal_back_fail_wrap_pass_inv_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_incc_comp_greater_or_equal_back_fail_inv_pass_incc_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_repl_comp_less_or_equal_back_fail_decc_pass_decw_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_inv_comp_always_back_fail_decc_pass_wrap_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_incc_comp_equal_back_fail_incc_pass_incc_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_incc_comp_less_or_equal_back_fail_decc_pass_zero_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_wrap_comp_always_back_fail_decw_pass_decw_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_decw_comp_less_or_equal_back_fail_keep_pass_inv_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_decc_comp_always_back_fail_wrap_pass_inv_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_repl_comp_less_back_fail_incc_pass_decw_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_decc_comp_greater_back_fail_repl_pass_decc_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_keep_comp_equal_back_fail_wrap_pass_decw_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_repl_comp_less_back_fail_wrap_pass_decw_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_decw_comp_greater_or_equal_back_fail_zero_pass_incc_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_inv_comp_always_back_fail_wrap_pass_inv_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_decc_comp_greater_or_equal_back_fail_incc_pass_decw_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_decw_comp_less_back_fail_incc_pass_inv_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_wrap_comp_always_back_fail_decw_pass_decc_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_incc_comp_greater_back_fail_decw_pass_incc_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_inv_comp_less_back_fail_inv_pass_keep_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_wrap_comp_greater_or_equal_back_fail_wrap_pass_incc_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_wrap_comp_always_back_fail_inv_pass_keep_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_incc_comp_never_back_fail_wrap_pass_incc_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_decw_comp_equal_back_fail_repl_pass_decc_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_wrap_comp_less_back_fail_decc_pass_decw_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_keep_comp_less_or_equal_back_fail_decc_pass_keep_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_keep_comp_greater_or_equal_back_fail_incc_pass_decw_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_incc_comp_never_back_fail_repl_pass_zero_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_zero_comp_less_back_fail_decw_pass_wrap_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_keep_comp_greater_or_equal_back_fail_inv_pass_zero_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_wrap_comp_not_equal_back_fail_inv_pass_inv_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_decc_comp_always_back_fail_incc_pass_repl_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_keep_comp_equal_back_fail_incc_pass_decc_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_wrap_comp_equal_back_fail_repl_pass_decc_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_keep_comp_always_back_fail_decw_pass_keep_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_decc_comp_greater_or_equal_back_fail_inv_pass_decw_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_keep_comp_less_back_fail_repl_pass_decw_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_decc_comp_equal_back_fail_decw_pass_decc_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_incc_comp_never_back_fail_keep_pass_decw_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_incc_comp_never_back_fail_zero_pass_incc_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_decc_comp_greater_or_equal_back_fail_wrap_pass_inv_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_incc_comp_equal_back_fail_decw_pass_incc_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_decc_comp_less_or_equal_back_fail_repl_pass_keep_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_keep_comp_not_equal_back_fail_decc_pass_zero_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_decc_comp_not_equal_back_fail_decw_pass_inv_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_decc_comp_not_equal_back_fail_repl_pass_decc_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_keep_comp_less_back_fail_inv_pass_repl_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_zero_comp_greater_back_fail_keep_pass_keep_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_decw_comp_equal_back_fail_incc_pass_keep_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_inv_comp_less_back_fail_keep_pass_repl_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_wrap_comp_always_back_fail_incc_pass_repl_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_incc_comp_never_back_fail_wrap_pass_zero_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_inv_comp_never_back_fail_decw_pass_repl_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_keep_comp_less_back_fail_repl_pass_zero_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_wrap_comp_not_equal_back_fail_repl_pass_inv_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_decw_comp_equal_back_fail_zero_pass_incc_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_inv_comp_equal_back_fail_incc_pass_incc_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_wrap_comp_always_back_fail_keep_pass_keep_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_inv_comp_less_or_equal_back_fail_zero_pass_decc_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_decw_comp_equal_back_fail_inv_pass_inv_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_decc_comp_never_back_fail_decc_pass_decc_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_wrap_comp_less_or_equal_back_fail_wrap_pass_repl_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_inv_comp_less_back_fail_repl_pass_decc_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_incc_comp_less_back_fail_incc_pass_incc_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_decw_comp_greater_back_fail_zero_pass_keep_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_keep_comp_greater_or_equal_back_fail_decc_pass_zero_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_inv_comp_less_back_fail_repl_pass_incc_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_decw_comp_less_or_equal_back_fail_repl_pass_repl_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_zero_comp_greater_back_fail_decc_pass_decw_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_decc_comp_greater_or_equal_back_fail_inv_pass_decc_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_decc_comp_greater_back_fail_wrap_pass_incc_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_repl_comp_greater_or_equal_back_fail_zero_pass_decw_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_decc_comp_less_or_equal_back_fail_decw_pass_inv_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_repl_comp_less_back_fail_zero_pass_repl_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_inv_comp_greater_back_fail_zero_pass_decw_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_decc_comp_greater_or_equal_back_fail_incc_pass_zero_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_decc_comp_not_equal_back_fail_zero_pass_inv_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_inv_comp_less_or_equal_back_fail_keep_pass_decc_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_repl_comp_less_or_equal_back_fail_repl_pass_decw_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_decw_comp_less_or_equal_back_fail_decc_pass_incc_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_zero_comp_never_back_fail_inv_pass_incc_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_decc_comp_equal_back_fail_wrap_pass_wrap_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_zero_comp_less_or_equal_back_fail_incc_pass_decc_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_zero_comp_equal_back_fail_wrap_pass_decw_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_inv_comp_less_or_equal_back_fail_inv_pass_zero_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_zero_comp_never_back_fail_keep_pass_incc_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_inv_comp_always_back_fail_decw_pass_incc_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_inv_comp_equal_back_fail_keep_pass_inv_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_zero_comp_always_back_fail_decw_pass_zero_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_inv_comp_greater_back_fail_decw_pass_repl_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_zero_comp_not_equal_back_fail_decw_pass_zero_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_repl_comp_greater_or_equal_back_fail_repl_pass_wrap_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_decw_comp_less_back_fail_incc_pass_zero_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_keep_comp_less_or_equal_back_fail_repl_pass_keep_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_incc_comp_not_equal_back_fail_wrap_pass_wrap_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_repl_comp_always_back_fail_repl_pass_decw_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_repl_comp_not_equal_back_fail_decw_pass_decc_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_decc_comp_less_back_fail_incc_pass_repl_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_decc_comp_not_equal_back_fail_zero_pass_zero_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_decc_comp_greater_back_fail_repl_pass_keep_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_decc_comp_equal_back_fail_inv_pass_decw_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_zero_comp_never_back_fail_repl_pass_inv_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_keep_comp_always_back_fail_decw_pass_decc_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_decw_comp_greater_back_fail_decw_pass_inv_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_inv_comp_equal_back_fail_decc_pass_wrap_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_keep_comp_less_or_equal_back_fail_inv_pass_wrap_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_wrap_comp_not_equal_back_fail_repl_pass_repl_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_incc_comp_greater_back_fail_keep_pass_keep_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_repl_comp_greater_back_fail_inv_pass_repl_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_keep_comp_greater_back_fail_incc_pass_decc_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_repl_comp_equal_back_fail_wrap_pass_zero_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_decw_comp_never_back_fail_decw_pass_wrap_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_inv_comp_always_back_fail_decw_pass_repl_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_repl_comp_greater_back_fail_decw_pass_incc_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_keep_comp_equal_back_fail_wrap_pass_zero_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_incc_comp_less_or_equal_back_fail_incc_pass_decw_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_wrap_comp_never_back_fail_inv_pass_decw_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_wrap_comp_always_back_fail_inv_pass_wrap_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_keep_comp_less_or_equal_back_fail_wrap_pass_repl_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_zero_comp_always_back_fail_decw_pass_repl_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_keep_comp_equal_back_fail_zero_pass_keep_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_repl_comp_greater_back_fail_decc_pass_incc_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_decc_comp_never_back_fail_decc_pass_wrap_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_decw_comp_greater_back_fail_incc_pass_decw_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_wrap_comp_never_back_fail_wrap_pass_keep_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_inv_comp_not_equal_back_fail_wrap_pass_wrap_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_repl_comp_never_back_fail_keep_pass_inv_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_inv_comp_less_or_equal_back_fail_decc_pass_inv_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_incc_comp_less_or_equal_back_fail_repl_pass_keep_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_zero_comp_equal_back_fail_decc_pass_decc_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_keep_comp_greater_or_equal_back_fail_decc_pass_keep_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_decc_comp_greater_back_fail_repl_pass_decc_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_wrap_comp_never_back_fail_keep_pass_decw_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_inv_comp_less_back_fail_keep_pass_keep_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_inv_comp_greater_back_fail_inv_pass_zero_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_repl_comp_never_back_fail_inv_pass_inv_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_repl_comp_equal_back_fail_repl_pass_zero_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_repl_comp_less_or_equal_back_fail_repl_pass_wrap_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_zero_comp_equal_back_fail_wrap_pass_keep_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_inv_comp_less_or_equal_back_fail_decc_pass_incc_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_zero_comp_never_back_fail_zero_pass_wrap_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_decw_comp_less_or_equal_back_fail_decw_pass_inv_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_repl_comp_equal_back_fail_incc_pass_inv_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_wrap_comp_less_back_fail_zero_pass_wrap_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_repl_comp_never_back_fail_decc_pass_zero_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_wrap_comp_less_or_equal_back_fail_decw_pass_zero_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_incc_comp_less_or_equal_back_fail_incc_pass_keep_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_decc_comp_always_back_fail_zero_pass_zero_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_zero_comp_less_back_fail_repl_pass_decc_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_decc_comp_greater_or_equal_back_fail_wrap_pass_zero_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_decc_comp_less_back_fail_decw_pass_repl_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_repl_comp_always_back_fail_decc_pass_keep_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_incc_comp_never_back_fail_incc_pass_repl_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_zero_comp_equal_back_fail_keep_pass_incc_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_repl_comp_greater_or_equal_back_fail_keep_pass_repl_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_inv_comp_equal_back_fail_inv_pass_wrap_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_zero_comp_less_back_fail_zero_pass_repl_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_incc_comp_greater_or_equal_back_fail_wrap_pass_incc_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_keep_comp_greater_or_equal_back_fail_decc_pass_keep_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_decc_comp_greater_or_equal_back_fail_decc_pass_zero_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_decw_comp_always_back_fail_repl_pass_incc_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_incc_comp_never_back_fail_repl_pass_incc_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_repl_comp_always_back_fail_wrap_pass_incc_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_wrap_comp_never_back_fail_repl_pass_decw_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_keep_comp_never_back_fail_decw_pass_repl_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_decc_comp_greater_or_equal_back_fail_keep_pass_decw_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_zero_comp_less_or_equal_back_fail_inv_pass_repl_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_inv_comp_greater_or_equal_back_fail_decw_pass_keep_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_inv_comp_greater_or_equal_back_fail_keep_pass_wrap_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_repl_comp_greater_or_equal_back_fail_inv_pass_keep_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_zero_comp_always_back_fail_keep_pass_incc_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_zero_comp_greater_back_fail_zero_pass_repl_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_decw_comp_equal_back_fail_zero_pass_repl_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_keep_comp_greater_or_equal_back_fail_decc_pass_wrap_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_decc_comp_not_equal_back_fail_decw_pass_wrap_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_repl_comp_greater_or_equal_back_fail_wrap_pass_repl_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_incc_comp_greater_back_fail_repl_pass_decc_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_keep_comp_equal_back_fail_keep_pass_wrap_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_incc_comp_greater_back_fail_repl_pass_keep_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_wrap_comp_less_or_equal_back_fail_decc_pass_incc_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_wrap_comp_less_or_equal_back_fail_keep_pass_decc_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_inv_comp_greater_or_equal_back_fail_keep_pass_wrap_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_inv_comp_less_back_fail_incc_pass_repl_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_repl_comp_not_equal_back_fail_repl_pass_inv_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_zero_comp_greater_or_equal_back_fail_zero_pass_incc_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_inv_comp_less_back_fail_repl_pass_keep_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_incc_comp_greater_back_fail_wrap_pass_decc_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_inv_comp_always_back_fail_inv_pass_inv_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_keep_comp_greater_or_equal_back_fail_decc_pass_repl_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_decc_comp_equal_back_fail_decw_pass_decc_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_inv_comp_greater_or_equal_back_fail_decw_pass_incc_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_incc_comp_not_equal_back_fail_decw_pass_keep_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_decc_comp_greater_back_fail_incc_pass_zero_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_wrap_comp_greater_back_fail_zero_pass_keep_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_decw_comp_less_or_equal_back_fail_decw_pass_repl_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_decw_comp_never_back_fail_zero_pass_decw_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_incc_comp_greater_or_equal_back_fail_inv_pass_wrap_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_keep_comp_less_back_fail_wrap_pass_repl_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_incc_comp_greater_or_equal_back_fail_decw_pass_repl_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_wrap_comp_not_equal_back_fail_repl_pass_keep_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_inv_comp_always_back_fail_decc_pass_incc_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_wrap_comp_equal_back_fail_zero_pass_keep_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_repl_comp_greater_back_fail_inv_pass_wrap_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_decw_comp_equal_back_fail_decw_pass_wrap_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_incc_comp_greater_or_equal_back_fail_incc_pass_inv_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_decw_comp_greater_or_equal_back_fail_incc_pass_repl_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_repl_comp_not_equal_back_fail_inv_pass_inv_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_incc_comp_always_back_fail_inv_pass_wrap_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_keep_comp_greater_or_equal_back_fail_decc_pass_decw_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_incc_comp_always_back_fail_decc_pass_keep_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_zero_comp_less_back_fail_wrap_pass_repl_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_wrap_comp_greater_or_equal_back_fail_keep_pass_incc_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_decw_comp_greater_or_equal_back_fail_repl_pass_zero_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_inv_comp_less_back_fail_decc_pass_wrap_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_repl_comp_less_back_fail_repl_pass_decc_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_decc_comp_less_back_fail_inv_pass_keep_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_incc_comp_always_back_fail_zero_pass_wrap_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_zero_comp_greater_back_fail_zero_pass_wrap_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_wrap_comp_always_back_fail_keep_pass_wrap_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_inv_comp_not_equal_back_fail_wrap_pass_wrap_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_keep_comp_less_back_fail_inv_pass_repl_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_keep_comp_less_or_equal_back_fail_decw_pass_keep_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_decc_comp_not_equal_back_fail_keep_pass_inv_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_decc_comp_equal_back_fail_zero_pass_decw_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_repl_comp_not_equal_back_fail_wrap_pass_repl_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_decw_comp_less_or_equal_back_fail_inv_pass_inv_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_decc_comp_greater_back_fail_decw_pass_keep_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_inv_comp_never_back_fail_decw_pass_inv_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_repl_comp_not_equal_back_fail_keep_pass_wrap_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_keep_comp_always_back_fail_inv_pass_keep_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_decw_comp_not_equal_back_fail_decc_pass_decc_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_repl_comp_less_or_equal_back_fail_repl_pass_wrap_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_zero_comp_less_or_equal_back_fail_decw_pass_decc_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_inv_comp_never_back_fail_decc_pass_decw_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_decw_comp_less_or_equal_back_fail_inv_pass_decw_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_zero_comp_less_or_equal_back_fail_zero_pass_repl_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_wrap_comp_always_back_fail_keep_pass_decw_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_incc_comp_greater_or_equal_back_fail_wrap_pass_inv_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_zero_comp_less_or_equal_back_fail_wrap_pass_decw_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_repl_comp_always_back_fail_keep_pass_wrap_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_repl_comp_less_or_equal_back_fail_zero_pass_zero_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_decw_comp_never_back_fail_inv_pass_zero_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_wrap_comp_less_or_equal_back_fail_incc_pass_repl_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_repl_comp_always_back_fail_decc_pass_zero_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_zero_comp_less_back_fail_repl_pass_decc_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_wrap_comp_greater_back_fail_wrap_pass_decw_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_decc_comp_not_equal_back_fail_decw_pass_wrap_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_decw_comp_always_back_fail_keep_pass_keep_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_repl_comp_not_equal_back_fail_wrap_pass_keep_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_inv_comp_not_equal_back_fail_zero_pass_keep_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_wrap_comp_greater_or_equal_back_fail_decc_pass_decw_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_repl_comp_less_or_equal_back_fail_decw_pass_keep_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_wrap_comp_less_back_fail_decc_pass_zero_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_decw_comp_never_back_fail_incc_pass_incc_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_decc_comp_greater_back_fail_repl_pass_incc_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_decc_comp_not_equal_back_fail_wrap_pass_incc_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_repl_comp_greater_or_equal_back_fail_inv_pass_incc_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_inv_comp_greater_or_equal_back_fail_repl_pass_repl_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_repl_comp_never_back_fail_decw_pass_decc_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_wrap_comp_less_back_fail_keep_pass_inv_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_incc_comp_greater_or_equal_back_fail_wrap_pass_repl_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_wrap_comp_less_back_fail_inv_pass_decc_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_inv_comp_not_equal_back_fail_repl_pass_decw_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_wrap_comp_greater_back_fail_wrap_pass_zero_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_keep_comp_less_back_fail_decc_pass_keep_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_keep_comp_always_back_fail_decw_pass_inv_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_inv_comp_greater_back_fail_incc_pass_decw_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_incc_comp_less_back_fail_wrap_pass_incc_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_repl_comp_not_equal_back_fail_keep_pass_repl_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_wrap_comp_less_or_equal_back_fail_repl_pass_decw_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_keep_comp_equal_back_fail_zero_pass_keep_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_wrap_comp_less_or_equal_back_fail_decc_pass_decw_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_decc_comp_always_back_fail_inv_pass_inv_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_repl_comp_greater_or_equal_back_fail_repl_pass_inv_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_decw_comp_not_equal_back_fail_decc_pass_zero_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_keep_comp_greater_or_equal_back_fail_wrap_pass_repl_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_inv_comp_less_back_fail_keep_pass_inv_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_inv_comp_never_back_fail_decw_pass_decw_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_incc_comp_less_back_fail_decw_pass_decw_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_incc_comp_greater_back_fail_inv_pass_keep_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_wrap_comp_less_back_fail_repl_pass_keep_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_decw_comp_not_equal_back_fail_decc_pass_repl_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_incc_comp_greater_back_fail_repl_pass_repl_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_decw_comp_equal_back_fail_decw_pass_inv_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_decc_comp_less_back_fail_zero_pass_zero_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_decc_comp_not_equal_back_fail_decw_pass_incc_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_decw_comp_less_or_equal_back_fail_inv_pass_keep_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_decw_comp_not_equal_back_fail_keep_pass_decc_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_inv_comp_never_back_fail_decc_pass_repl_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_repl_comp_not_equal_back_fail_repl_pass_wrap_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_decc_comp_never_back_fail_zero_pass_inv_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_incc_comp_less_back_fail_incc_pass_decc_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_decc_comp_not_equal_back_fail_keep_pass_incc_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_inv_comp_never_back_fail_wrap_pass_incc_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_incc_comp_greater_back_fail_keep_pass_incc_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_keep_comp_equal_back_fail_keep_pass_zero_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_zero_comp_less_back_fail_decc_pass_inv_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_inv_comp_less_or_equal_back_fail_zero_pass_keep_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_zero_comp_never_back_fail_decw_pass_decc_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_keep_comp_always_back_fail_decw_pass_zero_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_repl_comp_less_or_equal_back_fail_zero_pass_inv_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_decw_comp_greater_back_fail_repl_pass_repl_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_incc_comp_never_back_fail_inv_pass_incc_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_keep_comp_not_equal_back_fail_zero_pass_decc_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_inv_comp_equal_back_fail_incc_pass_wrap_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_decw_comp_less_or_equal_back_fail_wrap_pass_incc_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_wrap_comp_equal_back_fail_keep_pass_incc_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_decc_comp_less_back_fail_decc_pass_zero_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_incc_comp_not_equal_back_fail_keep_pass_incc_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_keep_comp_greater_back_fail_repl_pass_repl_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_decw_comp_always_back_fail_zero_pass_zero_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_keep_comp_not_equal_back_fail_repl_pass_inv_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_keep_comp_less_back_fail_wrap_pass_decc_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_decw_comp_greater_back_fail_decc_pass_inv_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_keep_comp_less_back_fail_decc_pass_decc_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_inv_comp_never_back_fail_wrap_pass_repl_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_decw_comp_never_back_fail_wrap_pass_decw_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_repl_comp_always_back_fail_decc_pass_keep_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_keep_comp_less_back_fail_inv_pass_keep_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_inv_comp_not_equal_back_fail_inv_pass_decc_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_zero_comp_greater_or_equal_back_fail_repl_pass_repl_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_keep_comp_always_back_fail_zero_pass_repl_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_repl_comp_less_back_fail_inv_pass_decc_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_decw_comp_greater_back_fail_inv_pass_incc_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_zero_comp_never_back_fail_repl_pass_inv_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_zero_comp_less_or_equal_back_fail_repl_pass_decc_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_keep_comp_always_back_fail_keep_pass_zero_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_decw_comp_always_back_fail_incc_pass_decc_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_keep_comp_not_equal_back_fail_decc_pass_decw_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_zero_comp_less_or_equal_back_fail_inv_pass_repl_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_repl_comp_less_or_equal_back_fail_repl_pass_keep_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_keep_comp_less_back_fail_keep_pass_zero_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_incc_comp_greater_or_equal_back_fail_incc_pass_wrap_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_incc_comp_less_or_equal_back_fail_decc_pass_wrap_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_repl_comp_less_back_fail_wrap_pass_wrap_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_decw_comp_never_back_fail_decc_pass_incc_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_incc_comp_greater_back_fail_zero_pass_wrap_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_incc_comp_less_back_fail_keep_pass_incc_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_decc_comp_equal_back_fail_wrap_pass_decw_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_decw_comp_not_equal_back_fail_decw_pass_decw_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_wrap_comp_equal_back_fail_inv_pass_zero_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_repl_comp_always_back_fail_repl_pass_wrap_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_decc_comp_equal_back_fail_inv_pass_zero_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_decw_comp_always_back_fail_decc_pass_decc_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_decc_comp_not_equal_back_fail_incc_pass_decw_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_zero_comp_less_back_fail_keep_pass_decw_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_decc_comp_greater_or_equal_back_fail_wrap_pass_repl_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_decc_comp_greater_or_equal_back_fail_repl_pass_inv_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_inv_comp_less_back_fail_decc_pass_incc_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_incc_comp_never_back_fail_keep_pass_incc_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_incc_comp_greater_or_equal_back_fail_incc_pass_keep_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_decc_comp_less_back_fail_wrap_pass_incc_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_keep_comp_greater_back_fail_keep_pass_inv_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_keep_comp_never_back_fail_keep_pass_inv_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_inv_comp_equal_back_fail_repl_pass_zero_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_incc_comp_greater_or_equal_back_fail_repl_pass_incc_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_zero_comp_less_back_fail_zero_pass_repl_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_incc_comp_not_equal_back_fail_decc_pass_incc_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_repl_comp_equal_back_fail_zero_pass_zero_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_decw_comp_greater_back_fail_wrap_pass_decw_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_zero_comp_greater_back_fail_decw_pass_repl_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_keep_comp_greater_or_equal_back_fail_wrap_pass_keep_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_inv_comp_never_back_fail_incc_pass_inv_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_decw_comp_always_back_fail_decw_pass_repl_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_wrap_comp_less_or_equal_back_fail_decw_pass_repl_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_decw_comp_not_equal_back_fail_decw_pass_decw_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_repl_comp_less_back_fail_repl_pass_keep_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_decw_comp_greater_back_fail_keep_pass_keep_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_repl_comp_never_back_fail_incc_pass_decc_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_incc_comp_not_equal_back_fail_inv_pass_decw_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_repl_comp_equal_back_fail_incc_pass_incc_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_wrap_comp_greater_or_equal_back_fail_decw_pass_decc_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_zero_comp_less_or_equal_back_fail_keep_pass_inv_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_decw_comp_never_back_fail_repl_pass_zero_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_decc_comp_greater_or_equal_back_fail_incc_pass_wrap_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_decc_comp_greater_back_fail_incc_pass_incc_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_wrap_comp_greater_back_fail_incc_pass_zero_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_decw_comp_greater_or_equal_back_fail_wrap_pass_repl_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_inv_comp_not_equal_back_fail_wrap_pass_wrap_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_wrap_comp_less_or_equal_back_fail_wrap_pass_repl_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_zero_comp_always_back_fail_decc_pass_wrap_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_incc_comp_equal_back_fail_wrap_pass_zero_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_incc_comp_less_back_fail_inv_pass_zero_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_zero_comp_never_back_fail_keep_pass_wrap_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_decw_comp_not_equal_back_fail_inv_pass_incc_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_zero_comp_less_back_fail_decw_pass_incc_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_incc_comp_always_back_fail_inv_pass_incc_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_inv_comp_greater_back_fail_incc_pass_keep_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_decw_comp_less_or_equal_back_fail_keep_pass_decc_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_zero_comp_always_back_fail_zero_pass_decc_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_decc_comp_less_or_equal_back_fail_inv_pass_decc_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_wrap_comp_always_back_fail_inv_pass_inv_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_inv_comp_equal_back_fail_incc_pass_keep_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_zero_comp_always_back_fail_incc_pass_incc_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_keep_comp_not_equal_back_fail_keep_pass_keep_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_incc_comp_not_equal_back_fail_inv_pass_inv_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_incc_comp_less_or_equal_back_fail_repl_pass_wrap_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_decc_comp_not_equal_back_fail_decc_pass_repl_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_inv_comp_never_back_fail_decw_pass_keep_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_inv_comp_always_back_fail_keep_pass_zero_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_wrap_comp_not_equal_back_fail_decc_pass_wrap_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_wrap_comp_always_back_fail_incc_pass_keep_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_wrap_comp_less_or_equal_back_fail_keep_pass_repl_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_zero_comp_always_back_fail_keep_pass_decw_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_inv_comp_greater_or_equal_back_fail_incc_pass_decw_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_inv_comp_equal_back_fail_zero_pass_repl_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_repl_comp_not_equal_back_fail_incc_pass_decc_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_wrap_comp_equal_back_fail_inv_pass_zero_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_keep_comp_not_equal_back_fail_keep_pass_wrap_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_incc_comp_greater_or_equal_back_fail_decc_pass_inv_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_repl_comp_equal_back_fail_keep_pass_repl_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_repl_comp_never_back_fail_wrap_pass_inv_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_inv_comp_less_or_equal_back_fail_wrap_pass_decw_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_decc_comp_equal_back_fail_incc_pass_wrap_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_decw_comp_always_back_fail_inv_pass_decw_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_inv_comp_greater_back_fail_wrap_pass_decw_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_zero_comp_not_equal_back_fail_zero_pass_inv_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_zero_comp_always_back_fail_decw_pass_repl_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_incc_comp_equal_back_fail_wrap_pass_wrap_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_zero_comp_always_back_fail_zero_pass_decc_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_inv_comp_always_back_fail_repl_pass_decc_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_incc_comp_always_back_fail_inv_pass_wrap_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_decc_comp_equal_back_fail_keep_pass_decw_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_decw_comp_greater_or_equal_back_fail_zero_pass_inv_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_keep_comp_greater_back_fail_incc_pass_inv_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_decc_comp_not_equal_back_fail_inv_pass_zero_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_keep_comp_less_or_equal_back_fail_incc_pass_keep_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_incc_comp_equal_back_fail_keep_pass_decw_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_zero_comp_never_back_fail_wrap_pass_wrap_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_decw_comp_never_back_fail_wrap_pass_decw_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_zero_comp_equal_back_fail_decw_pass_zero_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_decw_comp_never_back_fail_incc_pass_incc_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_decc_comp_less_or_equal_back_fail_zero_pass_incc_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_wrap_comp_greater_back_fail_keep_pass_decw_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_keep_comp_always_back_fail_decw_pass_keep_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_decc_comp_equal_back_fail_keep_pass_keep_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_decc_comp_never_back_fail_keep_pass_repl_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_incc_comp_not_equal_back_fail_inv_pass_decc_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_decw_comp_greater_back_fail_keep_pass_keep_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_repl_comp_less_or_equal_back_fail_incc_pass_zero_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_inv_comp_greater_or_equal_back_fail_incc_pass_incc_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_inv_comp_equal_back_fail_keep_pass_decc_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_inv_comp_always_back_fail_decc_pass_repl_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_incc_comp_less_or_equal_back_fail_inv_pass_decc_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_inv_comp_less_back_fail_decw_pass_decc_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_keep_comp_greater_or_equal_back_fail_inv_pass_decc_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_inv_comp_greater_or_equal_back_fail_repl_pass_keep_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_zero_comp_greater_or_equal_back_fail_wrap_pass_zero_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_zero_comp_always_back_fail_inv_pass_incc_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_repl_comp_less_back_fail_keep_pass_decw_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_wrap_comp_equal_back_fail_wrap_pass_zero_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_decw_comp_less_or_equal_back_fail_keep_pass_decw_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_incc_comp_less_back_fail_inv_pass_zero_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_inv_comp_greater_back_fail_wrap_pass_keep_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_zero_comp_equal_back_fail_incc_pass_keep_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_decc_comp_less_or_equal_back_fail_zero_pass_wrap_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_inv_comp_never_back_fail_wrap_pass_wrap_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_decc_comp_less_back_fail_decw_pass_zero_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_decw_comp_not_equal_back_fail_keep_pass_wrap_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_decw_comp_never_back_fail_zero_pass_inv_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_repl_comp_not_equal_back_fail_decc_pass_decc_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_decw_comp_equal_back_fail_wrap_pass_decw_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_decc_comp_not_equal_back_fail_zero_pass_keep_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_wrap_comp_equal_back_fail_repl_pass_repl_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_wrap_comp_less_or_equal_back_fail_decc_pass_incc_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_zero_comp_always_back_fail_zero_pass_decw_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_incc_comp_less_back_fail_decc_pass_incc_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_zero_comp_less_or_equal_back_fail_decw_pass_decc_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_decw_comp_greater_or_equal_back_fail_decc_pass_incc_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_decw_comp_greater_back_fail_repl_pass_keep_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_repl_comp_never_back_fail_decw_pass_keep_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_keep_comp_equal_back_fail_decc_pass_keep_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_zero_comp_greater_back_fail_zero_pass_repl_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_decw_comp_greater_or_equal_back_fail_zero_pass_incc_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_incc_comp_equal_back_fail_incc_pass_decw_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_inv_comp_equal_back_fail_incc_pass_decw_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_wrap_comp_not_equal_back_fail_incc_pass_repl_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_inv_comp_never_back_fail_inv_pass_wrap_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_wrap_comp_greater_back_fail_zero_pass_wrap_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_inv_comp_greater_back_fail_decc_pass_decc_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_repl_comp_never_back_fail_keep_pass_incc_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_wrap_comp_equal_back_fail_inv_pass_wrap_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_zero_comp_always_back_fail_decc_pass_decw_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_decc_comp_less_or_equal_back_fail_decc_pass_inv_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_decc_comp_always_back_fail_inv_pass_repl_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_zero_comp_greater_back_fail_inv_pass_keep_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_incc_comp_always_back_fail_keep_pass_repl_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_wrap_comp_not_equal_back_fail_zero_pass_incc_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_keep_comp_less_back_fail_wrap_pass_wrap_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_zero_comp_greater_back_fail_repl_pass_decc_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_decc_comp_equal_back_fail_zero_pass_wrap_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_repl_comp_less_back_fail_decw_pass_repl_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_wrap_comp_greater_back_fail_keep_pass_zero_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_incc_comp_greater_back_fail_keep_pass_keep_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_decc_comp_greater_back_fail_wrap_pass_keep_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_decw_comp_always_back_fail_decc_pass_incc_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_decc_comp_never_back_fail_wrap_pass_inv_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_decw_comp_equal_back_fail_decw_pass_repl_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_keep_comp_equal_back_fail_zero_pass_incc_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_repl_comp_less_or_equal_back_fail_decw_pass_wrap_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_keep_comp_greater_back_fail_zero_pass_repl_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_decc_comp_greater_or_equal_back_fail_wrap_pass_decc_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_wrap_comp_less_or_equal_back_fail_repl_pass_wrap_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_repl_comp_equal_back_fail_incc_pass_incc_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_wrap_comp_greater_back_fail_keep_pass_incc_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_zero_comp_never_back_fail_incc_pass_decc_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_keep_comp_never_back_fail_repl_pass_keep_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_wrap_comp_less_or_equal_back_fail_incc_pass_incc_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_decc_comp_always_back_fail_incc_pass_wrap_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_wrap_comp_never_back_fail_decw_pass_wrap_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_keep_comp_greater_back_fail_decc_pass_wrap_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_decc_comp_greater_back_fail_decw_pass_decw_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_zero_comp_less_back_fail_zero_pass_inv_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_zero_comp_less_or_equal_back_fail_inv_pass_decw_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_incc_comp_less_or_equal_back_fail_incc_pass_inv_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_inv_comp_not_equal_back_fail_incc_pass_decw_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_repl_comp_always_back_fail_keep_pass_incc_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_keep_comp_equal_back_fail_incc_pass_zero_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_inv_comp_less_back_fail_inv_pass_decc_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_decw_comp_always_back_fail_wrap_pass_inv_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_keep_comp_always_back_fail_decc_pass_incc_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_decc_comp_less_back_fail_repl_pass_zero_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_repl_comp_not_equal_back_fail_keep_pass_zero_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_repl_comp_less_or_equal_back_fail_decc_pass_keep_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_decc_comp_not_equal_back_fail_keep_pass_wrap_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_decw_comp_less_or_equal_back_fail_repl_pass_incc_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_wrap_comp_equal_back_fail_incc_pass_zero_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_decc_comp_never_back_fail_decw_pass_wrap_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_decc_comp_always_back_fail_repl_pass_decc_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_decw_comp_not_equal_back_fail_keep_pass_inv_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_incc_comp_less_or_equal_back_fail_wrap_pass_inv_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_keep_comp_not_equal_back_fail_decc_pass_inv_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_inv_comp_not_equal_back_fail_wrap_pass_decw_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_repl_comp_less_or_equal_back_fail_incc_pass_inv_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_repl_comp_greater_back_fail_zero_pass_decc_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_decc_comp_equal_back_fail_decc_pass_inv_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_incc_comp_greater_back_fail_inv_pass_repl_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_wrap_comp_less_or_equal_back_fail_incc_pass_keep_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_wrap_comp_greater_back_fail_keep_pass_repl_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_wrap_comp_less_back_fail_keep_pass_inv_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_keep_comp_greater_back_fail_decw_pass_inv_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_decw_comp_not_equal_back_fail_inv_pass_incc_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_keep_comp_greater_or_equal_back_fail_zero_pass_repl_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_keep_comp_greater_back_fail_incc_pass_zero_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_decc_comp_never_back_fail_decc_pass_incc_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_repl_comp_not_equal_back_fail_repl_pass_repl_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_repl_comp_greater_back_fail_repl_pass_wrap_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_keep_comp_never_back_fail_inv_pass_wrap_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_decc_comp_greater_back_fail_zero_pass_inv_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_inv_comp_not_equal_back_fail_inv_pass_incc_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_decc_comp_greater_or_equal_back_fail_decc_pass_incc_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_incc_comp_less_back_fail_wrap_pass_wrap_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_keep_comp_less_back_fail_decc_pass_incc_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_incc_comp_greater_back_fail_incc_pass_decc_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_repl_comp_greater_or_equal_back_fail_decw_pass_zero_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_incc_comp_not_equal_back_fail_decw_pass_zero_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_decw_comp_less_or_equal_back_fail_decw_pass_keep_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_wrap_comp_less_or_equal_back_fail_wrap_pass_decw_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_incc_comp_not_equal_back_fail_repl_pass_decw_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_incc_comp_less_back_fail_zero_pass_inv_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_keep_comp_not_equal_back_fail_wrap_pass_decc_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_inv_comp_not_equal_back_fail_decc_pass_wrap_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_inv_comp_never_back_fail_incc_pass_zero_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_incc_comp_equal_back_fail_incc_pass_decc_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_decc_comp_greater_or_equal_back_fail_keep_pass_incc_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_repl_comp_not_equal_back_fail_repl_pass_repl_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_wrap_comp_greater_or_equal_back_fail_keep_pass_decc_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_decw_comp_less_back_fail_inv_pass_repl_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_incc_comp_less_or_equal_back_fail_repl_pass_decc_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_wrap_comp_greater_or_equal_back_fail_keep_pass_keep_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_inv_comp_less_back_fail_decc_pass_repl_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_wrap_comp_greater_or_equal_back_fail_incc_pass_wrap_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_zero_comp_greater_or_equal_back_fail_incc_pass_wrap_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_inv_comp_less_or_equal_back_fail_wrap_pass_decc_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_zero_comp_equal_back_fail_keep_pass_repl_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_wrap_comp_less_back_fail_decc_pass_decc_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_repl_comp_always_back_fail_zero_pass_wrap_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_wrap_comp_less_or_equal_back_fail_decw_pass_zero_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_decc_comp_less_back_fail_inv_pass_repl_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_decw_comp_always_back_fail_wrap_pass_wrap_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_keep_comp_less_or_equal_back_fail_zero_pass_decw_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_repl_comp_never_back_fail_decc_pass_decw_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_keep_comp_never_back_fail_repl_pass_decw_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_keep_comp_greater_back_fail_wrap_pass_keep_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_keep_comp_equal_back_fail_decc_pass_inv_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_wrap_comp_less_or_equal_back_fail_keep_pass_incc_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_decw_comp_less_back_fail_inv_pass_incc_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_keep_comp_equal_back_fail_decc_pass_incc_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_decc_comp_always_back_fail_wrap_pass_incc_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_incc_comp_equal_back_fail_decc_pass_wrap_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_keep_comp_less_back_fail_decc_pass_incc_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_zero_comp_less_back_fail_incc_pass_repl_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_incc_comp_greater_or_equal_back_fail_zero_pass_wrap_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_incc_comp_never_back_fail_repl_pass_repl_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_decw_comp_never_back_fail_decc_pass_keep_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_wrap_comp_always_back_fail_decc_pass_wrap_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_incc_comp_greater_back_fail_zero_pass_repl_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_zero_comp_not_equal_back_fail_repl_pass_repl_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_zero_comp_equal_back_fail_incc_pass_keep_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_incc_comp_equal_back_fail_incc_pass_wrap_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_wrap_comp_always_back_fail_zero_pass_incc_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_wrap_comp_never_back_fail_repl_pass_keep_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_repl_comp_less_or_equal_back_fail_decc_pass_inv_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_repl_comp_never_back_fail_repl_pass_wrap_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_wrap_comp_less_or_equal_back_fail_wrap_pass_zero_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_wrap_comp_less_or_equal_back_fail_wrap_pass_repl_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_inv_comp_greater_back_fail_decc_pass_decw_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_inv_comp_less_or_equal_back_fail_wrap_pass_decw_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_decw_comp_equal_back_fail_zero_pass_decc_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_keep_comp_less_back_fail_repl_pass_keep_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_keep_comp_never_back_fail_keep_pass_repl_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_repl_comp_not_equal_back_fail_inv_pass_decw_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_wrap_comp_never_back_fail_decc_pass_incc_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_wrap_comp_not_equal_back_fail_incc_pass_keep_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_wrap_comp_equal_back_fail_wrap_pass_repl_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_incc_comp_never_back_fail_zero_pass_repl_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_wrap_comp_equal_back_fail_inv_pass_keep_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_keep_comp_always_back_fail_inv_pass_decw_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_keep_comp_greater_back_fail_wrap_pass_repl_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_incc_comp_less_back_fail_inv_pass_repl_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_wrap_comp_greater_back_fail_inv_pass_decc_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_zero_comp_less_back_fail_zero_pass_decw_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_zero_comp_always_back_fail_zero_pass_repl_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_incc_comp_equal_back_fail_decc_pass_decc_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_zero_comp_always_back_fail_decw_pass_inv_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_incc_comp_always_back_fail_repl_pass_inv_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_inv_comp_never_back_fail_repl_pass_wrap_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_decc_comp_less_or_equal_back_fail_zero_pass_zero_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_inv_comp_not_equal_back_fail_wrap_pass_keep_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_keep_comp_greater_back_fail_zero_pass_wrap_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_keep_comp_less_or_equal_back_fail_keep_pass_incc_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_keep_comp_always_back_fail_keep_pass_repl_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_wrap_comp_always_back_fail_decc_pass_decw_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_incc_comp_equal_back_fail_repl_pass_decc_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_decw_comp_greater_back_fail_inv_pass_inv_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_decw_comp_less_back_fail_decw_pass_zero_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_decc_comp_greater_back_fail_wrap_pass_decc_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_incc_comp_always_back_fail_incc_pass_decc_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_wrap_comp_greater_or_equal_back_fail_keep_pass_keep_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_keep_comp_never_back_fail_keep_pass_decc_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_incc_comp_less_back_fail_keep_pass_keep_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_decw_comp_less_back_fail_repl_pass_zero_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_incc_comp_greater_or_equal_back_fail_keep_pass_keep_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_repl_comp_never_back_fail_inv_pass_zero_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_decc_comp_less_back_fail_repl_pass_repl_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_incc_comp_greater_or_equal_back_fail_decw_pass_inv_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_decw_comp_less_back_fail_decw_pass_decc_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_repl_comp_less_back_fail_wrap_pass_zero_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_keep_comp_less_or_equal_back_fail_decc_pass_wrap_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_zero_comp_less_or_equal_back_fail_incc_pass_incc_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_keep_comp_less_or_equal_back_fail_decc_pass_repl_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_decc_comp_greater_back_fail_decc_pass_incc_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_wrap_comp_not_equal_back_fail_zero_pass_wrap_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_repl_comp_greater_back_fail_repl_pass_zero_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_decw_comp_never_back_fail_decw_pass_inv_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_zero_comp_less_back_fail_decw_pass_inv_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_decw_comp_greater_back_fail_incc_pass_wrap_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_incc_comp_greater_or_equal_back_fail_decc_pass_repl_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_repl_comp_less_or_equal_back_fail_keep_pass_inv_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_decw_comp_less_back_fail_incc_pass_inv_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_decc_comp_less_or_equal_back_fail_keep_pass_zero_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_zero_comp_greater_or_equal_back_fail_keep_pass_incc_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_zero_comp_not_equal_back_fail_zero_pass_inv_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_incc_comp_less_back_fail_zero_pass_incc_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_inv_comp_never_back_fail_wrap_pass_zero_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_decw_comp_greater_or_equal_back_fail_wrap_pass_wrap_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_keep_comp_less_back_fail_decw_pass_keep_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_zero_comp_greater_or_equal_back_fail_wrap_pass_zero_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_inv_comp_greater_back_fail_repl_pass_incc_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_decc_comp_equal_back_fail_decw_pass_keep_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_decc_comp_less_or_equal_back_fail_wrap_pass_zero_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_repl_comp_never_back_fail_repl_pass_wrap_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_wrap_comp_equal_back_fail_keep_pass_incc_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_decw_comp_greater_back_fail_decw_pass_decc_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_inv_comp_not_equal_back_fail_incc_pass_keep_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_wrap_comp_greater_or_equal_back_fail_wrap_pass_incc_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_decc_comp_not_equal_back_fail_inv_pass_wrap_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_wrap_comp_greater_back_fail_incc_pass_inv_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_inv_comp_never_back_fail_wrap_pass_decw_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_repl_comp_less_back_fail_repl_pass_repl_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_keep_comp_less_or_equal_back_fail_repl_pass_keep_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_decc_comp_never_back_fail_zero_pass_decc_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_decw_comp_greater_back_fail_decw_pass_decw_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_zero_comp_always_back_fail_decc_pass_decw_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_zero_comp_greater_or_equal_back_fail_keep_pass_repl_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_decw_comp_greater_or_equal_back_fail_zero_pass_decc_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_inv_comp_not_equal_back_fail_keep_pass_keep_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_decw_comp_less_or_equal_back_fail_zero_pass_decw_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_inv_comp_greater_back_fail_repl_pass_keep_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_incc_comp_always_back_fail_decc_pass_decc_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_incc_comp_never_back_fail_zero_pass_keep_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_incc_comp_less_or_equal_back_fail_decc_pass_decw_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_repl_comp_always_back_fail_zero_pass_wrap_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_decc_comp_less_or_equal_back_fail_incc_pass_incc_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_wrap_comp_never_back_fail_wrap_pass_inv_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_incc_comp_less_back_fail_inv_pass_inv_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_repl_comp_less_or_equal_back_fail_keep_pass_decw_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_keep_comp_less_or_equal_back_fail_repl_pass_inv_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_wrap_comp_not_equal_back_fail_incc_pass_keep_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_keep_comp_less_back_fail_keep_pass_inv_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_incc_comp_not_equal_back_fail_inv_pass_repl_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_zero_comp_less_or_equal_back_fail_zero_pass_repl_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_incc_comp_never_back_fail_wrap_pass_decc_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_keep_comp_equal_back_fail_incc_pass_decw_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_decc_comp_less_or_equal_back_fail_keep_pass_decw_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_repl_comp_not_equal_back_fail_repl_pass_inv_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_decw_comp_equal_back_fail_wrap_pass_zero_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_incc_comp_never_back_fail_inv_pass_wrap_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_zero_comp_greater_or_equal_back_fail_incc_pass_zero_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_zero_comp_not_equal_back_fail_decw_pass_zero_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_repl_comp_never_back_fail_incc_pass_wrap_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_incc_comp_never_back_fail_zero_pass_keep_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_decc_comp_never_back_fail_repl_pass_wrap_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_repl_comp_always_back_fail_decw_pass_zero_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_repl_comp_less_back_fail_inv_pass_inv_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_decw_comp_less_or_equal_back_fail_wrap_pass_keep_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_decw_comp_not_equal_back_fail_repl_pass_incc_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_inv_comp_greater_back_fail_inv_pass_keep_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_decc_comp_less_back_fail_zero_pass_decw_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_zero_comp_less_back_fail_decw_pass_keep_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_decc_comp_less_back_fail_decw_pass_incc_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_decw_comp_always_back_fail_decc_pass_wrap_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_decw_comp_less_or_equal_back_fail_repl_pass_zero_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_decc_comp_greater_or_equal_back_fail_decw_pass_repl_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_inv_comp_always_back_fail_inv_pass_incc_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_repl_comp_not_equal_back_fail_zero_pass_inv_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_zero_comp_always_back_fail_keep_pass_incc_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_decw_comp_always_back_fail_inv_pass_inv_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_zero_comp_not_equal_back_fail_keep_pass_zero_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_keep_comp_always_back_fail_incc_pass_zero_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_inv_comp_less_back_fail_incc_pass_wrap_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_keep_comp_less_or_equal_back_fail_keep_pass_repl_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_zero_comp_never_back_fail_keep_pass_keep_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_inv_comp_greater_back_fail_zero_pass_decc_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_decw_comp_less_or_equal_back_fail_decw_pass_inv_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_incc_comp_not_equal_back_fail_keep_pass_repl_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_repl_comp_never_back_fail_decw_pass_zero_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_zero_comp_always_back_fail_zero_pass_wrap_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_decc_comp_less_or_equal_back_fail_wrap_pass_keep_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_decw_comp_less_or_equal_back_fail_decw_pass_incc_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_wrap_comp_not_equal_back_fail_keep_pass_decw_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_zero_comp_never_back_fail_inv_pass_decw_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_inv_comp_not_equal_back_fail_decc_pass_inv_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_keep_comp_always_back_fail_inv_pass_incc_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_decw_comp_less_or_equal_back_fail_decc_pass_keep_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_wrap_comp_never_back_fail_inv_pass_wrap_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_wrap_comp_never_back_fail_zero_pass_keep_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_zero_comp_less_back_fail_wrap_pass_keep_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_zero_comp_equal_back_fail_decw_pass_wrap_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_zero_comp_not_equal_back_fail_keep_pass_zero_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_inv_comp_never_back_fail_inv_pass_wrap_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_decw_comp_never_back_fail_repl_pass_inv_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_incc_comp_greater_back_fail_wrap_pass_decw_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_decc_comp_not_equal_back_fail_incc_pass_inv_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_wrap_comp_always_back_fail_decw_pass_zero_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_zero_comp_greater_or_equal_back_fail_incc_pass_repl_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_keep_comp_always_back_fail_inv_pass_inv_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_inv_comp_less_back_fail_decc_pass_incc_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_wrap_comp_never_back_fail_zero_pass_decc_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_zero_comp_not_equal_back_fail_inv_pass_incc_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_keep_comp_not_equal_back_fail_decc_pass_wrap_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_keep_comp_not_equal_back_fail_inv_pass_zero_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_incc_comp_always_back_fail_keep_pass_incc_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_wrap_comp_greater_back_fail_decw_pass_keep_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_zero_comp_greater_or_equal_back_fail_repl_pass_repl_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_repl_comp_not_equal_back_fail_wrap_pass_zero_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_decw_comp_less_or_equal_back_fail_keep_pass_inv_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_wrap_comp_greater_back_fail_decc_pass_repl_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_decw_comp_greater_back_fail_decc_pass_incc_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_wrap_comp_not_equal_back_fail_zero_pass_decc_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_inv_comp_greater_back_fail_incc_pass_decw_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_zero_comp_less_back_fail_repl_pass_keep_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_repl_comp_equal_back_fail_inv_pass_repl_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_inv_comp_less_or_equal_back_fail_incc_pass_inv_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_zero_comp_equal_back_fail_decc_pass_decw_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_zero_comp_greater_or_equal_back_fail_repl_pass_zero_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_inv_comp_greater_back_fail_keep_pass_keep_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_zero_comp_always_back_fail_inv_pass_wrap_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_decc_comp_never_back_fail_wrap_pass_decw_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_repl_comp_greater_back_fail_zero_pass_keep_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_decc_comp_not_equal_back_fail_keep_pass_wrap_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_wrap_comp_always_back_fail_decw_pass_wrap_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_zero_comp_never_back_fail_decc_pass_incc_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_keep_comp_never_back_fail_incc_pass_repl_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_zero_comp_greater_back_fail_wrap_pass_wrap_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_incc_comp_never_back_fail_decw_pass_repl_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_repl_comp_less_back_fail_wrap_pass_decc_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_incc_comp_greater_or_equal_back_fail_decw_pass_zero_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_inv_comp_never_back_fail_keep_pass_wrap_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_repl_comp_greater_back_fail_decw_pass_inv_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_zero_comp_never_back_fail_incc_pass_zero_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_incc_comp_less_back_fail_keep_pass_inv_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_repl_comp_equal_back_fail_inv_pass_zero_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_keep_comp_greater_or_equal_back_fail_zero_pass_decc_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_zero_comp_greater_back_fail_decc_pass_incc_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_decc_comp_equal_back_fail_zero_pass_inv_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_repl_comp_less_back_fail_wrap_pass_keep_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_decw_comp_never_back_fail_incc_pass_incc_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_decc_comp_less_back_fail_repl_pass_decw_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_inv_comp_equal_back_fail_repl_pass_wrap_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_incc_comp_not_equal_back_fail_keep_pass_decw_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_incc_comp_greater_or_equal_back_fail_repl_pass_decc_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_incc_comp_less_back_fail_wrap_pass_inv_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_repl_comp_always_back_fail_decc_pass_wrap_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_keep_comp_greater_back_fail_repl_pass_keep_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_decc_comp_less_back_fail_incc_pass_repl_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_incc_comp_greater_back_fail_repl_pass_incc_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_incc_comp_always_back_fail_repl_pass_zero_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_decw_comp_never_back_fail_decc_pass_keep_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_keep_comp_never_back_fail_repl_pass_wrap_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_keep_comp_greater_or_equal_back_fail_inv_pass_incc_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_zero_comp_never_back_fail_decc_pass_repl_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_wrap_comp_less_or_equal_back_fail_inv_pass_decc_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_wrap_comp_not_equal_back_fail_repl_pass_wrap_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_wrap_comp_equal_back_fail_wrap_pass_decw_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_decc_comp_greater_back_fail_keep_pass_decc_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_keep_comp_never_back_fail_decw_pass_incc_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_decw_comp_less_back_fail_decw_pass_incc_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_keep_comp_less_back_fail_zero_pass_zero_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_incc_comp_greater_back_fail_incc_pass_zero_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_zero_comp_greater_or_equal_back_fail_decc_pass_repl_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_repl_comp_less_back_fail_inv_pass_decw_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_inv_comp_greater_or_equal_back_fail_decw_pass_repl_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_decc_comp_greater_or_equal_back_fail_keep_pass_incc_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_decc_comp_less_or_equal_back_fail_wrap_pass_decw_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_keep_comp_greater_or_equal_back_fail_decw_pass_decc_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_decc_comp_never_back_fail_decw_pass_repl_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_repl_comp_greater_or_equal_back_fail_decc_pass_repl_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_keep_comp_greater_or_equal_back_fail_zero_pass_repl_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_decc_comp_never_back_fail_zero_pass_decw_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_repl_comp_less_back_fail_wrap_pass_inv_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_repl_comp_never_back_fail_zero_pass_wrap_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_keep_comp_less_back_fail_decw_pass_decc_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_decw_comp_not_equal_back_fail_wrap_pass_decw_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_incc_comp_greater_back_fail_decw_pass_zero_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_inv_comp_greater_back_fail_zero_pass_inv_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_repl_comp_not_equal_back_fail_zero_pass_zero_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_repl_comp_equal_back_fail_decc_pass_repl_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_repl_comp_never_back_fail_zero_pass_repl_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_decw_comp_never_back_fail_incc_pass_wrap_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_wrap_comp_equal_back_fail_incc_pass_decw_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_keep_comp_less_or_equal_back_fail_wrap_pass_repl_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_inv_comp_never_back_fail_incc_pass_zero_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_incc_comp_equal_back_fail_wrap_pass_zero_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_incc_comp_greater_or_equal_back_fail_wrap_pass_incc_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_inv_comp_always_back_fail_keep_pass_zero_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_wrap_comp_not_equal_back_fail_repl_pass_incc_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_decw_comp_greater_or_equal_back_fail_decw_pass_inv_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_inv_comp_less_or_equal_back_fail_decw_pass_inv_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_inv_comp_not_equal_back_fail_decc_pass_wrap_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_decw_comp_equal_back_fail_incc_pass_incc_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_wrap_comp_equal_back_fail_decc_pass_incc_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_decc_comp_greater_or_equal_back_fail_zero_pass_keep_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_zero_comp_greater_back_fail_repl_pass_keep_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_repl_comp_equal_back_fail_decc_pass_wrap_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_decw_comp_less_back_fail_incc_pass_decw_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_incc_comp_not_equal_back_fail_decc_pass_decw_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_repl_comp_greater_or_equal_back_fail_wrap_pass_decc_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_repl_comp_never_back_fail_zero_pass_decc_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_decc_comp_greater_back_fail_incc_pass_decc_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_keep_comp_equal_back_fail_keep_pass_wrap_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_decw_comp_never_back_fail_keep_pass_decc_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_decw_comp_less_back_fail_repl_pass_keep_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_zero_comp_greater_back_fail_repl_pass_incc_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_decw_comp_greater_or_equal_back_fail_inv_pass_keep_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_wrap_comp_greater_or_equal_back_fail_inv_pass_decc_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_wrap_comp_less_back_fail_wrap_pass_zero_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_keep_comp_less_or_equal_back_fail_incc_pass_wrap_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_zero_comp_never_back_fail_zero_pass_decw_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_zero_comp_equal_back_fail_repl_pass_repl_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_wrap_comp_not_equal_back_fail_decw_pass_wrap_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_repl_comp_not_equal_back_fail_incc_pass_wrap_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_keep_comp_not_equal_back_fail_decc_pass_decw_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_repl_comp_less_back_fail_repl_pass_repl_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_inv_comp_always_back_fail_wrap_pass_inv_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_decc_comp_equal_back_fail_repl_pass_decw_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_wrap_comp_less_back_fail_keep_pass_keep_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_wrap_comp_never_back_fail_decw_pass_zero_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_incc_comp_not_equal_back_fail_decc_pass_decw_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_incc_comp_greater_or_equal_back_fail_incc_pass_decc_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_keep_comp_less_or_equal_back_fail_zero_pass_wrap_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_wrap_comp_less_back_fail_keep_pass_incc_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_zero_comp_not_equal_back_fail_repl_pass_inv_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_incc_comp_not_equal_back_fail_inv_pass_decw_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_zero_comp_less_or_equal_back_fail_incc_pass_keep_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_zero_comp_never_back_fail_decc_pass_decc_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_decw_comp_never_back_fail_keep_pass_zero_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_decc_comp_not_equal_back_fail_keep_pass_inv_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_wrap_comp_equal_back_fail_incc_pass_repl_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_zero_comp_never_back_fail_repl_pass_decw_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_decc_comp_equal_back_fail_keep_pass_decc_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_zero_comp_less_back_fail_zero_pass_decc_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_decw_comp_greater_back_fail_decc_pass_decw_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_repl_comp_less_back_fail_inv_pass_zero_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_decc_comp_greater_or_equal_back_fail_decw_pass_wrap_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_wrap_comp_greater_or_equal_back_fail_zero_pass_repl_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_inv_comp_less_or_equal_back_fail_wrap_pass_repl_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_incc_comp_not_equal_back_fail_keep_pass_wrap_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_repl_comp_equal_back_fail_incc_pass_decw_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_incc_comp_greater_back_fail_wrap_pass_repl_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_repl_comp_less_or_equal_back_fail_keep_pass_inv_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_inv_comp_less_back_fail_decw_pass_inv_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_incc_comp_less_back_fail_decw_pass_incc_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_keep_comp_not_equal_back_fail_repl_pass_decw_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_inv_comp_always_back_fail_wrap_pass_incc_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_decw_comp_not_equal_back_fail_decc_pass_keep_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_decw_comp_always_back_fail_keep_pass_decw_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_incc_comp_equal_back_fail_wrap_pass_decc_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_zero_comp_greater_back_fail_wrap_pass_decc_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_repl_comp_always_back_fail_wrap_pass_inv_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_keep_comp_less_or_equal_back_fail_incc_pass_wrap_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_wrap_comp_less_or_equal_back_fail_wrap_pass_repl_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_inv_comp_less_or_equal_back_fail_incc_pass_decw_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_repl_comp_greater_back_fail_decw_pass_decw_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_incc_comp_less_back_fail_decw_pass_incc_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_repl_comp_greater_or_equal_back_fail_repl_pass_wrap_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_decw_comp_equal_back_fail_wrap_pass_incc_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_zero_comp_less_or_equal_back_fail_inv_pass_inv_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_keep_comp_not_equal_back_fail_inv_pass_decw_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_wrap_comp_greater_or_equal_back_fail_inv_pass_decw_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_wrap_comp_not_equal_back_fail_decc_pass_decw_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_keep_comp_equal_back_fail_decw_pass_keep_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_zero_comp_not_equal_back_fail_incc_pass_keep_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_keep_comp_less_back_fail_decw_pass_inv_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_zero_comp_never_back_fail_incc_pass_inv_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_zero_comp_greater_back_fail_zero_pass_decw_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_inv_comp_greater_or_equal_back_fail_decw_pass_zero_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_keep_comp_not_equal_back_fail_decc_pass_decc_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_zero_comp_less_back_fail_repl_pass_inv_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_wrap_comp_less_back_fail_keep_pass_wrap_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_decw_comp_never_back_fail_decw_pass_decw_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_inv_comp_less_back_fail_zero_pass_zero_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_incc_comp_greater_or_equal_back_fail_keep_pass_decw_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_zero_comp_less_or_equal_back_fail_decc_pass_decc_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_inv_comp_not_equal_back_fail_repl_pass_repl_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_wrap_comp_always_back_fail_zero_pass_keep_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_decw_comp_less_or_equal_back_fail_decw_pass_decw_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_keep_comp_always_back_fail_wrap_pass_incc_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_inv_comp_equal_back_fail_keep_pass_repl_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_keep_comp_less_back_fail_decw_pass_decc_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_zero_comp_not_equal_back_fail_decc_pass_wrap_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_decc_comp_equal_back_fail_repl_pass_decc_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_repl_comp_always_back_fail_wrap_pass_decw_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_inv_comp_greater_or_equal_back_fail_keep_pass_zero_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_wrap_comp_always_back_fail_wrap_pass_incc_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_repl_comp_not_equal_back_fail_incc_pass_incc_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_keep_comp_always_back_fail_decw_pass_repl_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_decc_comp_less_back_fail_decw_pass_repl_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_inv_comp_less_or_equal_back_fail_decc_pass_zero_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_decc_comp_less_or_equal_back_fail_decc_pass_incc_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_wrap_comp_not_equal_back_fail_decw_pass_repl_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_decc_comp_less_back_fail_decw_pass_zero_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_repl_comp_less_or_equal_back_fail_inv_pass_keep_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_inv_comp_greater_back_fail_keep_pass_repl_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_decc_comp_greater_or_equal_back_fail_repl_pass_decw_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_decw_comp_never_back_fail_decw_pass_wrap_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_zero_comp_not_equal_back_fail_zero_pass_inv_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_decc_comp_less_back_fail_inv_pass_incc_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_decc_comp_never_back_fail_repl_pass_decc_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_repl_comp_always_back_fail_keep_pass_wrap_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_decw_comp_less_back_fail_zero_pass_wrap_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_incc_comp_less_back_fail_zero_pass_wrap_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_repl_comp_less_or_equal_back_fail_decc_pass_decc_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_repl_comp_equal_back_fail_decw_pass_keep_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_decw_comp_greater_back_fail_repl_pass_repl_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_repl_comp_less_or_equal_back_fail_keep_pass_inv_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_incc_comp_greater_or_equal_back_fail_repl_pass_incc_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_wrap_comp_never_back_fail_keep_pass_keep_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_decw_comp_less_or_equal_back_fail_repl_pass_zero_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_inv_comp_never_back_fail_zero_pass_wrap_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_decw_comp_not_equal_back_fail_incc_pass_zero_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_decc_comp_less_or_equal_back_fail_zero_pass_incc_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_decc_comp_never_back_fail_zero_pass_wrap_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_wrap_comp_never_back_fail_decc_pass_decc_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_inv_comp_less_back_fail_zero_pass_repl_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_decc_comp_less_back_fail_decw_pass_decc_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_keep_comp_greater_or_equal_back_fail_zero_pass_incc_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_decw_comp_greater_or_equal_back_fail_incc_pass_decc_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_keep_comp_greater_or_equal_back_fail_incc_pass_incc_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_decc_comp_less_back_fail_zero_pass_zero_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_repl_comp_less_back_fail_inv_pass_decc_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_keep_comp_greater_back_fail_zero_pass_keep_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_zero_comp_greater_or_equal_back_fail_inv_pass_decc_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_incc_comp_not_equal_back_fail_inv_pass_repl_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_keep_comp_greater_back_fail_wrap_pass_repl_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_keep_comp_greater_back_fail_keep_pass_decw_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_wrap_comp_always_back_fail_decc_pass_wrap_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_wrap_comp_less_or_equal_back_fail_zero_pass_inv_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_wrap_comp_less_or_equal_back_fail_decw_pass_wrap_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_incc_comp_never_back_fail_incc_pass_zero_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_incc_comp_equal_back_fail_zero_pass_inv_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_keep_comp_greater_back_fail_repl_pass_inv_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_repl_comp_less_or_equal_back_fail_decc_pass_decw_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_incc_comp_not_equal_back_fail_zero_pass_wrap_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_repl_comp_greater_back_fail_zero_pass_decw_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_repl_comp_greater_back_fail_zero_pass_repl_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_incc_comp_greater_or_equal_back_fail_zero_pass_inv_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_keep_comp_greater_or_equal_back_fail_incc_pass_zero_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_wrap_comp_not_equal_back_fail_keep_pass_decc_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_wrap_comp_less_back_fail_decw_pass_wrap_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_repl_comp_equal_back_fail_repl_pass_wrap_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_incc_comp_greater_or_equal_back_fail_keep_pass_decc_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_repl_comp_always_back_fail_zero_pass_decc_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_zero_comp_less_back_fail_repl_pass_incc_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_wrap_comp_less_back_fail_incc_pass_decw_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_decw_comp_never_back_fail_wrap_pass_keep_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_decc_comp_greater_or_equal_back_fail_keep_pass_repl_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_inv_comp_greater_or_equal_back_fail_incc_pass_wrap_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_repl_comp_less_or_equal_back_fail_keep_pass_keep_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_wrap_comp_greater_back_fail_incc_pass_wrap_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_incc_comp_less_back_fail_keep_pass_wrap_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_keep_comp_greater_or_equal_back_fail_zero_pass_inv_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_inv_comp_less_or_equal_back_fail_inv_pass_decw_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_decw_comp_less_back_fail_decc_pass_inv_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_zero_comp_equal_back_fail_incc_pass_wrap_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_wrap_comp_never_back_fail_decw_pass_repl_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_zero_comp_always_back_fail_decc_pass_zero_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_decw_comp_greater_or_equal_back_fail_incc_pass_wrap_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_decw_comp_less_back_fail_decc_pass_decw_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_repl_comp_greater_back_fail_incc_pass_keep_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_zero_comp_always_back_fail_wrap_pass_keep_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_zero_comp_always_back_fail_repl_pass_repl_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_wrap_comp_less_or_equal_back_fail_decw_pass_incc_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_decc_comp_not_equal_back_fail_decc_pass_inv_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_decw_comp_greater_back_fail_zero_pass_wrap_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_repl_comp_never_back_fail_inv_pass_decw_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_decc_comp_less_back_fail_repl_pass_wrap_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_zero_comp_greater_or_equal_back_fail_wrap_pass_repl_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_decw_comp_not_equal_back_fail_keep_pass_decw_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_decw_comp_always_back_fail_repl_pass_incc_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_wrap_comp_not_equal_back_fail_decc_pass_decc_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_wrap_comp_greater_or_equal_back_fail_decw_pass_decw_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_decc_comp_never_back_fail_wrap_pass_keep_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_wrap_comp_greater_or_equal_back_fail_zero_pass_decc_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_incc_comp_always_back_fail_incc_pass_keep_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_decw_comp_less_back_fail_inv_pass_inv_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_wrap_comp_not_equal_back_fail_keep_pass_decw_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_inv_comp_always_back_fail_decc_pass_inv_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_wrap_comp_never_back_fail_keep_pass_keep_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_repl_comp_never_back_fail_wrap_pass_inv_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_decw_comp_greater_back_fail_zero_pass_repl_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_decc_comp_not_equal_back_fail_inv_pass_repl_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_inv_comp_less_back_fail_keep_pass_wrap_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_repl_comp_less_back_fail_wrap_pass_keep_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_wrap_comp_always_back_fail_keep_pass_decw_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_incc_comp_not_equal_back_fail_inv_pass_inv_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_incc_comp_not_equal_back_fail_repl_pass_zero_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_zero_comp_equal_back_fail_decw_pass_wrap_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_decw_comp_not_equal_back_fail_wrap_pass_incc_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_incc_comp_greater_or_equal_back_fail_incc_pass_keep_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_decc_comp_less_back_fail_inv_pass_repl_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_decc_comp_never_back_fail_zero_pass_decw_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_decc_comp_greater_back_fail_decw_pass_inv_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_incc_comp_less_or_equal_back_fail_zero_pass_repl_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_decw_comp_less_or_equal_back_fail_decw_pass_repl_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_repl_comp_greater_back_fail_incc_pass_repl_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_decc_comp_greater_back_fail_decc_pass_zero_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_decc_comp_equal_back_fail_wrap_pass_inv_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_zero_comp_not_equal_back_fail_inv_pass_zero_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_incc_comp_equal_back_fail_inv_pass_decc_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_zero_comp_less_back_fail_keep_pass_wrap_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_inv_comp_greater_back_fail_inv_pass_wrap_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_decw_comp_not_equal_back_fail_decc_pass_wrap_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_inv_comp_less_back_fail_zero_pass_wrap_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_keep_comp_never_back_fail_incc_pass_zero_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_decc_comp_less_back_fail_decc_pass_decc_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_zero_comp_greater_back_fail_decc_pass_decc_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_wrap_comp_always_back_fail_decc_pass_decw_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_decc_comp_not_equal_back_fail_wrap_pass_decw_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_keep_comp_always_back_fail_decc_pass_wrap_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_keep_comp_equal_back_fail_repl_pass_repl_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_decc_comp_less_or_equal_back_fail_decw_pass_zero_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_zero_comp_less_or_equal_back_fail_repl_pass_decc_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_decc_comp_equal_back_fail_zero_pass_repl_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_inv_comp_always_back_fail_decw_pass_inv_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_inv_comp_greater_or_equal_back_fail_wrap_pass_decc_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_decw_comp_always_back_fail_decc_pass_repl_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_decc_comp_always_back_fail_decc_pass_wrap_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_decw_comp_less_or_equal_back_fail_decw_pass_inv_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_zero_comp_greater_or_equal_back_fail_zero_pass_keep_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_incc_comp_less_back_fail_keep_pass_incc_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_incc_comp_never_back_fail_decw_pass_wrap_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_repl_comp_greater_or_equal_back_fail_keep_pass_decc_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_decw_comp_less_or_equal_back_fail_repl_pass_decw_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_repl_comp_not_equal_back_fail_wrap_pass_keep_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_wrap_comp_less_or_equal_back_fail_decw_pass_inv_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_incc_comp_not_equal_back_fail_wrap_pass_inv_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_inv_comp_never_back_fail_zero_pass_incc_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_keep_comp_not_equal_back_fail_decc_pass_zero_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_keep_comp_greater_back_fail_inv_pass_wrap_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_repl_comp_greater_back_fail_decc_pass_keep_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_repl_comp_less_back_fail_decw_pass_keep_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_repl_comp_always_back_fail_incc_pass_decc_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_repl_comp_less_back_fail_zero_pass_repl_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_keep_comp_greater_or_equal_back_fail_keep_pass_incc_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_decc_comp_not_equal_back_fail_incc_pass_wrap_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_inv_comp_greater_or_equal_back_fail_inv_pass_decw_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_incc_comp_less_back_fail_decw_pass_repl_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_wrap_comp_always_back_fail_incc_pass_decc_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_keep_comp_greater_back_fail_repl_pass_incc_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_repl_comp_not_equal_back_fail_zero_pass_keep_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_incc_comp_not_equal_back_fail_wrap_pass_repl_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_wrap_comp_never_back_fail_inv_pass_zero_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_repl_comp_always_back_fail_wrap_pass_decc_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_zero_comp_equal_back_fail_repl_pass_zero_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_incc_comp_less_back_fail_decc_pass_zero_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_inv_comp_never_back_fail_decw_pass_incc_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_zero_comp_never_back_fail_decc_pass_decw_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_decc_comp_equal_back_fail_zero_pass_repl_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_decc_comp_not_equal_back_fail_incc_pass_inv_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_repl_comp_not_equal_back_fail_zero_pass_zero_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_decw_comp_greater_or_equal_back_fail_decc_pass_decc_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_inv_comp_equal_back_fail_decc_pass_zero_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_keep_comp_not_equal_back_fail_decw_pass_decw_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_inv_comp_less_or_equal_back_fail_repl_pass_decc_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_inv_comp_always_back_fail_keep_pass_keep_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_decc_comp_always_back_fail_wrap_pass_incc_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_repl_comp_equal_back_fail_keep_pass_repl_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_repl_comp_not_equal_back_fail_zero_pass_inv_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_inv_comp_greater_back_fail_decw_pass_decw_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_keep_comp_not_equal_back_fail_repl_pass_repl_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_incc_comp_less_back_fail_repl_pass_zero_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_wrap_comp_never_back_fail_inv_pass_repl_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_incc_comp_greater_or_equal_back_fail_decw_pass_keep_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_zero_comp_less_back_fail_repl_pass_wrap_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_keep_comp_less_or_equal_back_fail_decw_pass_inv_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_wrap_comp_always_back_fail_repl_pass_wrap_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_inv_comp_always_back_fail_repl_pass_repl_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_wrap_comp_less_back_fail_incc_pass_decc_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_keep_comp_equal_back_fail_inv_pass_decc_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_incc_comp_less_back_fail_keep_pass_keep_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_inv_comp_less_or_equal_back_fail_inv_pass_decw_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_repl_comp_never_back_fail_wrap_pass_incc_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_repl_comp_never_back_fail_repl_pass_inv_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_decc_comp_less_back_fail_keep_pass_keep_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_incc_comp_less_or_equal_back_fail_decc_pass_repl_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_zero_comp_less_or_equal_back_fail_zero_pass_repl_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_decc_comp_always_back_fail_decw_pass_wrap_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_decc_comp_less_or_equal_back_fail_incc_pass_keep_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_wrap_comp_less_or_equal_back_fail_wrap_pass_decc_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_wrap_comp_not_equal_back_fail_repl_pass_inv_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_incc_comp_not_equal_back_fail_decc_pass_zero_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_repl_comp_less_back_fail_wrap_pass_decw_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_keep_comp_greater_back_fail_incc_pass_decw_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_zero_comp_greater_or_equal_back_fail_decc_pass_decc_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_wrap_comp_greater_back_fail_incc_pass_decw_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_decc_comp_greater_back_fail_inv_pass_repl_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_decc_comp_greater_or_equal_back_fail_wrap_pass_zero_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_keep_comp_less_back_fail_decc_pass_wrap_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_incc_comp_greater_or_equal_back_fail_decw_pass_zero_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_decw_comp_always_back_fail_decc_pass_zero_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_decc_comp_greater_or_equal_back_fail_incc_pass_inv_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_inv_comp_greater_or_equal_back_fail_incc_pass_zero_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_zero_comp_greater_back_fail_inv_pass_wrap_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_wrap_comp_never_back_fail_decc_pass_incc_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_wrap_comp_greater_or_equal_back_fail_incc_pass_wrap_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_incc_comp_equal_back_fail_wrap_pass_wrap_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_decc_comp_less_or_equal_back_fail_decw_pass_wrap_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_zero_comp_always_back_fail_decw_pass_inv_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_wrap_comp_equal_back_fail_repl_pass_keep_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_inv_comp_less_back_fail_repl_pass_inv_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_repl_comp_equal_back_fail_decc_pass_decw_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_incc_comp_less_back_fail_repl_pass_keep_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_repl_comp_always_back_fail_decc_pass_inv_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_decw_comp_always_back_fail_zero_pass_incc_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_wrap_comp_less_or_equal_back_fail_decw_pass_inv_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_wrap_comp_less_or_equal_back_fail_wrap_pass_zero_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_zero_comp_greater_or_equal_back_fail_wrap_pass_decw_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_wrap_comp_not_equal_back_fail_repl_pass_inv_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_wrap_comp_equal_back_fail_decw_pass_incc_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_wrap_comp_less_back_fail_keep_pass_keep_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_repl_comp_less_or_equal_back_fail_keep_pass_inv_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_repl_comp_less_or_equal_back_fail_inv_pass_wrap_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_zero_comp_greater_back_fail_wrap_pass_wrap_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_decw_comp_not_equal_back_fail_incc_pass_decw_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_decw_comp_always_back_fail_decc_pass_keep_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_inv_comp_equal_back_fail_decc_pass_inv_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_decw_comp_less_or_equal_back_fail_keep_pass_zero_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_repl_comp_always_back_fail_decc_pass_zero_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_zero_comp_equal_back_fail_inv_pass_incc_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_incc_comp_greater_back_fail_decc_pass_inv_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_decc_comp_always_back_fail_wrap_pass_repl_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_keep_comp_less_back_fail_decc_pass_decc_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_inv_comp_less_back_fail_wrap_pass_wrap_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_incc_comp_greater_back_fail_repl_pass_zero_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_wrap_comp_greater_or_equal_back_fail_incc_pass_decc_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_decw_comp_always_back_fail_zero_pass_repl_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_zero_comp_less_or_equal_back_fail_keep_pass_decc_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_repl_comp_greater_or_equal_back_fail_decw_pass_decc_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_decw_comp_not_equal_back_fail_wrap_pass_repl_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_wrap_comp_never_back_fail_decw_pass_wrap_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_decw_comp_always_back_fail_decc_pass_keep_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_decc_comp_always_back_fail_inv_pass_zero_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_decc_comp_always_back_fail_keep_pass_incc_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_decw_comp_less_back_fail_inv_pass_inv_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_repl_comp_greater_or_equal_back_fail_inv_pass_incc_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_decw_comp_greater_back_fail_zero_pass_wrap_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_incc_comp_greater_or_equal_back_fail_incc_pass_wrap_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_wrap_comp_less_back_fail_decc_pass_incc_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_keep_comp_never_back_fail_keep_pass_decw_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_incc_comp_always_back_fail_repl_pass_keep_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_wrap_comp_equal_back_fail_incc_pass_repl_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_inv_comp_not_equal_back_fail_decw_pass_decw_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_inv_comp_less_back_fail_decw_pass_inv_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_decc_comp_not_equal_back_fail_zero_pass_inv_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_inv_comp_greater_or_equal_back_fail_decw_pass_decw_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_decc_comp_greater_back_fail_decw_pass_inv_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_decw_comp_greater_back_fail_keep_pass_decc_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_incc_comp_greater_back_fail_zero_pass_wrap_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_wrap_comp_greater_back_fail_inv_pass_decw_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_decc_comp_not_equal_back_fail_decc_pass_decw_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_decw_comp_less_or_equal_back_fail_zero_pass_repl_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_zero_comp_less_back_fail_decc_pass_keep_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_wrap_comp_always_back_fail_inv_pass_inv_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_keep_comp_never_back_fail_decw_pass_zero_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_incc_comp_never_back_fail_wrap_pass_incc_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_repl_comp_less_or_equal_back_fail_wrap_pass_wrap_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_keep_comp_greater_back_fail_decw_pass_zero_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_decc_comp_greater_back_fail_incc_pass_wrap_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_zero_comp_not_equal_back_fail_wrap_pass_decc_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_decc_comp_greater_back_fail_keep_pass_keep_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_decw_comp_greater_back_fail_inv_pass_decc_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_keep_comp_greater_back_fail_incc_pass_incc_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_wrap_comp_not_equal_back_fail_decw_pass_decc_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_decc_comp_greater_back_fail_wrap_pass_keep_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_decc_comp_less_back_fail_decw_pass_decw_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_decc_comp_less_back_fail_incc_pass_keep_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_keep_comp_always_back_fail_decc_pass_decw_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_zero_comp_always_back_fail_repl_pass_decc_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_zero_comp_less_or_equal_back_fail_decc_pass_keep_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_wrap_comp_greater_or_equal_back_fail_decc_pass_wrap_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_repl_comp_not_equal_back_fail_decw_pass_inv_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_wrap_comp_never_back_fail_wrap_pass_incc_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_decw_comp_never_back_fail_incc_pass_decc_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_keep_comp_never_back_fail_inv_pass_zero_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_decc_comp_never_back_fail_repl_pass_wrap_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_repl_comp_not_equal_back_fail_wrap_pass_decw_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_decc_comp_equal_back_fail_keep_pass_repl_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_decw_comp_never_back_fail_decw_pass_decc_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_incc_comp_less_or_equal_back_fail_keep_pass_wrap_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_keep_comp_greater_or_equal_back_fail_inv_pass_wrap_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_decw_comp_always_back_fail_repl_pass_decw_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_repl_comp_less_back_fail_keep_pass_repl_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_keep_comp_always_back_fail_inv_pass_inv_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_incc_comp_always_back_fail_keep_pass_wrap_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_decc_comp_less_or_equal_back_fail_repl_pass_decw_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_zero_comp_greater_or_equal_back_fail_incc_pass_keep_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_wrap_comp_never_back_fail_wrap_pass_keep_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_repl_comp_not_equal_back_fail_zero_pass_wrap_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_keep_comp_less_back_fail_repl_pass_decc_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_decc_comp_greater_or_equal_back_fail_decc_pass_keep_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_keep_comp_equal_back_fail_zero_pass_keep_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_decc_comp_always_back_fail_zero_pass_inv_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_incc_comp_less_back_fail_decw_pass_zero_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_zero_comp_less_back_fail_incc_pass_wrap_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_decc_comp_less_or_equal_back_fail_wrap_pass_wrap_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_decw_comp_equal_back_fail_zero_pass_decc_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_keep_comp_equal_back_fail_decc_pass_zero_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_decw_comp_less_or_equal_back_fail_inv_pass_wrap_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_repl_comp_greater_back_fail_decw_pass_decc_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_inv_comp_greater_or_equal_back_fail_keep_pass_decw_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_incc_comp_always_back_fail_repl_pass_keep_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_wrap_comp_always_back_fail_wrap_pass_decw_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_zero_comp_equal_back_fail_decc_pass_zero_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_decw_comp_never_back_fail_wrap_pass_repl_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_decc_comp_greater_back_fail_inv_pass_incc_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_decc_comp_always_back_fail_keep_pass_zero_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_zero_comp_not_equal_back_fail_incc_pass_repl_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_repl_comp_less_back_fail_incc_pass_incc_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_repl_comp_greater_back_fail_wrap_pass_wrap_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_wrap_comp_less_back_fail_decw_pass_zero_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_inv_comp_greater_back_fail_decc_pass_decw_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_decc_comp_greater_or_equal_back_fail_wrap_pass_decc_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_repl_comp_greater_back_fail_wrap_pass_keep_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_decw_comp_less_or_equal_back_fail_incc_pass_repl_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_decw_comp_always_back_fail_decw_pass_wrap_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_incc_comp_equal_back_fail_inv_pass_decw_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_decw_comp_greater_back_fail_inv_pass_repl_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_zero_comp_never_back_fail_zero_pass_keep_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_keep_comp_less_back_fail_decw_pass_repl_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_keep_comp_greater_back_fail_repl_pass_wrap_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_repl_comp_equal_back_fail_decw_pass_inv_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_incc_comp_greater_back_fail_wrap_pass_zero_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_decw_comp_greater_back_fail_decc_pass_decc_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_wrap_comp_greater_back_fail_inv_pass_inv_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_wrap_comp_not_equal_back_fail_zero_pass_inv_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_zero_comp_not_equal_back_fail_keep_pass_decc_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_decw_comp_not_equal_back_fail_decw_pass_wrap_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_inv_comp_equal_back_fail_keep_pass_inv_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_wrap_comp_equal_back_fail_keep_pass_inv_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_incc_comp_always_back_fail_zero_pass_incc_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_decc_comp_never_back_fail_zero_pass_inv_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_inv_comp_greater_or_equal_back_fail_inv_pass_repl_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_repl_comp_always_back_fail_incc_pass_wrap_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_wrap_comp_greater_back_fail_decw_pass_wrap_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_decw_comp_equal_back_fail_decc_pass_repl_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_zero_comp_greater_or_equal_back_fail_zero_pass_repl_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_zero_comp_greater_back_fail_decw_pass_keep_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_keep_comp_less_back_fail_keep_pass_decw_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_decc_comp_greater_or_equal_back_fail_repl_pass_zero_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_keep_comp_equal_back_fail_incc_pass_keep_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_decw_comp_never_back_fail_zero_pass_keep_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_inv_comp_less_back_fail_repl_pass_zero_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_repl_comp_always_back_fail_keep_pass_wrap_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_inv_comp_less_back_fail_inv_pass_decc_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_decc_comp_always_back_fail_keep_pass_decc_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_decc_comp_less_or_equal_back_fail_repl_pass_decw_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_keep_comp_always_back_fail_decc_pass_incc_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_decw_comp_greater_or_equal_back_fail_decc_pass_inv_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_decw_comp_less_back_fail_decw_pass_zero_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_wrap_comp_equal_back_fail_incc_pass_zero_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_inv_comp_greater_or_equal_back_fail_keep_pass_zero_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_repl_comp_less_or_equal_back_fail_repl_pass_inv_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_wrap_comp_less_back_fail_zero_pass_decw_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_inv_comp_less_back_fail_zero_pass_decc_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_wrap_comp_less_or_equal_back_fail_zero_pass_wrap_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_decc_comp_never_back_fail_zero_pass_zero_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_keep_comp_less_or_equal_back_fail_incc_pass_inv_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_keep_comp_always_back_fail_zero_pass_zero_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_keep_comp_equal_back_fail_zero_pass_decc_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_wrap_comp_less_or_equal_back_fail_repl_pass_zero_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_decw_comp_equal_back_fail_decc_pass_incc_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_keep_comp_never_back_fail_inv_pass_incc_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_repl_comp_greater_back_fail_keep_pass_inv_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_inv_comp_greater_back_fail_incc_pass_incc_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_decw_comp_not_equal_back_fail_repl_pass_decc_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_keep_comp_greater_or_equal_back_fail_incc_pass_wrap_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_decw_comp_never_back_fail_decw_pass_keep_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_zero_comp_less_back_fail_decw_pass_decw_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_keep_comp_equal_back_fail_inv_pass_decc_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_inv_comp_not_equal_back_fail_wrap_pass_repl_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_repl_comp_equal_back_fail_inv_pass_decw_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_decw_comp_greater_or_equal_back_fail_inv_pass_zero_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_inv_comp_not_equal_back_fail_decc_pass_keep_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_decc_comp_equal_back_fail_keep_pass_decw_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_incc_comp_never_back_fail_wrap_pass_decc_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_keep_comp_less_or_equal_back_fail_keep_pass_decw_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_repl_comp_less_or_equal_back_fail_wrap_pass_inv_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_repl_comp_greater_back_fail_wrap_pass_repl_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_wrap_comp_equal_back_fail_wrap_pass_incc_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_repl_comp_less_back_fail_decw_pass_inv_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_inv_comp_equal_back_fail_incc_pass_wrap_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_wrap_comp_greater_or_equal_back_fail_decc_pass_incc_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_wrap_comp_greater_back_fail_keep_pass_decw_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_decc_comp_less_back_fail_decc_pass_inv_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_wrap_comp_equal_back_fail_repl_pass_keep_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_keep_comp_greater_or_equal_back_fail_inv_pass_inv_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_keep_comp_always_back_fail_decw_pass_incc_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_zero_comp_never_back_fail_zero_pass_wrap_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_wrap_comp_greater_back_fail_zero_pass_inv_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_decw_comp_greater_or_equal_back_fail_repl_pass_keep_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_inv_comp_greater_or_equal_back_fail_inv_pass_wrap_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_decc_comp_less_or_equal_back_fail_decc_pass_zero_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_decw_comp_less_back_fail_incc_pass_wrap_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_repl_comp_greater_or_equal_back_fail_zero_pass_keep_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_inv_comp_equal_back_fail_wrap_pass_inv_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_wrap_comp_equal_back_fail_keep_pass_decc_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_decw_comp_greater_or_equal_back_fail_incc_pass_incc_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_incc_comp_not_equal_back_fail_keep_pass_decw_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_decc_comp_not_equal_back_fail_decc_pass_wrap_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_keep_comp_not_equal_back_fail_inv_pass_wrap_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_wrap_comp_always_back_fail_zero_pass_decc_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_wrap_comp_less_or_equal_back_fail_inv_pass_wrap_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_wrap_comp_less_or_equal_back_fail_decw_pass_zero_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_zero_comp_greater_back_fail_wrap_pass_keep_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_incc_comp_greater_or_equal_back_fail_inv_pass_repl_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_incc_comp_less_back_fail_incc_pass_wrap_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_wrap_comp_less_back_fail_keep_pass_inv_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_decc_comp_greater_back_fail_zero_pass_incc_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_keep_comp_greater_back_fail_repl_pass_decw_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_decw_comp_less_back_fail_repl_pass_inv_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_decc_comp_always_back_fail_inv_pass_repl_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_zero_comp_less_or_equal_back_fail_decw_pass_keep_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_keep_comp_less_or_equal_back_fail_wrap_pass_repl_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_incc_comp_equal_back_fail_repl_pass_keep_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_wrap_comp_equal_back_fail_wrap_pass_inv_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_zero_comp_less_or_equal_back_fail_keep_pass_repl_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_decc_comp_equal_back_fail_incc_pass_wrap_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_zero_comp_equal_back_fail_zero_pass_decw_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_decc_comp_less_or_equal_back_fail_decw_pass_decc_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_incc_comp_not_equal_back_fail_repl_pass_zero_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_decc_comp_always_back_fail_keep_pass_inv_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_inv_comp_equal_back_fail_keep_pass_wrap_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_wrap_comp_always_back_fail_inv_pass_repl_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_zero_comp_not_equal_back_fail_decc_pass_repl_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_repl_comp_equal_back_fail_decw_pass_decc_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_repl_comp_greater_or_equal_back_fail_inv_pass_incc_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_decw_comp_less_or_equal_back_fail_keep_pass_repl_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_decw_comp_always_back_fail_incc_pass_decw_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_repl_comp_greater_back_fail_incc_pass_repl_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_wrap_comp_less_back_fail_keep_pass_keep_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_wrap_comp_not_equal_back_fail_inv_pass_repl_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_wrap_comp_never_back_fail_repl_pass_decc_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_keep_comp_less_back_fail_decw_pass_inv_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_decw_comp_never_back_fail_wrap_pass_inv_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_decw_comp_greater_back_fail_decw_pass_keep_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_inv_comp_not_equal_back_fail_repl_pass_decc_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_decw_comp_less_back_fail_repl_pass_wrap_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_inv_comp_greater_back_fail_wrap_pass_wrap_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_repl_comp_less_or_equal_back_fail_repl_pass_incc_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_wrap_comp_not_equal_back_fail_wrap_pass_zero_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_inv_comp_less_back_fail_decc_pass_keep_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_decc_comp_greater_back_fail_decc_pass_repl_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_repl_comp_greater_or_equal_back_fail_repl_pass_zero_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_zero_comp_greater_back_fail_repl_pass_inv_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_zero_comp_never_back_fail_zero_pass_decc_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_decc_comp_less_or_equal_back_fail_inv_pass_wrap_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_keep_comp_less_or_equal_back_fail_decc_pass_repl_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_wrap_comp_less_or_equal_back_fail_inv_pass_decw_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_inv_comp_greater_or_equal_back_fail_inv_pass_decc_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_wrap_comp_less_or_equal_back_fail_decc_pass_keep_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_zero_comp_less_back_fail_wrap_pass_incc_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_inv_comp_not_equal_back_fail_keep_pass_zero_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_repl_comp_always_back_fail_incc_pass_decc_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_decc_comp_greater_or_equal_back_fail_inv_pass_repl_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_zero_comp_greater_or_equal_back_fail_zero_pass_zero_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_repl_comp_less_back_fail_wrap_pass_decw_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_incc_comp_greater_back_fail_repl_pass_decw_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_wrap_comp_not_equal_back_fail_repl_pass_decw_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_zero_comp_less_back_fail_decw_pass_repl_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_inv_comp_less_back_fail_wrap_pass_keep_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_zero_comp_not_equal_back_fail_wrap_pass_decw_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_wrap_comp_always_back_fail_wrap_pass_inv_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_repl_comp_less_back_fail_decw_pass_repl_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_wrap_comp_less_or_equal_back_fail_keep_pass_wrap_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_repl_comp_less_back_fail_wrap_pass_decc_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_zero_comp_always_back_fail_wrap_pass_decc_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_decc_comp_less_or_equal_back_fail_wrap_pass_inv_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_keep_comp_equal_back_fail_decc_pass_inv_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_zero_comp_less_or_equal_back_fail_decw_pass_decc_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_repl_comp_never_back_fail_wrap_pass_incc_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_inv_comp_greater_or_equal_back_fail_wrap_pass_decc_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_decw_comp_never_back_fail_keep_pass_inv_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_decw_comp_greater_or_equal_back_fail_incc_pass_keep_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_inv_comp_greater_back_fail_incc_pass_repl_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_keep_comp_equal_back_fail_zero_pass_wrap_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_incc_comp_not_equal_back_fail_incc_pass_decc_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_decw_comp_equal_back_fail_keep_pass_wrap_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_wrap_comp_less_or_equal_back_fail_incc_pass_repl_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_keep_comp_less_back_fail_zero_pass_wrap_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_inv_comp_greater_or_equal_back_fail_repl_pass_repl_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_zero_comp_not_equal_back_fail_inv_pass_inv_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_zero_comp_less_back_fail_inv_pass_repl_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_decw_comp_equal_back_fail_zero_pass_inv_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_inv_comp_less_or_equal_back_fail_decw_pass_incc_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_repl_comp_greater_or_equal_back_fail_repl_pass_wrap_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_wrap_comp_greater_or_equal_back_fail_decw_pass_wrap_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_inv_comp_less_back_fail_decc_pass_incc_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_decw_comp_not_equal_back_fail_incc_pass_inv_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_zero_comp_equal_back_fail_decc_pass_wrap_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_incc_comp_not_equal_back_fail_repl_pass_incc_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_zero_comp_greater_or_equal_back_fail_keep_pass_zero_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_wrap_comp_not_equal_back_fail_inv_pass_wrap_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_incc_comp_always_back_fail_wrap_pass_inv_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_decc_comp_equal_back_fail_inv_pass_incc_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_keep_comp_not_equal_back_fail_decc_pass_zero_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_decw_comp_equal_back_fail_wrap_pass_zero_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_decw_comp_always_back_fail_decc_pass_repl_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_repl_comp_greater_back_fail_inv_pass_inv_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_zero_comp_less_back_fail_wrap_pass_inv_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_decw_comp_less_or_equal_back_fail_repl_pass_decw_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_keep_comp_less_back_fail_decc_pass_wrap_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_repl_comp_less_back_fail_incc_pass_incc_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_incc_comp_greater_or_equal_back_fail_decw_pass_inv_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_repl_comp_less_or_equal_back_fail_incc_pass_decc_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_repl_comp_less_back_fail_repl_pass_keep_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_keep_comp_always_back_fail_decw_pass_decw_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_inv_comp_equal_back_fail_repl_pass_inv_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_zero_comp_not_equal_back_fail_zero_pass_zero_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_wrap_comp_equal_back_fail_zero_pass_decw_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_keep_comp_greater_or_equal_back_fail_inv_pass_incc_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_repl_comp_equal_back_fail_inv_pass_zero_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_wrap_comp_greater_or_equal_back_fail_incc_pass_incc_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_incc_comp_greater_or_equal_back_fail_repl_pass_wrap_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_wrap_comp_not_equal_back_fail_wrap_pass_decc_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_incc_comp_always_back_fail_wrap_pass_incc_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_wrap_comp_greater_back_fail_decw_pass_incc_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_incc_comp_not_equal_back_fail_incc_pass_repl_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_keep_comp_less_back_fail_decc_pass_repl_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_keep_comp_greater_or_equal_back_fail_wrap_pass_decc_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_repl_comp_never_back_fail_incc_pass_repl_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_inv_comp_less_back_fail_incc_pass_inv_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_keep_comp_never_back_fail_decw_pass_repl_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_decc_comp_greater_back_fail_zero_pass_incc_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_decc_comp_less_or_equal_back_fail_zero_pass_decc_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_keep_comp_equal_back_fail_keep_pass_repl_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_wrap_comp_always_back_fail_incc_pass_repl_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_decc_comp_always_back_fail_wrap_pass_keep_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_repl_comp_greater_back_fail_decw_pass_repl_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_inv_comp_less_or_equal_back_fail_repl_pass_wrap_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_incc_comp_not_equal_back_fail_keep_pass_zero_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_inv_comp_equal_back_fail_decw_pass_decc_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_incc_comp_less_back_fail_keep_pass_wrap_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_repl_comp_greater_back_fail_incc_pass_zero_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_repl_comp_greater_or_equal_back_fail_decw_pass_decw_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_keep_comp_greater_or_equal_back_fail_zero_pass_zero_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_inv_comp_never_back_fail_wrap_pass_zero_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_decc_comp_not_equal_back_fail_decw_pass_incc_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_decc_comp_greater_back_fail_decw_pass_inv_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_decw_comp_greater_back_fail_keep_pass_keep_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_decc_comp_greater_or_equal_back_fail_inv_pass_decc_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_repl_comp_not_equal_back_fail_zero_pass_decw_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_incc_comp_less_back_fail_decw_pass_keep_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_wrap_comp_not_equal_back_fail_wrap_pass_wrap_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_wrap_comp_never_back_fail_zero_pass_keep_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_keep_comp_not_equal_back_fail_decw_pass_decc_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_decw_comp_equal_back_fail_inv_pass_decc_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_keep_comp_not_equal_back_fail_repl_pass_wrap_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_decc_comp_equal_back_fail_decw_pass_zero_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_wrap_comp_always_back_fail_inv_pass_inv_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_keep_comp_less_or_equal_back_fail_repl_pass_decw_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_inv_comp_equal_back_fail_decw_pass_decw_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_decw_comp_always_back_fail_wrap_pass_repl_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_incc_comp_equal_back_fail_decw_pass_keep_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_repl_comp_greater_or_equal_back_fail_decc_pass_repl_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_inv_comp_always_back_fail_inv_pass_repl_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_zero_comp_less_or_equal_back_fail_incc_pass_repl_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_zero_comp_greater_back_fail_keep_pass_keep_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_decw_comp_always_back_fail_inv_pass_incc_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_incc_comp_less_or_equal_back_fail_decw_pass_incc_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_inv_comp_less_or_equal_back_fail_decc_pass_keep_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_repl_comp_less_back_fail_decw_pass_wrap_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_keep_comp_never_back_fail_inv_pass_zero_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_zero_comp_greater_back_fail_wrap_pass_decc_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_repl_comp_greater_or_equal_back_fail_inv_pass_inv_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_decw_comp_less_back_fail_keep_pass_decc_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_inv_comp_not_equal_back_fail_decw_pass_inv_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_zero_comp_less_back_fail_inv_pass_inv_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_wrap_comp_not_equal_back_fail_repl_pass_zero_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_inv_comp_equal_back_fail_zero_pass_zero_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_decc_comp_never_back_fail_keep_pass_repl_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_decc_comp_greater_back_fail_wrap_pass_incc_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_decc_comp_greater_or_equal_back_fail_decw_pass_repl_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_repl_comp_equal_back_fail_inv_pass_decw_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_inv_comp_never_back_fail_decc_pass_zero_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_incc_comp_equal_back_fail_incc_pass_repl_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_incc_comp_greater_or_equal_back_fail_decc_pass_decc_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_keep_comp_always_back_fail_incc_pass_incc_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_incc_comp_less_back_fail_inv_pass_inv_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_inv_comp_less_or_equal_back_fail_inv_pass_incc_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_repl_comp_always_back_fail_zero_pass_repl_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_wrap_comp_greater_back_fail_incc_pass_inv_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_zero_comp_less_or_equal_back_fail_incc_pass_wrap_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_inv_comp_greater_or_equal_back_fail_wrap_pass_inv_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_decw_comp_less_back_fail_decc_pass_wrap_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_decw_comp_equal_back_fail_wrap_pass_incc_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_decw_comp_less_or_equal_back_fail_wrap_pass_incc_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_repl_comp_greater_or_equal_back_fail_incc_pass_keep_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_incc_comp_greater_or_equal_back_fail_keep_pass_inv_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_wrap_comp_greater_back_fail_repl_pass_zero_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_decc_comp_less_or_equal_back_fail_incc_pass_incc_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_inv_comp_always_back_fail_incc_pass_repl_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_inv_comp_less_back_fail_inv_pass_repl_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_keep_comp_not_equal_back_fail_inv_pass_incc_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_wrap_comp_never_back_fail_keep_pass_repl_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_keep_comp_never_back_fail_incc_pass_repl_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_inv_comp_less_back_fail_incc_pass_decw_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_inv_comp_less_or_equal_back_fail_decc_pass_zero_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_inv_comp_greater_back_fail_repl_pass_incc_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_wrap_comp_equal_back_fail_repl_pass_wrap_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_decc_comp_always_back_fail_incc_pass_repl_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_keep_comp_less_back_fail_inv_pass_decc_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_decw_comp_not_equal_back_fail_decc_pass_incc_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_wrap_comp_never_back_fail_decc_pass_incc_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_decw_comp_greater_or_equal_back_fail_incc_pass_incc_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_decw_comp_greater_back_fail_repl_pass_incc_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_decc_comp_equal_back_fail_inv_pass_keep_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_keep_comp_not_equal_back_fail_zero_pass_incc_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_keep_comp_equal_back_fail_repl_pass_wrap_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_keep_comp_never_back_fail_inv_pass_repl_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_inv_comp_less_back_fail_decw_pass_decw_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_repl_comp_less_or_equal_back_fail_decw_pass_keep_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_zero_comp_greater_or_equal_back_fail_decc_pass_inv_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_inv_comp_not_equal_back_fail_repl_pass_decc_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_incc_comp_greater_back_fail_repl_pass_incc_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_decc_comp_greater_or_equal_back_fail_zero_pass_repl_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_inv_comp_always_back_fail_keep_pass_incc_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_wrap_comp_greater_or_equal_back_fail_wrap_pass_wrap_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_incc_comp_always_back_fail_repl_pass_incc_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_zero_comp_less_back_fail_inv_pass_decc_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_wrap_comp_always_back_fail_decc_pass_decc_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_incc_comp_never_back_fail_keep_pass_decc_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_incc_comp_equal_back_fail_keep_pass_zero_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_decc_comp_equal_back_fail_keep_pass_repl_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_incc_comp_never_back_fail_decc_pass_inv_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_decc_comp_never_back_fail_decw_pass_zero_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_wrap_comp_never_back_fail_decw_pass_wrap_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_zero_comp_not_equal_back_fail_repl_pass_inv_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_decc_comp_greater_back_fail_zero_pass_decc_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_wrap_comp_less_back_fail_decc_pass_wrap_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_repl_comp_greater_back_fail_repl_pass_repl_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_incc_comp_always_back_fail_zero_pass_wrap_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_repl_comp_greater_or_equal_back_fail_incc_pass_decw_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_repl_comp_greater_back_fail_decc_pass_repl_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_repl_comp_less_or_equal_back_fail_inv_pass_repl_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_wrap_comp_always_back_fail_keep_pass_incc_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_decw_comp_greater_or_equal_back_fail_zero_pass_keep_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_keep_comp_greater_back_fail_repl_pass_decc_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_zero_comp_equal_back_fail_incc_pass_decw_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_repl_comp_equal_back_fail_inv_pass_decc_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_wrap_comp_greater_back_fail_repl_pass_zero_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_keep_comp_less_or_equal_back_fail_zero_pass_repl_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_incc_comp_less_back_fail_repl_pass_decc_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_decc_comp_less_back_fail_decc_pass_repl_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_inv_comp_less_or_equal_back_fail_incc_pass_incc_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_decc_comp_always_back_fail_zero_pass_incc_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_zero_comp_never_back_fail_decw_pass_incc_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_inv_comp_not_equal_back_fail_decc_pass_wrap_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_inv_comp_less_back_fail_zero_pass_decc_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_keep_comp_greater_or_equal_back_fail_wrap_pass_zero_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_keep_comp_less_or_equal_back_fail_decc_pass_wrap_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_keep_comp_never_back_fail_decc_pass_inv_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_wrap_comp_not_equal_back_fail_decc_pass_wrap_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_wrap_comp_always_back_fail_inv_pass_decc_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_decw_comp_not_equal_back_fail_decc_pass_decc_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_decc_comp_less_back_fail_decw_pass_repl_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_repl_comp_never_back_fail_wrap_pass_incc_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_keep_comp_equal_back_fail_incc_pass_incc_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_decc_comp_greater_back_fail_zero_pass_decc_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_inv_comp_less_or_equal_back_fail_incc_pass_wrap_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_incc_comp_greater_back_fail_zero_pass_zero_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_incc_comp_less_back_fail_zero_pass_decw_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_decc_comp_equal_back_fail_decc_pass_zero_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_repl_comp_not_equal_back_fail_decc_pass_keep_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_incc_comp_never_back_fail_incc_pass_keep_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_wrap_comp_always_back_fail_repl_pass_repl_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_decw_comp_never_back_fail_decc_pass_decw_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_zero_comp_not_equal_back_fail_decc_pass_repl_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_zero_comp_greater_back_fail_wrap_pass_zero_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_inv_comp_always_back_fail_wrap_pass_decc_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_inv_comp_never_back_fail_decw_pass_inv_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_decc_comp_greater_or_equal_back_fail_zero_pass_decw_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_repl_comp_always_back_fail_decc_pass_repl_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_inv_comp_greater_or_equal_back_fail_decc_pass_keep_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_decw_comp_less_back_fail_inv_pass_repl_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_wrap_comp_not_equal_back_fail_incc_pass_incc_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_wrap_comp_not_equal_back_fail_repl_pass_incc_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_wrap_comp_greater_or_equal_back_fail_incc_pass_incc_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_inv_comp_always_back_fail_zero_pass_incc_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_decw_comp_equal_back_fail_decw_pass_keep_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_zero_comp_equal_back_fail_repl_pass_decw_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_keep_comp_equal_back_fail_zero_pass_keep_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_incc_comp_equal_back_fail_wrap_pass_decc_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_inv_comp_less_or_equal_back_fail_incc_pass_zero_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_keep_comp_greater_back_fail_keep_pass_decc_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_decc_comp_never_back_fail_repl_pass_decc_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_keep_comp_less_back_fail_zero_pass_repl_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_incc_comp_less_or_equal_back_fail_decc_pass_decw_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_keep_comp_greater_back_fail_repl_pass_wrap_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_decw_comp_greater_or_equal_back_fail_repl_pass_zero_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_inv_comp_always_back_fail_incc_pass_decc_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_repl_comp_greater_or_equal_back_fail_repl_pass_inv_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_decw_comp_greater_or_equal_back_fail_keep_pass_wrap_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_wrap_comp_never_back_fail_incc_pass_wrap_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_zero_comp_equal_back_fail_decc_pass_decc_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_decw_comp_equal_back_fail_inv_pass_wrap_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_wrap_comp_less_or_equal_back_fail_decw_pass_zero_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_repl_comp_not_equal_back_fail_keep_pass_incc_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_keep_comp_never_back_fail_inv_pass_decw_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_incc_comp_less_or_equal_back_fail_keep_pass_incc_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_keep_comp_greater_back_fail_inv_pass_zero_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_decw_comp_never_back_fail_wrap_pass_wrap_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_repl_comp_greater_or_equal_back_fail_decw_pass_wrap_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_inv_comp_always_back_fail_keep_pass_zero_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_incc_comp_equal_back_fail_zero_pass_wrap_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_incc_comp_less_or_equal_back_fail_keep_pass_zero_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_inv_comp_equal_back_fail_wrap_pass_repl_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_wrap_comp_greater_or_equal_back_fail_incc_pass_decw_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_incc_comp_less_or_equal_back_fail_zero_pass_inv_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_inv_comp_not_equal_back_fail_keep_pass_wrap_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_decw_comp_greater_back_fail_keep_pass_keep_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_zero_comp_less_or_equal_back_fail_wrap_pass_zero_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_keep_comp_less_or_equal_back_fail_inv_pass_inv_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_incc_comp_greater_back_fail_decw_pass_zero_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_decc_comp_never_back_fail_wrap_pass_decw_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_keep_comp_not_equal_back_fail_repl_pass_incc_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_incc_comp_equal_back_fail_inv_pass_incc_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_incc_comp_always_back_fail_inv_pass_wrap_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_decw_comp_less_back_fail_decc_pass_zero_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_decc_comp_less_back_fail_inv_pass_inv_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_keep_comp_greater_back_fail_zero_pass_inv_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_keep_comp_greater_or_equal_back_fail_keep_pass_wrap_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_decw_comp_greater_back_fail_zero_pass_decc_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_repl_comp_less_back_fail_decc_pass_inv_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_decc_comp_greater_or_equal_back_fail_decc_pass_keep_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_incc_comp_never_back_fail_keep_pass_keep_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_decc_comp_greater_back_fail_inv_pass_inv_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_incc_comp_less_or_equal_back_fail_wrap_pass_repl_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_repl_comp_always_back_fail_incc_pass_decc_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_decc_comp_always_back_fail_decc_pass_decw_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_repl_comp_greater_or_equal_back_fail_wrap_pass_keep_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_keep_comp_less_or_equal_back_fail_zero_pass_keep_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_decw_comp_not_equal_back_fail_zero_pass_inv_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_decw_comp_equal_back_fail_incc_pass_repl_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_decc_comp_greater_back_fail_repl_pass_decc_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_incc_comp_always_back_fail_inv_pass_inv_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_decw_comp_less_back_fail_keep_pass_zero_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_zero_comp_not_equal_back_fail_incc_pass_inv_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_repl_comp_less_or_equal_back_fail_decc_pass_incc_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_wrap_comp_greater_back_fail_repl_pass_decw_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_inv_comp_not_equal_back_fail_wrap_pass_wrap_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_keep_comp_greater_back_fail_repl_pass_inv_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_decc_comp_equal_back_fail_keep_pass_keep_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_keep_comp_not_equal_back_fail_repl_pass_wrap_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_inv_comp_less_or_equal_back_fail_zero_pass_incc_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_incc_comp_greater_or_equal_back_fail_zero_pass_keep_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_decw_comp_not_equal_back_fail_keep_pass_incc_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_keep_comp_greater_back_fail_inv_pass_decc_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_decc_comp_not_equal_back_fail_wrap_pass_keep_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_inv_comp_greater_back_fail_decw_pass_incc_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_wrap_comp_greater_or_equal_back_fail_decc_pass_incc_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_keep_comp_never_back_fail_repl_pass_decc_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_repl_comp_greater_or_equal_back_fail_zero_pass_keep_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_decw_comp_never_back_fail_inv_pass_inv_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_keep_comp_greater_or_equal_back_fail_wrap_pass_zero_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_incc_comp_greater_back_fail_inv_pass_decc_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_incc_comp_less_back_fail_decc_pass_keep_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_decw_comp_not_equal_back_fail_zero_pass_wrap_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_wrap_comp_never_back_fail_wrap_pass_keep_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_keep_comp_not_equal_back_fail_zero_pass_zero_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_zero_comp_never_back_fail_decw_pass_incc_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_zero_comp_always_back_fail_wrap_pass_repl_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_inv_comp_greater_or_equal_back_fail_incc_pass_keep_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_zero_comp_not_equal_back_fail_inv_pass_zero_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_inv_comp_less_or_equal_back_fail_incc_pass_repl_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_wrap_comp_not_equal_back_fail_wrap_pass_zero_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_decw_comp_less_back_fail_keep_pass_repl_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_zero_comp_never_back_fail_keep_pass_decc_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_wrap_comp_less_or_equal_back_fail_decc_pass_incc_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_repl_comp_less_or_equal_back_fail_decc_pass_decc_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_inv_comp_greater_or_equal_back_fail_inv_pass_inv_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_zero_comp_greater_or_equal_back_fail_incc_pass_decw_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_zero_comp_always_back_fail_keep_pass_repl_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_zero_comp_equal_back_fail_keep_pass_decc_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_keep_comp_equal_back_fail_wrap_pass_decc_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_inv_comp_less_back_fail_repl_pass_wrap_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_incc_comp_less_or_equal_back_fail_zero_pass_repl_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_repl_comp_not_equal_back_fail_decc_pass_incc_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_decc_comp_greater_or_equal_back_fail_decw_pass_incc_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_zero_comp_less_or_equal_back_fail_inv_pass_inv_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_keep_comp_less_or_equal_back_fail_decw_pass_repl_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_incc_comp_equal_back_fail_wrap_pass_decw_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_incc_comp_equal_back_fail_repl_pass_wrap_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_decc_comp_greater_or_equal_back_fail_keep_pass_inv_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_inv_comp_less_or_equal_back_fail_zero_pass_incc_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_decw_comp_not_equal_back_fail_keep_pass_inv_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_repl_comp_less_back_fail_decc_pass_decw_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_zero_comp_less_or_equal_back_fail_keep_pass_inv_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_keep_comp_less_or_equal_back_fail_keep_pass_incc_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_wrap_comp_equal_back_fail_zero_pass_repl_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_decw_comp_always_back_fail_wrap_pass_decc_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_wrap_comp_greater_or_equal_back_fail_zero_pass_incc_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_inv_comp_never_back_fail_decw_pass_incc_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_wrap_comp_less_back_fail_zero_pass_repl_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_inv_comp_not_equal_back_fail_inv_pass_zero_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_decc_comp_less_or_equal_back_fail_wrap_pass_inv_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_keep_comp_equal_back_fail_incc_pass_incc_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_repl_comp_not_equal_back_fail_inv_pass_keep_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_incc_comp_less_or_equal_back_fail_incc_pass_zero_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_wrap_comp_equal_back_fail_repl_pass_keep_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_inv_comp_always_back_fail_incc_pass_zero_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_zero_comp_less_or_equal_back_fail_decc_pass_inv_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_inv_comp_less_back_fail_incc_pass_keep_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_decc_comp_greater_back_fail_inv_pass_repl_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_keep_comp_greater_or_equal_back_fail_repl_pass_keep_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_decw_comp_always_back_fail_decc_pass_decw_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_decc_comp_less_back_fail_zero_pass_keep_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_decc_comp_not_equal_back_fail_inv_pass_zero_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_incc_comp_equal_back_fail_keep_pass_zero_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_decc_comp_less_back_fail_incc_pass_incc_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_keep_comp_always_back_fail_repl_pass_inv_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_zero_comp_not_equal_back_fail_inv_pass_repl_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_decw_comp_greater_back_fail_decc_pass_inv_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_keep_comp_less_or_equal_back_fail_decw_pass_inv_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_inv_comp_equal_back_fail_inv_pass_inv_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_decc_comp_never_back_fail_wrap_pass_decc_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_zero_comp_equal_back_fail_zero_pass_zero_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_repl_comp_equal_back_fail_inv_pass_keep_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_keep_comp_not_equal_back_fail_decw_pass_decw_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_wrap_comp_greater_or_equal_back_fail_decw_pass_decw_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_decc_comp_equal_back_fail_inv_pass_incc_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_decc_comp_not_equal_back_fail_repl_pass_keep_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_wrap_comp_never_back_fail_repl_pass_zero_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_incc_comp_equal_back_fail_keep_pass_decc_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_inv_comp_less_or_equal_back_fail_incc_pass_wrap_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_decc_comp_less_back_fail_decw_pass_keep_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_keep_comp_equal_back_fail_decc_pass_inv_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_zero_comp_never_back_fail_decw_pass_incc_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_zero_comp_equal_back_fail_zero_pass_keep_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_wrap_comp_always_back_fail_incc_pass_zero_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_zero_comp_equal_back_fail_keep_pass_keep_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_incc_comp_less_back_fail_wrap_pass_keep_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_decc_comp_always_back_fail_decw_pass_keep_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_decw_comp_greater_or_equal_back_fail_zero_pass_inv_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_decw_comp_never_back_fail_incc_pass_keep_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_incc_comp_not_equal_back_fail_keep_pass_decc_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_zero_comp_equal_back_fail_wrap_pass_keep_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_repl_comp_not_equal_back_fail_repl_pass_inv_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_inv_comp_less_or_equal_back_fail_incc_pass_wrap_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_keep_comp_greater_back_fail_zero_pass_decw_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_wrap_comp_less_or_equal_back_fail_keep_pass_zero_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_incc_comp_less_back_fail_repl_pass_zero_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_repl_comp_less_or_equal_back_fail_zero_pass_decc_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_decw_comp_never_back_fail_decw_pass_incc_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_decw_comp_less_or_equal_back_fail_incc_pass_zero_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_decw_comp_always_back_fail_repl_pass_decc_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_zero_comp_less_or_equal_back_fail_decw_pass_wrap_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_decc_comp_less_or_equal_back_fail_repl_pass_decw_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_repl_comp_not_equal_back_fail_keep_pass_wrap_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_repl_comp_less_back_fail_zero_pass_wrap_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_repl_comp_greater_back_fail_inv_pass_wrap_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_repl_comp_always_back_fail_decw_pass_decc_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_zero_comp_greater_back_fail_decc_pass_zero_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_repl_comp_equal_back_fail_repl_pass_repl_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_repl_comp_always_back_fail_keep_pass_zero_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_inv_comp_less_back_fail_repl_pass_wrap_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_repl_comp_always_back_fail_zero_pass_decw_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_zero_comp_greater_back_fail_decw_pass_decw_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_incc_comp_always_back_fail_decw_pass_keep_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_keep_comp_equal_back_fail_zero_pass_repl_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_decw_comp_less_or_equal_back_fail_inv_pass_incc_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_decc_comp_less_or_equal_back_fail_repl_pass_inv_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_inv_comp_equal_back_fail_keep_pass_keep_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_wrap_comp_less_back_fail_decw_pass_incc_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_decc_comp_greater_or_equal_back_fail_keep_pass_keep_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_wrap_comp_equal_back_fail_incc_pass_decw_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_decw_comp_greater_or_equal_back_fail_inv_pass_zero_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_decw_comp_never_back_fail_keep_pass_inv_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_inv_comp_less_back_fail_repl_pass_inv_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_inv_comp_greater_or_equal_back_fail_inv_pass_decw_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_zero_comp_greater_back_fail_keep_pass_zero_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_decw_comp_greater_or_equal_back_fail_zero_pass_zero_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_decc_comp_greater_back_fail_inv_pass_zero_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_inv_comp_less_back_fail_decc_pass_zero_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_decc_comp_greater_back_fail_keep_pass_inv_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_keep_comp_equal_back_fail_decw_pass_wrap_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_wrap_comp_equal_back_fail_incc_pass_zero_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_keep_comp_less_or_equal_back_fail_decc_pass_keep_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_keep_comp_equal_back_fail_wrap_pass_zero_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_wrap_comp_not_equal_back_fail_inv_pass_decw_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_incc_comp_less_back_fail_inv_pass_repl_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_wrap_comp_not_equal_back_fail_wrap_pass_inv_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_zero_comp_less_back_fail_zero_pass_repl_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_inv_comp_greater_back_fail_incc_pass_inv_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_incc_comp_never_back_fail_incc_pass_decw_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_decc_comp_greater_or_equal_back_fail_repl_pass_keep_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_decc_comp_not_equal_back_fail_decw_pass_zero_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_inv_comp_always_back_fail_incc_pass_decw_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_repl_comp_greater_back_fail_wrap_pass_repl_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_repl_comp_greater_or_equal_back_fail_repl_pass_zero_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_zero_comp_greater_or_equal_back_fail_wrap_pass_decc_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_keep_comp_always_back_fail_repl_pass_zero_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_decc_comp_greater_or_equal_back_fail_decw_pass_zero_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_repl_comp_greater_back_fail_wrap_pass_inv_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_keep_comp_equal_back_fail_incc_pass_wrap_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_inv_comp_less_back_fail_keep_pass_inv_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_decc_comp_not_equal_back_fail_inv_pass_wrap_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_decw_comp_less_or_equal_back_fail_inv_pass_decc_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_decc_comp_never_back_fail_decc_pass_inv_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_inv_comp_not_equal_back_fail_wrap_pass_decc_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_decc_comp_not_equal_back_fail_decc_pass_zero_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_wrap_comp_less_back_fail_repl_pass_wrap_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_zero_comp_greater_back_fail_repl_pass_decc_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_wrap_comp_equal_back_fail_repl_pass_wrap_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_inv_comp_always_back_fail_decc_pass_wrap_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_wrap_comp_less_back_fail_decw_pass_repl_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_keep_comp_greater_back_fail_zero_pass_decw_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_incc_comp_equal_back_fail_repl_pass_decw_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_decc_comp_never_back_fail_repl_pass_decw_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_zero_comp_never_back_fail_inv_pass_zero_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_keep_comp_less_back_fail_decw_pass_keep_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_zero_comp_not_equal_back_fail_keep_pass_incc_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_decc_comp_greater_or_equal_back_fail_decw_pass_incc_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_zero_comp_always_back_fail_keep_pass_inv_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_keep_comp_less_back_fail_decc_pass_wrap_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_wrap_comp_equal_back_fail_wrap_pass_keep_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_inv_comp_always_back_fail_repl_pass_zero_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_zero_comp_less_back_fail_repl_pass_keep_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_zero_comp_never_back_fail_repl_pass_repl_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_incc_comp_never_back_fail_incc_pass_decw_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_keep_comp_greater_or_equal_back_fail_keep_pass_inv_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_decw_comp_less_or_equal_back_fail_incc_pass_decw_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_decw_comp_not_equal_back_fail_wrap_pass_wrap_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_repl_comp_not_equal_back_fail_decc_pass_decc_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_zero_comp_always_back_fail_wrap_pass_keep_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_zero_comp_equal_back_fail_decw_pass_keep_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_wrap_comp_equal_back_fail_keep_pass_wrap_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_zero_comp_greater_back_fail_keep_pass_inv_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_decc_comp_greater_back_fail_keep_pass_keep_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_repl_comp_always_back_fail_decw_pass_keep_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_decw_comp_less_back_fail_keep_pass_repl_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_keep_comp_always_back_fail_decc_pass_wrap_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_keep_comp_less_back_fail_zero_pass_zero_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_repl_comp_never_back_fail_zero_pass_inv_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_decc_comp_always_back_fail_keep_pass_wrap_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_zero_comp_less_back_fail_decw_pass_decc_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_zero_comp_never_back_fail_incc_pass_incc_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_wrap_comp_never_back_fail_incc_pass_incc_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_repl_comp_never_back_fail_decw_pass_zero_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_keep_comp_always_back_fail_incc_pass_decw_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_repl_comp_less_or_equal_back_fail_decc_pass_zero_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_inv_comp_greater_or_equal_back_fail_wrap_pass_incc_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_incc_comp_always_back_fail_wrap_pass_keep_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_decc_comp_less_or_equal_back_fail_decw_pass_wrap_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_decw_comp_always_back_fail_inv_pass_decc_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_keep_comp_always_back_fail_inv_pass_wrap_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_keep_comp_never_back_fail_zero_pass_decw_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_repl_comp_greater_back_fail_repl_pass_repl_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_zero_comp_greater_back_fail_keep_pass_decc_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_keep_comp_equal_back_fail_decc_pass_zero_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_repl_comp_equal_back_fail_inv_pass_inv_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_decw_comp_less_or_equal_back_fail_decc_pass_inv_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_decw_comp_equal_back_fail_decc_pass_decc_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_incc_comp_always_back_fail_keep_pass_wrap_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_zero_comp_less_back_fail_zero_pass_zero_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_decc_comp_equal_back_fail_decc_pass_keep_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_decc_comp_greater_back_fail_keep_pass_zero_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_zero_comp_equal_back_fail_keep_pass_inv_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_inv_comp_less_back_fail_inv_pass_decw_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_wrap_comp_greater_back_fail_keep_pass_keep_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_incc_comp_equal_back_fail_repl_pass_decw_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_keep_comp_greater_or_equal_back_fail_zero_pass_keep_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_wrap_comp_never_back_fail_keep_pass_repl_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_zero_comp_always_back_fail_inv_pass_zero_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_keep_comp_greater_or_equal_back_fail_inv_pass_incc_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_zero_comp_never_back_fail_wrap_pass_wrap_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_zero_comp_greater_or_equal_back_fail_wrap_pass_decc_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_keep_comp_less_back_fail_zero_pass_incc_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_keep_comp_not_equal_back_fail_decw_pass_wrap_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_incc_comp_greater_or_equal_back_fail_zero_pass_inv_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_decw_comp_not_equal_back_fail_keep_pass_decc_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_incc_comp_greater_or_equal_back_fail_wrap_pass_decc_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_decw_comp_not_equal_back_fail_inv_pass_inv_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_incc_comp_greater_back_fail_repl_pass_decc_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_inv_comp_less_back_fail_keep_pass_decw_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_zero_comp_less_back_fail_zero_pass_incc_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_zero_comp_less_or_equal_back_fail_repl_pass_wrap_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_decw_comp_not_equal_back_fail_decw_pass_inv_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_wrap_comp_greater_or_equal_back_fail_incc_pass_zero_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_decw_comp_always_back_fail_zero_pass_decc_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_keep_comp_less_back_fail_decc_pass_zero_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_decc_comp_not_equal_back_fail_keep_pass_inv_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_repl_comp_less_or_equal_back_fail_inv_pass_inv_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_inv_comp_always_back_fail_keep_pass_decc_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_inv_comp_never_back_fail_incc_pass_keep_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_repl_comp_equal_back_fail_inv_pass_decc_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_inv_comp_always_back_fail_decw_pass_incc_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_zero_comp_less_or_equal_back_fail_incc_pass_zero_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_incc_comp_less_back_fail_repl_pass_wrap_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_decw_comp_less_back_fail_repl_pass_repl_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_keep_comp_less_or_equal_back_fail_zero_pass_inv_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_incc_comp_greater_back_fail_zero_pass_keep_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_decw_comp_less_or_equal_back_fail_zero_pass_wrap_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_keep_comp_never_back_fail_repl_pass_decw_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_repl_comp_less_back_fail_incc_pass_inv_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_zero_comp_less_or_equal_back_fail_zero_pass_repl_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_wrap_comp_always_back_fail_decw_pass_decw_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_incc_comp_always_back_fail_decc_pass_inv_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_incc_comp_always_back_fail_incc_pass_inv_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_incc_comp_less_back_fail_decc_pass_incc_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_keep_comp_not_equal_back_fail_keep_pass_zero_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_repl_comp_not_equal_back_fail_keep_pass_wrap_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_decw_comp_less_back_fail_wrap_pass_wrap_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_repl_comp_never_back_fail_incc_pass_decw_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_keep_comp_always_back_fail_zero_pass_zero_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_decw_comp_equal_back_fail_inv_pass_zero_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_decw_comp_greater_back_fail_decw_pass_wrap_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_decc_comp_greater_or_equal_back_fail_incc_pass_repl_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_repl_comp_never_back_fail_keep_pass_repl_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_incc_comp_equal_back_fail_incc_pass_zero_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_decc_comp_greater_back_fail_incc_pass_repl_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_decc_comp_greater_or_equal_back_fail_keep_pass_repl_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_inv_comp_greater_back_fail_keep_pass_decw_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_repl_comp_never_back_fail_decc_pass_decw_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_wrap_comp_equal_back_fail_repl_pass_incc_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_incc_comp_never_back_fail_decc_pass_inv_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_incc_comp_not_equal_back_fail_wrap_pass_keep_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_incc_comp_less_or_equal_back_fail_decw_pass_inv_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_incc_comp_not_equal_back_fail_keep_pass_zero_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_repl_comp_never_back_fail_wrap_pass_wrap_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_inv_comp_equal_back_fail_inv_pass_repl_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_incc_comp_equal_back_fail_repl_pass_inv_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_decw_comp_always_back_fail_inv_pass_decc_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_repl_comp_less_or_equal_back_fail_wrap_pass_incc_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_keep_comp_equal_back_fail_repl_pass_decc_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_keep_comp_always_back_fail_repl_pass_repl_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_decc_comp_never_back_fail_decw_pass_decc_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_incc_comp_not_equal_back_fail_keep_pass_repl_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_zero_comp_less_back_fail_inv_pass_repl_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_keep_comp_never_back_fail_incc_pass_zero_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_wrap_comp_greater_back_fail_incc_pass_keep_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_incc_comp_never_back_fail_inv_pass_decw_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_incc_comp_less_back_fail_zero_pass_zero_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_repl_comp_never_back_fail_wrap_pass_repl_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_decw_comp_less_back_fail_decw_pass_keep_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_incc_comp_always_back_fail_decc_pass_decc_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_decc_comp_equal_back_fail_decw_pass_repl_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_zero_comp_greater_or_equal_back_fail_repl_pass_incc_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_repl_comp_greater_back_fail_inv_pass_zero_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_repl_comp_less_or_equal_back_fail_decc_pass_incc_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_incc_comp_always_back_fail_decw_pass_wrap_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_keep_comp_less_back_fail_decc_pass_inv_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_decc_comp_equal_back_fail_incc_pass_decw_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_zero_comp_greater_or_equal_back_fail_inv_pass_incc_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_incc_comp_not_equal_back_fail_incc_pass_keep_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_wrap_comp_greater_back_fail_inv_pass_decw_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_keep_comp_not_equal_back_fail_repl_pass_incc_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_wrap_comp_greater_or_equal_back_fail_incc_pass_repl_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_incc_comp_not_equal_back_fail_keep_pass_zero_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_decc_comp_always_back_fail_decc_pass_inv_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_wrap_comp_greater_or_equal_back_fail_repl_pass_zero_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_zero_comp_not_equal_back_fail_repl_pass_keep_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_decw_comp_greater_or_equal_back_fail_wrap_pass_repl_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_incc_comp_never_back_fail_wrap_pass_repl_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_keep_comp_less_or_equal_back_fail_repl_pass_zero_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_incc_comp_greater_back_fail_repl_pass_inv_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_keep_comp_never_back_fail_incc_pass_decw_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_zero_comp_never_back_fail_decc_pass_decw_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_zero_comp_never_back_fail_repl_pass_incc_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_wrap_comp_always_back_fail_repl_pass_inv_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_keep_comp_greater_back_fail_zero_pass_incc_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_decw_comp_greater_or_equal_back_fail_incc_pass_keep_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_keep_comp_less_or_equal_back_fail_decw_pass_wrap_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_wrap_comp_greater_back_fail_wrap_pass_incc_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_wrap_comp_never_back_fail_decc_pass_zero_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_zero_comp_always_back_fail_zero_pass_inv_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_repl_comp_not_equal_back_fail_wrap_pass_decc_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_decw_comp_greater_or_equal_back_fail_inv_pass_repl_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_decc_comp_greater_or_equal_back_fail_zero_pass_wrap_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_decw_comp_equal_back_fail_decw_pass_decc_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_wrap_comp_less_back_fail_decc_pass_keep_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_decc_comp_never_back_fail_wrap_pass_inv_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_inv_comp_greater_or_equal_back_fail_incc_pass_zero_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_decw_comp_never_back_fail_zero_pass_decc_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_repl_comp_not_equal_back_fail_incc_pass_decc_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_incc_comp_always_back_fail_keep_pass_decw_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_zero_comp_never_back_fail_zero_pass_decc_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_inv_comp_not_equal_back_fail_decc_pass_decw_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_zero_comp_equal_back_fail_zero_pass_zero_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_repl_comp_never_back_fail_incc_pass_repl_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_zero_comp_less_back_fail_keep_pass_decw_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_repl_comp_always_back_fail_decc_pass_wrap_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_decw_comp_greater_back_fail_decc_pass_repl_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_inv_comp_less_back_fail_repl_pass_zero_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_keep_comp_greater_back_fail_decw_pass_wrap_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_decw_comp_less_back_fail_decc_pass_repl_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_decc_comp_greater_back_fail_inv_pass_decw_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_incc_comp_less_or_equal_back_fail_repl_pass_inv_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_zero_comp_greater_or_equal_back_fail_repl_pass_decw_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_keep_comp_never_back_fail_inv_pass_decc_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_inv_comp_equal_back_fail_keep_pass_zero_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_decc_comp_always_back_fail_zero_pass_decc_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_keep_comp_not_equal_back_fail_wrap_pass_repl_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_incc_comp_not_equal_back_fail_repl_pass_keep_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_repl_comp_not_equal_back_fail_keep_pass_repl_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_zero_comp_less_or_equal_back_fail_wrap_pass_decc_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_decc_comp_less_or_equal_back_fail_inv_pass_keep_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_decc_comp_greater_back_fail_keep_pass_zero_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_repl_comp_always_back_fail_decc_pass_keep_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_zero_comp_equal_back_fail_decw_pass_incc_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_wrap_comp_never_back_fail_incc_pass_keep_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_repl_comp_less_or_equal_back_fail_inv_pass_decc_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_repl_comp_greater_or_equal_back_fail_zero_pass_incc_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_inv_comp_never_back_fail_wrap_pass_zero_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_decc_comp_less_or_equal_back_fail_inv_pass_zero_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_keep_comp_equal_back_fail_incc_pass_decc_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_zero_comp_less_or_equal_back_fail_wrap_pass_zero_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_decc_comp_always_back_fail_zero_pass_inv_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_decw_comp_greater_or_equal_back_fail_wrap_pass_inv_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_repl_comp_less_back_fail_repl_pass_zero_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_inv_comp_always_back_fail_repl_pass_wrap_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_decc_comp_equal_back_fail_zero_pass_repl_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_repl_comp_always_back_fail_repl_pass_zero_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_incc_comp_never_back_fail_keep_pass_inv_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_wrap_comp_never_back_fail_incc_pass_wrap_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_zero_comp_less_or_equal_back_fail_inv_pass_decw_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_decw_comp_less_back_fail_inv_pass_incc_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_repl_comp_never_back_fail_incc_pass_repl_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_inv_comp_less_back_fail_zero_pass_incc_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_incc_comp_less_or_equal_back_fail_repl_pass_keep_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_wrap_comp_never_back_fail_zero_pass_incc_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_inv_comp_equal_back_fail_keep_pass_zero_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_decw_comp_greater_back_fail_decc_pass_keep_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_decw_comp_greater_back_fail_decw_pass_decc_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_repl_comp_less_back_fail_wrap_pass_repl_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_inv_comp_less_back_fail_zero_pass_inv_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_decc_comp_always_back_fail_decw_pass_inv_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_zero_comp_less_or_equal_back_fail_inv_pass_zero_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_incc_comp_greater_back_fail_keep_pass_inv_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_decw_comp_equal_back_fail_zero_pass_keep_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_decc_comp_always_back_fail_keep_pass_inv_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_wrap_comp_not_equal_back_fail_decc_pass_incc_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_decw_comp_always_back_fail_decc_pass_wrap_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_decc_comp_not_equal_back_fail_repl_pass_decc_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_decc_comp_always_back_fail_decc_pass_incc_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_incc_comp_always_back_fail_repl_pass_keep_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_wrap_comp_not_equal_back_fail_decc_pass_repl_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_keep_comp_not_equal_back_fail_zero_pass_inv_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_decw_comp_not_equal_back_fail_keep_pass_zero_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_zero_comp_not_equal_back_fail_wrap_pass_zero_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_incc_comp_not_equal_back_fail_decc_pass_repl_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_decw_comp_never_back_fail_decw_pass_incc_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_decc_comp_equal_back_fail_zero_pass_decc_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_incc_comp_less_back_fail_repl_pass_decc_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_wrap_comp_not_equal_back_fail_decw_pass_zero_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_keep_comp_not_equal_back_fail_keep_pass_zero_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_keep_comp_never_back_fail_wrap_pass_inv_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_incc_comp_never_back_fail_decc_pass_keep_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_decc_comp_less_back_fail_decc_pass_decc_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_wrap_comp_equal_back_fail_decw_pass_repl_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_inv_comp_equal_back_fail_keep_pass_incc_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_zero_comp_not_equal_back_fail_decc_pass_decc_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_zero_comp_never_back_fail_decw_pass_keep_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_zero_comp_always_back_fail_inv_pass_repl_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_zero_comp_always_back_fail_incc_pass_zero_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_decc_comp_less_back_fail_incc_pass_repl_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_decw_comp_equal_back_fail_incc_pass_decw_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_decc_comp_not_equal_back_fail_decc_pass_inv_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_decc_comp_greater_back_fail_wrap_pass_decw_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_decc_comp_less_or_equal_back_fail_inv_pass_wrap_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_wrap_comp_equal_back_fail_inv_pass_zero_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_decc_comp_greater_or_equal_back_fail_wrap_pass_keep_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_decc_comp_greater_or_equal_back_fail_keep_pass_wrap_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_inv_comp_less_or_equal_back_fail_decw_pass_inv_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_inv_comp_never_back_fail_decc_pass_repl_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_repl_comp_always_back_fail_repl_pass_incc_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_decc_comp_greater_or_equal_back_fail_decc_pass_wrap_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_inv_comp_greater_back_fail_decc_pass_inv_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_inv_comp_less_or_equal_back_fail_incc_pass_wrap_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_incc_comp_less_back_fail_inv_pass_zero_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_zero_comp_not_equal_back_fail_incc_pass_inv_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_inv_comp_equal_back_fail_zero_pass_wrap_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_wrap_comp_not_equal_back_fail_decw_pass_keep_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_wrap_comp_always_back_fail_keep_pass_wrap_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_repl_comp_not_equal_back_fail_incc_pass_wrap_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_decw_comp_less_or_equal_back_fail_wrap_pass_inv_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_zero_comp_less_or_equal_back_fail_zero_pass_zero_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_keep_comp_not_equal_back_fail_decc_pass_keep_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_repl_comp_equal_back_fail_keep_pass_keep_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_zero_comp_never_back_fail_inv_pass_decw_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_decw_comp_always_back_fail_keep_pass_decw_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_inv_comp_always_back_fail_keep_pass_inv_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_decc_comp_equal_back_fail_inv_pass_keep_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_zero_comp_not_equal_back_fail_incc_pass_repl_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_decc_comp_less_back_fail_repl_pass_keep_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_keep_comp_always_back_fail_repl_pass_zero_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_decc_comp_less_back_fail_repl_pass_incc_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_keep_comp_greater_back_fail_wrap_pass_inv_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_inv_comp_greater_or_equal_back_fail_decw_pass_incc_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_repl_comp_always_back_fail_zero_pass_zero_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_incc_comp_always_back_fail_keep_pass_incc_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_inv_comp_less_or_equal_back_fail_inv_pass_repl_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_repl_comp_equal_back_fail_incc_pass_decc_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_keep_comp_less_back_fail_zero_pass_incc_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_decw_comp_equal_back_fail_inv_pass_decw_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_repl_comp_less_back_fail_keep_pass_decc_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_zero_comp_never_back_fail_decc_pass_decc_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_incc_comp_always_back_fail_incc_pass_decc_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_repl_comp_equal_back_fail_inv_pass_wrap_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_decw_comp_greater_back_fail_decc_pass_keep_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_decc_comp_less_or_equal_back_fail_repl_pass_wrap_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_keep_comp_never_back_fail_inv_pass_incc_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_repl_comp_equal_back_fail_repl_pass_decw_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_wrap_comp_not_equal_back_fail_incc_pass_repl_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_keep_comp_greater_back_fail_keep_pass_incc_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_inv_comp_never_back_fail_inv_pass_decw_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_decc_comp_greater_back_fail_keep_pass_decw_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_keep_comp_equal_back_fail_incc_pass_decw_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_repl_comp_never_back_fail_wrap_pass_wrap_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_inv_comp_greater_back_fail_inv_pass_incc_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_inv_comp_always_back_fail_incc_pass_repl_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_keep_comp_less_or_equal_back_fail_repl_pass_zero_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_wrap_comp_greater_or_equal_back_fail_incc_pass_repl_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_repl_comp_never_back_fail_zero_pass_wrap_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_decw_comp_not_equal_back_fail_incc_pass_repl_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_decw_comp_less_back_fail_keep_pass_repl_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_wrap_comp_less_or_equal_back_fail_repl_pass_zero_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_inv_comp_equal_back_fail_zero_pass_decc_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_decw_comp_never_back_fail_zero_pass_inv_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_inv_comp_not_equal_back_fail_inv_pass_decw_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_wrap_comp_not_equal_back_fail_decw_pass_zero_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_decw_comp_never_back_fail_inv_pass_keep_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_inv_comp_never_back_fail_inv_pass_repl_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_wrap_comp_equal_back_fail_incc_pass_inv_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_keep_comp_less_back_fail_wrap_pass_incc_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_decc_comp_never_back_fail_incc_pass_keep_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_repl_comp_greater_back_fail_keep_pass_decw_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_repl_comp_less_or_equal_back_fail_wrap_pass_repl_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_keep_comp_less_back_fail_decc_pass_decc_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_inv_comp_never_back_fail_keep_pass_zero_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_zero_comp_not_equal_back_fail_zero_pass_inv_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_keep_comp_greater_back_fail_zero_pass_inv_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_keep_comp_always_back_fail_zero_pass_incc_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_zero_comp_greater_back_fail_incc_pass_repl_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_wrap_comp_less_or_equal_back_fail_inv_pass_decw_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_inv_comp_not_equal_back_fail_incc_pass_repl_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_incc_comp_always_back_fail_zero_pass_inv_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_incc_comp_less_or_equal_back_fail_inv_pass_decw_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_inv_comp_greater_back_fail_zero_pass_decw_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_wrap_comp_less_back_fail_decc_pass_zero_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_wrap_comp_less_or_equal_back_fail_inv_pass_inv_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_wrap_comp_not_equal_back_fail_incc_pass_inv_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_incc_comp_equal_back_fail_incc_pass_decc_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_incc_comp_always_back_fail_wrap_pass_zero_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_incc_comp_never_back_fail_wrap_pass_inv_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_incc_comp_less_back_fail_zero_pass_keep_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_inv_comp_greater_back_fail_decw_pass_inv_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_decc_comp_equal_back_fail_decc_pass_repl_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_decw_comp_equal_back_fail_decw_pass_wrap_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_repl_comp_not_equal_back_fail_repl_pass_incc_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_inv_comp_never_back_fail_repl_pass_repl_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_wrap_comp_not_equal_back_fail_decc_pass_repl_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_keep_comp_greater_or_equal_back_fail_inv_pass_zero_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_repl_comp_less_back_fail_repl_pass_wrap_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_keep_comp_greater_or_equal_back_fail_zero_pass_decc_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_inv_comp_equal_back_fail_zero_pass_wrap_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_decw_comp_less_back_fail_keep_pass_incc_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_decw_comp_always_back_fail_zero_pass_repl_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_zero_comp_equal_back_fail_inv_pass_decc_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_decw_comp_greater_or_equal_back_fail_zero_pass_decc_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_wrap_comp_greater_or_equal_back_fail_decw_pass_repl_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_incc_comp_always_back_fail_incc_pass_repl_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_inv_comp_equal_back_fail_repl_pass_incc_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_zero_comp_less_or_equal_back_fail_incc_pass_wrap_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_incc_comp_less_or_equal_back_fail_zero_pass_wrap_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_decc_comp_greater_back_fail_keep_pass_decc_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_inv_comp_greater_back_fail_decc_pass_repl_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_zero_comp_never_back_fail_wrap_pass_zero_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_wrap_comp_greater_back_fail_decc_pass_zero_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_repl_comp_greater_or_equal_back_fail_zero_pass_keep_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_zero_comp_less_back_fail_decc_pass_wrap_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_zero_comp_equal_back_fail_keep_pass_decw_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_keep_comp_less_back_fail_inv_pass_incc_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_decw_comp_equal_back_fail_keep_pass_decc_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_incc_comp_equal_back_fail_decw_pass_decw_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_inv_comp_less_or_equal_back_fail_incc_pass_inv_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_zero_comp_greater_or_equal_back_fail_inv_pass_decc_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_decw_comp_greater_or_equal_back_fail_repl_pass_decw_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_incc_comp_greater_or_equal_back_fail_zero_pass_repl_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_inv_comp_never_back_fail_inv_pass_wrap_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_wrap_comp_not_equal_back_fail_zero_pass_keep_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_repl_comp_equal_back_fail_repl_pass_decw_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_inv_comp_less_or_equal_back_fail_decw_pass_keep_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_zero_comp_not_equal_back_fail_decw_pass_zero_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_inv_comp_greater_or_equal_back_fail_repl_pass_decw_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_wrap_comp_greater_back_fail_inv_pass_decc_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_incc_comp_always_back_fail_repl_pass_inv_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_repl_comp_equal_back_fail_keep_pass_wrap_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_inv_comp_greater_back_fail_incc_pass_zero_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_keep_comp_never_back_fail_decw_pass_decw_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_repl_comp_not_equal_back_fail_wrap_pass_inv_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_keep_comp_less_or_equal_back_fail_decw_pass_decc_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_inv_comp_equal_back_fail_keep_pass_decc_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_decw_comp_less_back_fail_repl_pass_decw_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_repl_comp_greater_or_equal_back_fail_zero_pass_decw_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_wrap_comp_equal_back_fail_zero_pass_inv_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_incc_comp_greater_or_equal_back_fail_zero_pass_wrap_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_keep_comp_not_equal_back_fail_wrap_pass_zero_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_incc_comp_never_back_fail_decc_pass_keep_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_decc_comp_always_back_fail_decc_pass_incc_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_decc_comp_less_back_fail_incc_pass_incc_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_decw_comp_greater_or_equal_back_fail_inv_pass_wrap_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_keep_comp_not_equal_back_fail_wrap_pass_incc_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_repl_comp_always_back_fail_incc_pass_decw_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_zero_comp_less_or_equal_back_fail_zero_pass_inv_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_repl_comp_never_back_fail_incc_pass_zero_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_wrap_comp_never_back_fail_decc_pass_repl_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_incc_comp_never_back_fail_decw_pass_wrap_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_zero_comp_less_or_equal_back_fail_wrap_pass_decw_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_inv_comp_never_back_fail_incc_pass_decc_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_decc_comp_less_or_equal_back_fail_inv_pass_repl_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_decc_comp_never_back_fail_wrap_pass_decw_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_zero_comp_never_back_fail_decc_pass_zero_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_repl_comp_greater_back_fail_incc_pass_keep_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_decc_comp_never_back_fail_inv_pass_keep_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_zero_comp_greater_back_fail_decc_pass_incc_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_wrap_comp_less_back_fail_keep_pass_decc_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_inv_comp_always_back_fail_wrap_pass_incc_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_inv_comp_less_or_equal_back_fail_decc_pass_decc_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_incc_comp_equal_back_fail_wrap_pass_inv_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_inv_comp_equal_back_fail_decw_pass_keep_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_keep_comp_always_back_fail_repl_pass_decc_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_decc_comp_greater_back_fail_incc_pass_zero_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_zero_comp_equal_back_fail_decc_pass_decw_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_decw_comp_less_back_fail_zero_pass_zero_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_repl_comp_less_or_equal_back_fail_decw_pass_repl_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_zero_comp_always_back_fail_incc_pass_zero_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_keep_comp_not_equal_back_fail_decc_pass_decw_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_keep_comp_always_back_fail_incc_pass_zero_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_zero_comp_less_back_fail_repl_pass_keep_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_repl_comp_greater_or_equal_back_fail_decw_pass_zero_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_decw_comp_less_back_fail_inv_pass_decw_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_incc_comp_never_back_fail_repl_pass_decw_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_wrap_comp_less_or_equal_back_fail_inv_pass_decw_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_keep_comp_never_back_fail_repl_pass_repl_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_wrap_comp_greater_or_equal_back_fail_repl_pass_decc_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_decw_comp_greater_or_equal_back_fail_keep_pass_keep_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_incc_comp_greater_back_fail_repl_pass_decw_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_zero_comp_not_equal_back_fail_decc_pass_wrap_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_wrap_comp_equal_back_fail_decc_pass_decc_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_decc_comp_greater_or_equal_back_fail_wrap_pass_wrap_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_repl_comp_greater_or_equal_back_fail_inv_pass_keep_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_wrap_comp_less_or_equal_back_fail_inv_pass_zero_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_inv_comp_less_or_equal_back_fail_decw_pass_inv_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_inv_comp_greater_back_fail_incc_pass_inv_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_incc_comp_never_back_fail_inv_pass_incc_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_incc_comp_less_back_fail_decc_pass_inv_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_zero_comp_never_back_fail_keep_pass_keep_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_decw_comp_less_or_equal_back_fail_keep_pass_wrap_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_keep_comp_greater_or_equal_back_fail_incc_pass_incc_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_decw_comp_equal_back_fail_repl_pass_inv_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_keep_comp_never_back_fail_inv_pass_decc_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_keep_comp_greater_back_fail_repl_pass_incc_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_decc_comp_never_back_fail_decw_pass_zero_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_repl_comp_always_back_fail_incc_pass_repl_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_repl_comp_always_back_fail_incc_pass_decc_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_incc_comp_not_equal_back_fail_wrap_pass_keep_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_decw_comp_greater_back_fail_keep_pass_decw_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_decc_comp_not_equal_back_fail_incc_pass_decw_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_repl_comp_greater_or_equal_back_fail_keep_pass_inv_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_repl_comp_less_or_equal_back_fail_repl_pass_wrap_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_decw_comp_less_or_equal_back_fail_keep_pass_inv_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_zero_comp_not_equal_back_fail_repl_pass_repl_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_decw_comp_never_back_fail_wrap_pass_wrap_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_zero_comp_less_back_fail_decc_pass_decw_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_incc_comp_greater_back_fail_keep_pass_keep_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_decw_comp_greater_back_fail_decw_pass_decw_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_incc_comp_less_back_fail_zero_pass_zero_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_incc_comp_less_back_fail_keep_pass_decc_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_keep_comp_less_back_fail_repl_pass_decc_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_repl_comp_equal_back_fail_zero_pass_wrap_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_incc_comp_always_back_fail_keep_pass_decw_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_incc_comp_less_or_equal_back_fail_inv_pass_keep_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_decc_comp_not_equal_back_fail_wrap_pass_decw_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_keep_comp_equal_back_fail_repl_pass_inv_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_repl_comp_greater_back_fail_zero_pass_zero_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_decc_comp_less_or_equal_back_fail_inv_pass_inv_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_decc_comp_less_or_equal_back_fail_decc_pass_wrap_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_decc_comp_always_back_fail_wrap_pass_zero_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_keep_comp_not_equal_back_fail_keep_pass_keep_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_inv_comp_equal_back_fail_zero_pass_keep_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_wrap_comp_always_back_fail_repl_pass_repl_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_decc_comp_never_back_fail_repl_pass_wrap_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_inv_comp_not_equal_back_fail_repl_pass_inv_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_wrap_comp_never_back_fail_zero_pass_repl_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_decc_comp_never_back_fail_decw_pass_incc_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_repl_comp_greater_or_equal_back_fail_inv_pass_decw_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_inv_comp_greater_or_equal_back_fail_incc_pass_incc_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_keep_comp_greater_or_equal_back_fail_decc_pass_inv_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_repl_comp_never_back_fail_decw_pass_inv_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_incc_comp_equal_back_fail_wrap_pass_repl_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_repl_comp_equal_back_fail_decc_pass_decw_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_repl_comp_never_back_fail_decc_pass_decc_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_decw_comp_never_back_fail_keep_pass_repl_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_decw_comp_not_equal_back_fail_wrap_pass_keep_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_zero_comp_greater_or_equal_back_fail_repl_pass_inv_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_zero_comp_always_back_fail_zero_pass_wrap_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_repl_comp_always_back_fail_decw_pass_inv_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_keep_comp_not_equal_back_fail_decw_pass_inv_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_inv_comp_equal_back_fail_zero_pass_wrap_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_zero_comp_equal_back_fail_decc_pass_wrap_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_decw_comp_greater_or_equal_back_fail_zero_pass_decw_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_decw_comp_never_back_fail_inv_pass_decw_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_keep_comp_less_back_fail_wrap_pass_decc_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_zero_comp_never_back_fail_inv_pass_keep_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_incc_comp_never_back_fail_incc_pass_zero_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_keep_comp_less_or_equal_back_fail_keep_pass_keep_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_decw_comp_not_equal_back_fail_repl_pass_decw_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_repl_comp_never_back_fail_incc_pass_decw_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_keep_comp_always_back_fail_decw_pass_repl_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_zero_comp_less_or_equal_back_fail_decw_pass_keep_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_zero_comp_less_back_fail_repl_pass_incc_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_inv_comp_equal_back_fail_zero_pass_zero_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_decc_comp_less_back_fail_inv_pass_decw_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_keep_comp_not_equal_back_fail_incc_pass_zero_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_keep_comp_never_back_fail_keep_pass_decc_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_zero_comp_less_or_equal_back_fail_zero_pass_wrap_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_zero_comp_not_equal_back_fail_wrap_pass_keep_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_wrap_comp_greater_or_equal_back_fail_incc_pass_decc_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_inv_comp_greater_or_equal_back_fail_keep_pass_incc_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_incc_comp_equal_back_fail_incc_pass_keep_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_decw_comp_always_back_fail_incc_pass_keep_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_wrap_comp_equal_back_fail_zero_pass_zero_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_wrap_comp_greater_or_equal_back_fail_repl_pass_incc_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_wrap_comp_greater_or_equal_back_fail_decc_pass_wrap_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_zero_comp_always_back_fail_repl_pass_repl_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_inv_comp_greater_or_equal_back_fail_inv_pass_wrap_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_wrap_comp_less_or_equal_back_fail_wrap_pass_wrap_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_decw_comp_always_back_fail_zero_pass_incc_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_keep_comp_equal_back_fail_keep_pass_incc_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_decw_comp_greater_back_fail_decw_pass_inv_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_zero_comp_greater_or_equal_back_fail_repl_pass_incc_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_incc_comp_greater_back_fail_inv_pass_keep_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_repl_comp_equal_back_fail_decw_pass_repl_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_decc_comp_less_or_equal_back_fail_repl_pass_decw_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_decw_comp_less_or_equal_back_fail_decw_pass_zero_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_inv_comp_greater_back_fail_decw_pass_zero_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_repl_comp_greater_or_equal_back_fail_zero_pass_decc_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_repl_comp_never_back_fail_decc_pass_incc_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_wrap_comp_never_back_fail_incc_pass_keep_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_zero_comp_always_back_fail_wrap_pass_repl_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_incc_comp_always_back_fail_incc_pass_decc_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_inv_comp_greater_back_fail_repl_pass_inv_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_inv_comp_less_back_fail_decw_pass_incc_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_decw_comp_always_back_fail_zero_pass_zero_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_zero_comp_not_equal_back_fail_repl_pass_decw_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_keep_comp_equal_back_fail_inv_pass_zero_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_wrap_comp_never_back_fail_repl_pass_inv_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_repl_comp_less_or_equal_back_fail_decc_pass_repl_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_decc_comp_greater_or_equal_back_fail_decc_pass_keep_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_decc_comp_less_or_equal_back_fail_decw_pass_keep_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_decc_comp_greater_or_equal_back_fail_keep_pass_decc_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_keep_comp_less_back_fail_inv_pass_zero_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_decw_comp_greater_or_equal_back_fail_zero_pass_repl_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_repl_comp_always_back_fail_keep_pass_wrap_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_repl_comp_less_back_fail_wrap_pass_zero_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_incc_comp_equal_back_fail_decc_pass_decw_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_wrap_comp_less_back_fail_inv_pass_decw_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_decw_comp_less_back_fail_decw_pass_decc_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_repl_comp_greater_back_fail_repl_pass_wrap_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_incc_comp_greater_or_equal_back_fail_wrap_pass_decc_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_wrap_comp_greater_or_equal_back_fail_zero_pass_incc_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_incc_comp_greater_back_fail_incc_pass_zero_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_repl_comp_less_back_fail_inv_pass_incc_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_keep_comp_equal_back_fail_decw_pass_incc_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_decw_comp_greater_or_equal_back_fail_decw_pass_repl_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_keep_comp_always_back_fail_keep_pass_repl_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_repl_comp_never_back_fail_incc_pass_keep_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_decc_comp_less_or_equal_back_fail_wrap_pass_incc_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_inv_comp_greater_or_equal_back_fail_decc_pass_keep_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_decw_comp_never_back_fail_decw_pass_wrap_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_repl_comp_greater_back_fail_decc_pass_inv_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_zero_comp_always_back_fail_inv_pass_decc_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_keep_comp_greater_or_equal_back_fail_zero_pass_zero_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_inv_comp_less_back_fail_zero_pass_inv_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_zero_comp_always_back_fail_inv_pass_keep_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_repl_comp_greater_back_fail_incc_pass_inv_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_inv_comp_not_equal_back_fail_wrap_pass_wrap_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_inv_comp_greater_or_equal_back_fail_keep_pass_zero_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_decw_comp_always_back_fail_zero_pass_wrap_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_zero_comp_always_back_fail_decw_pass_decw_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_keep_comp_equal_back_fail_repl_pass_wrap_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_keep_comp_never_back_fail_decw_pass_keep_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_inv_comp_greater_or_equal_back_fail_decw_pass_repl_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_decw_comp_less_or_equal_back_fail_repl_pass_repl_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_inv_comp_always_back_fail_decw_pass_incc_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_wrap_comp_always_back_fail_keep_pass_decw_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_inv_comp_greater_back_fail_incc_pass_decc_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_decc_comp_never_back_fail_repl_pass_inv_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_wrap_comp_never_back_fail_incc_pass_wrap_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_incc_comp_less_or_equal_back_fail_keep_pass_repl_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_inv_comp_greater_back_fail_wrap_pass_keep_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_decc_comp_less_back_fail_inv_pass_zero_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_zero_comp_less_back_fail_decc_pass_incc_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_repl_comp_greater_or_equal_back_fail_decw_pass_repl_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_wrap_comp_greater_or_equal_back_fail_wrap_pass_keep_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_decw_comp_greater_or_equal_back_fail_incc_pass_inv_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_repl_comp_greater_or_equal_back_fail_keep_pass_decc_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_incc_comp_less_or_equal_back_fail_inv_pass_decc_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_incc_comp_less_or_equal_back_fail_repl_pass_inv_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_wrap_comp_not_equal_back_fail_decc_pass_zero_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_incc_comp_less_back_fail_decc_pass_repl_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_incc_comp_equal_back_fail_zero_pass_repl_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_wrap_comp_always_back_fail_keep_pass_decc_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_zero_comp_greater_back_fail_incc_pass_zero_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_inv_comp_never_back_fail_wrap_pass_decw_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_inv_comp_greater_or_equal_back_fail_wrap_pass_inv_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_wrap_comp_less_back_fail_wrap_pass_repl_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_incc_comp_greater_or_equal_back_fail_incc_pass_repl_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_incc_comp_greater_back_fail_repl_pass_decw_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_keep_comp_equal_back_fail_repl_pass_incc_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_wrap_comp_greater_or_equal_back_fail_decc_pass_wrap_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_repl_comp_less_or_equal_back_fail_incc_pass_incc_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_inv_comp_less_back_fail_wrap_pass_decc_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_decw_comp_equal_back_fail_inv_pass_inv_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_wrap_comp_always_back_fail_zero_pass_wrap_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_decw_comp_greater_back_fail_repl_pass_zero_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_decw_comp_always_back_fail_keep_pass_decc_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_keep_comp_never_back_fail_inv_pass_repl_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_wrap_comp_equal_back_fail_zero_pass_zero_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_wrap_comp_never_back_fail_repl_pass_decc_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_decw_comp_less_back_fail_inv_pass_keep_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_inv_comp_never_back_fail_decc_pass_inv_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_incc_comp_less_or_equal_back_fail_decw_pass_keep_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_incc_comp_never_back_fail_incc_pass_keep_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_decw_comp_not_equal_back_fail_decw_pass_decw_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_incc_comp_greater_back_fail_inv_pass_wrap_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_keep_comp_never_back_fail_zero_pass_zero_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_wrap_comp_greater_back_fail_incc_pass_wrap_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_wrap_comp_greater_back_fail_keep_pass_repl_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_decw_comp_less_or_equal_back_fail_wrap_pass_keep_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_decw_comp_not_equal_back_fail_inv_pass_inv_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_keep_comp_always_back_fail_decw_pass_decw_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_decc_comp_equal_back_fail_decc_pass_repl_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_inv_comp_greater_or_equal_back_fail_wrap_pass_inv_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_keep_comp_less_back_fail_repl_pass_wrap_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_keep_comp_less_or_equal_back_fail_inv_pass_wrap_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_incc_comp_never_back_fail_decw_pass_incc_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_decc_comp_always_back_fail_decc_pass_repl_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_incc_comp_never_back_fail_incc_pass_wrap_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_incc_comp_greater_or_equal_back_fail_decc_pass_wrap_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_zero_comp_equal_back_fail_inv_pass_decw_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_decc_comp_less_or_equal_back_fail_incc_pass_inv_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_incc_comp_not_equal_back_fail_incc_pass_decw_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_decc_comp_less_or_equal_back_fail_inv_pass_inv_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_repl_comp_greater_or_equal_back_fail_inv_pass_wrap_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_zero_comp_less_or_equal_back_fail_zero_pass_incc_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_decc_comp_always_back_fail_decc_pass_inv_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_repl_comp_never_back_fail_repl_pass_incc_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_zero_comp_always_back_fail_inv_pass_inv_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_repl_comp_equal_back_fail_decc_pass_zero_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_incc_comp_greater_or_equal_back_fail_decw_pass_zero_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_keep_comp_always_back_fail_decc_pass_repl_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_zero_comp_not_equal_back_fail_wrap_pass_inv_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_keep_comp_never_back_fail_keep_pass_repl_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_incc_comp_always_back_fail_zero_pass_decw_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_decc_comp_less_or_equal_back_fail_decw_pass_decw_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_incc_comp_greater_back_fail_repl_pass_incc_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_zero_comp_less_back_fail_decw_pass_wrap_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_decc_comp_greater_back_fail_inv_pass_keep_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_incc_comp_less_or_equal_back_fail_repl_pass_incc_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_zero_comp_always_back_fail_decw_pass_wrap_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_keep_comp_greater_or_equal_back_fail_zero_pass_inv_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_repl_comp_less_or_equal_back_fail_wrap_pass_decc_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_wrap_comp_greater_back_fail_repl_pass_zero_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_zero_comp_equal_back_fail_incc_pass_keep_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_incc_comp_never_back_fail_repl_pass_repl_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_repl_comp_greater_back_fail_wrap_pass_repl_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_inv_comp_less_or_equal_back_fail_keep_pass_zero_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_zero_comp_equal_back_fail_wrap_pass_decw_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_wrap_comp_greater_or_equal_back_fail_inv_pass_inv_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_repl_comp_equal_back_fail_decw_pass_decc_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_inv_comp_greater_or_equal_back_fail_decc_pass_repl_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_keep_comp_never_back_fail_repl_pass_decw_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_keep_comp_not_equal_back_fail_decw_pass_decc_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_repl_comp_greater_back_fail_decc_pass_decc_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_decw_comp_less_or_equal_back_fail_decw_pass_repl_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_repl_comp_never_back_fail_decw_pass_decw_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_incc_comp_less_or_equal_back_fail_decw_pass_decw_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_wrap_comp_greater_back_fail_inv_pass_keep_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_repl_comp_not_equal_back_fail_decw_pass_incc_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_incc_comp_less_back_fail_incc_pass_inv_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_repl_comp_always_back_fail_repl_pass_incc_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_wrap_comp_equal_back_fail_wrap_pass_decw_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_decw_comp_never_back_fail_decc_pass_decc_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_repl_comp_less_back_fail_zero_pass_decw_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_keep_comp_not_equal_back_fail_repl_pass_zero_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_decc_comp_greater_or_equal_back_fail_decc_pass_repl_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_incc_comp_greater_back_fail_wrap_pass_repl_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_inv_comp_equal_back_fail_decw_pass_decc_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_keep_comp_less_or_equal_back_fail_decc_pass_zero_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_inv_comp_less_back_fail_decc_pass_wrap_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_wrap_comp_less_or_equal_back_fail_incc_pass_decc_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_incc_comp_greater_or_equal_back_fail_keep_pass_zero_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_decc_comp_less_back_fail_incc_pass_decw_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_inv_comp_less_back_fail_inv_pass_decw_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_inv_comp_greater_or_equal_back_fail_keep_pass_zero_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_decw_comp_not_equal_back_fail_incc_pass_decc_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_inv_comp_never_back_fail_incc_pass_incc_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_zero_comp_less_or_equal_back_fail_repl_pass_decc_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_zero_comp_greater_back_fail_decc_pass_zero_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_wrap_comp_greater_back_fail_repl_pass_inv_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_wrap_comp_always_back_fail_repl_pass_zero_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_incc_comp_greater_back_fail_repl_pass_inv_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_wrap_comp_always_back_fail_wrap_pass_inv_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_repl_comp_greater_or_equal_back_fail_inv_pass_decc_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_repl_comp_always_back_fail_zero_pass_decw_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_inv_comp_always_back_fail_repl_pass_repl_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_keep_comp_greater_back_fail_zero_pass_zero_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_zero_comp_not_equal_back_fail_keep_pass_repl_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_incc_comp_never_back_fail_wrap_pass_keep_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_repl_comp_equal_back_fail_zero_pass_repl_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_keep_comp_equal_back_fail_keep_pass_wrap_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_incc_comp_never_back_fail_decc_pass_keep_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_inv_comp_equal_back_fail_wrap_pass_zero_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_incc_comp_equal_back_fail_inv_pass_decc_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_keep_comp_always_back_fail_zero_pass_repl_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_decw_comp_not_equal_back_fail_wrap_pass_wrap_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_repl_comp_always_back_fail_decc_pass_inv_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_zero_comp_never_back_fail_decc_pass_decc_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_wrap_comp_never_back_fail_inv_pass_zero_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_incc_comp_equal_back_fail_repl_pass_keep_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_keep_comp_equal_back_fail_repl_pass_zero_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_zero_comp_greater_or_equal_back_fail_zero_pass_decw_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_keep_comp_never_back_fail_keep_pass_inv_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_keep_comp_greater_back_fail_wrap_pass_zero_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_inv_comp_less_or_equal_back_fail_repl_pass_repl_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_inv_comp_less_or_equal_back_fail_decw_pass_inv_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_decc_comp_greater_back_fail_wrap_pass_wrap_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_decw_comp_greater_back_fail_inv_pass_zero_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_repl_comp_never_back_fail_decw_pass_incc_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_wrap_comp_equal_back_fail_zero_pass_decw_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_keep_comp_less_or_equal_back_fail_decw_pass_incc_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_incc_comp_never_back_fail_incc_pass_wrap_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_incc_comp_not_equal_back_fail_decc_pass_zero_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_decc_comp_greater_back_fail_decc_pass_incc_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_decw_comp_equal_back_fail_zero_pass_zero_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_decw_comp_equal_back_fail_decw_pass_decc_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_wrap_comp_less_back_fail_wrap_pass_keep_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_wrap_comp_never_back_fail_incc_pass_decw_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_wrap_comp_always_back_fail_keep_pass_wrap_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_incc_comp_always_back_fail_inv_pass_zero_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_zero_comp_not_equal_back_fail_repl_pass_keep_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_inv_comp_never_back_fail_inv_pass_inv_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_decc_comp_never_back_fail_inv_pass_wrap_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_decw_comp_greater_back_fail_decw_pass_decc_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_wrap_comp_less_or_equal_back_fail_keep_pass_zero_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_repl_comp_less_back_fail_decc_pass_repl_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_inv_comp_not_equal_back_fail_repl_pass_incc_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_repl_comp_less_or_equal_back_fail_incc_pass_wrap_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_zero_comp_equal_back_fail_zero_pass_zero_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_zero_comp_greater_back_fail_repl_pass_wrap_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_decc_comp_equal_back_fail_decc_pass_repl_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_decc_comp_greater_back_fail_wrap_pass_wrap_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_wrap_comp_always_back_fail_decw_pass_decc_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_zero_comp_never_back_fail_keep_pass_decw_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_incc_comp_never_back_fail_decw_pass_wrap_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_zero_comp_equal_back_fail_decw_pass_inv_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_zero_comp_never_back_fail_repl_pass_decw_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_repl_comp_always_back_fail_zero_pass_zero_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_inv_comp_not_equal_back_fail_decc_pass_incc_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_wrap_comp_not_equal_back_fail_wrap_pass_decc_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_keep_comp_less_back_fail_incc_pass_zero_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_decc_comp_always_back_fail_repl_pass_keep_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_decc_comp_equal_back_fail_wrap_pass_decw_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_zero_comp_greater_back_fail_zero_pass_keep_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_decc_comp_always_back_fail_decw_pass_incc_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_zero_comp_equal_back_fail_incc_pass_inv_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_wrap_comp_less_back_fail_decw_pass_incc_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_zero_comp_equal_back_fail_repl_pass_zero_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_keep_comp_always_back_fail_wrap_pass_wrap_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_decc_comp_always_back_fail_zero_pass_incc_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_incc_comp_less_or_equal_back_fail_inv_pass_decw_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_decw_comp_greater_back_fail_decw_pass_inv_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_decw_comp_equal_back_fail_decc_pass_incc_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_repl_comp_greater_or_equal_back_fail_incc_pass_keep_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_inv_comp_less_or_equal_back_fail_decw_pass_decc_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_zero_comp_less_back_fail_decw_pass_repl_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_inv_comp_never_back_fail_decw_pass_decw_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_wrap_comp_less_or_equal_back_fail_keep_pass_inv_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_wrap_comp_equal_back_fail_incc_pass_decc_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_incc_comp_equal_back_fail_zero_pass_inv_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_wrap_comp_equal_back_fail_incc_pass_decc_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_inv_comp_less_or_equal_back_fail_incc_pass_wrap_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_repl_comp_equal_back_fail_incc_pass_incc_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_keep_comp_not_equal_back_fail_keep_pass_keep_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_wrap_comp_greater_back_fail_wrap_pass_repl_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_incc_comp_less_or_equal_back_fail_keep_pass_decw_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_decw_comp_less_or_equal_back_fail_decc_pass_decw_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_decc_comp_not_equal_back_fail_inv_pass_keep_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_incc_comp_greater_back_fail_decc_pass_decc_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_repl_comp_greater_back_fail_keep_pass_repl_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_decw_comp_greater_or_equal_back_fail_repl_pass_incc_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_incc_comp_greater_back_fail_repl_pass_repl_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_wrap_comp_greater_or_equal_back_fail_repl_pass_decc_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_keep_comp_less_or_equal_back_fail_decc_pass_decc_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_decw_comp_less_or_equal_back_fail_keep_pass_wrap_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_incc_comp_not_equal_back_fail_keep_pass_inv_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_zero_comp_not_equal_back_fail_decw_pass_repl_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_zero_comp_less_back_fail_repl_pass_inv_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_keep_comp_equal_back_fail_zero_pass_decw_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_keep_comp_never_back_fail_keep_pass_wrap_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_repl_comp_not_equal_back_fail_keep_pass_repl_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_keep_comp_less_back_fail_incc_pass_incc_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_zero_comp_always_back_fail_keep_pass_decw_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_repl_comp_less_back_fail_decw_pass_zero_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_keep_comp_less_or_equal_back_fail_incc_pass_inv_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_wrap_comp_greater_or_equal_back_fail_inv_pass_wrap_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_inv_comp_not_equal_back_fail_wrap_pass_inv_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_repl_comp_equal_back_fail_repl_pass_decc_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_incc_comp_greater_back_fail_incc_pass_decc_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_inv_comp_greater_or_equal_back_fail_wrap_pass_zero_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_incc_comp_less_or_equal_back_fail_wrap_pass_decw_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_inv_comp_greater_back_fail_incc_pass_inv_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_incc_comp_always_back_fail_keep_pass_decw_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_incc_comp_equal_back_fail_decc_pass_decc_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_incc_comp_less_back_fail_repl_pass_decc_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_wrap_comp_less_back_fail_incc_pass_repl_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_zero_comp_equal_back_fail_inv_pass_wrap_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_inv_comp_less_back_fail_wrap_pass_zero_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_repl_comp_always_back_fail_wrap_pass_wrap_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_inv_comp_not_equal_back_fail_zero_pass_decw_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_decw_comp_equal_back_fail_repl_pass_keep_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_incc_comp_always_back_fail_wrap_pass_wrap_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_decc_comp_always_back_fail_wrap_pass_zero_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_repl_comp_not_equal_back_fail_decc_pass_repl_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_decc_comp_always_back_fail_incc_pass_decc_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_decw_comp_never_back_fail_inv_pass_repl_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_decc_comp_greater_back_fail_repl_pass_repl_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_repl_comp_not_equal_back_fail_decw_pass_zero_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_keep_comp_less_or_equal_back_fail_inv_pass_decc_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_decc_comp_always_back_fail_wrap_pass_keep_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_keep_comp_greater_back_fail_decc_pass_inv_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_incc_comp_greater_back_fail_zero_pass_wrap_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_inv_comp_greater_back_fail_repl_pass_wrap_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_zero_comp_never_back_fail_wrap_pass_repl_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_zero_comp_less_or_equal_back_fail_incc_pass_wrap_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_inv_comp_greater_or_equal_back_fail_incc_pass_repl_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_keep_comp_always_back_fail_decw_pass_decw_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_incc_comp_always_back_fail_decw_pass_wrap_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_wrap_comp_never_back_fail_wrap_pass_wrap_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_zero_comp_less_or_equal_back_fail_inv_pass_repl_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_repl_comp_equal_back_fail_decw_pass_incc_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_wrap_comp_greater_back_fail_decc_pass_incc_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_keep_comp_always_back_fail_wrap_pass_decc_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_incc_comp_not_equal_back_fail_keep_pass_decw_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_inv_comp_greater_or_equal_back_fail_incc_pass_inv_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_keep_comp_always_back_fail_keep_pass_repl_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_inv_comp_not_equal_back_fail_repl_pass_wrap_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_zero_comp_less_back_fail_inv_pass_decc_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_keep_comp_less_back_fail_keep_pass_decc_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_inv_comp_not_equal_back_fail_decc_pass_repl_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_inv_comp_not_equal_back_fail_decc_pass_repl_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_wrap_comp_less_back_fail_incc_pass_keep_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_keep_comp_greater_or_equal_back_fail_wrap_pass_decw_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_wrap_comp_equal_back_fail_inv_pass_incc_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_repl_comp_always_back_fail_incc_pass_keep_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_decc_comp_not_equal_back_fail_repl_pass_inv_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_incc_comp_greater_or_equal_back_fail_zero_pass_incc_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_keep_comp_equal_back_fail_incc_pass_keep_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_decw_comp_less_or_equal_back_fail_decc_pass_zero_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_zero_comp_greater_back_fail_keep_pass_wrap_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_decw_comp_less_or_equal_back_fail_inv_pass_zero_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_decc_comp_equal_back_fail_incc_pass_wrap_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_decc_comp_less_or_equal_back_fail_wrap_pass_incc_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_decc_comp_never_back_fail_decc_pass_decc_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_decw_comp_greater_or_equal_back_fail_decc_pass_wrap_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_incc_comp_greater_or_equal_back_fail_wrap_pass_decw_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_decw_comp_always_back_fail_decw_pass_decw_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_incc_comp_less_back_fail_keep_pass_decw_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_inv_comp_always_back_fail_repl_pass_keep_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_repl_comp_never_back_fail_inv_pass_zero_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_inv_comp_less_back_fail_decw_pass_wrap_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_decc_comp_equal_back_fail_decc_pass_incc_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_wrap_comp_less_back_fail_decc_pass_incc_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_decc_comp_equal_back_fail_decw_pass_wrap_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_wrap_comp_less_back_fail_inv_pass_wrap_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_incc_comp_greater_back_fail_zero_pass_inv_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_inv_comp_greater_back_fail_wrap_pass_decc_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_wrap_comp_greater_or_equal_back_fail_keep_pass_keep_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_decc_comp_less_or_equal_back_fail_inv_pass_decc_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_repl_comp_greater_or_equal_back_fail_zero_pass_inv_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_keep_comp_always_back_fail_decc_pass_inv_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_decc_comp_never_back_fail_wrap_pass_keep_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_zero_comp_never_back_fail_wrap_pass_zero_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_decw_comp_never_back_fail_keep_pass_incc_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_inv_comp_never_back_fail_incc_pass_incc_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_wrap_comp_less_back_fail_incc_pass_keep_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_zero_comp_greater_or_equal_back_fail_keep_pass_repl_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_decw_comp_equal_back_fail_decc_pass_decc_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_zero_comp_not_equal_back_fail_wrap_pass_zero_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_zero_comp_not_equal_back_fail_keep_pass_wrap_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_repl_comp_never_back_fail_keep_pass_decc_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_inv_comp_greater_back_fail_inv_pass_decc_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_inv_comp_always_back_fail_wrap_pass_inv_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_repl_comp_greater_back_fail_decw_pass_decw_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_decw_comp_equal_back_fail_incc_pass_keep_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_keep_comp_less_or_equal_back_fail_zero_pass_decc_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_wrap_comp_always_back_fail_decc_pass_repl_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_incc_comp_less_or_equal_back_fail_zero_pass_decw_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_decc_comp_never_back_fail_incc_pass_incc_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_inv_comp_greater_or_equal_back_fail_incc_pass_incc_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_decw_comp_greater_back_fail_incc_pass_incc_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_repl_comp_never_back_fail_wrap_pass_decc_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_decc_comp_equal_back_fail_wrap_pass_keep_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_incc_comp_not_equal_back_fail_keep_pass_wrap_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_repl_comp_greater_back_fail_decc_pass_decc_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_zero_comp_not_equal_back_fail_decc_pass_decw_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_incc_comp_not_equal_back_fail_zero_pass_zero_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_incc_comp_always_back_fail_inv_pass_keep_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_incc_comp_greater_back_fail_keep_pass_decc_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_wrap_comp_greater_back_fail_zero_pass_decc_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_wrap_comp_less_or_equal_back_fail_zero_pass_incc_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_decw_comp_not_equal_back_fail_repl_pass_keep_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_inv_comp_less_back_fail_wrap_pass_wrap_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_keep_comp_less_back_fail_repl_pass_incc_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_zero_comp_not_equal_back_fail_inv_pass_incc_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_wrap_comp_less_or_equal_back_fail_incc_pass_inv_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_wrap_comp_greater_or_equal_back_fail_wrap_pass_wrap_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_repl_comp_equal_back_fail_inv_pass_zero_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_repl_comp_always_back_fail_repl_pass_decc_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_decw_comp_never_back_fail_zero_pass_keep_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_incc_comp_equal_back_fail_incc_pass_inv_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_inv_comp_equal_back_fail_decw_pass_incc_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_zero_comp_greater_or_equal_back_fail_zero_pass_decw_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_inv_comp_less_back_fail_decc_pass_wrap_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_zero_comp_greater_or_equal_back_fail_wrap_pass_repl_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_wrap_comp_always_back_fail_incc_pass_zero_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_keep_comp_never_back_fail_decw_pass_keep_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_keep_comp_less_or_equal_back_fail_inv_pass_zero_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_keep_comp_never_back_fail_decc_pass_decc_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_wrap_comp_greater_back_fail_keep_pass_wrap_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_wrap_comp_equal_back_fail_inv_pass_keep_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_inv_comp_never_back_fail_zero_pass_decw_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_decw_comp_greater_or_equal_back_fail_wrap_pass_repl_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_keep_comp_greater_or_equal_back_fail_inv_pass_repl_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_repl_comp_never_back_fail_wrap_pass_inv_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_repl_comp_greater_or_equal_back_fail_wrap_pass_wrap_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_decw_comp_greater_back_fail_decc_pass_decw_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_incc_comp_never_back_fail_decw_pass_wrap_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_inv_comp_always_back_fail_keep_pass_repl_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_repl_comp_equal_back_fail_keep_pass_zero_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_decc_comp_greater_back_fail_decc_pass_decw_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_keep_comp_not_equal_back_fail_inv_pass_repl_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_inv_comp_always_back_fail_decc_pass_incc_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_inv_comp_greater_or_equal_back_fail_keep_pass_wrap_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_zero_comp_always_back_fail_wrap_pass_inv_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_wrap_comp_greater_or_equal_back_fail_zero_pass_decc_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_decc_comp_always_back_fail_decc_pass_keep_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_repl_comp_not_equal_back_fail_keep_pass_decw_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_wrap_comp_equal_back_fail_decc_pass_wrap_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_keep_comp_less_or_equal_back_fail_zero_pass_decc_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_decw_comp_equal_back_fail_repl_pass_zero_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_wrap_comp_greater_or_equal_back_fail_wrap_pass_decc_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_incc_comp_greater_or_equal_back_fail_decc_pass_zero_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_repl_comp_not_equal_back_fail_decw_pass_zero_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_keep_comp_greater_or_equal_back_fail_decw_pass_wrap_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_incc_comp_less_or_equal_back_fail_keep_pass_keep_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_inv_comp_greater_or_equal_back_fail_repl_pass_decc_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_incc_comp_greater_or_equal_back_fail_repl_pass_decc_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_inv_comp_greater_or_equal_back_fail_inv_pass_keep_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_repl_comp_less_or_equal_back_fail_repl_pass_zero_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_wrap_comp_greater_back_fail_incc_pass_decw_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_keep_comp_greater_back_fail_inv_pass_incc_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_repl_comp_equal_back_fail_decw_pass_repl_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_keep_comp_less_back_fail_zero_pass_decw_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_wrap_comp_equal_back_fail_repl_pass_decw_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_zero_comp_always_back_fail_inv_pass_keep_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_repl_comp_never_back_fail_inv_pass_repl_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_keep_comp_never_back_fail_zero_pass_decc_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_inv_comp_equal_back_fail_inv_pass_inv_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_decw_comp_equal_back_fail_inv_pass_zero_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_decc_comp_less_or_equal_back_fail_decw_pass_repl_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_inv_comp_never_back_fail_incc_pass_zero_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_zero_comp_less_or_equal_back_fail_inv_pass_incc_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_decw_comp_always_back_fail_keep_pass_decc_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_incc_comp_less_or_equal_back_fail_wrap_pass_wrap_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_wrap_comp_not_equal_back_fail_inv_pass_inv_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_decc_comp_less_or_equal_back_fail_repl_pass_repl_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_keep_comp_greater_back_fail_decw_pass_decw_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_decc_comp_less_or_equal_back_fail_wrap_pass_inv_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_repl_comp_equal_back_fail_repl_pass_keep_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_decc_comp_less_back_fail_inv_pass_repl_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_repl_comp_less_back_fail_incc_pass_wrap_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_zero_comp_never_back_fail_inv_pass_decc_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_inv_comp_never_back_fail_keep_pass_repl_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_decw_comp_not_equal_back_fail_repl_pass_decw_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_inv_comp_greater_back_fail_inv_pass_repl_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_zero_comp_never_back_fail_inv_pass_repl_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_inv_comp_greater_or_equal_back_fail_repl_pass_wrap_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_decw_comp_always_back_fail_decc_pass_decw_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_inv_comp_less_or_equal_back_fail_incc_pass_incc_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_repl_comp_less_or_equal_back_fail_repl_pass_decc_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_inv_comp_greater_back_fail_decw_pass_repl_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_keep_comp_greater_or_equal_back_fail_zero_pass_repl_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_decc_comp_less_or_equal_back_fail_zero_pass_keep_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_decc_comp_greater_or_equal_back_fail_repl_pass_repl_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_incc_comp_less_or_equal_back_fail_decw_pass_decw_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_wrap_comp_never_back_fail_keep_pass_repl_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_zero_comp_never_back_fail_repl_pass_decc_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_inv_comp_greater_back_fail_decc_pass_decc_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_keep_comp_always_back_fail_incc_pass_inv_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_incc_comp_equal_back_fail_inv_pass_wrap_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_incc_comp_never_back_fail_inv_pass_keep_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_keep_comp_always_back_fail_inv_pass_decc_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_incc_comp_always_back_fail_incc_pass_incc_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_decw_comp_less_back_fail_decw_pass_decc_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_zero_comp_not_equal_back_fail_decw_pass_zero_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_repl_comp_greater_or_equal_back_fail_incc_pass_decw_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_keep_comp_equal_back_fail_repl_pass_incc_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_zero_comp_always_back_fail_wrap_pass_keep_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_incc_comp_always_back_fail_decw_pass_decc_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_decc_comp_equal_back_fail_repl_pass_zero_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_repl_comp_never_back_fail_decc_pass_wrap_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_decc_comp_greater_or_equal_back_fail_decc_pass_incc_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_zero_comp_always_back_fail_repl_pass_zero_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_keep_comp_not_equal_back_fail_wrap_pass_repl_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_keep_comp_less_or_equal_back_fail_zero_pass_decw_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_incc_comp_never_back_fail_decc_pass_zero_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_decc_comp_less_or_equal_back_fail_repl_pass_decw_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_decc_comp_less_back_fail_decw_pass_keep_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_wrap_comp_not_equal_back_fail_zero_pass_decc_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_inv_comp_less_or_equal_back_fail_zero_pass_decw_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_incc_comp_greater_back_fail_wrap_pass_decc_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_wrap_comp_less_back_fail_keep_pass_keep_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_decc_comp_not_equal_back_fail_decc_pass_inv_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_zero_comp_greater_or_equal_back_fail_zero_pass_keep_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_decw_comp_always_back_fail_decw_pass_inv_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_wrap_comp_always_back_fail_inv_pass_incc_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_wrap_comp_never_back_fail_keep_pass_incc_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_keep_comp_not_equal_back_fail_zero_pass_decw_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_repl_comp_less_or_equal_back_fail_inv_pass_keep_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_decw_comp_greater_back_fail_keep_pass_decw_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_decc_comp_less_or_equal_back_fail_incc_pass_inv_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_decw_comp_less_back_fail_wrap_pass_repl_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_inv_comp_always_back_fail_decc_pass_zero_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_inv_comp_greater_or_equal_back_fail_decw_pass_zero_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_decw_comp_always_back_fail_incc_pass_zero_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_wrap_comp_not_equal_back_fail_incc_pass_wrap_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_decc_comp_less_back_fail_inv_pass_inv_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_keep_comp_equal_back_fail_inv_pass_inv_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_wrap_comp_equal_back_fail_keep_pass_repl_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_repl_comp_greater_back_fail_decw_pass_repl_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_keep_comp_never_back_fail_repl_pass_decc_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_inv_comp_equal_back_fail_inv_pass_wrap_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_zero_comp_greater_back_fail_decc_pass_inv_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_decc_comp_always_back_fail_incc_pass_repl_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_decc_comp_equal_back_fail_decw_pass_decw_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_wrap_comp_less_back_fail_incc_pass_zero_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_incc_comp_less_or_equal_back_fail_keep_pass_incc_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_decc_comp_never_back_fail_incc_pass_zero_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_inv_comp_not_equal_back_fail_repl_pass_keep_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_decc_comp_always_back_fail_zero_pass_incc_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_wrap_comp_not_equal_back_fail_decc_pass_decw_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_inv_comp_not_equal_back_fail_incc_pass_inv_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_zero_comp_always_back_fail_decw_pass_keep_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_decc_comp_greater_back_fail_decc_pass_repl_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_incc_comp_not_equal_back_fail_incc_pass_inv_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_wrap_comp_less_or_equal_back_fail_inv_pass_wrap_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_zero_comp_never_back_fail_decw_pass_keep_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_decc_comp_not_equal_back_fail_decw_pass_decw_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_repl_comp_not_equal_back_fail_decc_pass_repl_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_repl_comp_less_or_equal_back_fail_repl_pass_keep_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_wrap_comp_less_back_fail_decw_pass_decw_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_decw_comp_greater_back_fail_inv_pass_incc_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_decw_comp_not_equal_back_fail_wrap_pass_decw_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_keep_comp_equal_back_fail_inv_pass_incc_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_incc_comp_greater_or_equal_back_fail_decc_pass_decc_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_zero_comp_less_or_equal_back_fail_zero_pass_decw_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_decw_comp_not_equal_back_fail_repl_pass_inv_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_keep_comp_greater_or_equal_back_fail_wrap_pass_decw_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_wrap_comp_never_back_fail_inv_pass_wrap_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_zero_comp_greater_or_equal_back_fail_repl_pass_wrap_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_zero_comp_not_equal_back_fail_decw_pass_incc_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_inv_comp_greater_back_fail_repl_pass_zero_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_wrap_comp_not_equal_back_fail_wrap_pass_keep_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_repl_comp_never_back_fail_repl_pass_inv_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_decc_comp_less_back_fail_inv_pass_zero_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_repl_comp_greater_back_fail_zero_pass_keep_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_decc_comp_never_back_fail_keep_pass_incc_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_zero_comp_less_or_equal_back_fail_inv_pass_inv_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_inv_comp_less_back_fail_decw_pass_zero_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_keep_comp_always_back_fail_repl_pass_decw_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_zero_comp_never_back_fail_incc_pass_inv_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_keep_comp_greater_or_equal_back_fail_inv_pass_inv_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_decc_comp_never_back_fail_inv_pass_keep_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_inv_comp_less_back_fail_decc_pass_keep_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_decw_comp_not_equal_back_fail_decc_pass_keep_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_zero_comp_not_equal_back_fail_zero_pass_decc_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_keep_comp_greater_or_equal_back_fail_keep_pass_incc_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_zero_comp_greater_or_equal_back_fail_decc_pass_decc_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_decc_comp_greater_or_equal_back_fail_decc_pass_keep_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_decc_comp_greater_back_fail_zero_pass_wrap_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_decc_comp_equal_back_fail_incc_pass_incc_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_zero_comp_always_back_fail_inv_pass_keep_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_inv_comp_always_back_fail_inv_pass_keep_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_inv_comp_always_back_fail_incc_pass_inv_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_keep_comp_always_back_fail_wrap_pass_decw_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_inv_comp_equal_back_fail_decw_pass_decw_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_keep_comp_always_back_fail_zero_pass_incc_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_wrap_comp_never_back_fail_keep_pass_decc_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_decw_comp_greater_back_fail_zero_pass_incc_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_wrap_comp_never_back_fail_wrap_pass_wrap_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_keep_comp_greater_back_fail_repl_pass_repl_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_wrap_comp_less_or_equal_back_fail_incc_pass_zero_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_inv_comp_less_or_equal_back_fail_decw_pass_repl_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_incc_comp_equal_back_fail_decw_pass_incc_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_decw_comp_equal_back_fail_decc_pass_inv_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_zero_comp_greater_back_fail_keep_pass_incc_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_zero_comp_equal_back_fail_wrap_pass_zero_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_keep_comp_less_or_equal_back_fail_repl_pass_keep_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_repl_comp_never_back_fail_inv_pass_zero_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_inv_comp_equal_back_fail_zero_pass_inv_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_decw_comp_less_or_equal_back_fail_decw_pass_wrap_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_inv_comp_not_equal_back_fail_wrap_pass_zero_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_wrap_comp_less_or_equal_back_fail_inv_pass_wrap_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_repl_comp_greater_or_equal_back_fail_zero_pass_repl_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_wrap_comp_always_back_fail_incc_pass_repl_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_incc_comp_less_or_equal_back_fail_decw_pass_inv_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_keep_comp_greater_or_equal_back_fail_inv_pass_incc_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_incc_comp_greater_back_fail_decw_pass_decw_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_incc_comp_equal_back_fail_keep_pass_decc_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_repl_comp_greater_back_fail_wrap_pass_keep_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_repl_comp_never_back_fail_incc_pass_decw_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_decc_comp_not_equal_back_fail_decc_pass_wrap_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_keep_comp_greater_back_fail_wrap_pass_decc_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_keep_comp_greater_or_equal_back_fail_incc_pass_inv_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_zero_comp_less_back_fail_wrap_pass_incc_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_decc_comp_never_back_fail_repl_pass_inv_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_zero_comp_greater_back_fail_inv_pass_keep_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_keep_comp_always_back_fail_decw_pass_wrap_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_decc_comp_always_back_fail_inv_pass_incc_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_zero_comp_not_equal_back_fail_zero_pass_decw_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_inv_comp_equal_back_fail_decc_pass_keep_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_decw_comp_greater_back_fail_decc_pass_decw_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_inv_comp_never_back_fail_repl_pass_keep_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_zero_comp_less_back_fail_inv_pass_keep_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_decc_comp_not_equal_back_fail_wrap_pass_decc_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_decw_comp_less_or_equal_back_fail_incc_pass_wrap_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_keep_comp_never_back_fail_decw_pass_inv_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_decc_comp_less_back_fail_repl_pass_inv_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_zero_comp_less_or_equal_back_fail_inv_pass_repl_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_incc_comp_less_back_fail_inv_pass_decc_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_decc_comp_greater_or_equal_back_fail_decw_pass_decw_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_incc_comp_never_back_fail_wrap_pass_decc_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_keep_comp_greater_back_fail_repl_pass_incc_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_incc_comp_always_back_fail_decw_pass_keep_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_keep_comp_greater_back_fail_zero_pass_decw_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_decc_comp_not_equal_back_fail_incc_pass_incc_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_incc_comp_less_or_equal_back_fail_incc_pass_decc_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_keep_comp_never_back_fail_inv_pass_decc_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_zero_comp_less_or_equal_back_fail_wrap_pass_repl_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_zero_comp_greater_or_equal_back_fail_zero_pass_decw_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_keep_comp_equal_back_fail_repl_pass_wrap_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_repl_comp_greater_back_fail_decc_pass_repl_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_inv_comp_greater_back_fail_repl_pass_keep_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_zero_comp_always_back_fail_keep_pass_zero_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_decc_comp_always_back_fail_keep_pass_zero_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_keep_comp_less_back_fail_wrap_pass_incc_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_keep_comp_greater_back_fail_zero_pass_decw_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_decc_comp_greater_back_fail_zero_pass_inv_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_decc_comp_greater_or_equal_back_fail_inv_pass_keep_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_decc_comp_less_or_equal_back_fail_decc_pass_keep_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_decw_comp_equal_back_fail_decw_pass_wrap_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_wrap_comp_greater_or_equal_back_fail_zero_pass_inv_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_keep_comp_never_back_fail_keep_pass_repl_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_wrap_comp_less_or_equal_back_fail_inv_pass_repl_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_zero_comp_less_or_equal_back_fail_keep_pass_inv_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_keep_comp_less_back_fail_inv_pass_wrap_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_inv_comp_not_equal_back_fail_zero_pass_decc_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_zero_comp_never_back_fail_decc_pass_inv_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_inv_comp_less_or_equal_back_fail_repl_pass_decw_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_keep_comp_less_or_equal_back_fail_decc_pass_keep_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_repl_comp_equal_back_fail_keep_pass_zero_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_repl_comp_greater_back_fail_keep_pass_repl_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_decw_comp_greater_back_fail_zero_pass_incc_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_keep_comp_not_equal_back_fail_keep_pass_repl_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_zero_comp_greater_back_fail_decw_pass_wrap_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_decw_comp_greater_or_equal_back_fail_repl_pass_decw_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_keep_comp_never_back_fail_decc_pass_incc_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_incc_comp_less_or_equal_back_fail_decc_pass_zero_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_inv_comp_always_back_fail_incc_pass_repl_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_incc_comp_always_back_fail_decc_pass_zero_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_repl_comp_greater_or_equal_back_fail_incc_pass_zero_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_decw_comp_less_or_equal_back_fail_keep_pass_decw_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_incc_comp_always_back_fail_keep_pass_keep_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_incc_comp_always_back_fail_incc_pass_wrap_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_decc_comp_less_or_equal_back_fail_keep_pass_inv_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_keep_comp_never_back_fail_zero_pass_zero_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_decc_comp_equal_back_fail_inv_pass_keep_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_decc_comp_always_back_fail_keep_pass_incc_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_wrap_comp_never_back_fail_wrap_pass_wrap_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_keep_comp_less_back_fail_decc_pass_incc_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_repl_comp_never_back_fail_inv_pass_inv_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_zero_comp_greater_or_equal_back_fail_keep_pass_zero_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_decc_comp_equal_back_fail_keep_pass_decc_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_decc_comp_less_back_fail_zero_pass_wrap_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_keep_comp_equal_back_fail_incc_pass_decc_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_inv_comp_always_back_fail_zero_pass_incc_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_repl_comp_less_or_equal_back_fail_inv_pass_inv_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_incc_comp_greater_or_equal_back_fail_inv_pass_keep_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_wrap_comp_less_back_fail_zero_pass_keep_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_inv_comp_equal_back_fail_incc_pass_inv_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_inv_comp_equal_back_fail_inv_pass_incc_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_decc_comp_not_equal_back_fail_decw_pass_repl_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_wrap_comp_greater_or_equal_back_fail_wrap_pass_inv_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_repl_comp_less_back_fail_decc_pass_inv_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_decw_comp_less_back_fail_wrap_pass_repl_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_zero_comp_equal_back_fail_incc_pass_decc_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_zero_comp_greater_back_fail_wrap_pass_decw_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_decw_comp_equal_back_fail_keep_pass_incc_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_wrap_comp_never_back_fail_incc_pass_zero_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_zero_comp_greater_back_fail_zero_pass_decc_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_incc_comp_always_back_fail_incc_pass_incc_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_incc_comp_less_back_fail_repl_pass_repl_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_wrap_comp_never_back_fail_zero_pass_zero_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_inv_comp_equal_back_fail_keep_pass_inv_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_keep_comp_not_equal_back_fail_wrap_pass_keep_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_keep_comp_less_back_fail_zero_pass_repl_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_decw_comp_greater_or_equal_back_fail_wrap_pass_incc_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_incc_comp_greater_or_equal_back_fail_zero_pass_decc_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_decw_comp_always_back_fail_decw_pass_wrap_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_decc_comp_equal_back_fail_keep_pass_wrap_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_zero_comp_equal_back_fail_decw_pass_zero_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_decw_comp_less_or_equal_back_fail_incc_pass_decw_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_incc_comp_never_back_fail_decc_pass_incc_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_decc_comp_greater_back_fail_repl_pass_inv_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_inv_comp_not_equal_back_fail_wrap_pass_wrap_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_repl_comp_greater_or_equal_back_fail_decw_pass_decc_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_repl_comp_never_back_fail_incc_pass_decw_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_repl_comp_greater_or_equal_back_fail_repl_pass_keep_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_decc_comp_never_back_fail_incc_pass_decc_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_keep_comp_less_back_fail_decc_pass_decw_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_inv_comp_equal_back_fail_repl_pass_incc_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_keep_comp_less_back_fail_incc_pass_keep_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_inv_comp_never_back_fail_keep_pass_wrap_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_repl_comp_less_back_fail_decc_pass_decc_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_decc_comp_not_equal_back_fail_inv_pass_decw_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_inv_comp_never_back_fail_decc_pass_keep_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_keep_comp_equal_back_fail_decc_pass_wrap_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_incc_comp_never_back_fail_incc_pass_incc_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_decc_comp_less_back_fail_incc_pass_incc_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_repl_comp_never_back_fail_incc_pass_repl_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_wrap_comp_always_back_fail_decc_pass_decw_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_keep_comp_less_or_equal_back_fail_decw_pass_decc_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_wrap_comp_less_or_equal_back_fail_inv_pass_incc_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_wrap_comp_less_or_equal_back_fail_decw_pass_incc_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_decw_comp_never_back_fail_inv_pass_wrap_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_decw_comp_equal_back_fail_decc_pass_zero_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_decw_comp_greater_or_equal_back_fail_inv_pass_keep_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_repl_comp_less_back_fail_incc_pass_zero_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_decw_comp_greater_back_fail_decc_pass_zero_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_keep_comp_not_equal_back_fail_decw_pass_decw_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_zero_comp_less_back_fail_incc_pass_incc_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_inv_comp_less_back_fail_repl_pass_incc_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_decc_comp_less_back_fail_decc_pass_inv_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_decc_comp_less_back_fail_keep_pass_decw_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_decc_comp_not_equal_back_fail_decw_pass_wrap_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_keep_comp_equal_back_fail_wrap_pass_keep_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_incc_comp_not_equal_back_fail_repl_pass_decw_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_keep_comp_equal_back_fail_keep_pass_incc_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_decc_comp_not_equal_back_fail_keep_pass_zero_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_repl_comp_never_back_fail_wrap_pass_zero_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_repl_comp_not_equal_back_fail_wrap_pass_inv_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_zero_comp_greater_or_equal_back_fail_decw_pass_zero_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_incc_comp_greater_back_fail_keep_pass_wrap_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_decc_comp_greater_or_equal_back_fail_incc_pass_incc_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_inv_comp_always_back_fail_keep_pass_zero_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_keep_comp_not_equal_back_fail_zero_pass_decc_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_inv_comp_always_back_fail_decc_pass_decw_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_repl_comp_not_equal_back_fail_decc_pass_decw_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_decw_comp_less_back_fail_decc_pass_inv_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_decc_comp_always_back_fail_decw_pass_keep_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_wrap_comp_never_back_fail_zero_pass_wrap_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_repl_comp_less_back_fail_repl_pass_decw_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_decw_comp_less_back_fail_repl_pass_inv_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_wrap_comp_always_back_fail_keep_pass_inv_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_decc_comp_equal_back_fail_wrap_pass_decc_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_incc_comp_greater_or_equal_back_fail_zero_pass_zero_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_inv_comp_always_back_fail_decw_pass_incc_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_zero_comp_greater_back_fail_keep_pass_incc_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_keep_comp_less_or_equal_back_fail_incc_pass_decc_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_wrap_comp_greater_or_equal_back_fail_decw_pass_decc_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_repl_comp_never_back_fail_repl_pass_decw_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_decw_comp_less_or_equal_back_fail_inv_pass_keep_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_decw_comp_not_equal_back_fail_zero_pass_inv_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_zero_comp_always_back_fail_keep_pass_zero_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_keep_comp_not_equal_back_fail_wrap_pass_incc_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_repl_comp_greater_or_equal_back_fail_incc_pass_inv_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_incc_comp_greater_back_fail_wrap_pass_wrap_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_inv_comp_greater_back_fail_inv_pass_wrap_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_keep_comp_greater_or_equal_back_fail_incc_pass_incc_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_zero_comp_equal_back_fail_keep_pass_wrap_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_zero_comp_greater_back_fail_inv_pass_repl_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_zero_comp_greater_back_fail_wrap_pass_wrap_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_zero_comp_never_back_fail_repl_pass_decc_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_decc_comp_greater_or_equal_back_fail_repl_pass_zero_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_decw_comp_not_equal_back_fail_decc_pass_decc_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_incc_comp_not_equal_back_fail_zero_pass_decw_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_keep_comp_greater_back_fail_decc_pass_decw_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_wrap_comp_greater_or_equal_back_fail_zero_pass_repl_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_keep_comp_not_equal_back_fail_inv_pass_inv_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_decw_comp_not_equal_back_fail_decw_pass_repl_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_decw_comp_greater_or_equal_back_fail_keep_pass_decc_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_repl_comp_equal_back_fail_inv_pass_keep_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_repl_comp_greater_back_fail_incc_pass_wrap_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_inv_comp_always_back_fail_keep_pass_inv_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_decw_comp_equal_back_fail_repl_pass_wrap_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_wrap_comp_greater_back_fail_wrap_pass_repl_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_incc_comp_not_equal_back_fail_keep_pass_decc_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_keep_comp_greater_or_equal_back_fail_incc_pass_repl_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_decc_comp_less_back_fail_zero_pass_repl_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_decw_comp_less_back_fail_repl_pass_repl_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_repl_comp_equal_back_fail_wrap_pass_decw_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_incc_comp_not_equal_back_fail_inv_pass_wrap_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_keep_comp_not_equal_back_fail_decc_pass_zero_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_repl_comp_always_back_fail_decw_pass_keep_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_inv_comp_equal_back_fail_wrap_pass_decc_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_wrap_comp_less_back_fail_zero_pass_keep_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_incc_comp_less_or_equal_back_fail_zero_pass_repl_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_keep_comp_not_equal_back_fail_keep_pass_inv_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_inv_comp_greater_or_equal_back_fail_keep_pass_decw_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_zero_comp_less_back_fail_zero_pass_incc_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_decw_comp_always_back_fail_zero_pass_decc_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_zero_comp_not_equal_back_fail_repl_pass_keep_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_keep_comp_less_or_equal_back_fail_repl_pass_repl_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_zero_comp_not_equal_back_fail_decw_pass_wrap_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_decw_comp_never_back_fail_zero_pass_keep_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_decw_comp_never_back_fail_keep_pass_zero_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_inv_comp_not_equal_back_fail_zero_pass_repl_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_decc_comp_equal_back_fail_decc_pass_keep_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_wrap_comp_always_back_fail_incc_pass_decw_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_repl_comp_less_back_fail_inv_pass_repl_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_incc_comp_always_back_fail_wrap_pass_decw_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_inv_comp_greater_or_equal_back_fail_incc_pass_decc_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_decw_comp_greater_or_equal_back_fail_keep_pass_decw_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_incc_comp_greater_back_fail_wrap_pass_zero_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_repl_comp_less_or_equal_back_fail_decw_pass_keep_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_inv_comp_never_back_fail_keep_pass_keep_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_inv_comp_greater_or_equal_back_fail_wrap_pass_keep_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_keep_comp_greater_or_equal_back_fail_decw_pass_zero_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_keep_comp_greater_back_fail_inv_pass_repl_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_wrap_comp_greater_back_fail_wrap_pass_incc_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_wrap_comp_greater_back_fail_incc_pass_decw_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_wrap_comp_not_equal_back_fail_zero_pass_zero_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_wrap_comp_equal_back_fail_inv_pass_incc_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_wrap_comp_equal_back_fail_inv_pass_repl_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_keep_comp_less_back_fail_repl_pass_keep_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_zero_comp_never_back_fail_decw_pass_incc_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_keep_comp_always_back_fail_incc_pass_inv_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_keep_comp_equal_back_fail_decc_pass_wrap_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_zero_comp_always_back_fail_wrap_pass_inv_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_zero_comp_never_back_fail_zero_pass_wrap_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_keep_comp_greater_back_fail_zero_pass_wrap_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_wrap_comp_never_back_fail_repl_pass_incc_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_decc_comp_not_equal_back_fail_wrap_pass_incc_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_wrap_comp_not_equal_back_fail_incc_pass_zero_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_incc_comp_less_back_fail_repl_pass_keep_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_incc_comp_greater_or_equal_back_fail_incc_pass_keep_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_inv_comp_not_equal_back_fail_wrap_pass_keep_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_wrap_comp_greater_or_equal_back_fail_decw_pass_incc_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_decw_comp_equal_back_fail_decw_pass_wrap_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_wrap_comp_never_back_fail_zero_pass_decw_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_keep_comp_always_back_fail_incc_pass_inv_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_repl_comp_less_or_equal_back_fail_keep_pass_inv_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_inv_comp_never_back_fail_wrap_pass_inv_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_zero_comp_greater_back_fail_decc_pass_inv_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_decw_comp_not_equal_back_fail_keep_pass_inv_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_decc_comp_less_back_fail_repl_pass_decw_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_decc_comp_greater_or_equal_back_fail_wrap_pass_decc_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_decc_comp_greater_back_fail_inv_pass_decc_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_incc_comp_not_equal_back_fail_incc_pass_keep_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_wrap_comp_equal_back_fail_zero_pass_decc_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_repl_comp_equal_back_fail_inv_pass_decc_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_incc_comp_less_or_equal_back_fail_inv_pass_inv_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_wrap_comp_never_back_fail_inv_pass_repl_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_zero_comp_greater_back_fail_repl_pass_incc_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_repl_comp_greater_back_fail_decw_pass_inv_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_decc_comp_less_or_equal_back_fail_decc_pass_decc_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_zero_comp_less_back_fail_keep_pass_inv_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_zero_comp_greater_or_equal_back_fail_keep_pass_repl_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_keep_comp_less_or_equal_back_fail_decc_pass_incc_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_incc_comp_less_back_fail_decw_pass_inv_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_decc_comp_less_or_equal_back_fail_inv_pass_wrap_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_repl_comp_greater_or_equal_back_fail_zero_pass_incc_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_zero_comp_always_back_fail_decw_pass_incc_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_repl_comp_less_back_fail_keep_pass_incc_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_repl_comp_less_back_fail_keep_pass_repl_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_wrap_comp_not_equal_back_fail_incc_pass_zero_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_inv_comp_not_equal_back_fail_decc_pass_decc_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_decc_comp_greater_or_equal_back_fail_wrap_pass_decw_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_wrap_comp_never_back_fail_incc_pass_repl_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_wrap_comp_greater_back_fail_decw_pass_decw_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_zero_comp_greater_back_fail_zero_pass_wrap_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_keep_comp_greater_or_equal_back_fail_decc_pass_decc_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_zero_comp_not_equal_back_fail_wrap_pass_repl_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_keep_comp_greater_back_fail_wrap_pass_incc_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_decc_comp_less_or_equal_back_fail_decc_pass_zero_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_repl_comp_equal_back_fail_zero_pass_keep_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_zero_comp_greater_back_fail_wrap_pass_decc_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_decc_comp_greater_back_fail_wrap_pass_incc_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_keep_comp_less_or_equal_back_fail_zero_pass_incc_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_repl_comp_greater_back_fail_wrap_pass_decc_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_inv_comp_greater_back_fail_inv_pass_incc_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_inv_comp_less_or_equal_back_fail_inv_pass_decc_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_keep_comp_greater_or_equal_back_fail_inv_pass_incc_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_decc_comp_equal_back_fail_keep_pass_incc_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_zero_comp_always_back_fail_incc_pass_wrap_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_zero_comp_less_or_equal_back_fail_zero_pass_incc_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_keep_comp_equal_back_fail_repl_pass_decc_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_repl_comp_less_back_fail_inv_pass_zero_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_decc_comp_less_back_fail_decw_pass_keep_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_decw_comp_greater_or_equal_back_fail_decw_pass_zero_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_inv_comp_less_back_fail_keep_pass_incc_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_inv_comp_less_or_equal_back_fail_decc_pass_decc_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_incc_comp_equal_back_fail_wrap_pass_keep_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_decc_comp_always_back_fail_decw_pass_decc_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_incc_comp_not_equal_back_fail_wrap_pass_zero_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_inv_comp_less_or_equal_back_fail_wrap_pass_zero_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_repl_comp_less_back_fail_incc_pass_decw_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_inv_comp_always_back_fail_incc_pass_keep_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_inv_comp_never_back_fail_wrap_pass_keep_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_decw_comp_equal_back_fail_repl_pass_keep_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_repl_comp_greater_back_fail_decw_pass_keep_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_wrap_comp_equal_back_fail_inv_pass_decw_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_incc_comp_equal_back_fail_decc_pass_repl_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_keep_comp_greater_back_fail_keep_pass_keep_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_inv_comp_not_equal_back_fail_decw_pass_wrap_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_wrap_comp_less_back_fail_repl_pass_decw_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_decc_comp_equal_back_fail_keep_pass_zero_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_decc_comp_never_back_fail_inv_pass_decc_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_zero_comp_less_back_fail_keep_pass_decc_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_repl_comp_not_equal_back_fail_incc_pass_keep_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_repl_comp_less_back_fail_zero_pass_repl_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_decw_comp_greater_back_fail_decc_pass_repl_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_zero_comp_less_back_fail_repl_pass_decw_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_repl_comp_greater_back_fail_decw_pass_decc_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_keep_comp_greater_back_fail_keep_pass_repl_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_inv_comp_not_equal_back_fail_inv_pass_wrap_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_decw_comp_less_back_fail_keep_pass_repl_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_inv_comp_always_back_fail_decc_pass_keep_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_decw_comp_greater_or_equal_back_fail_wrap_pass_zero_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_incc_comp_never_back_fail_decw_pass_incc_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_decc_comp_greater_or_equal_back_fail_inv_pass_zero_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_zero_comp_not_equal_back_fail_wrap_pass_zero_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_incc_comp_never_back_fail_inv_pass_keep_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_keep_comp_less_or_equal_back_fail_incc_pass_repl_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_decc_comp_less_or_equal_back_fail_decw_pass_keep_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_decc_comp_less_back_fail_incc_pass_inv_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_zero_comp_less_or_equal_back_fail_keep_pass_keep_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_zero_comp_equal_back_fail_wrap_pass_wrap_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_incc_comp_equal_back_fail_zero_pass_inv_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_decw_comp_never_back_fail_wrap_pass_decw_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_keep_comp_equal_back_fail_wrap_pass_incc_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_decw_comp_greater_back_fail_zero_pass_wrap_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_decc_comp_never_back_fail_zero_pass_decw_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_decc_comp_greater_back_fail_repl_pass_zero_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_repl_comp_greater_back_fail_incc_pass_repl_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_wrap_comp_greater_back_fail_decc_pass_keep_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_zero_comp_greater_or_equal_back_fail_inv_pass_inv_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_incc_comp_never_back_fail_repl_pass_repl_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_inv_comp_not_equal_back_fail_decw_pass_decc_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_decw_comp_never_back_fail_keep_pass_decc_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_incc_comp_never_back_fail_keep_pass_incc_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_wrap_comp_greater_or_equal_back_fail_inv_pass_incc_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_repl_comp_always_back_fail_zero_pass_decw_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_decw_comp_never_back_fail_incc_pass_keep_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_decw_comp_not_equal_back_fail_decc_pass_incc_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_wrap_comp_greater_or_equal_back_fail_zero_pass_keep_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_repl_comp_equal_back_fail_incc_pass_decw_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_inv_comp_never_back_fail_zero_pass_zero_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_zero_comp_greater_or_equal_back_fail_zero_pass_incc_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_inv_comp_less_back_fail_incc_pass_wrap_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_decc_comp_less_back_fail_zero_pass_keep_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_decw_comp_less_back_fail_wrap_pass_zero_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_decc_comp_less_or_equal_back_fail_repl_pass_repl_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_incc_comp_not_equal_back_fail_inv_pass_decw_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_keep_comp_less_or_equal_back_fail_decc_pass_keep_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_wrap_comp_greater_or_equal_back_fail_inv_pass_keep_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_inv_comp_less_or_equal_back_fail_zero_pass_zero_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_decw_comp_never_back_fail_inv_pass_keep_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_incc_comp_greater_or_equal_back_fail_repl_pass_decc_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_incc_comp_equal_back_fail_decw_pass_inv_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_keep_comp_equal_back_fail_decc_pass_wrap_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_repl_comp_less_back_fail_decw_pass_decw_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_decw_comp_greater_or_equal_back_fail_decw_pass_decc_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_decc_comp_always_back_fail_wrap_pass_decc_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_decc_comp_less_or_equal_back_fail_zero_pass_repl_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_repl_comp_greater_or_equal_back_fail_inv_pass_keep_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_decw_comp_equal_back_fail_repl_pass_keep_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_decw_comp_never_back_fail_repl_pass_zero_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_decc_comp_greater_or_equal_back_fail_wrap_pass_inv_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_decw_comp_equal_back_fail_inv_pass_wrap_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_incc_comp_not_equal_back_fail_inv_pass_decw_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_repl_comp_greater_back_fail_repl_pass_inv_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_inv_comp_always_back_fail_wrap_pass_decw_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_decw_comp_greater_back_fail_decc_pass_incc_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_inv_comp_never_back_fail_keep_pass_decw_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_decw_comp_always_back_fail_decw_pass_wrap_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_zero_comp_less_back_fail_keep_pass_keep_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_decc_comp_not_equal_back_fail_decc_pass_repl_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_keep_comp_less_back_fail_keep_pass_incc_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_repl_comp_greater_back_fail_decc_pass_zero_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_decc_comp_equal_back_fail_zero_pass_keep_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_repl_comp_greater_or_equal_back_fail_decw_pass_keep_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_keep_comp_greater_or_equal_back_fail_decw_pass_repl_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_inv_comp_never_back_fail_decc_pass_inv_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_keep_comp_always_back_fail_wrap_pass_incc_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_repl_comp_equal_back_fail_wrap_pass_decw_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_repl_comp_not_equal_back_fail_inv_pass_decc_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_decw_comp_equal_back_fail_repl_pass_incc_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_decc_comp_never_back_fail_incc_pass_decw_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_decc_comp_not_equal_back_fail_zero_pass_wrap_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_repl_comp_not_equal_back_fail_incc_pass_incc_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_inv_comp_less_or_equal_back_fail_zero_pass_decw_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_zero_comp_less_back_fail_inv_pass_decw_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_repl_comp_never_back_fail_keep_pass_inv_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_wrap_comp_not_equal_back_fail_keep_pass_decc_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_decw_comp_greater_or_equal_back_fail_keep_pass_decw_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_inv_comp_greater_back_fail_decc_pass_inv_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_keep_comp_greater_back_fail_zero_pass_keep_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_wrap_comp_never_back_fail_repl_pass_keep_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_repl_comp_always_back_fail_incc_pass_decw_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_incc_comp_not_equal_back_fail_incc_pass_decw_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_inv_comp_less_or_equal_back_fail_zero_pass_wrap_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_wrap_comp_equal_back_fail_keep_pass_decw_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_repl_comp_not_equal_back_fail_decw_pass_zero_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_decw_comp_less_or_equal_back_fail_repl_pass_zero_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_zero_comp_never_back_fail_inv_pass_decc_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_repl_comp_always_back_fail_keep_pass_keep_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_keep_comp_never_back_fail_decw_pass_keep_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_decc_comp_greater_back_fail_incc_pass_decc_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_keep_comp_always_back_fail_repl_pass_decc_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_repl_comp_always_back_fail_wrap_pass_zero_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_wrap_comp_greater_back_fail_keep_pass_decw_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_inv_comp_less_or_equal_back_fail_repl_pass_decc_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_wrap_comp_less_back_fail_wrap_pass_repl_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_incc_comp_equal_back_fail_keep_pass_decc_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_decc_comp_greater_back_fail_inv_pass_incc_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_inv_comp_equal_back_fail_decc_pass_inv_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_inv_comp_never_back_fail_inv_pass_inv_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_keep_comp_never_back_fail_keep_pass_decc_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_repl_comp_less_back_fail_decw_pass_keep_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_decw_comp_greater_back_fail_inv_pass_repl_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_inv_comp_always_back_fail_repl_pass_repl_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_wrap_comp_less_or_equal_back_fail_repl_pass_decc_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_wrap_comp_greater_back_fail_inv_pass_decw_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_decc_comp_always_back_fail_wrap_pass_zero_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_repl_comp_equal_back_fail_repl_pass_repl_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_decc_comp_never_back_fail_wrap_pass_wrap_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_inv_comp_never_back_fail_decc_pass_inv_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_decc_comp_never_back_fail_wrap_pass_decc_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_zero_comp_less_or_equal_back_fail_repl_pass_decw_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_incc_comp_equal_back_fail_zero_pass_incc_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_inv_comp_less_back_fail_wrap_pass_repl_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_keep_comp_never_back_fail_decw_pass_zero_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_repl_comp_never_back_fail_decc_pass_repl_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_decw_comp_equal_back_fail_decc_pass_decc_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_decw_comp_not_equal_back_fail_inv_pass_repl_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_keep_comp_never_back_fail_incc_pass_decc_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_keep_comp_less_back_fail_wrap_pass_decw_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_repl_comp_not_equal_back_fail_decc_pass_decc_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_wrap_comp_greater_back_fail_incc_pass_decw_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_incc_comp_less_back_fail_wrap_pass_incc_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_inv_comp_less_back_fail_incc_pass_decw_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_repl_comp_less_or_equal_back_fail_incc_pass_decw_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_zero_comp_always_back_fail_zero_pass_keep_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_keep_comp_greater_or_equal_back_fail_inv_pass_decw_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_repl_comp_less_or_equal_back_fail_repl_pass_repl_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_decw_comp_less_or_equal_back_fail_inv_pass_repl_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_keep_comp_greater_or_equal_back_fail_wrap_pass_decc_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_zero_comp_greater_or_equal_back_fail_zero_pass_incc_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_decw_comp_less_or_equal_back_fail_decw_pass_repl_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_decc_comp_greater_or_equal_back_fail_repl_pass_zero_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_zero_comp_greater_or_equal_back_fail_decc_pass_decw_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_incc_comp_always_back_fail_zero_pass_zero_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_decc_comp_always_back_fail_decc_pass_wrap_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_zero_comp_not_equal_back_fail_keep_pass_decc_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_inv_comp_greater_or_equal_back_fail_wrap_pass_decw_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_decc_comp_not_equal_back_fail_decw_pass_incc_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_repl_comp_not_equal_back_fail_repl_pass_decw_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_decc_comp_equal_back_fail_keep_pass_zero_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_incc_comp_always_back_fail_decc_pass_decw_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_incc_comp_not_equal_back_fail_wrap_pass_decc_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_wrap_comp_never_back_fail_decw_pass_decw_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_keep_comp_always_back_fail_keep_pass_incc_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_keep_comp_not_equal_back_fail_wrap_pass_decc_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_inv_comp_equal_back_fail_incc_pass_decc_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_decc_comp_equal_back_fail_inv_pass_keep_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_decc_comp_not_equal_back_fail_repl_pass_decw_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_zero_comp_less_or_equal_back_fail_decc_pass_inv_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_inv_comp_never_back_fail_keep_pass_repl_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_inv_comp_equal_back_fail_zero_pass_decc_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_zero_comp_greater_or_equal_back_fail_wrap_pass_inv_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_repl_comp_greater_back_fail_incc_pass_decc_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_inv_comp_less_or_equal_back_fail_repl_pass_decw_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_inv_comp_less_or_equal_back_fail_incc_pass_zero_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_zero_comp_always_back_fail_inv_pass_wrap_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_zero_comp_less_back_fail_keep_pass_wrap_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_incc_comp_less_or_equal_back_fail_decw_pass_keep_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_inv_comp_less_or_equal_back_fail_incc_pass_wrap_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_decc_comp_less_or_equal_back_fail_incc_pass_keep_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_wrap_comp_never_back_fail_decc_pass_decw_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_wrap_comp_greater_or_equal_back_fail_wrap_pass_decw_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_zero_comp_equal_back_fail_repl_pass_inv_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_incc_comp_less_or_equal_back_fail_decw_pass_decw_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_decw_comp_greater_or_equal_back_fail_wrap_pass_incc_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_zero_comp_greater_back_fail_zero_pass_decw_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_inv_comp_not_equal_back_fail_repl_pass_keep_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_keep_comp_not_equal_back_fail_decw_pass_wrap_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_zero_comp_never_back_fail_repl_pass_decw_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_incc_comp_equal_back_fail_inv_pass_keep_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_keep_comp_less_back_fail_decw_pass_zero_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_decc_comp_greater_back_fail_inv_pass_zero_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_wrap_comp_always_back_fail_decc_pass_decc_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_decw_comp_less_back_fail_keep_pass_zero_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_decw_comp_never_back_fail_keep_pass_repl_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_repl_comp_always_back_fail_decw_pass_incc_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_wrap_comp_less_back_fail_inv_pass_decw_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_decc_comp_never_back_fail_keep_pass_wrap_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_incc_comp_never_back_fail_repl_pass_wrap_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_inv_comp_greater_back_fail_zero_pass_wrap_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_decc_comp_never_back_fail_keep_pass_inv_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_decw_comp_less_or_equal_back_fail_zero_pass_decw_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_inv_comp_not_equal_back_fail_zero_pass_incc_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_wrap_comp_greater_back_fail_decc_pass_wrap_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_incc_comp_less_or_equal_back_fail_decc_pass_wrap_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_incc_comp_less_back_fail_wrap_pass_decc_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_zero_comp_never_back_fail_decc_pass_keep_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_inv_comp_less_or_equal_back_fail_wrap_pass_incc_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_keep_comp_greater_or_equal_back_fail_repl_pass_inv_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_repl_comp_greater_back_fail_wrap_pass_keep_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_zero_comp_equal_back_fail_repl_pass_repl_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_zero_comp_greater_back_fail_keep_pass_decw_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_decc_comp_always_back_fail_zero_pass_keep_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_decw_comp_always_back_fail_wrap_pass_decc_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_incc_comp_always_back_fail_repl_pass_wrap_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_wrap_comp_equal_back_fail_keep_pass_incc_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_incc_comp_always_back_fail_wrap_pass_zero_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_inv_comp_never_back_fail_wrap_pass_keep_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_repl_comp_greater_or_equal_back_fail_inv_pass_inv_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_decw_comp_greater_back_fail_incc_pass_keep_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_incc_comp_equal_back_fail_keep_pass_keep_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_wrap_comp_less_back_fail_repl_pass_incc_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_incc_comp_greater_back_fail_zero_pass_zero_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_incc_comp_never_back_fail_incc_pass_zero_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_repl_comp_never_back_fail_decw_pass_keep_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_inv_comp_greater_back_fail_decw_pass_inv_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_zero_comp_not_equal_back_fail_decc_pass_keep_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_inv_comp_equal_back_fail_decc_pass_zero_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_repl_comp_less_or_equal_back_fail_decw_pass_inv_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_keep_comp_never_back_fail_wrap_pass_decw_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_incc_comp_equal_back_fail_keep_pass_decc_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_decw_comp_less_back_fail_decw_pass_decw_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_incc_comp_less_or_equal_back_fail_keep_pass_wrap_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_decw_comp_not_equal_back_fail_zero_pass_keep_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_decw_comp_equal_back_fail_wrap_pass_incc_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_zero_comp_greater_or_equal_back_fail_inv_pass_zero_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_zero_comp_always_back_fail_decw_pass_decc_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_decc_comp_always_back_fail_inv_pass_zero_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_keep_comp_never_back_fail_incc_pass_zero_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_incc_comp_equal_back_fail_zero_pass_decc_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_decw_comp_less_back_fail_zero_pass_decw_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_incc_comp_equal_back_fail_decw_pass_incc_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_decc_comp_never_back_fail_keep_pass_decw_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_wrap_comp_not_equal_back_fail_decw_pass_keep_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_keep_comp_never_back_fail_repl_pass_wrap_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_inv_comp_always_back_fail_incc_pass_repl_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_repl_comp_not_equal_back_fail_decw_pass_wrap_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_wrap_comp_greater_back_fail_keep_pass_keep_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_zero_comp_less_back_fail_inv_pass_decc_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_zero_comp_equal_back_fail_repl_pass_decc_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_inv_comp_always_back_fail_zero_pass_repl_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_wrap_comp_always_back_fail_keep_pass_decc_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_inv_comp_never_back_fail_zero_pass_wrap_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_wrap_comp_greater_or_equal_back_fail_keep_pass_repl_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_keep_comp_not_equal_back_fail_inv_pass_decw_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_zero_comp_less_back_fail_incc_pass_keep_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_inv_comp_less_or_equal_back_fail_repl_pass_keep_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_zero_comp_equal_back_fail_decc_pass_decc_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_zero_comp_always_back_fail_decc_pass_repl_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_decc_comp_never_back_fail_repl_pass_decw_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_wrap_comp_less_or_equal_back_fail_inv_pass_incc_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_wrap_comp_less_back_fail_keep_pass_keep_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_decw_comp_greater_back_fail_incc_pass_zero_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_incc_comp_less_or_equal_back_fail_decc_pass_keep_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_keep_comp_less_or_equal_back_fail_zero_pass_inv_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_decc_comp_less_back_fail_incc_pass_inv_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_decw_comp_never_back_fail_keep_pass_decc_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_zero_comp_not_equal_back_fail_decw_pass_decc_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_incc_comp_less_or_equal_back_fail_keep_pass_decw_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_repl_comp_greater_back_fail_decw_pass_zero_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_decw_comp_less_back_fail_zero_pass_zero_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_decw_comp_never_back_fail_decw_pass_decw_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_inv_comp_equal_back_fail_wrap_pass_wrap_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_incc_comp_less_or_equal_back_fail_incc_pass_inv_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_zero_comp_greater_or_equal_back_fail_decw_pass_keep_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_incc_comp_greater_back_fail_wrap_pass_incc_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_decc_comp_never_back_fail_repl_pass_inv_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_decw_comp_always_back_fail_decw_pass_incc_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_repl_comp_less_or_equal_back_fail_decc_pass_repl_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_wrap_comp_greater_back_fail_inv_pass_incc_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_wrap_comp_less_back_fail_decw_pass_decw_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_decw_comp_not_equal_back_fail_inv_pass_decw_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_zero_comp_equal_back_fail_keep_pass_keep_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_incc_comp_not_equal_back_fail_decw_pass_zero_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_decc_comp_always_back_fail_inv_pass_incc_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_wrap_comp_greater_back_fail_zero_pass_decc_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_incc_comp_not_equal_back_fail_decw_pass_inv_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_inv_comp_always_back_fail_incc_pass_wrap_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_incc_comp_greater_or_equal_back_fail_wrap_pass_inv_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_incc_comp_greater_or_equal_back_fail_decw_pass_repl_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_inv_comp_greater_back_fail_zero_pass_inv_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_zero_comp_equal_back_fail_inv_pass_decw_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_zero_comp_not_equal_back_fail_wrap_pass_inv_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_decw_comp_less_back_fail_decc_pass_decw_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_zero_comp_greater_or_equal_back_fail_wrap_pass_keep_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_incc_comp_less_back_fail_incc_pass_inv_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_zero_comp_equal_back_fail_decc_pass_decw_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_incc_comp_always_back_fail_decc_pass_decw_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_repl_comp_less_back_fail_repl_pass_decc_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_wrap_comp_equal_back_fail_incc_pass_repl_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_decw_comp_equal_back_fail_incc_pass_inv_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_inv_comp_less_back_fail_repl_pass_repl_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_incc_comp_less_back_fail_repl_pass_wrap_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_decw_comp_greater_or_equal_back_fail_inv_pass_inv_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_decw_comp_always_back_fail_wrap_pass_keep_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_zero_comp_always_back_fail_wrap_pass_repl_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_decw_comp_less_or_equal_back_fail_incc_pass_incc_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_keep_comp_not_equal_back_fail_incc_pass_decc_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_decc_comp_not_equal_back_fail_keep_pass_inv_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_wrap_comp_equal_back_fail_decw_pass_repl_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_decc_comp_not_equal_back_fail_wrap_pass_inv_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_decw_comp_not_equal_back_fail_zero_pass_inv_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_zero_comp_equal_back_fail_decw_pass_keep_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_wrap_comp_not_equal_back_fail_repl_pass_decc_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_inv_comp_not_equal_back_fail_zero_pass_decc_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_incc_comp_always_back_fail_incc_pass_decw_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_repl_comp_equal_back_fail_incc_pass_incc_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_decc_comp_not_equal_back_fail_keep_pass_inv_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_keep_comp_less_back_fail_decc_pass_zero_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_wrap_comp_less_back_fail_decw_pass_decw_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_decw_comp_less_or_equal_back_fail_decc_pass_incc_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_zero_comp_not_equal_back_fail_repl_pass_wrap_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_incc_comp_always_back_fail_repl_pass_incc_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_decc_comp_always_back_fail_inv_pass_zero_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_repl_comp_equal_back_fail_repl_pass_wrap_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_incc_comp_not_equal_back_fail_wrap_pass_keep_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_keep_comp_always_back_fail_repl_pass_keep_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_inv_comp_never_back_fail_zero_pass_keep_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_wrap_comp_less_back_fail_keep_pass_keep_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_inv_comp_greater_or_equal_back_fail_decw_pass_incc_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_keep_comp_greater_back_fail_decc_pass_incc_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_incc_comp_always_back_fail_inv_pass_keep_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_inv_comp_not_equal_back_fail_wrap_pass_incc_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_repl_comp_always_back_fail_wrap_pass_wrap_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_keep_comp_never_back_fail_decc_pass_inv_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_decw_comp_never_back_fail_decc_pass_inv_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_inv_comp_always_back_fail_inv_pass_keep_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_decw_comp_always_back_fail_inv_pass_incc_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_wrap_comp_greater_back_fail_incc_pass_keep_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_repl_comp_equal_back_fail_decw_pass_zero_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_keep_comp_greater_back_fail_repl_pass_inv_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_inv_comp_greater_or_equal_back_fail_wrap_pass_repl_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_repl_comp_not_equal_back_fail_wrap_pass_decc_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_keep_comp_never_back_fail_zero_pass_zero_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_inv_comp_greater_or_equal_back_fail_decw_pass_zero_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_keep_comp_greater_or_equal_back_fail_inv_pass_decw_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_decw_comp_always_back_fail_keep_pass_zero_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_keep_comp_always_back_fail_zero_pass_wrap_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_wrap_comp_less_or_equal_back_fail_repl_pass_decw_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_wrap_comp_greater_back_fail_decw_pass_decc_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_inv_comp_always_back_fail_keep_pass_zero_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_incc_comp_greater_or_equal_back_fail_keep_pass_repl_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_zero_comp_always_back_fail_repl_pass_inv_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_incc_comp_never_back_fail_decw_pass_wrap_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_wrap_comp_greater_or_equal_back_fail_keep_pass_wrap_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_wrap_comp_less_back_fail_decw_pass_repl_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_keep_comp_less_or_equal_back_fail_repl_pass_incc_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_zero_comp_greater_back_fail_zero_pass_wrap_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_decc_comp_equal_back_fail_repl_pass_incc_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_zero_comp_not_equal_back_fail_repl_pass_repl_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_repl_comp_always_back_fail_wrap_pass_decc_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_decw_comp_greater_or_equal_back_fail_keep_pass_wrap_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_incc_comp_less_or_equal_back_fail_decc_pass_decc_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_zero_comp_greater_or_equal_back_fail_wrap_pass_zero_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_repl_comp_equal_back_fail_decw_pass_wrap_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_inv_comp_never_back_fail_decw_pass_inv_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_wrap_comp_equal_back_fail_decc_pass_incc_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_repl_comp_less_back_fail_repl_pass_repl_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_wrap_comp_greater_back_fail_zero_pass_zero_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_zero_comp_less_back_fail_inv_pass_wrap_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_repl_comp_greater_or_equal_back_fail_incc_pass_decc_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_zero_comp_greater_or_equal_back_fail_decw_pass_keep_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_zero_comp_greater_or_equal_back_fail_zero_pass_decw_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_zero_comp_always_back_fail_incc_pass_repl_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_decc_comp_less_back_fail_zero_pass_decw_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_decc_comp_never_back_fail_repl_pass_decw_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_incc_comp_greater_back_fail_keep_pass_inv_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_zero_comp_less_or_equal_back_fail_decc_pass_zero_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_zero_comp_less_back_fail_incc_pass_decw_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_repl_comp_never_back_fail_zero_pass_incc_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_wrap_comp_never_back_fail_decw_pass_incc_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_decw_comp_less_or_equal_back_fail_keep_pass_decw_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_keep_comp_greater_back_fail_inv_pass_repl_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_inv_comp_not_equal_back_fail_keep_pass_decc_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_inv_comp_greater_or_equal_back_fail_decw_pass_decw_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_keep_comp_less_or_equal_back_fail_zero_pass_decw_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_decc_comp_always_back_fail_zero_pass_incc_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_incc_comp_less_back_fail_decc_pass_zero_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_keep_comp_never_back_fail_incc_pass_incc_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_keep_comp_never_back_fail_inv_pass_decc_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_wrap_comp_not_equal_back_fail_zero_pass_repl_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_incc_comp_less_back_fail_wrap_pass_zero_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_decw_comp_always_back_fail_decw_pass_repl_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_wrap_comp_greater_back_fail_decc_pass_keep_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_keep_comp_greater_or_equal_back_fail_inv_pass_zero_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_wrap_comp_always_back_fail_keep_pass_decw_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_incc_comp_less_or_equal_back_fail_incc_pass_decw_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_decc_comp_never_back_fail_keep_pass_decw_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_decc_comp_never_back_fail_keep_pass_keep_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_zero_comp_equal_back_fail_keep_pass_zero_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_wrap_comp_greater_back_fail_zero_pass_incc_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_decc_comp_less_back_fail_incc_pass_zero_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_decc_comp_always_back_fail_inv_pass_incc_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_repl_comp_always_back_fail_zero_pass_incc_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_zero_comp_less_or_equal_back_fail_keep_pass_decc_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_zero_comp_equal_back_fail_zero_pass_zero_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_zero_comp_not_equal_back_fail_keep_pass_incc_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_inv_comp_greater_back_fail_decw_pass_zero_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_zero_comp_equal_back_fail_zero_pass_incc_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_wrap_comp_greater_or_equal_back_fail_decw_pass_keep_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_keep_comp_never_back_fail_zero_pass_keep_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_keep_comp_less_or_equal_back_fail_decc_pass_incc_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_incc_comp_always_back_fail_incc_pass_decc_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_wrap_comp_equal_back_fail_keep_pass_repl_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_decw_comp_less_back_fail_incc_pass_decc_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_keep_comp_less_or_equal_back_fail_repl_pass_inv_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_repl_comp_greater_back_fail_inv_pass_decc_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_wrap_comp_greater_or_equal_back_fail_inv_pass_zero_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_decw_comp_equal_back_fail_wrap_pass_decc_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_repl_comp_not_equal_back_fail_wrap_pass_inv_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_wrap_comp_greater_back_fail_keep_pass_wrap_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_wrap_comp_less_back_fail_zero_pass_decc_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_decw_comp_less_back_fail_incc_pass_decc_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_keep_comp_less_or_equal_back_fail_keep_pass_incc_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_incc_comp_greater_or_equal_back_fail_inv_pass_repl_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_wrap_comp_greater_or_equal_back_fail_repl_pass_incc_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_zero_comp_always_back_fail_decw_pass_zero_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_incc_comp_equal_back_fail_keep_pass_inv_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_zero_comp_not_equal_back_fail_zero_pass_inv_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_repl_comp_greater_back_fail_zero_pass_repl_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_keep_comp_always_back_fail_repl_pass_inv_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_decw_comp_greater_or_equal_back_fail_zero_pass_repl_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_keep_comp_greater_back_fail_zero_pass_incc_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_incc_comp_greater_back_fail_repl_pass_wrap_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_wrap_comp_less_or_equal_back_fail_decw_pass_incc_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_repl_comp_less_or_equal_back_fail_repl_pass_incc_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_inv_comp_less_back_fail_incc_pass_decc_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_decc_comp_greater_or_equal_back_fail_incc_pass_keep_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_keep_comp_equal_back_fail_zero_pass_decc_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_wrap_comp_greater_or_equal_back_fail_incc_pass_inv_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_incc_comp_not_equal_back_fail_keep_pass_wrap_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_keep_comp_always_back_fail_wrap_pass_inv_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_decw_comp_greater_back_fail_inv_pass_keep_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_decw_comp_less_back_fail_inv_pass_wrap_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_keep_comp_greater_back_fail_zero_pass_decc_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_zero_comp_less_or_equal_back_fail_zero_pass_decc_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_decw_comp_greater_back_fail_inv_pass_zero_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_decc_comp_less_or_equal_back_fail_zero_pass_incc_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_zero_comp_less_or_equal_back_fail_zero_pass_decw_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_decw_comp_less_back_fail_inv_pass_repl_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_incc_comp_less_back_fail_decc_pass_repl_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_zero_comp_greater_back_fail_zero_pass_decw_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_wrap_comp_less_back_fail_inv_pass_wrap_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_keep_comp_less_back_fail_incc_pass_keep_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_decw_comp_greater_or_equal_back_fail_zero_pass_zero_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_repl_comp_greater_or_equal_back_fail_decw_pass_decw_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_decw_comp_greater_back_fail_repl_pass_zero_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_decw_comp_always_back_fail_wrap_pass_inv_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_wrap_comp_always_back_fail_repl_pass_repl_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_repl_comp_equal_back_fail_zero_pass_zero_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_repl_comp_always_back_fail_inv_pass_keep_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_decw_comp_not_equal_back_fail_wrap_pass_wrap_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_incc_comp_never_back_fail_inv_pass_inv_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_zero_comp_always_back_fail_decw_pass_incc_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_zero_comp_greater_or_equal_back_fail_repl_pass_incc_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_incc_comp_less_or_equal_back_fail_decc_pass_repl_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_wrap_comp_always_back_fail_keep_pass_incc_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_wrap_comp_greater_or_equal_back_fail_keep_pass_wrap_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_inv_comp_greater_or_equal_back_fail_wrap_pass_decw_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_incc_comp_always_back_fail_zero_pass_inv_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_inv_comp_greater_back_fail_decw_pass_inv_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_decw_comp_never_back_fail_decc_pass_inv_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_inv_comp_not_equal_back_fail_inv_pass_decc_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_inv_comp_greater_back_fail_inv_pass_keep_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_zero_comp_greater_back_fail_wrap_pass_wrap_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_incc_comp_never_back_fail_decc_pass_inv_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_repl_comp_equal_back_fail_zero_pass_decw_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_decw_comp_not_equal_back_fail_decw_pass_repl_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_wrap_comp_less_back_fail_incc_pass_inv_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_repl_comp_equal_back_fail_wrap_pass_wrap_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_decc_comp_equal_back_fail_repl_pass_incc_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_incc_comp_less_or_equal_back_fail_keep_pass_decc_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_decc_comp_not_equal_back_fail_decw_pass_incc_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_repl_comp_less_or_equal_back_fail_zero_pass_decc_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_incc_comp_equal_back_fail_inv_pass_decc_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_wrap_comp_always_back_fail_zero_pass_zero_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_incc_comp_greater_back_fail_inv_pass_keep_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_decw_comp_greater_or_equal_back_fail_inv_pass_decc_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_keep_comp_not_equal_back_fail_zero_pass_keep_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_inv_comp_equal_back_fail_wrap_pass_wrap_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_incc_comp_less_or_equal_back_fail_wrap_pass_decw_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_wrap_comp_not_equal_back_fail_wrap_pass_inv_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_incc_comp_greater_back_fail_wrap_pass_decc_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_wrap_comp_always_back_fail_zero_pass_incc_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_inv_comp_equal_back_fail_incc_pass_inv_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_incc_comp_greater_back_fail_wrap_pass_wrap_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_repl_comp_greater_or_equal_back_fail_incc_pass_wrap_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_zero_comp_never_back_fail_incc_pass_inv_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_wrap_comp_less_back_fail_wrap_pass_inv_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_zero_comp_less_or_equal_back_fail_zero_pass_keep_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_decc_comp_never_back_fail_zero_pass_decc_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_zero_comp_equal_back_fail_inv_pass_wrap_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_decc_comp_never_back_fail_keep_pass_decc_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_decw_comp_not_equal_back_fail_keep_pass_incc_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_decc_comp_never_back_fail_inv_pass_decw_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_decc_comp_less_back_fail_wrap_pass_keep_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_decw_comp_not_equal_back_fail_wrap_pass_keep_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_wrap_comp_less_or_equal_back_fail_decw_pass_inv_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_zero_comp_greater_or_equal_back_fail_decc_pass_keep_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_decw_comp_always_back_fail_decc_pass_inv_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_zero_comp_greater_or_equal_back_fail_decw_pass_decc_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_inv_comp_not_equal_back_fail_wrap_pass_inv_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_zero_comp_greater_back_fail_decw_pass_repl_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_incc_comp_never_back_fail_wrap_pass_repl_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_incc_comp_less_or_equal_back_fail_inv_pass_wrap_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_repl_comp_greater_or_equal_back_fail_decc_pass_wrap_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_repl_comp_greater_back_fail_wrap_pass_decw_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_inv_comp_less_back_fail_incc_pass_inv_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_decc_comp_never_back_fail_decc_pass_wrap_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_zero_comp_greater_back_fail_zero_pass_incc_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_incc_comp_greater_back_fail_decw_pass_decc_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_decw_comp_equal_back_fail_wrap_pass_wrap_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_repl_comp_equal_back_fail_wrap_pass_decw_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_incc_comp_never_back_fail_incc_pass_keep_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_decw_comp_greater_or_equal_back_fail_incc_pass_inv_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_keep_comp_always_back_fail_repl_pass_inv_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_incc_comp_greater_or_equal_back_fail_keep_pass_zero_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_inv_comp_equal_back_fail_inv_pass_incc_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_zero_comp_never_back_fail_repl_pass_wrap_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_wrap_comp_always_back_fail_inv_pass_decw_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_repl_comp_less_or_equal_back_fail_decw_pass_wrap_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_repl_comp_greater_or_equal_back_fail_zero_pass_inv_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_decc_comp_never_back_fail_incc_pass_wrap_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_wrap_comp_never_back_fail_wrap_pass_wrap_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_decw_comp_not_equal_back_fail_wrap_pass_zero_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_repl_comp_always_back_fail_keep_pass_wrap_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_inv_comp_not_equal_back_fail_wrap_pass_incc_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_incc_comp_greater_back_fail_wrap_pass_keep_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_inv_comp_never_back_fail_wrap_pass_incc_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_inv_comp_not_equal_back_fail_incc_pass_wrap_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_inv_comp_greater_back_fail_repl_pass_zero_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_decc_comp_less_back_fail_keep_pass_wrap_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_repl_comp_not_equal_back_fail_incc_pass_inv_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_wrap_comp_less_back_fail_repl_pass_inv_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_incc_comp_not_equal_back_fail_decw_pass_repl_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_decc_comp_not_equal_back_fail_inv_pass_decc_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_zero_comp_equal_back_fail_keep_pass_repl_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_wrap_comp_always_back_fail_decw_pass_inv_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_decw_comp_never_back_fail_inv_pass_incc_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_wrap_comp_greater_back_fail_keep_pass_keep_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_wrap_comp_less_back_fail_incc_pass_inv_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_decc_comp_greater_back_fail_wrap_pass_decc_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_inv_comp_always_back_fail_repl_pass_repl_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_wrap_comp_equal_back_fail_decw_pass_decc_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_decw_comp_never_back_fail_incc_pass_decw_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_decw_comp_less_back_fail_inv_pass_inv_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_decw_comp_not_equal_back_fail_wrap_pass_inv_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_repl_comp_greater_or_equal_back_fail_zero_pass_zero_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_decc_comp_always_back_fail_decw_pass_decw_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_inv_comp_greater_back_fail_inv_pass_incc_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_zero_comp_always_back_fail_incc_pass_decc_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_inv_comp_less_or_equal_back_fail_repl_pass_zero_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_decw_comp_greater_or_equal_back_fail_zero_pass_inv_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_wrap_comp_equal_back_fail_zero_pass_zero_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_zero_comp_less_or_equal_back_fail_wrap_pass_decw_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_zero_comp_greater_back_fail_zero_pass_keep_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_inv_comp_greater_or_equal_back_fail_keep_pass_zero_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_incc_comp_greater_back_fail_zero_pass_keep_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_incc_comp_less_or_equal_back_fail_decc_pass_decw_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_repl_comp_greater_or_equal_back_fail_repl_pass_repl_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_decw_comp_less_back_fail_inv_pass_keep_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_decw_comp_greater_or_equal_back_fail_decw_pass_wrap_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_decw_comp_greater_or_equal_back_fail_decw_pass_decc_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_repl_comp_less_back_fail_zero_pass_inv_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_zero_comp_equal_back_fail_decc_pass_inv_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_repl_comp_less_back_fail_keep_pass_keep_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_incc_comp_greater_or_equal_back_fail_keep_pass_decc_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_decw_comp_greater_or_equal_back_fail_keep_pass_decw_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_keep_comp_greater_back_fail_decc_pass_repl_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_wrap_comp_equal_back_fail_incc_pass_decc_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_zero_comp_greater_or_equal_back_fail_zero_pass_zero_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_decw_comp_always_back_fail_zero_pass_keep_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_inv_comp_less_or_equal_back_fail_incc_pass_decc_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_inv_comp_greater_back_fail_decc_pass_zero_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_zero_comp_never_back_fail_repl_pass_zero_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_decw_comp_less_or_equal_back_fail_zero_pass_incc_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_decw_comp_less_or_equal_back_fail_inv_pass_decw_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_inv_comp_equal_back_fail_wrap_pass_repl_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_zero_comp_never_back_fail_incc_pass_zero_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_repl_comp_always_back_fail_decc_pass_repl_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_zero_comp_greater_or_equal_back_fail_keep_pass_keep_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_inv_comp_greater_or_equal_back_fail_wrap_pass_wrap_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_repl_comp_greater_back_fail_incc_pass_inv_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_keep_comp_never_back_fail_decc_pass_repl_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_zero_comp_greater_or_equal_back_fail_decw_pass_wrap_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_inv_comp_equal_back_fail_wrap_pass_repl_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_zero_comp_less_back_fail_zero_pass_wrap_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_decw_comp_equal_back_fail_decc_pass_inv_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_decc_comp_always_back_fail_keep_pass_keep_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_zero_comp_less_or_equal_back_fail_zero_pass_zero_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_incc_comp_less_or_equal_back_fail_incc_pass_incc_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_repl_comp_equal_back_fail_repl_pass_incc_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_zero_comp_less_back_fail_wrap_pass_incc_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_decw_comp_greater_back_fail_decc_pass_zero_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_repl_comp_not_equal_back_fail_keep_pass_wrap_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_repl_comp_less_or_equal_back_fail_decc_pass_zero_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_zero_comp_greater_or_equal_back_fail_incc_pass_keep_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_decc_comp_never_back_fail_decw_pass_decw_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_keep_comp_equal_back_fail_incc_pass_keep_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_zero_comp_greater_back_fail_repl_pass_incc_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_keep_comp_always_back_fail_repl_pass_zero_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_keep_comp_not_equal_back_fail_decw_pass_incc_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_repl_comp_always_back_fail_repl_pass_incc_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_keep_comp_less_or_equal_back_fail_inv_pass_wrap_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_incc_comp_greater_or_equal_back_fail_decc_pass_keep_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_zero_comp_greater_back_fail_wrap_pass_wrap_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_zero_comp_greater_back_fail_incc_pass_inv_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_decw_comp_always_back_fail_zero_pass_decw_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_inv_comp_less_or_equal_back_fail_zero_pass_repl_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_incc_comp_less_back_fail_inv_pass_repl_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_inv_comp_equal_back_fail_wrap_pass_incc_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_keep_comp_equal_back_fail_repl_pass_zero_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_wrap_comp_greater_or_equal_back_fail_incc_pass_wrap_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_decc_comp_less_back_fail_decw_pass_decw_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_keep_comp_always_back_fail_decw_pass_decc_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_wrap_comp_less_back_fail_keep_pass_incc_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_keep_comp_less_or_equal_back_fail_decc_pass_decc_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_decw_comp_always_back_fail_repl_pass_incc_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_wrap_comp_not_equal_back_fail_wrap_pass_zero_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_decc_comp_always_back_fail_decw_pass_decc_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_inv_comp_less_or_equal_back_fail_decc_pass_keep_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_wrap_comp_less_back_fail_repl_pass_repl_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_repl_comp_less_or_equal_back_fail_repl_pass_keep_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_zero_comp_greater_back_fail_decc_pass_decw_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_decw_comp_greater_back_fail_decw_pass_decw_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_decc_comp_never_back_fail_zero_pass_repl_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_repl_comp_always_back_fail_zero_pass_inv_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_zero_comp_not_equal_back_fail_zero_pass_decc_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_zero_comp_never_back_fail_keep_pass_zero_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_decc_comp_less_back_fail_decc_pass_keep_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_wrap_comp_always_back_fail_zero_pass_repl_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_incc_comp_greater_or_equal_back_fail_inv_pass_decw_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_incc_comp_not_equal_back_fail_incc_pass_inv_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_decc_comp_greater_or_equal_back_fail_repl_pass_incc_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_decw_comp_always_back_fail_decc_pass_zero_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_decw_comp_always_back_fail_zero_pass_inv_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_incc_comp_less_back_fail_decw_pass_zero_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_wrap_comp_less_or_equal_back_fail_repl_pass_inv_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_repl_comp_not_equal_back_fail_inv_pass_keep_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_incc_comp_not_equal_back_fail_zero_pass_decc_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_inv_comp_always_back_fail_zero_pass_keep_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_keep_comp_never_back_fail_zero_pass_decw_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_keep_comp_not_equal_back_fail_incc_pass_zero_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_wrap_comp_greater_or_equal_back_fail_wrap_pass_keep_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_wrap_comp_not_equal_back_fail_incc_pass_decc_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_decc_comp_not_equal_back_fail_decc_pass_decw_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_keep_comp_greater_or_equal_back_fail_wrap_pass_wrap_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_decw_comp_less_back_fail_decw_pass_zero_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_wrap_comp_less_back_fail_wrap_pass_repl_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_inv_comp_less_or_equal_back_fail_decc_pass_wrap_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_incc_comp_never_back_fail_repl_pass_zero_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_decw_comp_never_back_fail_inv_pass_repl_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_decc_comp_greater_or_equal_back_fail_zero_pass_keep_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_decc_comp_less_back_fail_repl_pass_decc_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_wrap_comp_less_back_fail_keep_pass_repl_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_repl_comp_never_back_fail_inv_pass_keep_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_inv_comp_equal_back_fail_repl_pass_decc_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_inv_comp_never_back_fail_repl_pass_keep_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_decw_comp_equal_back_fail_incc_pass_incc_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_decc_comp_not_equal_back_fail_decw_pass_inv_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_decc_comp_equal_back_fail_decc_pass_decw_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_incc_comp_always_back_fail_decc_pass_repl_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_decc_comp_equal_back_fail_decw_pass_zero_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_decw_comp_less_back_fail_zero_pass_repl_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_decw_comp_not_equal_back_fail_zero_pass_incc_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_repl_comp_always_back_fail_decw_pass_decc_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_zero_comp_not_equal_back_fail_wrap_pass_inv_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_decc_comp_less_back_fail_keep_pass_inv_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_incc_comp_greater_back_fail_decw_pass_decw_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_decw_comp_not_equal_back_fail_incc_pass_repl_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_incc_comp_greater_back_fail_decc_pass_zero_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_wrap_comp_greater_back_fail_decc_pass_inv_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_decw_comp_always_back_fail_decw_pass_decc_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_wrap_comp_less_back_fail_incc_pass_zero_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_inv_comp_equal_back_fail_decw_pass_keep_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_zero_comp_greater_or_equal_back_fail_wrap_pass_zero_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_repl_comp_greater_or_equal_back_fail_keep_pass_zero_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_inv_comp_not_equal_back_fail_decc_pass_decc_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_keep_comp_not_equal_back_fail_decc_pass_decc_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_wrap_comp_less_or_equal_back_fail_decw_pass_decc_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_incc_comp_less_or_equal_back_fail_zero_pass_inv_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_repl_comp_greater_or_equal_back_fail_repl_pass_zero_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_decc_comp_less_back_fail_keep_pass_keep_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_decc_comp_greater_or_equal_back_fail_wrap_pass_decw_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_decw_comp_never_back_fail_incc_pass_decc_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_incc_comp_not_equal_back_fail_wrap_pass_repl_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_inv_comp_not_equal_back_fail_wrap_pass_incc_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_repl_comp_less_or_equal_back_fail_inv_pass_zero_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_keep_comp_less_back_fail_decc_pass_repl_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_zero_comp_equal_back_fail_zero_pass_keep_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_decw_comp_less_or_equal_back_fail_decc_pass_wrap_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_decw_comp_greater_back_fail_keep_pass_zero_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_zero_comp_greater_back_fail_keep_pass_incc_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_decc_comp_always_back_fail_incc_pass_zero_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_decc_comp_greater_back_fail_inv_pass_wrap_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_keep_comp_not_equal_back_fail_repl_pass_wrap_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_incc_comp_not_equal_back_fail_decc_pass_zero_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_zero_comp_greater_back_fail_keep_pass_decc_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_inv_comp_greater_or_equal_back_fail_incc_pass_wrap_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_incc_comp_equal_back_fail_repl_pass_incc_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_decc_comp_equal_back_fail_repl_pass_repl_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_decc_comp_not_equal_back_fail_incc_pass_incc_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_inv_comp_greater_back_fail_inv_pass_zero_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_decw_comp_equal_back_fail_decw_pass_decc_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_repl_comp_less_back_fail_incc_pass_wrap_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_decc_comp_always_back_fail_repl_pass_repl_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_zero_comp_not_equal_back_fail_zero_pass_keep_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_keep_comp_greater_or_equal_back_fail_decw_pass_decw_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_incc_comp_equal_back_fail_wrap_pass_decw_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_repl_comp_always_back_fail_zero_pass_wrap_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_zero_comp_equal_back_fail_decw_pass_repl_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_repl_comp_greater_or_equal_back_fail_incc_pass_decc_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_inv_comp_less_or_equal_back_fail_decc_pass_keep_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_incc_comp_greater_or_equal_back_fail_incc_pass_repl_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_inv_comp_not_equal_back_fail_repl_pass_decc_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_decc_comp_greater_or_equal_back_fail_keep_pass_wrap_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_inv_comp_greater_back_fail_keep_pass_decc_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_inv_comp_always_back_fail_inv_pass_keep_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_decw_comp_equal_back_fail_incc_pass_wrap_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_inv_comp_never_back_fail_repl_pass_inv_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_wrap_comp_greater_or_equal_back_fail_decw_pass_decc_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_wrap_comp_greater_back_fail_wrap_pass_incc_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_keep_comp_greater_back_fail_wrap_pass_inv_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_decw_comp_equal_back_fail_zero_pass_decw_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_decc_comp_less_or_equal_back_fail_keep_pass_decw_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_decc_comp_greater_back_fail_wrap_pass_incc_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_keep_comp_greater_back_fail_wrap_pass_keep_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_decw_comp_less_back_fail_inv_pass_inv_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_repl_comp_less_or_equal_back_fail_inv_pass_zero_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_wrap_comp_never_back_fail_inv_pass_decw_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_inv_comp_always_back_fail_incc_pass_zero_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_keep_comp_greater_or_equal_back_fail_repl_pass_repl_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_inv_comp_greater_back_fail_incc_pass_keep_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_incc_comp_greater_or_equal_back_fail_keep_pass_repl_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_keep_comp_not_equal_back_fail_decc_pass_inv_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_wrap_comp_greater_back_fail_zero_pass_zero_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_inv_comp_greater_back_fail_keep_pass_incc_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_decw_comp_greater_or_equal_back_fail_decw_pass_repl_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_incc_comp_greater_or_equal_back_fail_keep_pass_zero_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_zero_comp_less_or_equal_back_fail_decw_pass_keep_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_incc_comp_greater_or_equal_back_fail_wrap_pass_zero_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_zero_comp_less_back_fail_zero_pass_zero_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_inv_comp_not_equal_back_fail_incc_pass_repl_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_keep_comp_greater_or_equal_back_fail_incc_pass_repl_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_incc_comp_less_or_equal_back_fail_incc_pass_incc_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_repl_comp_greater_back_fail_zero_pass_decc_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_incc_comp_equal_back_fail_zero_pass_decw_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_incc_comp_greater_back_fail_decw_pass_repl_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_decw_comp_always_back_fail_inv_pass_zero_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_wrap_comp_always_back_fail_inv_pass_keep_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_zero_comp_never_back_fail_decc_pass_keep_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_repl_comp_always_back_fail_wrap_pass_zero_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_incc_comp_never_back_fail_wrap_pass_repl_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_repl_comp_greater_back_fail_incc_pass_decc_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_keep_comp_greater_back_fail_zero_pass_decc_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_zero_comp_greater_back_fail_wrap_pass_decw_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_inv_comp_never_back_fail_decc_pass_keep_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_zero_comp_greater_or_equal_back_fail_decc_pass_keep_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_decc_comp_always_back_fail_incc_pass_incc_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_repl_comp_less_back_fail_keep_pass_zero_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_decw_comp_less_back_fail_wrap_pass_incc_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_decc_comp_less_or_equal_back_fail_inv_pass_wrap_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_keep_comp_never_back_fail_repl_pass_decw_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_decw_comp_less_back_fail_decw_pass_inv_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_decw_comp_never_back_fail_inv_pass_decc_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_repl_comp_equal_back_fail_keep_pass_decw_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_inv_comp_always_back_fail_decc_pass_wrap_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_zero_comp_equal_back_fail_inv_pass_decw_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_zero_comp_greater_or_equal_back_fail_keep_pass_inv_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_decw_comp_greater_back_fail_decc_pass_decw_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_wrap_comp_less_back_fail_wrap_pass_incc_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_keep_comp_less_back_fail_wrap_pass_zero_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_decw_comp_greater_back_fail_zero_pass_incc_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_incc_comp_less_back_fail_zero_pass_inv_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_wrap_comp_less_or_equal_back_fail_zero_pass_incc_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_zero_comp_always_back_fail_inv_pass_zero_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_wrap_comp_not_equal_back_fail_decw_pass_decw_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_decc_comp_not_equal_back_fail_zero_pass_wrap_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_decc_comp_greater_back_fail_decw_pass_decc_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_decw_comp_equal_back_fail_keep_pass_incc_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_inv_comp_always_back_fail_incc_pass_decc_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_decw_comp_always_back_fail_zero_pass_incc_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_decw_comp_greater_or_equal_back_fail_zero_pass_decc_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_keep_comp_always_back_fail_repl_pass_wrap_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_repl_comp_never_back_fail_wrap_pass_incc_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_wrap_comp_greater_back_fail_decc_pass_zero_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_inv_comp_never_back_fail_repl_pass_wrap_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_repl_comp_less_or_equal_back_fail_incc_pass_decw_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_decw_comp_greater_or_equal_back_fail_incc_pass_repl_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_decw_comp_not_equal_back_fail_inv_pass_incc_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_decw_comp_equal_back_fail_keep_pass_incc_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_incc_comp_equal_back_fail_keep_pass_zero_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_decc_comp_equal_back_fail_decc_pass_keep_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_repl_comp_greater_or_equal_back_fail_keep_pass_inv_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_zero_comp_never_back_fail_inv_pass_incc_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_inv_comp_greater_or_equal_back_fail_wrap_pass_keep_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_wrap_comp_always_back_fail_inv_pass_incc_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_zero_comp_greater_or_equal_back_fail_decc_pass_wrap_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_decc_comp_equal_back_fail_decc_pass_zero_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_decw_comp_not_equal_back_fail_incc_pass_keep_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_decw_comp_less_back_fail_repl_pass_zero_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_repl_comp_equal_back_fail_inv_pass_keep_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_inv_comp_greater_back_fail_zero_pass_keep_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_zero_comp_less_back_fail_decw_pass_wrap_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_repl_comp_not_equal_back_fail_wrap_pass_inv_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_incc_comp_greater_or_equal_back_fail_inv_pass_incc_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_repl_comp_less_or_equal_back_fail_decc_pass_decw_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_inv_comp_always_back_fail_decc_pass_wrap_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_incc_comp_equal_back_fail_incc_pass_incc_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_incc_comp_less_or_equal_back_fail_decc_pass_zero_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_wrap_comp_always_back_fail_decw_pass_decw_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_decw_comp_less_or_equal_back_fail_keep_pass_inv_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_decc_comp_always_back_fail_wrap_pass_inv_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_repl_comp_less_back_fail_incc_pass_decw_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_decc_comp_greater_back_fail_repl_pass_decc_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_keep_comp_equal_back_fail_wrap_pass_decw_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_repl_comp_less_back_fail_wrap_pass_decw_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_decw_comp_greater_or_equal_back_fail_zero_pass_incc_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_inv_comp_always_back_fail_wrap_pass_inv_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_decc_comp_greater_or_equal_back_fail_incc_pass_decw_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_decw_comp_less_back_fail_incc_pass_inv_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_wrap_comp_always_back_fail_decw_pass_decc_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_incc_comp_greater_back_fail_decw_pass_incc_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_inv_comp_less_back_fail_inv_pass_keep_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_wrap_comp_greater_or_equal_back_fail_wrap_pass_incc_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_wrap_comp_always_back_fail_inv_pass_keep_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_incc_comp_never_back_fail_wrap_pass_incc_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_decw_comp_equal_back_fail_repl_pass_decc_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_wrap_comp_less_back_fail_decc_pass_decw_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_keep_comp_less_or_equal_back_fail_decc_pass_keep_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_keep_comp_greater_or_equal_back_fail_incc_pass_decw_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_incc_comp_never_back_fail_repl_pass_zero_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_zero_comp_less_back_fail_decw_pass_wrap_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_keep_comp_greater_or_equal_back_fail_inv_pass_zero_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_wrap_comp_not_equal_back_fail_inv_pass_inv_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_decc_comp_always_back_fail_incc_pass_repl_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_keep_comp_equal_back_fail_incc_pass_decc_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_wrap_comp_equal_back_fail_repl_pass_decc_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_keep_comp_always_back_fail_decw_pass_keep_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_decc_comp_greater_or_equal_back_fail_inv_pass_decw_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_keep_comp_less_back_fail_repl_pass_decw_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_decc_comp_equal_back_fail_decw_pass_decc_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_incc_comp_never_back_fail_keep_pass_decw_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_incc_comp_never_back_fail_zero_pass_incc_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_decc_comp_greater_or_equal_back_fail_wrap_pass_inv_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_incc_comp_equal_back_fail_decw_pass_incc_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_decc_comp_less_or_equal_back_fail_repl_pass_keep_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_keep_comp_not_equal_back_fail_decc_pass_zero_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_decc_comp_not_equal_back_fail_decw_pass_inv_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_decc_comp_not_equal_back_fail_repl_pass_decc_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_keep_comp_less_back_fail_inv_pass_repl_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_zero_comp_greater_back_fail_keep_pass_keep_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_decw_comp_equal_back_fail_incc_pass_keep_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_inv_comp_less_back_fail_keep_pass_repl_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_wrap_comp_always_back_fail_incc_pass_repl_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_incc_comp_never_back_fail_wrap_pass_zero_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_inv_comp_never_back_fail_decw_pass_repl_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_keep_comp_less_back_fail_repl_pass_zero_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_wrap_comp_not_equal_back_fail_repl_pass_inv_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_decw_comp_equal_back_fail_zero_pass_incc_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_inv_comp_equal_back_fail_incc_pass_incc_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_wrap_comp_always_back_fail_keep_pass_keep_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_inv_comp_less_or_equal_back_fail_zero_pass_decc_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_decw_comp_equal_back_fail_inv_pass_inv_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_decc_comp_never_back_fail_decc_pass_decc_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_wrap_comp_less_or_equal_back_fail_wrap_pass_repl_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_inv_comp_less_back_fail_repl_pass_decc_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_incc_comp_less_back_fail_incc_pass_incc_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_decw_comp_greater_back_fail_zero_pass_keep_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_keep_comp_greater_or_equal_back_fail_decc_pass_zero_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_inv_comp_less_back_fail_repl_pass_incc_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_decw_comp_less_or_equal_back_fail_repl_pass_repl_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_zero_comp_greater_back_fail_decc_pass_decw_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_decc_comp_greater_or_equal_back_fail_inv_pass_decc_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_decc_comp_greater_back_fail_wrap_pass_incc_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_repl_comp_greater_or_equal_back_fail_zero_pass_decw_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_decc_comp_less_or_equal_back_fail_decw_pass_inv_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_repl_comp_less_back_fail_zero_pass_repl_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_inv_comp_greater_back_fail_zero_pass_decw_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_decc_comp_greater_or_equal_back_fail_incc_pass_zero_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_decc_comp_not_equal_back_fail_zero_pass_inv_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_inv_comp_less_or_equal_back_fail_keep_pass_decc_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_repl_comp_less_or_equal_back_fail_repl_pass_decw_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_decw_comp_less_or_equal_back_fail_decc_pass_incc_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_zero_comp_never_back_fail_inv_pass_incc_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_decc_comp_equal_back_fail_wrap_pass_wrap_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_zero_comp_less_or_equal_back_fail_incc_pass_decc_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_zero_comp_equal_back_fail_wrap_pass_decw_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_inv_comp_less_or_equal_back_fail_inv_pass_zero_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_zero_comp_never_back_fail_keep_pass_incc_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_inv_comp_always_back_fail_decw_pass_incc_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_inv_comp_equal_back_fail_keep_pass_inv_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_zero_comp_always_back_fail_decw_pass_zero_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_inv_comp_greater_back_fail_decw_pass_repl_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_zero_comp_not_equal_back_fail_decw_pass_zero_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_repl_comp_greater_or_equal_back_fail_repl_pass_wrap_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_decw_comp_less_back_fail_incc_pass_zero_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_keep_comp_less_or_equal_back_fail_repl_pass_keep_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_incc_comp_not_equal_back_fail_wrap_pass_wrap_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_repl_comp_always_back_fail_repl_pass_decw_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_repl_comp_not_equal_back_fail_decw_pass_decc_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_decc_comp_less_back_fail_incc_pass_repl_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_decc_comp_not_equal_back_fail_zero_pass_zero_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_decc_comp_greater_back_fail_repl_pass_keep_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_decc_comp_equal_back_fail_inv_pass_decw_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_zero_comp_never_back_fail_repl_pass_inv_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_keep_comp_always_back_fail_decw_pass_decc_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_decw_comp_greater_back_fail_decw_pass_inv_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_inv_comp_equal_back_fail_decc_pass_wrap_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_keep_comp_less_or_equal_back_fail_inv_pass_wrap_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_wrap_comp_not_equal_back_fail_repl_pass_repl_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_incc_comp_greater_back_fail_keep_pass_keep_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_repl_comp_greater_back_fail_inv_pass_repl_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_keep_comp_greater_back_fail_incc_pass_decc_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_repl_comp_equal_back_fail_wrap_pass_zero_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_decw_comp_never_back_fail_decw_pass_wrap_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_inv_comp_always_back_fail_decw_pass_repl_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_repl_comp_greater_back_fail_decw_pass_incc_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_keep_comp_equal_back_fail_wrap_pass_zero_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_incc_comp_less_or_equal_back_fail_incc_pass_decw_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_wrap_comp_never_back_fail_inv_pass_decw_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_wrap_comp_always_back_fail_inv_pass_wrap_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_keep_comp_less_or_equal_back_fail_wrap_pass_repl_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_zero_comp_always_back_fail_decw_pass_repl_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_keep_comp_equal_back_fail_zero_pass_keep_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_repl_comp_greater_back_fail_decc_pass_incc_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_decc_comp_never_back_fail_decc_pass_wrap_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_decw_comp_greater_back_fail_incc_pass_decw_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_wrap_comp_never_back_fail_wrap_pass_keep_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_inv_comp_not_equal_back_fail_wrap_pass_wrap_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_repl_comp_never_back_fail_keep_pass_inv_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_inv_comp_less_or_equal_back_fail_decc_pass_inv_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_incc_comp_less_or_equal_back_fail_repl_pass_keep_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_zero_comp_equal_back_fail_decc_pass_decc_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_keep_comp_greater_or_equal_back_fail_decc_pass_keep_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_decc_comp_greater_back_fail_repl_pass_decc_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_wrap_comp_never_back_fail_keep_pass_decw_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_inv_comp_less_back_fail_keep_pass_keep_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_inv_comp_greater_back_fail_inv_pass_zero_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_repl_comp_never_back_fail_inv_pass_inv_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_repl_comp_equal_back_fail_repl_pass_zero_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_repl_comp_less_or_equal_back_fail_repl_pass_wrap_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_zero_comp_equal_back_fail_wrap_pass_keep_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_inv_comp_less_or_equal_back_fail_decc_pass_incc_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_zero_comp_never_back_fail_zero_pass_wrap_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_decw_comp_less_or_equal_back_fail_decw_pass_inv_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_repl_comp_equal_back_fail_incc_pass_inv_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_wrap_comp_less_back_fail_zero_pass_wrap_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_repl_comp_never_back_fail_decc_pass_zero_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_wrap_comp_less_or_equal_back_fail_decw_pass_zero_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_incc_comp_less_or_equal_back_fail_incc_pass_keep_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_decc_comp_always_back_fail_zero_pass_zero_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_zero_comp_less_back_fail_repl_pass_decc_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_decc_comp_greater_or_equal_back_fail_wrap_pass_zero_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_decc_comp_less_back_fail_decw_pass_repl_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_repl_comp_always_back_fail_decc_pass_keep_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_incc_comp_never_back_fail_incc_pass_repl_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_zero_comp_equal_back_fail_keep_pass_incc_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_repl_comp_greater_or_equal_back_fail_keep_pass_repl_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_inv_comp_equal_back_fail_inv_pass_wrap_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_zero_comp_less_back_fail_zero_pass_repl_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_incc_comp_greater_or_equal_back_fail_wrap_pass_incc_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_keep_comp_greater_or_equal_back_fail_decc_pass_keep_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_decc_comp_greater_or_equal_back_fail_decc_pass_zero_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_decw_comp_always_back_fail_repl_pass_incc_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_incc_comp_never_back_fail_repl_pass_incc_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_repl_comp_always_back_fail_wrap_pass_incc_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_wrap_comp_never_back_fail_repl_pass_decw_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_keep_comp_never_back_fail_decw_pass_repl_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_decc_comp_greater_or_equal_back_fail_keep_pass_decw_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_zero_comp_less_or_equal_back_fail_inv_pass_repl_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_inv_comp_greater_or_equal_back_fail_decw_pass_keep_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_inv_comp_greater_or_equal_back_fail_keep_pass_wrap_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_repl_comp_greater_or_equal_back_fail_inv_pass_keep_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_zero_comp_always_back_fail_keep_pass_incc_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_zero_comp_greater_back_fail_zero_pass_repl_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_decw_comp_equal_back_fail_zero_pass_repl_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_keep_comp_greater_or_equal_back_fail_decc_pass_wrap_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_decc_comp_not_equal_back_fail_decw_pass_wrap_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_repl_comp_greater_or_equal_back_fail_wrap_pass_repl_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_incc_comp_greater_back_fail_repl_pass_decc_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_keep_comp_equal_back_fail_keep_pass_wrap_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_incc_comp_greater_back_fail_repl_pass_keep_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_wrap_comp_less_or_equal_back_fail_decc_pass_incc_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_wrap_comp_less_or_equal_back_fail_keep_pass_decc_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_inv_comp_greater_or_equal_back_fail_keep_pass_wrap_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_inv_comp_less_back_fail_incc_pass_repl_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_repl_comp_not_equal_back_fail_repl_pass_inv_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_zero_comp_greater_or_equal_back_fail_zero_pass_incc_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_inv_comp_less_back_fail_repl_pass_keep_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_incc_comp_greater_back_fail_wrap_pass_decc_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_inv_comp_always_back_fail_inv_pass_inv_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_keep_comp_greater_or_equal_back_fail_decc_pass_repl_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_decc_comp_equal_back_fail_decw_pass_decc_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_inv_comp_greater_or_equal_back_fail_decw_pass_incc_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_incc_comp_not_equal_back_fail_decw_pass_keep_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_decc_comp_greater_back_fail_incc_pass_zero_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_wrap_comp_greater_back_fail_zero_pass_keep_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_decw_comp_less_or_equal_back_fail_decw_pass_repl_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_decw_comp_never_back_fail_zero_pass_decw_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_incc_comp_greater_or_equal_back_fail_inv_pass_wrap_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_keep_comp_less_back_fail_wrap_pass_repl_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_incc_comp_greater_or_equal_back_fail_decw_pass_repl_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_wrap_comp_not_equal_back_fail_repl_pass_keep_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_inv_comp_always_back_fail_decc_pass_incc_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_wrap_comp_equal_back_fail_zero_pass_keep_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_repl_comp_greater_back_fail_inv_pass_wrap_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_decw_comp_equal_back_fail_decw_pass_wrap_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_incc_comp_greater_or_equal_back_fail_incc_pass_inv_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_decw_comp_greater_or_equal_back_fail_incc_pass_repl_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_repl_comp_not_equal_back_fail_inv_pass_inv_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_incc_comp_always_back_fail_inv_pass_wrap_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_keep_comp_greater_or_equal_back_fail_decc_pass_decw_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_incc_comp_always_back_fail_decc_pass_keep_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_zero_comp_less_back_fail_wrap_pass_repl_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_wrap_comp_greater_or_equal_back_fail_keep_pass_incc_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_decw_comp_greater_or_equal_back_fail_repl_pass_zero_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_inv_comp_less_back_fail_decc_pass_wrap_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_repl_comp_less_back_fail_repl_pass_decc_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_decc_comp_less_back_fail_inv_pass_keep_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_incc_comp_always_back_fail_zero_pass_wrap_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_zero_comp_greater_back_fail_zero_pass_wrap_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_wrap_comp_always_back_fail_keep_pass_wrap_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_inv_comp_not_equal_back_fail_wrap_pass_wrap_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_keep_comp_less_back_fail_inv_pass_repl_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_keep_comp_less_or_equal_back_fail_decw_pass_keep_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_decc_comp_not_equal_back_fail_keep_pass_inv_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_decc_comp_equal_back_fail_zero_pass_decw_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_repl_comp_not_equal_back_fail_wrap_pass_repl_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_decw_comp_less_or_equal_back_fail_inv_pass_inv_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_decc_comp_greater_back_fail_decw_pass_keep_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_inv_comp_never_back_fail_decw_pass_inv_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_repl_comp_not_equal_back_fail_keep_pass_wrap_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_keep_comp_always_back_fail_inv_pass_keep_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_decw_comp_not_equal_back_fail_decc_pass_decc_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_repl_comp_less_or_equal_back_fail_repl_pass_wrap_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_zero_comp_less_or_equal_back_fail_decw_pass_decc_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_inv_comp_never_back_fail_decc_pass_decw_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_decw_comp_less_or_equal_back_fail_inv_pass_decw_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_zero_comp_less_or_equal_back_fail_zero_pass_repl_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_wrap_comp_always_back_fail_keep_pass_decw_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_incc_comp_greater_or_equal_back_fail_wrap_pass_inv_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_zero_comp_less_or_equal_back_fail_wrap_pass_decw_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_repl_comp_always_back_fail_keep_pass_wrap_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_repl_comp_less_or_equal_back_fail_zero_pass_zero_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_decw_comp_never_back_fail_inv_pass_zero_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_wrap_comp_less_or_equal_back_fail_incc_pass_repl_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_repl_comp_always_back_fail_decc_pass_zero_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_zero_comp_less_back_fail_repl_pass_decc_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_wrap_comp_greater_back_fail_wrap_pass_decw_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_decc_comp_not_equal_back_fail_decw_pass_wrap_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_decw_comp_always_back_fail_keep_pass_keep_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_repl_comp_not_equal_back_fail_wrap_pass_keep_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_inv_comp_not_equal_back_fail_zero_pass_keep_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_wrap_comp_greater_or_equal_back_fail_decc_pass_decw_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_repl_comp_less_or_equal_back_fail_decw_pass_keep_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_wrap_comp_less_back_fail_decc_pass_zero_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_decw_comp_never_back_fail_incc_pass_incc_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_decc_comp_greater_back_fail_repl_pass_incc_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_decc_comp_not_equal_back_fail_wrap_pass_incc_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_repl_comp_greater_or_equal_back_fail_inv_pass_incc_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_inv_comp_greater_or_equal_back_fail_repl_pass_repl_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_repl_comp_never_back_fail_decw_pass_decc_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_wrap_comp_less_back_fail_keep_pass_inv_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_incc_comp_greater_or_equal_back_fail_wrap_pass_repl_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_wrap_comp_less_back_fail_inv_pass_decc_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_inv_comp_not_equal_back_fail_repl_pass_decw_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_wrap_comp_greater_back_fail_wrap_pass_zero_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_keep_comp_less_back_fail_decc_pass_keep_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_keep_comp_always_back_fail_decw_pass_inv_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_inv_comp_greater_back_fail_incc_pass_decw_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_incc_comp_less_back_fail_wrap_pass_incc_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_repl_comp_not_equal_back_fail_keep_pass_repl_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_wrap_comp_less_or_equal_back_fail_repl_pass_decw_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_keep_comp_equal_back_fail_zero_pass_keep_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_wrap_comp_less_or_equal_back_fail_decc_pass_decw_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_decc_comp_always_back_fail_inv_pass_inv_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_repl_comp_greater_or_equal_back_fail_repl_pass_inv_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_decw_comp_not_equal_back_fail_decc_pass_zero_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_keep_comp_greater_or_equal_back_fail_wrap_pass_repl_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_inv_comp_less_back_fail_keep_pass_inv_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_inv_comp_never_back_fail_decw_pass_decw_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_incc_comp_less_back_fail_decw_pass_decw_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_incc_comp_greater_back_fail_inv_pass_keep_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_wrap_comp_less_back_fail_repl_pass_keep_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_decw_comp_not_equal_back_fail_decc_pass_repl_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_incc_comp_greater_back_fail_repl_pass_repl_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_decw_comp_equal_back_fail_decw_pass_inv_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_decc_comp_less_back_fail_zero_pass_zero_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_decc_comp_not_equal_back_fail_decw_pass_incc_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_decw_comp_less_or_equal_back_fail_inv_pass_keep_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_decw_comp_not_equal_back_fail_keep_pass_decc_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_inv_comp_never_back_fail_decc_pass_repl_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_repl_comp_not_equal_back_fail_repl_pass_wrap_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_decc_comp_never_back_fail_zero_pass_inv_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_incc_comp_less_back_fail_incc_pass_decc_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_decc_comp_not_equal_back_fail_keep_pass_incc_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_inv_comp_never_back_fail_wrap_pass_incc_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_incc_comp_greater_back_fail_keep_pass_incc_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_keep_comp_equal_back_fail_keep_pass_zero_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_zero_comp_less_back_fail_decc_pass_inv_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_inv_comp_less_or_equal_back_fail_zero_pass_keep_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_zero_comp_never_back_fail_decw_pass_decc_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_keep_comp_always_back_fail_decw_pass_zero_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_repl_comp_less_or_equal_back_fail_zero_pass_inv_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_decw_comp_greater_back_fail_repl_pass_repl_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_incc_comp_never_back_fail_inv_pass_incc_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_keep_comp_not_equal_back_fail_zero_pass_decc_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_inv_comp_equal_back_fail_incc_pass_wrap_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_decw_comp_less_or_equal_back_fail_wrap_pass_incc_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_wrap_comp_equal_back_fail_keep_pass_incc_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_decc_comp_less_back_fail_decc_pass_zero_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_incc_comp_not_equal_back_fail_keep_pass_incc_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_keep_comp_greater_back_fail_repl_pass_repl_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_decw_comp_always_back_fail_zero_pass_zero_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_keep_comp_not_equal_back_fail_repl_pass_inv_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_keep_comp_less_back_fail_wrap_pass_decc_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_decw_comp_greater_back_fail_decc_pass_inv_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_keep_comp_less_back_fail_decc_pass_decc_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_inv_comp_never_back_fail_wrap_pass_repl_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_decw_comp_never_back_fail_wrap_pass_decw_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_repl_comp_always_back_fail_decc_pass_keep_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_keep_comp_less_back_fail_inv_pass_keep_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_inv_comp_not_equal_back_fail_inv_pass_decc_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_zero_comp_greater_or_equal_back_fail_repl_pass_repl_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_keep_comp_always_back_fail_zero_pass_repl_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_repl_comp_less_back_fail_inv_pass_decc_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_decw_comp_greater_back_fail_inv_pass_incc_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_zero_comp_never_back_fail_repl_pass_inv_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_zero_comp_less_or_equal_back_fail_repl_pass_decc_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_keep_comp_always_back_fail_keep_pass_zero_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_decw_comp_always_back_fail_incc_pass_decc_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_keep_comp_not_equal_back_fail_decc_pass_decw_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_zero_comp_less_or_equal_back_fail_inv_pass_repl_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_repl_comp_less_or_equal_back_fail_repl_pass_keep_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_keep_comp_less_back_fail_keep_pass_zero_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_incc_comp_greater_or_equal_back_fail_incc_pass_wrap_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_incc_comp_less_or_equal_back_fail_decc_pass_wrap_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_repl_comp_less_back_fail_wrap_pass_wrap_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_decw_comp_never_back_fail_decc_pass_incc_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_incc_comp_greater_back_fail_zero_pass_wrap_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_incc_comp_less_back_fail_keep_pass_incc_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_decc_comp_equal_back_fail_wrap_pass_decw_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_decw_comp_not_equal_back_fail_decw_pass_decw_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_wrap_comp_equal_back_fail_inv_pass_zero_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_repl_comp_always_back_fail_repl_pass_wrap_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_decc_comp_equal_back_fail_inv_pass_zero_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_decw_comp_always_back_fail_decc_pass_decc_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_decc_comp_not_equal_back_fail_incc_pass_decw_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_zero_comp_less_back_fail_keep_pass_decw_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_decc_comp_greater_or_equal_back_fail_wrap_pass_repl_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_decc_comp_greater_or_equal_back_fail_repl_pass_inv_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_inv_comp_less_back_fail_decc_pass_incc_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_incc_comp_never_back_fail_keep_pass_incc_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_incc_comp_greater_or_equal_back_fail_incc_pass_keep_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_decc_comp_less_back_fail_wrap_pass_incc_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_keep_comp_greater_back_fail_keep_pass_inv_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_keep_comp_never_back_fail_keep_pass_inv_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_inv_comp_equal_back_fail_repl_pass_zero_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_incc_comp_greater_or_equal_back_fail_repl_pass_incc_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_zero_comp_less_back_fail_zero_pass_repl_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_incc_comp_not_equal_back_fail_decc_pass_incc_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_repl_comp_equal_back_fail_zero_pass_zero_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_decw_comp_greater_back_fail_wrap_pass_decw_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_zero_comp_greater_back_fail_decw_pass_repl_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_keep_comp_greater_or_equal_back_fail_wrap_pass_keep_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_inv_comp_never_back_fail_incc_pass_inv_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_decw_comp_always_back_fail_decw_pass_repl_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_wrap_comp_less_or_equal_back_fail_decw_pass_repl_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_decw_comp_not_equal_back_fail_decw_pass_decw_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_repl_comp_less_back_fail_repl_pass_keep_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_decw_comp_greater_back_fail_keep_pass_keep_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_repl_comp_never_back_fail_incc_pass_decc_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_incc_comp_not_equal_back_fail_inv_pass_decw_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_repl_comp_equal_back_fail_incc_pass_incc_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_wrap_comp_greater_or_equal_back_fail_decw_pass_decc_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_zero_comp_less_or_equal_back_fail_keep_pass_inv_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_decw_comp_never_back_fail_repl_pass_zero_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_decc_comp_greater_or_equal_back_fail_incc_pass_wrap_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_decc_comp_greater_back_fail_incc_pass_incc_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_wrap_comp_greater_back_fail_incc_pass_zero_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_decw_comp_greater_or_equal_back_fail_wrap_pass_repl_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_inv_comp_not_equal_back_fail_wrap_pass_wrap_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_wrap_comp_less_or_equal_back_fail_wrap_pass_repl_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_zero_comp_always_back_fail_decc_pass_wrap_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_incc_comp_equal_back_fail_wrap_pass_zero_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_incc_comp_less_back_fail_inv_pass_zero_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_zero_comp_never_back_fail_keep_pass_wrap_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_decw_comp_not_equal_back_fail_inv_pass_incc_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_zero_comp_less_back_fail_decw_pass_incc_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_incc_comp_always_back_fail_inv_pass_incc_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_inv_comp_greater_back_fail_incc_pass_keep_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_decw_comp_less_or_equal_back_fail_keep_pass_decc_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_zero_comp_always_back_fail_zero_pass_decc_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_decc_comp_less_or_equal_back_fail_inv_pass_decc_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_wrap_comp_always_back_fail_inv_pass_inv_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_inv_comp_equal_back_fail_incc_pass_keep_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_zero_comp_always_back_fail_incc_pass_incc_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_keep_comp_not_equal_back_fail_keep_pass_keep_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_incc_comp_not_equal_back_fail_inv_pass_inv_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_incc_comp_less_or_equal_back_fail_repl_pass_wrap_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_decc_comp_not_equal_back_fail_decc_pass_repl_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_inv_comp_never_back_fail_decw_pass_keep_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_inv_comp_always_back_fail_keep_pass_zero_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_wrap_comp_not_equal_back_fail_decc_pass_wrap_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_wrap_comp_always_back_fail_incc_pass_keep_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_wrap_comp_less_or_equal_back_fail_keep_pass_repl_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_zero_comp_always_back_fail_keep_pass_decw_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_inv_comp_greater_or_equal_back_fail_incc_pass_decw_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_inv_comp_equal_back_fail_zero_pass_repl_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_repl_comp_not_equal_back_fail_incc_pass_decc_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_wrap_comp_equal_back_fail_inv_pass_zero_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_keep_comp_not_equal_back_fail_keep_pass_wrap_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_incc_comp_greater_or_equal_back_fail_decc_pass_inv_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_repl_comp_equal_back_fail_keep_pass_repl_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_repl_comp_never_back_fail_wrap_pass_inv_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_inv_comp_less_or_equal_back_fail_wrap_pass_decw_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_decc_comp_equal_back_fail_incc_pass_wrap_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_decw_comp_always_back_fail_inv_pass_decw_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_inv_comp_greater_back_fail_wrap_pass_decw_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_zero_comp_not_equal_back_fail_zero_pass_inv_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_zero_comp_always_back_fail_decw_pass_repl_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_incc_comp_equal_back_fail_wrap_pass_wrap_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_zero_comp_always_back_fail_zero_pass_decc_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_inv_comp_always_back_fail_repl_pass_decc_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_incc_comp_always_back_fail_inv_pass_wrap_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_decc_comp_equal_back_fail_keep_pass_decw_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_decw_comp_greater_or_equal_back_fail_zero_pass_inv_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_keep_comp_greater_back_fail_incc_pass_inv_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_decc_comp_not_equal_back_fail_inv_pass_zero_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_keep_comp_less_or_equal_back_fail_incc_pass_keep_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_incc_comp_equal_back_fail_keep_pass_decw_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_zero_comp_never_back_fail_wrap_pass_wrap_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_decw_comp_never_back_fail_wrap_pass_decw_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_zero_comp_equal_back_fail_decw_pass_zero_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_decw_comp_never_back_fail_incc_pass_incc_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_decc_comp_less_or_equal_back_fail_zero_pass_incc_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_wrap_comp_greater_back_fail_keep_pass_decw_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_keep_comp_always_back_fail_decw_pass_keep_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_decc_comp_equal_back_fail_keep_pass_keep_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_decc_comp_never_back_fail_keep_pass_repl_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_incc_comp_not_equal_back_fail_inv_pass_decc_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_decw_comp_greater_back_fail_keep_pass_keep_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_repl_comp_less_or_equal_back_fail_incc_pass_zero_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_inv_comp_greater_or_equal_back_fail_incc_pass_incc_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_inv_comp_equal_back_fail_keep_pass_decc_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_inv_comp_always_back_fail_decc_pass_repl_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_incc_comp_less_or_equal_back_fail_inv_pass_decc_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_inv_comp_less_back_fail_decw_pass_decc_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_keep_comp_greater_or_equal_back_fail_inv_pass_decc_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_inv_comp_greater_or_equal_back_fail_repl_pass_keep_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_zero_comp_greater_or_equal_back_fail_wrap_pass_zero_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_zero_comp_always_back_fail_inv_pass_incc_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_repl_comp_less_back_fail_keep_pass_decw_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_wrap_comp_equal_back_fail_wrap_pass_zero_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_decw_comp_less_or_equal_back_fail_keep_pass_decw_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_incc_comp_less_back_fail_inv_pass_zero_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_inv_comp_greater_back_fail_wrap_pass_keep_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_zero_comp_equal_back_fail_incc_pass_keep_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_decc_comp_less_or_equal_back_fail_zero_pass_wrap_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_inv_comp_never_back_fail_wrap_pass_wrap_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_decc_comp_less_back_fail_decw_pass_zero_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_decw_comp_not_equal_back_fail_keep_pass_wrap_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_decw_comp_never_back_fail_zero_pass_inv_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_repl_comp_not_equal_back_fail_decc_pass_decc_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_decw_comp_equal_back_fail_wrap_pass_decw_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_decc_comp_not_equal_back_fail_zero_pass_keep_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_wrap_comp_equal_back_fail_repl_pass_repl_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_wrap_comp_less_or_equal_back_fail_decc_pass_incc_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_zero_comp_always_back_fail_zero_pass_decw_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_incc_comp_less_back_fail_decc_pass_incc_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_zero_comp_less_or_equal_back_fail_decw_pass_decc_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_decw_comp_greater_or_equal_back_fail_decc_pass_incc_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_decw_comp_greater_back_fail_repl_pass_keep_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_repl_comp_never_back_fail_decw_pass_keep_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_keep_comp_equal_back_fail_decc_pass_keep_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_zero_comp_greater_back_fail_zero_pass_repl_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_decw_comp_greater_or_equal_back_fail_zero_pass_incc_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_incc_comp_equal_back_fail_incc_pass_decw_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_inv_comp_equal_back_fail_incc_pass_decw_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_wrap_comp_not_equal_back_fail_incc_pass_repl_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_inv_comp_never_back_fail_inv_pass_wrap_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_wrap_comp_greater_back_fail_zero_pass_wrap_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_inv_comp_greater_back_fail_decc_pass_decc_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_repl_comp_never_back_fail_keep_pass_incc_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_wrap_comp_equal_back_fail_inv_pass_wrap_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_zero_comp_always_back_fail_decc_pass_decw_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_decc_comp_less_or_equal_back_fail_decc_pass_inv_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_decc_comp_always_back_fail_inv_pass_repl_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_zero_comp_greater_back_fail_inv_pass_keep_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_incc_comp_always_back_fail_keep_pass_repl_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_wrap_comp_not_equal_back_fail_zero_pass_incc_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_keep_comp_less_back_fail_wrap_pass_wrap_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_zero_comp_greater_back_fail_repl_pass_decc_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_decc_comp_equal_back_fail_zero_pass_wrap_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_repl_comp_less_back_fail_decw_pass_repl_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_wrap_comp_greater_back_fail_keep_pass_zero_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_incc_comp_greater_back_fail_keep_pass_keep_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_decc_comp_greater_back_fail_wrap_pass_keep_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_decw_comp_always_back_fail_decc_pass_incc_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_decc_comp_never_back_fail_wrap_pass_inv_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_decw_comp_equal_back_fail_decw_pass_repl_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_keep_comp_equal_back_fail_zero_pass_incc_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_repl_comp_less_or_equal_back_fail_decw_pass_wrap_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_keep_comp_greater_back_fail_zero_pass_repl_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_decc_comp_greater_or_equal_back_fail_wrap_pass_decc_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_wrap_comp_less_or_equal_back_fail_repl_pass_wrap_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_repl_comp_equal_back_fail_incc_pass_incc_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_wrap_comp_greater_back_fail_keep_pass_incc_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_zero_comp_never_back_fail_incc_pass_decc_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_keep_comp_never_back_fail_repl_pass_keep_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_wrap_comp_less_or_equal_back_fail_incc_pass_incc_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_decc_comp_always_back_fail_incc_pass_wrap_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_wrap_comp_never_back_fail_decw_pass_wrap_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_keep_comp_greater_back_fail_decc_pass_wrap_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_decc_comp_greater_back_fail_decw_pass_decw_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_zero_comp_less_back_fail_zero_pass_inv_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_zero_comp_less_or_equal_back_fail_inv_pass_decw_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_incc_comp_less_or_equal_back_fail_incc_pass_inv_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_inv_comp_not_equal_back_fail_incc_pass_decw_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_repl_comp_always_back_fail_keep_pass_incc_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_keep_comp_equal_back_fail_incc_pass_zero_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_inv_comp_less_back_fail_inv_pass_decc_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_decw_comp_always_back_fail_wrap_pass_inv_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_keep_comp_always_back_fail_decc_pass_incc_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_decc_comp_less_back_fail_repl_pass_zero_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_repl_comp_not_equal_back_fail_keep_pass_zero_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_repl_comp_less_or_equal_back_fail_decc_pass_keep_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_decc_comp_not_equal_back_fail_keep_pass_wrap_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_decw_comp_less_or_equal_back_fail_repl_pass_incc_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_wrap_comp_equal_back_fail_incc_pass_zero_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_decc_comp_never_back_fail_decw_pass_wrap_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_decc_comp_always_back_fail_repl_pass_decc_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_decw_comp_not_equal_back_fail_keep_pass_inv_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_incc_comp_less_or_equal_back_fail_wrap_pass_inv_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_keep_comp_not_equal_back_fail_decc_pass_inv_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_inv_comp_not_equal_back_fail_wrap_pass_decw_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_repl_comp_less_or_equal_back_fail_incc_pass_inv_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_repl_comp_greater_back_fail_zero_pass_decc_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_decc_comp_equal_back_fail_decc_pass_inv_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_incc_comp_greater_back_fail_inv_pass_repl_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_wrap_comp_less_or_equal_back_fail_incc_pass_keep_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_wrap_comp_greater_back_fail_keep_pass_repl_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_wrap_comp_less_back_fail_keep_pass_inv_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_keep_comp_greater_back_fail_decw_pass_inv_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_decw_comp_not_equal_back_fail_inv_pass_incc_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_keep_comp_greater_or_equal_back_fail_zero_pass_repl_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_keep_comp_greater_back_fail_incc_pass_zero_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_decc_comp_never_back_fail_decc_pass_incc_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_repl_comp_not_equal_back_fail_repl_pass_repl_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_repl_comp_greater_back_fail_repl_pass_wrap_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_keep_comp_never_back_fail_inv_pass_wrap_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_decc_comp_greater_back_fail_zero_pass_inv_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_inv_comp_not_equal_back_fail_inv_pass_incc_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_decc_comp_greater_or_equal_back_fail_decc_pass_incc_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_incc_comp_less_back_fail_wrap_pass_wrap_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_keep_comp_less_back_fail_decc_pass_incc_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_incc_comp_greater_back_fail_incc_pass_decc_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_repl_comp_greater_or_equal_back_fail_decw_pass_zero_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_incc_comp_not_equal_back_fail_decw_pass_zero_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_decw_comp_less_or_equal_back_fail_decw_pass_keep_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_wrap_comp_less_or_equal_back_fail_wrap_pass_decw_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_incc_comp_not_equal_back_fail_repl_pass_decw_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_incc_comp_less_back_fail_zero_pass_inv_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_keep_comp_not_equal_back_fail_wrap_pass_decc_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_inv_comp_not_equal_back_fail_decc_pass_wrap_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_inv_comp_never_back_fail_incc_pass_zero_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_incc_comp_equal_back_fail_incc_pass_decc_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_decc_comp_greater_or_equal_back_fail_keep_pass_incc_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_repl_comp_not_equal_back_fail_repl_pass_repl_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_wrap_comp_greater_or_equal_back_fail_keep_pass_decc_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_decw_comp_less_back_fail_inv_pass_repl_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_incc_comp_less_or_equal_back_fail_repl_pass_decc_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_wrap_comp_greater_or_equal_back_fail_keep_pass_keep_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_inv_comp_less_back_fail_decc_pass_repl_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_wrap_comp_greater_or_equal_back_fail_incc_pass_wrap_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_zero_comp_greater_or_equal_back_fail_incc_pass_wrap_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_inv_comp_less_or_equal_back_fail_wrap_pass_decc_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_zero_comp_equal_back_fail_keep_pass_repl_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_wrap_comp_less_back_fail_decc_pass_decc_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_repl_comp_always_back_fail_zero_pass_wrap_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_wrap_comp_less_or_equal_back_fail_decw_pass_zero_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_decc_comp_less_back_fail_inv_pass_repl_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_decw_comp_always_back_fail_wrap_pass_wrap_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_keep_comp_less_or_equal_back_fail_zero_pass_decw_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_repl_comp_never_back_fail_decc_pass_decw_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_keep_comp_never_back_fail_repl_pass_decw_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_keep_comp_greater_back_fail_wrap_pass_keep_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_keep_comp_equal_back_fail_decc_pass_inv_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_wrap_comp_less_or_equal_back_fail_keep_pass_incc_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_decw_comp_less_back_fail_inv_pass_incc_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_keep_comp_equal_back_fail_decc_pass_incc_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_decc_comp_always_back_fail_wrap_pass_incc_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_incc_comp_equal_back_fail_decc_pass_wrap_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_keep_comp_less_back_fail_decc_pass_incc_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_zero_comp_less_back_fail_incc_pass_repl_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_incc_comp_greater_or_equal_back_fail_zero_pass_wrap_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_incc_comp_never_back_fail_repl_pass_repl_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_decw_comp_never_back_fail_decc_pass_keep_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_wrap_comp_always_back_fail_decc_pass_wrap_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_incc_comp_greater_back_fail_zero_pass_repl_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_zero_comp_not_equal_back_fail_repl_pass_repl_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_zero_comp_equal_back_fail_incc_pass_keep_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_incc_comp_equal_back_fail_incc_pass_wrap_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_wrap_comp_always_back_fail_zero_pass_incc_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_wrap_comp_never_back_fail_repl_pass_keep_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_repl_comp_less_or_equal_back_fail_decc_pass_inv_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_repl_comp_never_back_fail_repl_pass_wrap_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_wrap_comp_less_or_equal_back_fail_wrap_pass_zero_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_wrap_comp_less_or_equal_back_fail_wrap_pass_repl_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_inv_comp_greater_back_fail_decc_pass_decw_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_inv_comp_less_or_equal_back_fail_wrap_pass_decw_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_decw_comp_equal_back_fail_zero_pass_decc_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_keep_comp_less_back_fail_repl_pass_keep_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_keep_comp_never_back_fail_keep_pass_repl_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_repl_comp_not_equal_back_fail_inv_pass_decw_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_wrap_comp_never_back_fail_decc_pass_incc_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_wrap_comp_not_equal_back_fail_incc_pass_keep_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_wrap_comp_equal_back_fail_wrap_pass_repl_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_incc_comp_never_back_fail_zero_pass_repl_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_wrap_comp_equal_back_fail_inv_pass_keep_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_keep_comp_always_back_fail_inv_pass_decw_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_keep_comp_greater_back_fail_wrap_pass_repl_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_incc_comp_less_back_fail_inv_pass_repl_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_wrap_comp_greater_back_fail_inv_pass_decc_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_zero_comp_less_back_fail_zero_pass_decw_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_zero_comp_always_back_fail_zero_pass_repl_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_incc_comp_equal_back_fail_decc_pass_decc_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_zero_comp_always_back_fail_decw_pass_inv_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_incc_comp_always_back_fail_repl_pass_inv_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_inv_comp_never_back_fail_repl_pass_wrap_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_decc_comp_less_or_equal_back_fail_zero_pass_zero_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_inv_comp_not_equal_back_fail_wrap_pass_keep_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_keep_comp_greater_back_fail_zero_pass_wrap_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_keep_comp_less_or_equal_back_fail_keep_pass_incc_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_keep_comp_always_back_fail_keep_pass_repl_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_wrap_comp_always_back_fail_decc_pass_decw_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_incc_comp_equal_back_fail_repl_pass_decc_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_decw_comp_greater_back_fail_inv_pass_inv_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_decw_comp_less_back_fail_decw_pass_zero_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_decc_comp_greater_back_fail_wrap_pass_decc_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_incc_comp_always_back_fail_incc_pass_decc_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_wrap_comp_greater_or_equal_back_fail_keep_pass_keep_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_keep_comp_never_back_fail_keep_pass_decc_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_incc_comp_less_back_fail_keep_pass_keep_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_decw_comp_less_back_fail_repl_pass_zero_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_incc_comp_greater_or_equal_back_fail_keep_pass_keep_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_repl_comp_never_back_fail_inv_pass_zero_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_decc_comp_less_back_fail_repl_pass_repl_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_incc_comp_greater_or_equal_back_fail_decw_pass_inv_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_decw_comp_less_back_fail_decw_pass_decc_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_repl_comp_less_back_fail_wrap_pass_zero_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_keep_comp_less_or_equal_back_fail_decc_pass_wrap_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_zero_comp_less_or_equal_back_fail_incc_pass_incc_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_keep_comp_less_or_equal_back_fail_decc_pass_repl_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_decc_comp_greater_back_fail_decc_pass_incc_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_wrap_comp_not_equal_back_fail_zero_pass_wrap_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_repl_comp_greater_back_fail_repl_pass_zero_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_decw_comp_never_back_fail_decw_pass_inv_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_zero_comp_less_back_fail_decw_pass_inv_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_decw_comp_greater_back_fail_incc_pass_wrap_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_incc_comp_greater_or_equal_back_fail_decc_pass_repl_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_repl_comp_less_or_equal_back_fail_keep_pass_inv_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_decw_comp_less_back_fail_incc_pass_inv_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_decc_comp_less_or_equal_back_fail_keep_pass_zero_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_zero_comp_greater_or_equal_back_fail_keep_pass_incc_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_zero_comp_not_equal_back_fail_zero_pass_inv_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_incc_comp_less_back_fail_zero_pass_incc_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_inv_comp_never_back_fail_wrap_pass_zero_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_decw_comp_greater_or_equal_back_fail_wrap_pass_wrap_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_keep_comp_less_back_fail_decw_pass_keep_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_zero_comp_greater_or_equal_back_fail_wrap_pass_zero_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_inv_comp_greater_back_fail_repl_pass_incc_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_decc_comp_equal_back_fail_decw_pass_keep_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_decc_comp_less_or_equal_back_fail_wrap_pass_zero_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_repl_comp_never_back_fail_repl_pass_wrap_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_wrap_comp_equal_back_fail_keep_pass_incc_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_decw_comp_greater_back_fail_decw_pass_decc_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_inv_comp_not_equal_back_fail_incc_pass_keep_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_wrap_comp_greater_or_equal_back_fail_wrap_pass_incc_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_decc_comp_not_equal_back_fail_inv_pass_wrap_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_wrap_comp_greater_back_fail_incc_pass_inv_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_inv_comp_never_back_fail_wrap_pass_decw_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_repl_comp_less_back_fail_repl_pass_repl_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_keep_comp_less_or_equal_back_fail_repl_pass_keep_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_decc_comp_never_back_fail_zero_pass_decc_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_decw_comp_greater_back_fail_decw_pass_decw_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_zero_comp_always_back_fail_decc_pass_decw_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_zero_comp_greater_or_equal_back_fail_keep_pass_repl_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_decw_comp_greater_or_equal_back_fail_zero_pass_decc_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_inv_comp_not_equal_back_fail_keep_pass_keep_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_decw_comp_less_or_equal_back_fail_zero_pass_decw_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_inv_comp_greater_back_fail_repl_pass_keep_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_incc_comp_always_back_fail_decc_pass_decc_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_incc_comp_never_back_fail_zero_pass_keep_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_incc_comp_less_or_equal_back_fail_decc_pass_decw_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_repl_comp_always_back_fail_zero_pass_wrap_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_decc_comp_less_or_equal_back_fail_incc_pass_incc_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_wrap_comp_never_back_fail_wrap_pass_inv_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_incc_comp_less_back_fail_inv_pass_inv_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_repl_comp_less_or_equal_back_fail_keep_pass_decw_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_keep_comp_less_or_equal_back_fail_repl_pass_inv_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_wrap_comp_not_equal_back_fail_incc_pass_keep_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_keep_comp_less_back_fail_keep_pass_inv_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_incc_comp_not_equal_back_fail_inv_pass_repl_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_zero_comp_less_or_equal_back_fail_zero_pass_repl_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_incc_comp_never_back_fail_wrap_pass_decc_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_keep_comp_equal_back_fail_incc_pass_decw_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_decc_comp_less_or_equal_back_fail_keep_pass_decw_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_repl_comp_not_equal_back_fail_repl_pass_inv_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_decw_comp_equal_back_fail_wrap_pass_zero_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_incc_comp_never_back_fail_inv_pass_wrap_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_zero_comp_greater_or_equal_back_fail_incc_pass_zero_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_zero_comp_not_equal_back_fail_decw_pass_zero_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_repl_comp_never_back_fail_incc_pass_wrap_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_incc_comp_never_back_fail_zero_pass_keep_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_decc_comp_never_back_fail_repl_pass_wrap_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_repl_comp_always_back_fail_decw_pass_zero_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_repl_comp_less_back_fail_inv_pass_inv_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_decw_comp_less_or_equal_back_fail_wrap_pass_keep_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_decw_comp_not_equal_back_fail_repl_pass_incc_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_inv_comp_greater_back_fail_inv_pass_keep_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_decc_comp_less_back_fail_zero_pass_decw_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_zero_comp_less_back_fail_decw_pass_keep_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_decc_comp_less_back_fail_decw_pass_incc_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_decw_comp_always_back_fail_decc_pass_wrap_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_decw_comp_less_or_equal_back_fail_repl_pass_zero_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_decc_comp_greater_or_equal_back_fail_decw_pass_repl_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_inv_comp_always_back_fail_inv_pass_incc_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_repl_comp_not_equal_back_fail_zero_pass_inv_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_zero_comp_always_back_fail_keep_pass_incc_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_decw_comp_always_back_fail_inv_pass_inv_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_zero_comp_not_equal_back_fail_keep_pass_zero_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_keep_comp_always_back_fail_incc_pass_zero_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_inv_comp_less_back_fail_incc_pass_wrap_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_keep_comp_less_or_equal_back_fail_keep_pass_repl_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_zero_comp_never_back_fail_keep_pass_keep_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_inv_comp_greater_back_fail_zero_pass_decc_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_decw_comp_less_or_equal_back_fail_decw_pass_inv_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_incc_comp_not_equal_back_fail_keep_pass_repl_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_repl_comp_never_back_fail_decw_pass_zero_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_zero_comp_always_back_fail_zero_pass_wrap_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_decc_comp_less_or_equal_back_fail_wrap_pass_keep_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_decw_comp_less_or_equal_back_fail_decw_pass_incc_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_wrap_comp_not_equal_back_fail_keep_pass_decw_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_zero_comp_never_back_fail_inv_pass_decw_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_inv_comp_not_equal_back_fail_decc_pass_inv_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_keep_comp_always_back_fail_inv_pass_incc_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_decw_comp_less_or_equal_back_fail_decc_pass_keep_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_wrap_comp_never_back_fail_inv_pass_wrap_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_wrap_comp_never_back_fail_zero_pass_keep_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_zero_comp_less_back_fail_wrap_pass_keep_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_zero_comp_equal_back_fail_decw_pass_wrap_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_zero_comp_not_equal_back_fail_keep_pass_zero_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_inv_comp_never_back_fail_inv_pass_wrap_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_decw_comp_never_back_fail_repl_pass_inv_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_incc_comp_greater_back_fail_wrap_pass_decw_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_decc_comp_not_equal_back_fail_incc_pass_inv_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_wrap_comp_always_back_fail_decw_pass_zero_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_zero_comp_greater_or_equal_back_fail_incc_pass_repl_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_keep_comp_always_back_fail_inv_pass_inv_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_inv_comp_less_back_fail_decc_pass_incc_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_wrap_comp_never_back_fail_zero_pass_decc_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_zero_comp_not_equal_back_fail_inv_pass_incc_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_keep_comp_not_equal_back_fail_decc_pass_wrap_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_keep_comp_not_equal_back_fail_inv_pass_zero_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_incc_comp_always_back_fail_keep_pass_incc_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_wrap_comp_greater_back_fail_decw_pass_keep_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_zero_comp_greater_or_equal_back_fail_repl_pass_repl_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_repl_comp_not_equal_back_fail_wrap_pass_zero_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_decw_comp_less_or_equal_back_fail_keep_pass_inv_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_wrap_comp_greater_back_fail_decc_pass_repl_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_decw_comp_greater_back_fail_decc_pass_incc_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_wrap_comp_not_equal_back_fail_zero_pass_decc_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_inv_comp_greater_back_fail_incc_pass_decw_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_zero_comp_less_back_fail_repl_pass_keep_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_repl_comp_equal_back_fail_inv_pass_repl_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_inv_comp_less_or_equal_back_fail_incc_pass_inv_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_zero_comp_equal_back_fail_decc_pass_decw_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_zero_comp_greater_or_equal_back_fail_repl_pass_zero_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_inv_comp_greater_back_fail_keep_pass_keep_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_zero_comp_always_back_fail_inv_pass_wrap_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_decc_comp_never_back_fail_wrap_pass_decw_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_repl_comp_greater_back_fail_zero_pass_keep_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_decc_comp_not_equal_back_fail_keep_pass_wrap_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_wrap_comp_always_back_fail_decw_pass_wrap_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_zero_comp_never_back_fail_decc_pass_incc_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_keep_comp_never_back_fail_incc_pass_repl_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_zero_comp_greater_back_fail_wrap_pass_wrap_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_incc_comp_never_back_fail_decw_pass_repl_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_repl_comp_less_back_fail_wrap_pass_decc_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_incc_comp_greater_or_equal_back_fail_decw_pass_zero_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_inv_comp_never_back_fail_keep_pass_wrap_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_repl_comp_greater_back_fail_decw_pass_inv_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_zero_comp_never_back_fail_incc_pass_zero_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_incc_comp_less_back_fail_keep_pass_inv_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_repl_comp_equal_back_fail_inv_pass_zero_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_keep_comp_greater_or_equal_back_fail_zero_pass_decc_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_zero_comp_greater_back_fail_decc_pass_incc_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_decc_comp_equal_back_fail_zero_pass_inv_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_repl_comp_less_back_fail_wrap_pass_keep_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_decw_comp_never_back_fail_incc_pass_incc_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_decc_comp_less_back_fail_repl_pass_decw_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_inv_comp_equal_back_fail_repl_pass_wrap_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_incc_comp_not_equal_back_fail_keep_pass_decw_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_incc_comp_greater_or_equal_back_fail_repl_pass_decc_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_incc_comp_less_back_fail_wrap_pass_inv_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_repl_comp_always_back_fail_decc_pass_wrap_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_keep_comp_greater_back_fail_repl_pass_keep_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_decc_comp_less_back_fail_incc_pass_repl_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_incc_comp_greater_back_fail_repl_pass_incc_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_incc_comp_always_back_fail_repl_pass_zero_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_decw_comp_never_back_fail_decc_pass_keep_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_keep_comp_never_back_fail_repl_pass_wrap_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_keep_comp_greater_or_equal_back_fail_inv_pass_incc_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_zero_comp_never_back_fail_decc_pass_repl_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_wrap_comp_less_or_equal_back_fail_inv_pass_decc_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_wrap_comp_not_equal_back_fail_repl_pass_wrap_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_wrap_comp_equal_back_fail_wrap_pass_decw_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_decc_comp_greater_back_fail_keep_pass_decc_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_keep_comp_never_back_fail_decw_pass_incc_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_decw_comp_less_back_fail_decw_pass_incc_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_keep_comp_less_back_fail_zero_pass_zero_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_incc_comp_greater_back_fail_incc_pass_zero_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_zero_comp_greater_or_equal_back_fail_decc_pass_repl_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_repl_comp_less_back_fail_inv_pass_decw_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_inv_comp_greater_or_equal_back_fail_decw_pass_repl_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_decc_comp_greater_or_equal_back_fail_keep_pass_incc_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_decc_comp_less_or_equal_back_fail_wrap_pass_decw_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_keep_comp_greater_or_equal_back_fail_decw_pass_decc_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_decc_comp_never_back_fail_decw_pass_repl_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_repl_comp_greater_or_equal_back_fail_decc_pass_repl_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_keep_comp_greater_or_equal_back_fail_zero_pass_repl_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_decc_comp_never_back_fail_zero_pass_decw_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_repl_comp_less_back_fail_wrap_pass_inv_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_repl_comp_never_back_fail_zero_pass_wrap_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_keep_comp_less_back_fail_decw_pass_decc_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_decw_comp_not_equal_back_fail_wrap_pass_decw_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_incc_comp_greater_back_fail_decw_pass_zero_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_inv_comp_greater_back_fail_zero_pass_inv_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_repl_comp_not_equal_back_fail_zero_pass_zero_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_repl_comp_equal_back_fail_decc_pass_repl_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_repl_comp_never_back_fail_zero_pass_repl_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_decw_comp_never_back_fail_incc_pass_wrap_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_wrap_comp_equal_back_fail_incc_pass_decw_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_keep_comp_less_or_equal_back_fail_wrap_pass_repl_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_inv_comp_never_back_fail_incc_pass_zero_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_incc_comp_equal_back_fail_wrap_pass_zero_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_incc_comp_greater_or_equal_back_fail_wrap_pass_incc_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_inv_comp_always_back_fail_keep_pass_zero_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_wrap_comp_not_equal_back_fail_repl_pass_incc_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_decw_comp_greater_or_equal_back_fail_decw_pass_inv_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_inv_comp_less_or_equal_back_fail_decw_pass_inv_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_inv_comp_not_equal_back_fail_decc_pass_wrap_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_decw_comp_equal_back_fail_incc_pass_incc_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_wrap_comp_equal_back_fail_decc_pass_incc_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_decc_comp_greater_or_equal_back_fail_zero_pass_keep_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_zero_comp_greater_back_fail_repl_pass_keep_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_repl_comp_equal_back_fail_decc_pass_wrap_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_decw_comp_less_back_fail_incc_pass_decw_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_incc_comp_not_equal_back_fail_decc_pass_decw_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_repl_comp_greater_or_equal_back_fail_wrap_pass_decc_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_repl_comp_never_back_fail_zero_pass_decc_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_decc_comp_greater_back_fail_incc_pass_decc_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_keep_comp_equal_back_fail_keep_pass_wrap_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_decw_comp_never_back_fail_keep_pass_decc_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_decw_comp_less_back_fail_repl_pass_keep_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_zero_comp_greater_back_fail_repl_pass_incc_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_decw_comp_greater_or_equal_back_fail_inv_pass_keep_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_wrap_comp_greater_or_equal_back_fail_inv_pass_decc_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_wrap_comp_less_back_fail_wrap_pass_zero_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_keep_comp_less_or_equal_back_fail_incc_pass_wrap_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_zero_comp_never_back_fail_zero_pass_decw_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_zero_comp_equal_back_fail_repl_pass_repl_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_wrap_comp_not_equal_back_fail_decw_pass_wrap_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_repl_comp_not_equal_back_fail_incc_pass_wrap_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_keep_comp_not_equal_back_fail_decc_pass_decw_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_repl_comp_less_back_fail_repl_pass_repl_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_inv_comp_always_back_fail_wrap_pass_inv_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_decc_comp_equal_back_fail_repl_pass_decw_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_wrap_comp_less_back_fail_keep_pass_keep_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_wrap_comp_never_back_fail_decw_pass_zero_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_incc_comp_not_equal_back_fail_decc_pass_decw_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_incc_comp_greater_or_equal_back_fail_incc_pass_decc_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_keep_comp_less_or_equal_back_fail_zero_pass_wrap_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_wrap_comp_less_back_fail_keep_pass_incc_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_zero_comp_not_equal_back_fail_repl_pass_inv_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_incc_comp_not_equal_back_fail_inv_pass_decw_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_zero_comp_less_or_equal_back_fail_incc_pass_keep_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_zero_comp_never_back_fail_decc_pass_decc_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_decw_comp_never_back_fail_keep_pass_zero_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_decc_comp_not_equal_back_fail_keep_pass_inv_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_wrap_comp_equal_back_fail_incc_pass_repl_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_zero_comp_never_back_fail_repl_pass_decw_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_decc_comp_equal_back_fail_keep_pass_decc_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_zero_comp_less_back_fail_zero_pass_decc_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_decw_comp_greater_back_fail_decc_pass_decw_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_repl_comp_less_back_fail_inv_pass_zero_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_decc_comp_greater_or_equal_back_fail_decw_pass_wrap_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_wrap_comp_greater_or_equal_back_fail_zero_pass_repl_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_inv_comp_less_or_equal_back_fail_wrap_pass_repl_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_incc_comp_not_equal_back_fail_keep_pass_wrap_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_repl_comp_equal_back_fail_incc_pass_decw_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_incc_comp_greater_back_fail_wrap_pass_repl_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_repl_comp_less_or_equal_back_fail_keep_pass_inv_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_inv_comp_less_back_fail_decw_pass_inv_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_incc_comp_less_back_fail_decw_pass_incc_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_keep_comp_not_equal_back_fail_repl_pass_decw_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_inv_comp_always_back_fail_wrap_pass_incc_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_decw_comp_not_equal_back_fail_decc_pass_keep_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_decw_comp_always_back_fail_keep_pass_decw_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_incc_comp_equal_back_fail_wrap_pass_decc_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_zero_comp_greater_back_fail_wrap_pass_decc_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_repl_comp_always_back_fail_wrap_pass_inv_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_keep_comp_less_or_equal_back_fail_incc_pass_wrap_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_wrap_comp_less_or_equal_back_fail_wrap_pass_repl_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_inv_comp_less_or_equal_back_fail_incc_pass_decw_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_repl_comp_greater_back_fail_decw_pass_decw_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_incc_comp_less_back_fail_decw_pass_incc_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_repl_comp_greater_or_equal_back_fail_repl_pass_wrap_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_decw_comp_equal_back_fail_wrap_pass_incc_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_zero_comp_less_or_equal_back_fail_inv_pass_inv_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_keep_comp_not_equal_back_fail_inv_pass_decw_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_wrap_comp_greater_or_equal_back_fail_inv_pass_decw_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_wrap_comp_not_equal_back_fail_decc_pass_decw_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_keep_comp_equal_back_fail_decw_pass_keep_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_zero_comp_not_equal_back_fail_incc_pass_keep_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_keep_comp_less_back_fail_decw_pass_inv_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_zero_comp_never_back_fail_incc_pass_inv_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_zero_comp_greater_back_fail_zero_pass_decw_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_inv_comp_greater_or_equal_back_fail_decw_pass_zero_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_keep_comp_not_equal_back_fail_decc_pass_decc_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_zero_comp_less_back_fail_repl_pass_inv_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_wrap_comp_less_back_fail_keep_pass_wrap_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_decw_comp_never_back_fail_decw_pass_decw_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_inv_comp_less_back_fail_zero_pass_zero_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_incc_comp_greater_or_equal_back_fail_keep_pass_decw_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_zero_comp_less_or_equal_back_fail_decc_pass_decc_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_inv_comp_not_equal_back_fail_repl_pass_repl_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_wrap_comp_always_back_fail_zero_pass_keep_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_decw_comp_less_or_equal_back_fail_decw_pass_decw_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_keep_comp_always_back_fail_wrap_pass_incc_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_inv_comp_equal_back_fail_keep_pass_repl_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_keep_comp_less_back_fail_decw_pass_decc_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_zero_comp_not_equal_back_fail_decc_pass_wrap_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_decc_comp_equal_back_fail_repl_pass_decc_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_repl_comp_always_back_fail_wrap_pass_decw_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_inv_comp_greater_or_equal_back_fail_keep_pass_zero_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_wrap_comp_always_back_fail_wrap_pass_incc_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_repl_comp_not_equal_back_fail_incc_pass_incc_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_keep_comp_always_back_fail_decw_pass_repl_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_decc_comp_less_back_fail_decw_pass_repl_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_inv_comp_less_or_equal_back_fail_decc_pass_zero_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_decc_comp_less_or_equal_back_fail_decc_pass_incc_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_wrap_comp_not_equal_back_fail_decw_pass_repl_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_decc_comp_less_back_fail_decw_pass_zero_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_repl_comp_less_or_equal_back_fail_inv_pass_keep_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_inv_comp_greater_back_fail_keep_pass_repl_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_decc_comp_greater_or_equal_back_fail_repl_pass_decw_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_decw_comp_never_back_fail_decw_pass_wrap_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_zero_comp_not_equal_back_fail_zero_pass_inv_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_decc_comp_less_back_fail_inv_pass_incc_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_decc_comp_never_back_fail_repl_pass_decc_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_repl_comp_always_back_fail_keep_pass_wrap_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_decw_comp_less_back_fail_zero_pass_wrap_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_incc_comp_less_back_fail_zero_pass_wrap_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_repl_comp_less_or_equal_back_fail_decc_pass_decc_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_repl_comp_equal_back_fail_decw_pass_keep_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_decw_comp_greater_back_fail_repl_pass_repl_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_repl_comp_less_or_equal_back_fail_keep_pass_inv_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_incc_comp_greater_or_equal_back_fail_repl_pass_incc_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_wrap_comp_never_back_fail_keep_pass_keep_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_decw_comp_less_or_equal_back_fail_repl_pass_zero_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_inv_comp_never_back_fail_zero_pass_wrap_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_decw_comp_not_equal_back_fail_incc_pass_zero_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_decc_comp_less_or_equal_back_fail_zero_pass_incc_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_decc_comp_never_back_fail_zero_pass_wrap_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_wrap_comp_never_back_fail_decc_pass_decc_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_inv_comp_less_back_fail_zero_pass_repl_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_decc_comp_less_back_fail_decw_pass_decc_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_keep_comp_greater_or_equal_back_fail_zero_pass_incc_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_decw_comp_greater_or_equal_back_fail_incc_pass_decc_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_keep_comp_greater_or_equal_back_fail_incc_pass_incc_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_decc_comp_less_back_fail_zero_pass_zero_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_repl_comp_less_back_fail_inv_pass_decc_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_keep_comp_greater_back_fail_zero_pass_keep_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_zero_comp_greater_or_equal_back_fail_inv_pass_decc_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_incc_comp_not_equal_back_fail_inv_pass_repl_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_keep_comp_greater_back_fail_wrap_pass_repl_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_keep_comp_greater_back_fail_keep_pass_decw_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_wrap_comp_always_back_fail_decc_pass_wrap_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_wrap_comp_less_or_equal_back_fail_zero_pass_inv_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_wrap_comp_less_or_equal_back_fail_decw_pass_wrap_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_incc_comp_never_back_fail_incc_pass_zero_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_incc_comp_equal_back_fail_zero_pass_inv_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_keep_comp_greater_back_fail_repl_pass_inv_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_repl_comp_less_or_equal_back_fail_decc_pass_decw_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_incc_comp_not_equal_back_fail_zero_pass_wrap_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_repl_comp_greater_back_fail_zero_pass_decw_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_repl_comp_greater_back_fail_zero_pass_repl_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_incc_comp_greater_or_equal_back_fail_zero_pass_inv_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_keep_comp_greater_or_equal_back_fail_incc_pass_zero_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_wrap_comp_not_equal_back_fail_keep_pass_decc_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_wrap_comp_less_back_fail_decw_pass_wrap_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_repl_comp_equal_back_fail_repl_pass_wrap_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_incc_comp_greater_or_equal_back_fail_keep_pass_decc_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_repl_comp_always_back_fail_zero_pass_decc_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_zero_comp_less_back_fail_repl_pass_incc_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_wrap_comp_less_back_fail_incc_pass_decw_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_decw_comp_never_back_fail_wrap_pass_keep_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_decc_comp_greater_or_equal_back_fail_keep_pass_repl_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_inv_comp_greater_or_equal_back_fail_incc_pass_wrap_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_repl_comp_less_or_equal_back_fail_keep_pass_keep_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_wrap_comp_greater_back_fail_incc_pass_wrap_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_incc_comp_less_back_fail_keep_pass_wrap_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_keep_comp_greater_or_equal_back_fail_zero_pass_inv_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_inv_comp_less_or_equal_back_fail_inv_pass_decw_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_decw_comp_less_back_fail_decc_pass_inv_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_zero_comp_equal_back_fail_incc_pass_wrap_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_wrap_comp_never_back_fail_decw_pass_repl_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_zero_comp_always_back_fail_decc_pass_zero_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_decw_comp_greater_or_equal_back_fail_incc_pass_wrap_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_decw_comp_less_back_fail_decc_pass_decw_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_repl_comp_greater_back_fail_incc_pass_keep_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_zero_comp_always_back_fail_wrap_pass_keep_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_zero_comp_always_back_fail_repl_pass_repl_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_wrap_comp_less_or_equal_back_fail_decw_pass_incc_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_decc_comp_not_equal_back_fail_decc_pass_inv_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_decw_comp_greater_back_fail_zero_pass_wrap_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_repl_comp_never_back_fail_inv_pass_decw_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_decc_comp_less_back_fail_repl_pass_wrap_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_zero_comp_greater_or_equal_back_fail_wrap_pass_repl_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_decw_comp_not_equal_back_fail_keep_pass_decw_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_decw_comp_always_back_fail_repl_pass_incc_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_wrap_comp_not_equal_back_fail_decc_pass_decc_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_wrap_comp_greater_or_equal_back_fail_decw_pass_decw_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_decc_comp_never_back_fail_wrap_pass_keep_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_wrap_comp_greater_or_equal_back_fail_zero_pass_decc_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_incc_comp_always_back_fail_incc_pass_keep_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_decw_comp_less_back_fail_inv_pass_inv_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_wrap_comp_not_equal_back_fail_keep_pass_decw_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_inv_comp_always_back_fail_decc_pass_inv_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_wrap_comp_never_back_fail_keep_pass_keep_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_repl_comp_never_back_fail_wrap_pass_inv_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_decw_comp_greater_back_fail_zero_pass_repl_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_decc_comp_not_equal_back_fail_inv_pass_repl_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_inv_comp_less_back_fail_keep_pass_wrap_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_repl_comp_less_back_fail_wrap_pass_keep_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_wrap_comp_always_back_fail_keep_pass_decw_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_incc_comp_not_equal_back_fail_inv_pass_inv_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_incc_comp_not_equal_back_fail_repl_pass_zero_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_zero_comp_equal_back_fail_decw_pass_wrap_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_decw_comp_not_equal_back_fail_wrap_pass_incc_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_incc_comp_greater_or_equal_back_fail_incc_pass_keep_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_decc_comp_less_back_fail_inv_pass_repl_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_decc_comp_never_back_fail_zero_pass_decw_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_decc_comp_greater_back_fail_decw_pass_inv_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_incc_comp_less_or_equal_back_fail_zero_pass_repl_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_decw_comp_less_or_equal_back_fail_decw_pass_repl_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_repl_comp_greater_back_fail_incc_pass_repl_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_decc_comp_greater_back_fail_decc_pass_zero_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_decc_comp_equal_back_fail_wrap_pass_inv_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_zero_comp_not_equal_back_fail_inv_pass_zero_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_incc_comp_equal_back_fail_inv_pass_decc_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_zero_comp_less_back_fail_keep_pass_wrap_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_inv_comp_greater_back_fail_inv_pass_wrap_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_decw_comp_not_equal_back_fail_decc_pass_wrap_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_inv_comp_less_back_fail_zero_pass_wrap_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_keep_comp_never_back_fail_incc_pass_zero_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_decc_comp_less_back_fail_decc_pass_decc_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_zero_comp_greater_back_fail_decc_pass_decc_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_wrap_comp_always_back_fail_decc_pass_decw_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_decc_comp_not_equal_back_fail_wrap_pass_decw_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_keep_comp_always_back_fail_decc_pass_wrap_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_keep_comp_equal_back_fail_repl_pass_repl_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_decc_comp_less_or_equal_back_fail_decw_pass_zero_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_zero_comp_less_or_equal_back_fail_repl_pass_decc_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_decc_comp_equal_back_fail_zero_pass_repl_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_inv_comp_always_back_fail_decw_pass_inv_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_inv_comp_greater_or_equal_back_fail_wrap_pass_decc_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_decw_comp_always_back_fail_decc_pass_repl_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_decc_comp_always_back_fail_decc_pass_wrap_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_decw_comp_less_or_equal_back_fail_decw_pass_inv_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_zero_comp_greater_or_equal_back_fail_zero_pass_keep_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_incc_comp_less_back_fail_keep_pass_incc_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_incc_comp_never_back_fail_decw_pass_wrap_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_repl_comp_greater_or_equal_back_fail_keep_pass_decc_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_decw_comp_less_or_equal_back_fail_repl_pass_decw_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_repl_comp_not_equal_back_fail_wrap_pass_keep_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_wrap_comp_less_or_equal_back_fail_decw_pass_inv_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_incc_comp_not_equal_back_fail_wrap_pass_inv_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_inv_comp_never_back_fail_zero_pass_incc_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_keep_comp_not_equal_back_fail_decc_pass_zero_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_keep_comp_greater_back_fail_inv_pass_wrap_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_repl_comp_greater_back_fail_decc_pass_keep_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_repl_comp_less_back_fail_decw_pass_keep_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_repl_comp_always_back_fail_incc_pass_decc_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_repl_comp_less_back_fail_zero_pass_repl_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_keep_comp_greater_or_equal_back_fail_keep_pass_incc_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_decc_comp_not_equal_back_fail_incc_pass_wrap_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_inv_comp_greater_or_equal_back_fail_inv_pass_decw_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_incc_comp_less_back_fail_decw_pass_repl_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_wrap_comp_always_back_fail_incc_pass_decc_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_keep_comp_greater_back_fail_repl_pass_incc_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_repl_comp_not_equal_back_fail_zero_pass_keep_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_incc_comp_not_equal_back_fail_wrap_pass_repl_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_wrap_comp_never_back_fail_inv_pass_zero_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_repl_comp_always_back_fail_wrap_pass_decc_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_zero_comp_equal_back_fail_repl_pass_zero_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_incc_comp_less_back_fail_decc_pass_zero_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_inv_comp_never_back_fail_decw_pass_incc_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_zero_comp_never_back_fail_decc_pass_decw_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_decc_comp_equal_back_fail_zero_pass_repl_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_decc_comp_not_equal_back_fail_incc_pass_inv_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_repl_comp_not_equal_back_fail_zero_pass_zero_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_decw_comp_greater_or_equal_back_fail_decc_pass_decc_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_inv_comp_equal_back_fail_decc_pass_zero_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_keep_comp_not_equal_back_fail_decw_pass_decw_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_inv_comp_less_or_equal_back_fail_repl_pass_decc_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_inv_comp_always_back_fail_keep_pass_keep_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_decc_comp_always_back_fail_wrap_pass_incc_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_repl_comp_equal_back_fail_keep_pass_repl_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_repl_comp_not_equal_back_fail_zero_pass_inv_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_inv_comp_greater_back_fail_decw_pass_decw_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_keep_comp_not_equal_back_fail_repl_pass_repl_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_incc_comp_less_back_fail_repl_pass_zero_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_wrap_comp_never_back_fail_inv_pass_repl_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_incc_comp_greater_or_equal_back_fail_decw_pass_keep_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_zero_comp_less_back_fail_repl_pass_wrap_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_keep_comp_less_or_equal_back_fail_decw_pass_inv_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_wrap_comp_always_back_fail_repl_pass_wrap_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_inv_comp_always_back_fail_repl_pass_repl_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_wrap_comp_less_back_fail_incc_pass_decc_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_keep_comp_equal_back_fail_inv_pass_decc_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_incc_comp_less_back_fail_keep_pass_keep_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_inv_comp_less_or_equal_back_fail_inv_pass_decw_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_repl_comp_never_back_fail_wrap_pass_incc_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_repl_comp_never_back_fail_repl_pass_inv_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_decc_comp_less_back_fail_keep_pass_keep_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_incc_comp_less_or_equal_back_fail_decc_pass_repl_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_zero_comp_less_or_equal_back_fail_zero_pass_repl_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_decc_comp_always_back_fail_decw_pass_wrap_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_decc_comp_less_or_equal_back_fail_incc_pass_keep_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_wrap_comp_less_or_equal_back_fail_wrap_pass_decc_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_wrap_comp_not_equal_back_fail_repl_pass_inv_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_incc_comp_not_equal_back_fail_decc_pass_zero_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_repl_comp_less_back_fail_wrap_pass_decw_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_keep_comp_greater_back_fail_incc_pass_decw_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_zero_comp_greater_or_equal_back_fail_decc_pass_decc_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_wrap_comp_greater_back_fail_incc_pass_decw_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_decc_comp_greater_back_fail_inv_pass_repl_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_decc_comp_greater_or_equal_back_fail_wrap_pass_zero_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_keep_comp_less_back_fail_decc_pass_wrap_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_incc_comp_greater_or_equal_back_fail_decw_pass_zero_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_decw_comp_always_back_fail_decc_pass_zero_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_decc_comp_greater_or_equal_back_fail_incc_pass_inv_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_inv_comp_greater_or_equal_back_fail_incc_pass_zero_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_zero_comp_greater_back_fail_inv_pass_wrap_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_wrap_comp_never_back_fail_decc_pass_incc_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_wrap_comp_greater_or_equal_back_fail_incc_pass_wrap_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_incc_comp_equal_back_fail_wrap_pass_wrap_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_decc_comp_less_or_equal_back_fail_decw_pass_wrap_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_zero_comp_always_back_fail_decw_pass_inv_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_wrap_comp_equal_back_fail_repl_pass_keep_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_inv_comp_less_back_fail_repl_pass_inv_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_repl_comp_equal_back_fail_decc_pass_decw_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_incc_comp_less_back_fail_repl_pass_keep_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_repl_comp_always_back_fail_decc_pass_inv_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_decw_comp_always_back_fail_zero_pass_incc_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_wrap_comp_less_or_equal_back_fail_decw_pass_inv_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_wrap_comp_less_or_equal_back_fail_wrap_pass_zero_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_zero_comp_greater_or_equal_back_fail_wrap_pass_decw_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_wrap_comp_not_equal_back_fail_repl_pass_inv_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_wrap_comp_equal_back_fail_decw_pass_incc_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_wrap_comp_less_back_fail_keep_pass_keep_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_repl_comp_less_or_equal_back_fail_keep_pass_inv_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_repl_comp_less_or_equal_back_fail_inv_pass_wrap_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_zero_comp_greater_back_fail_wrap_pass_wrap_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_decw_comp_not_equal_back_fail_incc_pass_decw_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_decw_comp_always_back_fail_decc_pass_keep_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_inv_comp_equal_back_fail_decc_pass_inv_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_decw_comp_less_or_equal_back_fail_keep_pass_zero_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_repl_comp_always_back_fail_decc_pass_zero_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_zero_comp_equal_back_fail_inv_pass_incc_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_incc_comp_greater_back_fail_decc_pass_inv_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_decc_comp_always_back_fail_wrap_pass_repl_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_keep_comp_less_back_fail_decc_pass_decc_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_inv_comp_less_back_fail_wrap_pass_wrap_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_incc_comp_greater_back_fail_repl_pass_zero_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_wrap_comp_greater_or_equal_back_fail_incc_pass_decc_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_decw_comp_always_back_fail_zero_pass_repl_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_zero_comp_less_or_equal_back_fail_keep_pass_decc_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_repl_comp_greater_or_equal_back_fail_decw_pass_decc_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_decw_comp_not_equal_back_fail_wrap_pass_repl_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_wrap_comp_never_back_fail_decw_pass_wrap_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_decw_comp_always_back_fail_decc_pass_keep_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_decc_comp_always_back_fail_inv_pass_zero_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_decc_comp_always_back_fail_keep_pass_incc_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_decw_comp_less_back_fail_inv_pass_inv_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_repl_comp_greater_or_equal_back_fail_inv_pass_incc_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_decw_comp_greater_back_fail_zero_pass_wrap_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_incc_comp_greater_or_equal_back_fail_incc_pass_wrap_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_wrap_comp_less_back_fail_decc_pass_incc_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_keep_comp_never_back_fail_keep_pass_decw_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_incc_comp_always_back_fail_repl_pass_keep_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_wrap_comp_equal_back_fail_incc_pass_repl_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_inv_comp_not_equal_back_fail_decw_pass_decw_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_inv_comp_less_back_fail_decw_pass_inv_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_decc_comp_not_equal_back_fail_zero_pass_inv_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_inv_comp_greater_or_equal_back_fail_decw_pass_decw_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_decc_comp_greater_back_fail_decw_pass_inv_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_decw_comp_greater_back_fail_keep_pass_decc_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_incc_comp_greater_back_fail_zero_pass_wrap_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_wrap_comp_greater_back_fail_inv_pass_decw_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_decc_comp_not_equal_back_fail_decc_pass_decw_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_decw_comp_less_or_equal_back_fail_zero_pass_repl_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_zero_comp_less_back_fail_decc_pass_keep_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_wrap_comp_always_back_fail_inv_pass_inv_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_keep_comp_never_back_fail_decw_pass_zero_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_incc_comp_never_back_fail_wrap_pass_incc_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_repl_comp_less_or_equal_back_fail_wrap_pass_wrap_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_keep_comp_greater_back_fail_decw_pass_zero_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_decc_comp_greater_back_fail_incc_pass_wrap_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_zero_comp_not_equal_back_fail_wrap_pass_decc_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_decc_comp_greater_back_fail_keep_pass_keep_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_decw_comp_greater_back_fail_inv_pass_decc_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_keep_comp_greater_back_fail_incc_pass_incc_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_wrap_comp_not_equal_back_fail_decw_pass_decc_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_decc_comp_greater_back_fail_wrap_pass_keep_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_decc_comp_less_back_fail_decw_pass_decw_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_decc_comp_less_back_fail_incc_pass_keep_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_keep_comp_always_back_fail_decc_pass_decw_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_zero_comp_always_back_fail_repl_pass_decc_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_zero_comp_less_or_equal_back_fail_decc_pass_keep_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_wrap_comp_greater_or_equal_back_fail_decc_pass_wrap_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_repl_comp_not_equal_back_fail_decw_pass_inv_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_wrap_comp_never_back_fail_wrap_pass_incc_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_decw_comp_never_back_fail_incc_pass_decc_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_keep_comp_never_back_fail_inv_pass_zero_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_decc_comp_never_back_fail_repl_pass_wrap_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_repl_comp_not_equal_back_fail_wrap_pass_decw_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_decc_comp_equal_back_fail_keep_pass_repl_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_decw_comp_never_back_fail_decw_pass_decc_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_incc_comp_less_or_equal_back_fail_keep_pass_wrap_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_keep_comp_greater_or_equal_back_fail_inv_pass_wrap_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_decw_comp_always_back_fail_repl_pass_decw_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_repl_comp_less_back_fail_keep_pass_repl_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_keep_comp_always_back_fail_inv_pass_inv_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_incc_comp_always_back_fail_keep_pass_wrap_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_decc_comp_less_or_equal_back_fail_repl_pass_decw_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_zero_comp_greater_or_equal_back_fail_incc_pass_keep_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_wrap_comp_never_back_fail_wrap_pass_keep_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_repl_comp_not_equal_back_fail_zero_pass_wrap_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_keep_comp_less_back_fail_repl_pass_decc_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_decc_comp_greater_or_equal_back_fail_decc_pass_keep_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_keep_comp_equal_back_fail_zero_pass_keep_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_decc_comp_always_back_fail_zero_pass_inv_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_incc_comp_less_back_fail_decw_pass_zero_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_zero_comp_less_back_fail_incc_pass_wrap_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_decc_comp_less_or_equal_back_fail_wrap_pass_wrap_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_decw_comp_equal_back_fail_zero_pass_decc_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_keep_comp_equal_back_fail_decc_pass_zero_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_decw_comp_less_or_equal_back_fail_inv_pass_wrap_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_repl_comp_greater_back_fail_decw_pass_decc_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_inv_comp_greater_or_equal_back_fail_keep_pass_decw_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_incc_comp_always_back_fail_repl_pass_keep_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_wrap_comp_always_back_fail_wrap_pass_decw_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_zero_comp_equal_back_fail_decc_pass_zero_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_decw_comp_never_back_fail_wrap_pass_repl_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_decc_comp_greater_back_fail_inv_pass_incc_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_decc_comp_always_back_fail_keep_pass_zero_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_zero_comp_not_equal_back_fail_incc_pass_repl_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_repl_comp_less_back_fail_incc_pass_incc_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_repl_comp_greater_back_fail_wrap_pass_wrap_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_wrap_comp_less_back_fail_decw_pass_zero_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_inv_comp_greater_back_fail_decc_pass_decw_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_decc_comp_greater_or_equal_back_fail_wrap_pass_decc_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_repl_comp_greater_back_fail_wrap_pass_keep_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_decw_comp_less_or_equal_back_fail_incc_pass_repl_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_decw_comp_always_back_fail_decw_pass_wrap_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_incc_comp_equal_back_fail_inv_pass_decw_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_decw_comp_greater_back_fail_inv_pass_repl_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_zero_comp_never_back_fail_zero_pass_keep_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_keep_comp_less_back_fail_decw_pass_repl_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_keep_comp_greater_back_fail_repl_pass_wrap_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_repl_comp_equal_back_fail_decw_pass_inv_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_incc_comp_greater_back_fail_wrap_pass_zero_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_decw_comp_greater_back_fail_decc_pass_decc_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_wrap_comp_greater_back_fail_inv_pass_inv_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_wrap_comp_not_equal_back_fail_zero_pass_inv_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_zero_comp_not_equal_back_fail_keep_pass_decc_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_decw_comp_not_equal_back_fail_decw_pass_wrap_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_inv_comp_equal_back_fail_keep_pass_inv_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_wrap_comp_equal_back_fail_keep_pass_inv_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_incc_comp_always_back_fail_zero_pass_incc_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_decc_comp_never_back_fail_zero_pass_inv_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_inv_comp_greater_or_equal_back_fail_inv_pass_repl_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_repl_comp_always_back_fail_incc_pass_wrap_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_wrap_comp_greater_back_fail_decw_pass_wrap_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_decw_comp_equal_back_fail_decc_pass_repl_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_zero_comp_greater_or_equal_back_fail_zero_pass_repl_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_zero_comp_greater_back_fail_decw_pass_keep_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_keep_comp_less_back_fail_keep_pass_decw_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_decc_comp_greater_or_equal_back_fail_repl_pass_zero_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_keep_comp_equal_back_fail_incc_pass_keep_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_decw_comp_never_back_fail_zero_pass_keep_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_inv_comp_less_back_fail_repl_pass_zero_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_repl_comp_always_back_fail_keep_pass_wrap_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_inv_comp_less_back_fail_inv_pass_decc_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_decc_comp_always_back_fail_keep_pass_decc_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_decc_comp_less_or_equal_back_fail_repl_pass_decw_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_keep_comp_always_back_fail_decc_pass_incc_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_decw_comp_greater_or_equal_back_fail_decc_pass_inv_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_decw_comp_less_back_fail_decw_pass_zero_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_wrap_comp_equal_back_fail_incc_pass_zero_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_inv_comp_greater_or_equal_back_fail_keep_pass_zero_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_repl_comp_less_or_equal_back_fail_repl_pass_inv_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_wrap_comp_less_back_fail_zero_pass_decw_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_inv_comp_less_back_fail_zero_pass_decc_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_wrap_comp_less_or_equal_back_fail_zero_pass_wrap_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_decc_comp_never_back_fail_zero_pass_zero_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_keep_comp_less_or_equal_back_fail_incc_pass_inv_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_keep_comp_always_back_fail_zero_pass_zero_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_keep_comp_equal_back_fail_zero_pass_decc_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_wrap_comp_less_or_equal_back_fail_repl_pass_zero_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_decw_comp_equal_back_fail_decc_pass_incc_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_keep_comp_never_back_fail_inv_pass_incc_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_repl_comp_greater_back_fail_keep_pass_inv_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_inv_comp_greater_back_fail_incc_pass_incc_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_decw_comp_not_equal_back_fail_repl_pass_decc_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_keep_comp_greater_or_equal_back_fail_incc_pass_wrap_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_decw_comp_never_back_fail_decw_pass_keep_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_zero_comp_less_back_fail_decw_pass_decw_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_keep_comp_equal_back_fail_inv_pass_decc_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_inv_comp_not_equal_back_fail_wrap_pass_repl_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_repl_comp_equal_back_fail_inv_pass_decw_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_decw_comp_greater_or_equal_back_fail_inv_pass_zero_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_inv_comp_not_equal_back_fail_decc_pass_keep_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_decc_comp_equal_back_fail_keep_pass_decw_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_incc_comp_never_back_fail_wrap_pass_decc_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_keep_comp_less_or_equal_back_fail_keep_pass_decw_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_repl_comp_less_or_equal_back_fail_wrap_pass_inv_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_repl_comp_greater_back_fail_wrap_pass_repl_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_wrap_comp_equal_back_fail_wrap_pass_incc_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_repl_comp_less_back_fail_decw_pass_inv_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_inv_comp_equal_back_fail_incc_pass_wrap_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_wrap_comp_greater_or_equal_back_fail_decc_pass_incc_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_wrap_comp_greater_back_fail_keep_pass_decw_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_decc_comp_less_back_fail_decc_pass_inv_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_wrap_comp_equal_back_fail_repl_pass_keep_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_keep_comp_greater_or_equal_back_fail_inv_pass_inv_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_keep_comp_always_back_fail_decw_pass_incc_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_zero_comp_never_back_fail_zero_pass_wrap_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_wrap_comp_greater_back_fail_zero_pass_inv_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_decw_comp_greater_or_equal_back_fail_repl_pass_keep_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_inv_comp_greater_or_equal_back_fail_inv_pass_wrap_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_decc_comp_less_or_equal_back_fail_decc_pass_zero_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_decw_comp_less_back_fail_incc_pass_wrap_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_repl_comp_greater_or_equal_back_fail_zero_pass_keep_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_inv_comp_equal_back_fail_wrap_pass_inv_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_wrap_comp_equal_back_fail_keep_pass_decc_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_decw_comp_greater_or_equal_back_fail_incc_pass_incc_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_incc_comp_not_equal_back_fail_keep_pass_decw_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_decc_comp_not_equal_back_fail_decc_pass_wrap_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_keep_comp_not_equal_back_fail_inv_pass_wrap_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_wrap_comp_always_back_fail_zero_pass_decc_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_wrap_comp_less_or_equal_back_fail_inv_pass_wrap_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_wrap_comp_less_or_equal_back_fail_decw_pass_zero_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_zero_comp_greater_back_fail_wrap_pass_keep_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_incc_comp_greater_or_equal_back_fail_inv_pass_repl_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_incc_comp_less_back_fail_incc_pass_wrap_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_wrap_comp_less_back_fail_keep_pass_inv_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_decc_comp_greater_back_fail_zero_pass_incc_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_keep_comp_greater_back_fail_repl_pass_decw_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_decw_comp_less_back_fail_repl_pass_inv_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_decc_comp_always_back_fail_inv_pass_repl_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_zero_comp_less_or_equal_back_fail_decw_pass_keep_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_keep_comp_less_or_equal_back_fail_wrap_pass_repl_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_incc_comp_equal_back_fail_repl_pass_keep_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_wrap_comp_equal_back_fail_wrap_pass_inv_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_zero_comp_less_or_equal_back_fail_keep_pass_repl_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_decc_comp_equal_back_fail_incc_pass_wrap_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_zero_comp_equal_back_fail_zero_pass_decw_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_decc_comp_less_or_equal_back_fail_decw_pass_decc_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_incc_comp_not_equal_back_fail_repl_pass_zero_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_decc_comp_always_back_fail_keep_pass_inv_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_inv_comp_equal_back_fail_keep_pass_wrap_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_wrap_comp_always_back_fail_inv_pass_repl_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_zero_comp_not_equal_back_fail_decc_pass_repl_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_repl_comp_equal_back_fail_decw_pass_decc_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_repl_comp_greater_or_equal_back_fail_inv_pass_incc_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_decw_comp_less_or_equal_back_fail_keep_pass_repl_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_decw_comp_always_back_fail_incc_pass_decw_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_repl_comp_greater_back_fail_incc_pass_repl_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_wrap_comp_less_back_fail_keep_pass_keep_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_wrap_comp_not_equal_back_fail_inv_pass_repl_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_wrap_comp_never_back_fail_repl_pass_decc_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_keep_comp_less_back_fail_decw_pass_inv_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_decw_comp_never_back_fail_wrap_pass_inv_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_decw_comp_greater_back_fail_decw_pass_keep_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_inv_comp_not_equal_back_fail_repl_pass_decc_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_decw_comp_less_back_fail_repl_pass_wrap_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_inv_comp_greater_back_fail_wrap_pass_wrap_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_repl_comp_less_or_equal_back_fail_repl_pass_incc_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_wrap_comp_not_equal_back_fail_wrap_pass_zero_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_inv_comp_less_back_fail_decc_pass_keep_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_decc_comp_greater_back_fail_decc_pass_repl_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_repl_comp_greater_or_equal_back_fail_repl_pass_zero_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_zero_comp_greater_back_fail_repl_pass_inv_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_zero_comp_never_back_fail_zero_pass_decc_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_decc_comp_less_or_equal_back_fail_inv_pass_wrap_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_keep_comp_less_or_equal_back_fail_decc_pass_repl_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_wrap_comp_less_or_equal_back_fail_inv_pass_decw_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_inv_comp_greater_or_equal_back_fail_inv_pass_decc_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_wrap_comp_less_or_equal_back_fail_decc_pass_keep_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_zero_comp_less_back_fail_wrap_pass_incc_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_inv_comp_not_equal_back_fail_keep_pass_zero_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_repl_comp_always_back_fail_incc_pass_decc_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_decc_comp_greater_or_equal_back_fail_inv_pass_repl_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_zero_comp_greater_or_equal_back_fail_zero_pass_zero_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_repl_comp_less_back_fail_wrap_pass_decw_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_incc_comp_greater_back_fail_repl_pass_decw_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_wrap_comp_not_equal_back_fail_repl_pass_decw_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_zero_comp_less_back_fail_decw_pass_repl_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_inv_comp_less_back_fail_wrap_pass_keep_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_zero_comp_not_equal_back_fail_wrap_pass_decw_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_wrap_comp_always_back_fail_wrap_pass_inv_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_repl_comp_less_back_fail_decw_pass_repl_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_wrap_comp_less_or_equal_back_fail_keep_pass_wrap_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_repl_comp_less_back_fail_wrap_pass_decc_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_zero_comp_always_back_fail_wrap_pass_decc_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_decc_comp_less_or_equal_back_fail_wrap_pass_inv_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_keep_comp_equal_back_fail_decc_pass_inv_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_zero_comp_less_or_equal_back_fail_decw_pass_decc_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_repl_comp_never_back_fail_wrap_pass_incc_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_inv_comp_greater_or_equal_back_fail_wrap_pass_decc_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_decw_comp_never_back_fail_keep_pass_inv_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_decw_comp_greater_or_equal_back_fail_incc_pass_keep_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_inv_comp_greater_back_fail_incc_pass_repl_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_keep_comp_equal_back_fail_zero_pass_wrap_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_incc_comp_not_equal_back_fail_incc_pass_decc_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_decw_comp_equal_back_fail_keep_pass_wrap_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_wrap_comp_less_or_equal_back_fail_incc_pass_repl_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_keep_comp_less_back_fail_zero_pass_wrap_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_inv_comp_greater_or_equal_back_fail_repl_pass_repl_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_zero_comp_not_equal_back_fail_inv_pass_inv_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_zero_comp_less_back_fail_inv_pass_repl_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_decw_comp_equal_back_fail_zero_pass_inv_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_inv_comp_less_or_equal_back_fail_decw_pass_incc_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_repl_comp_greater_or_equal_back_fail_repl_pass_wrap_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_wrap_comp_greater_or_equal_back_fail_decw_pass_wrap_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_inv_comp_less_back_fail_decc_pass_incc_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_decw_comp_not_equal_back_fail_incc_pass_inv_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_zero_comp_equal_back_fail_decc_pass_wrap_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_incc_comp_not_equal_back_fail_repl_pass_incc_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_zero_comp_greater_or_equal_back_fail_keep_pass_zero_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_wrap_comp_not_equal_back_fail_inv_pass_wrap_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_incc_comp_always_back_fail_wrap_pass_inv_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_decc_comp_equal_back_fail_inv_pass_incc_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_keep_comp_not_equal_back_fail_decc_pass_zero_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_decw_comp_equal_back_fail_wrap_pass_zero_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_decw_comp_always_back_fail_decc_pass_repl_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_repl_comp_greater_back_fail_inv_pass_inv_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_zero_comp_less_back_fail_wrap_pass_inv_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_decw_comp_less_or_equal_back_fail_repl_pass_decw_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_keep_comp_less_back_fail_decc_pass_wrap_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_repl_comp_less_back_fail_incc_pass_incc_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_incc_comp_greater_or_equal_back_fail_decw_pass_inv_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_repl_comp_less_or_equal_back_fail_incc_pass_decc_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_repl_comp_less_back_fail_repl_pass_keep_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_keep_comp_always_back_fail_decw_pass_decw_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_inv_comp_equal_back_fail_repl_pass_inv_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_zero_comp_not_equal_back_fail_zero_pass_zero_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_wrap_comp_equal_back_fail_zero_pass_decw_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_keep_comp_greater_or_equal_back_fail_inv_pass_incc_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_repl_comp_equal_back_fail_inv_pass_zero_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_wrap_comp_greater_or_equal_back_fail_incc_pass_incc_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_incc_comp_greater_or_equal_back_fail_repl_pass_wrap_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_wrap_comp_not_equal_back_fail_wrap_pass_decc_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_incc_comp_always_back_fail_wrap_pass_incc_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_wrap_comp_greater_back_fail_decw_pass_incc_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_incc_comp_not_equal_back_fail_incc_pass_repl_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_keep_comp_less_back_fail_decc_pass_repl_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_keep_comp_greater_or_equal_back_fail_wrap_pass_decc_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_repl_comp_never_back_fail_incc_pass_repl_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_inv_comp_less_back_fail_incc_pass_inv_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_keep_comp_never_back_fail_decw_pass_repl_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_decc_comp_greater_back_fail_zero_pass_incc_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_decc_comp_less_or_equal_back_fail_zero_pass_decc_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_keep_comp_equal_back_fail_keep_pass_repl_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_wrap_comp_always_back_fail_incc_pass_repl_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_decc_comp_always_back_fail_wrap_pass_keep_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_repl_comp_greater_back_fail_decw_pass_repl_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_inv_comp_less_or_equal_back_fail_repl_pass_wrap_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_incc_comp_not_equal_back_fail_keep_pass_zero_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_inv_comp_equal_back_fail_decw_pass_decc_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_incc_comp_less_back_fail_keep_pass_wrap_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_repl_comp_greater_back_fail_incc_pass_zero_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_repl_comp_greater_or_equal_back_fail_decw_pass_decw_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_keep_comp_greater_or_equal_back_fail_zero_pass_zero_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_inv_comp_never_back_fail_wrap_pass_zero_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_decc_comp_not_equal_back_fail_decw_pass_incc_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_decc_comp_greater_back_fail_decw_pass_inv_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_decw_comp_greater_back_fail_keep_pass_keep_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_decc_comp_greater_or_equal_back_fail_inv_pass_decc_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_repl_comp_not_equal_back_fail_zero_pass_decw_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_incc_comp_less_back_fail_decw_pass_keep_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_wrap_comp_not_equal_back_fail_wrap_pass_wrap_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_wrap_comp_never_back_fail_zero_pass_keep_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_keep_comp_not_equal_back_fail_decw_pass_decc_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_decw_comp_equal_back_fail_inv_pass_decc_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_keep_comp_not_equal_back_fail_repl_pass_wrap_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_decc_comp_equal_back_fail_decw_pass_zero_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_wrap_comp_always_back_fail_inv_pass_inv_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_keep_comp_less_or_equal_back_fail_repl_pass_decw_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_inv_comp_equal_back_fail_decw_pass_decw_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_decw_comp_always_back_fail_wrap_pass_repl_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_incc_comp_equal_back_fail_decw_pass_keep_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_repl_comp_greater_or_equal_back_fail_decc_pass_repl_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_inv_comp_always_back_fail_inv_pass_repl_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_zero_comp_less_or_equal_back_fail_incc_pass_repl_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_zero_comp_greater_back_fail_keep_pass_keep_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_decw_comp_always_back_fail_inv_pass_incc_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_incc_comp_less_or_equal_back_fail_decw_pass_incc_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_inv_comp_less_or_equal_back_fail_decc_pass_keep_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_repl_comp_less_back_fail_decw_pass_wrap_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_keep_comp_never_back_fail_inv_pass_zero_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_zero_comp_greater_back_fail_wrap_pass_decc_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_repl_comp_greater_or_equal_back_fail_inv_pass_inv_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_decw_comp_less_back_fail_keep_pass_decc_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_inv_comp_not_equal_back_fail_decw_pass_inv_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_zero_comp_less_back_fail_inv_pass_inv_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_wrap_comp_not_equal_back_fail_repl_pass_zero_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_inv_comp_equal_back_fail_zero_pass_zero_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_decc_comp_never_back_fail_keep_pass_repl_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_decc_comp_greater_back_fail_wrap_pass_incc_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_decc_comp_greater_or_equal_back_fail_decw_pass_repl_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_repl_comp_equal_back_fail_inv_pass_decw_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_inv_comp_never_back_fail_decc_pass_zero_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_incc_comp_equal_back_fail_incc_pass_repl_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_incc_comp_greater_or_equal_back_fail_decc_pass_decc_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_keep_comp_always_back_fail_incc_pass_incc_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_incc_comp_less_back_fail_inv_pass_inv_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_inv_comp_less_or_equal_back_fail_inv_pass_incc_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_repl_comp_always_back_fail_zero_pass_repl_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_wrap_comp_greater_back_fail_incc_pass_inv_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_zero_comp_less_or_equal_back_fail_incc_pass_wrap_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_inv_comp_greater_or_equal_back_fail_wrap_pass_inv_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_decw_comp_less_back_fail_decc_pass_wrap_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_decw_comp_equal_back_fail_wrap_pass_incc_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_decw_comp_less_or_equal_back_fail_wrap_pass_incc_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_repl_comp_greater_or_equal_back_fail_incc_pass_keep_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_incc_comp_greater_or_equal_back_fail_keep_pass_inv_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_wrap_comp_greater_back_fail_repl_pass_zero_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_decc_comp_less_or_equal_back_fail_incc_pass_incc_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_inv_comp_always_back_fail_incc_pass_repl_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_inv_comp_less_back_fail_inv_pass_repl_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_keep_comp_not_equal_back_fail_inv_pass_incc_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_wrap_comp_never_back_fail_keep_pass_repl_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_keep_comp_never_back_fail_incc_pass_repl_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_inv_comp_less_back_fail_incc_pass_decw_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_inv_comp_less_or_equal_back_fail_decc_pass_zero_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_inv_comp_greater_back_fail_repl_pass_incc_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_wrap_comp_equal_back_fail_repl_pass_wrap_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_decc_comp_always_back_fail_incc_pass_repl_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_keep_comp_less_back_fail_inv_pass_decc_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_decw_comp_not_equal_back_fail_decc_pass_incc_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_wrap_comp_never_back_fail_decc_pass_incc_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_decw_comp_greater_or_equal_back_fail_incc_pass_incc_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_decw_comp_greater_back_fail_repl_pass_incc_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_decc_comp_equal_back_fail_inv_pass_keep_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_keep_comp_not_equal_back_fail_zero_pass_incc_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_keep_comp_equal_back_fail_repl_pass_wrap_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_keep_comp_never_back_fail_inv_pass_repl_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_inv_comp_less_back_fail_decw_pass_decw_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_repl_comp_less_or_equal_back_fail_decw_pass_keep_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_zero_comp_greater_or_equal_back_fail_decc_pass_inv_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_inv_comp_not_equal_back_fail_repl_pass_decc_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_incc_comp_greater_back_fail_repl_pass_incc_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_decc_comp_greater_or_equal_back_fail_zero_pass_repl_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_inv_comp_always_back_fail_keep_pass_incc_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_wrap_comp_greater_or_equal_back_fail_wrap_pass_wrap_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_incc_comp_always_back_fail_repl_pass_incc_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_zero_comp_less_back_fail_inv_pass_decc_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_wrap_comp_always_back_fail_decc_pass_decc_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_incc_comp_never_back_fail_keep_pass_decc_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_incc_comp_equal_back_fail_keep_pass_zero_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_decc_comp_equal_back_fail_keep_pass_repl_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_incc_comp_never_back_fail_decc_pass_inv_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_decc_comp_never_back_fail_decw_pass_zero_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_wrap_comp_never_back_fail_decw_pass_wrap_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_zero_comp_not_equal_back_fail_repl_pass_inv_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_decc_comp_greater_back_fail_zero_pass_decc_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_wrap_comp_less_back_fail_decc_pass_wrap_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_repl_comp_greater_back_fail_repl_pass_repl_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_incc_comp_always_back_fail_zero_pass_wrap_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_repl_comp_greater_or_equal_back_fail_incc_pass_decw_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_repl_comp_greater_back_fail_decc_pass_repl_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_repl_comp_less_or_equal_back_fail_inv_pass_repl_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_wrap_comp_always_back_fail_keep_pass_incc_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_decw_comp_greater_or_equal_back_fail_zero_pass_keep_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_keep_comp_greater_back_fail_repl_pass_decc_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_zero_comp_equal_back_fail_incc_pass_decw_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_repl_comp_equal_back_fail_inv_pass_decc_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_wrap_comp_greater_back_fail_repl_pass_zero_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_keep_comp_less_or_equal_back_fail_zero_pass_repl_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_incc_comp_less_back_fail_repl_pass_decc_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_decc_comp_less_back_fail_decc_pass_repl_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_inv_comp_less_or_equal_back_fail_incc_pass_incc_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_decc_comp_always_back_fail_zero_pass_incc_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_zero_comp_never_back_fail_decw_pass_incc_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_inv_comp_not_equal_back_fail_decc_pass_wrap_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_inv_comp_less_back_fail_zero_pass_decc_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_keep_comp_greater_or_equal_back_fail_wrap_pass_zero_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_keep_comp_less_or_equal_back_fail_decc_pass_wrap_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_keep_comp_never_back_fail_decc_pass_inv_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_wrap_comp_not_equal_back_fail_decc_pass_wrap_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_wrap_comp_always_back_fail_inv_pass_decc_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_decw_comp_not_equal_back_fail_decc_pass_decc_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_decc_comp_less_back_fail_decw_pass_repl_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_repl_comp_never_back_fail_wrap_pass_incc_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_keep_comp_equal_back_fail_incc_pass_incc_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_decc_comp_greater_back_fail_zero_pass_decc_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_inv_comp_less_or_equal_back_fail_incc_pass_wrap_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_incc_comp_greater_back_fail_zero_pass_zero_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_incc_comp_less_back_fail_zero_pass_decw_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_decc_comp_equal_back_fail_decc_pass_zero_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_repl_comp_not_equal_back_fail_decc_pass_keep_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_incc_comp_never_back_fail_incc_pass_keep_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_wrap_comp_always_back_fail_repl_pass_repl_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_decw_comp_never_back_fail_decc_pass_decw_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_zero_comp_not_equal_back_fail_decc_pass_repl_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_zero_comp_greater_back_fail_wrap_pass_zero_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_inv_comp_always_back_fail_wrap_pass_decc_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_inv_comp_never_back_fail_decw_pass_inv_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_decc_comp_greater_or_equal_back_fail_zero_pass_decw_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_repl_comp_always_back_fail_decc_pass_repl_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_inv_comp_greater_or_equal_back_fail_decc_pass_keep_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_decw_comp_less_back_fail_inv_pass_repl_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_wrap_comp_not_equal_back_fail_incc_pass_incc_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_wrap_comp_not_equal_back_fail_repl_pass_incc_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_wrap_comp_greater_or_equal_back_fail_incc_pass_incc_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_inv_comp_always_back_fail_zero_pass_incc_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_decw_comp_equal_back_fail_decw_pass_keep_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_zero_comp_equal_back_fail_repl_pass_decw_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_keep_comp_equal_back_fail_zero_pass_keep_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_incc_comp_equal_back_fail_wrap_pass_decc_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_inv_comp_less_or_equal_back_fail_incc_pass_zero_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_keep_comp_greater_back_fail_keep_pass_decc_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_decc_comp_never_back_fail_repl_pass_decc_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_keep_comp_less_back_fail_zero_pass_repl_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_incc_comp_less_or_equal_back_fail_decc_pass_decw_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_keep_comp_greater_back_fail_repl_pass_wrap_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_decw_comp_greater_or_equal_back_fail_repl_pass_zero_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_inv_comp_always_back_fail_incc_pass_decc_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_repl_comp_greater_or_equal_back_fail_repl_pass_inv_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_decw_comp_greater_or_equal_back_fail_keep_pass_wrap_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_wrap_comp_never_back_fail_incc_pass_wrap_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_zero_comp_equal_back_fail_decc_pass_decc_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_decw_comp_equal_back_fail_inv_pass_wrap_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_wrap_comp_less_or_equal_back_fail_decw_pass_zero_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_repl_comp_not_equal_back_fail_keep_pass_incc_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_keep_comp_never_back_fail_inv_pass_decw_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_incc_comp_less_or_equal_back_fail_keep_pass_incc_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_keep_comp_greater_back_fail_inv_pass_zero_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_decw_comp_never_back_fail_wrap_pass_wrap_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_repl_comp_greater_or_equal_back_fail_decw_pass_wrap_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_inv_comp_always_back_fail_keep_pass_zero_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_incc_comp_equal_back_fail_zero_pass_wrap_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_incc_comp_less_or_equal_back_fail_keep_pass_zero_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_inv_comp_equal_back_fail_wrap_pass_repl_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_wrap_comp_greater_or_equal_back_fail_incc_pass_decw_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_incc_comp_less_or_equal_back_fail_zero_pass_inv_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_inv_comp_not_equal_back_fail_keep_pass_wrap_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_decw_comp_greater_back_fail_keep_pass_keep_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_zero_comp_less_or_equal_back_fail_wrap_pass_zero_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_keep_comp_less_or_equal_back_fail_inv_pass_inv_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_incc_comp_greater_back_fail_decw_pass_zero_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_decc_comp_never_back_fail_wrap_pass_decw_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_keep_comp_not_equal_back_fail_repl_pass_incc_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_incc_comp_equal_back_fail_inv_pass_incc_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_incc_comp_always_back_fail_inv_pass_wrap_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_decw_comp_less_back_fail_decc_pass_zero_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_decc_comp_less_back_fail_inv_pass_inv_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_keep_comp_greater_back_fail_zero_pass_inv_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_keep_comp_greater_or_equal_back_fail_keep_pass_wrap_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_decw_comp_greater_back_fail_zero_pass_decc_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_repl_comp_less_back_fail_decc_pass_inv_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_decc_comp_greater_or_equal_back_fail_decc_pass_keep_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_incc_comp_never_back_fail_keep_pass_keep_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_decc_comp_greater_back_fail_inv_pass_inv_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_incc_comp_less_or_equal_back_fail_wrap_pass_repl_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_repl_comp_always_back_fail_incc_pass_decc_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_decc_comp_always_back_fail_decc_pass_decw_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_repl_comp_greater_or_equal_back_fail_wrap_pass_keep_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_keep_comp_less_or_equal_back_fail_zero_pass_keep_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_decw_comp_not_equal_back_fail_zero_pass_inv_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_decw_comp_equal_back_fail_incc_pass_repl_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_decc_comp_greater_back_fail_repl_pass_decc_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_incc_comp_always_back_fail_inv_pass_inv_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_decw_comp_less_back_fail_keep_pass_zero_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_zero_comp_not_equal_back_fail_incc_pass_inv_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_repl_comp_less_or_equal_back_fail_decc_pass_incc_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_wrap_comp_greater_back_fail_repl_pass_decw_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_inv_comp_not_equal_back_fail_wrap_pass_wrap_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_keep_comp_greater_back_fail_repl_pass_inv_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_decc_comp_equal_back_fail_keep_pass_keep_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_keep_comp_not_equal_back_fail_repl_pass_wrap_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_inv_comp_less_or_equal_back_fail_zero_pass_incc_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_incc_comp_greater_or_equal_back_fail_zero_pass_keep_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_decw_comp_not_equal_back_fail_keep_pass_incc_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_keep_comp_greater_back_fail_inv_pass_decc_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_decc_comp_not_equal_back_fail_wrap_pass_keep_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_inv_comp_greater_back_fail_decw_pass_incc_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_wrap_comp_greater_or_equal_back_fail_decc_pass_incc_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_keep_comp_never_back_fail_repl_pass_decc_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_repl_comp_greater_or_equal_back_fail_zero_pass_keep_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_decw_comp_never_back_fail_inv_pass_inv_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_keep_comp_greater_or_equal_back_fail_wrap_pass_zero_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_incc_comp_greater_back_fail_inv_pass_decc_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_incc_comp_less_back_fail_decc_pass_keep_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_decw_comp_not_equal_back_fail_zero_pass_wrap_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_wrap_comp_never_back_fail_wrap_pass_keep_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_keep_comp_not_equal_back_fail_zero_pass_zero_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_zero_comp_never_back_fail_decw_pass_incc_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_zero_comp_always_back_fail_wrap_pass_repl_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_inv_comp_greater_or_equal_back_fail_incc_pass_keep_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_zero_comp_not_equal_back_fail_inv_pass_zero_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_inv_comp_less_or_equal_back_fail_incc_pass_repl_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_wrap_comp_not_equal_back_fail_wrap_pass_zero_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_decw_comp_less_back_fail_keep_pass_repl_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_zero_comp_never_back_fail_keep_pass_decc_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_wrap_comp_less_or_equal_back_fail_decc_pass_incc_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_repl_comp_less_or_equal_back_fail_decc_pass_decc_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_inv_comp_greater_or_equal_back_fail_inv_pass_inv_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_zero_comp_greater_or_equal_back_fail_incc_pass_decw_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_zero_comp_always_back_fail_keep_pass_repl_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_zero_comp_equal_back_fail_keep_pass_decc_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_keep_comp_equal_back_fail_wrap_pass_decc_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_inv_comp_less_back_fail_repl_pass_wrap_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_incc_comp_less_or_equal_back_fail_zero_pass_repl_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_repl_comp_not_equal_back_fail_decc_pass_incc_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_decc_comp_greater_or_equal_back_fail_decw_pass_incc_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_zero_comp_less_or_equal_back_fail_inv_pass_inv_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_keep_comp_less_or_equal_back_fail_decw_pass_repl_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_incc_comp_equal_back_fail_wrap_pass_decw_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_incc_comp_equal_back_fail_repl_pass_wrap_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_decc_comp_greater_or_equal_back_fail_keep_pass_inv_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_inv_comp_less_or_equal_back_fail_zero_pass_incc_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_decw_comp_not_equal_back_fail_keep_pass_inv_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_repl_comp_less_back_fail_decc_pass_decw_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_zero_comp_less_or_equal_back_fail_keep_pass_inv_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_keep_comp_less_or_equal_back_fail_keep_pass_incc_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_wrap_comp_equal_back_fail_zero_pass_repl_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_decw_comp_always_back_fail_wrap_pass_decc_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_wrap_comp_greater_or_equal_back_fail_zero_pass_incc_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_inv_comp_never_back_fail_decw_pass_incc_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_wrap_comp_less_back_fail_zero_pass_repl_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_inv_comp_not_equal_back_fail_inv_pass_zero_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_decc_comp_less_or_equal_back_fail_wrap_pass_inv_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_keep_comp_equal_back_fail_incc_pass_incc_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_repl_comp_not_equal_back_fail_inv_pass_keep_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_incc_comp_less_or_equal_back_fail_incc_pass_zero_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_wrap_comp_equal_back_fail_repl_pass_keep_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_inv_comp_always_back_fail_incc_pass_zero_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_zero_comp_less_or_equal_back_fail_decc_pass_inv_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_inv_comp_less_back_fail_incc_pass_keep_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_decc_comp_greater_back_fail_inv_pass_repl_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_keep_comp_greater_or_equal_back_fail_repl_pass_keep_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_decw_comp_always_back_fail_decc_pass_decw_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_decc_comp_less_back_fail_zero_pass_keep_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_decc_comp_not_equal_back_fail_inv_pass_zero_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_incc_comp_equal_back_fail_keep_pass_zero_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_decc_comp_less_back_fail_incc_pass_incc_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_keep_comp_always_back_fail_repl_pass_inv_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_zero_comp_not_equal_back_fail_inv_pass_repl_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_decw_comp_greater_back_fail_decc_pass_inv_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_keep_comp_less_or_equal_back_fail_decw_pass_inv_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_inv_comp_equal_back_fail_inv_pass_inv_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_decc_comp_never_back_fail_wrap_pass_decc_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_zero_comp_equal_back_fail_zero_pass_zero_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_repl_comp_equal_back_fail_inv_pass_keep_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_keep_comp_not_equal_back_fail_decw_pass_decw_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_wrap_comp_greater_or_equal_back_fail_decw_pass_decw_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_decc_comp_equal_back_fail_inv_pass_incc_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_decc_comp_not_equal_back_fail_repl_pass_keep_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_wrap_comp_never_back_fail_repl_pass_zero_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_incc_comp_equal_back_fail_keep_pass_decc_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_inv_comp_less_or_equal_back_fail_incc_pass_wrap_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_decc_comp_less_back_fail_decw_pass_keep_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_keep_comp_equal_back_fail_decc_pass_inv_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_zero_comp_never_back_fail_decw_pass_incc_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_zero_comp_equal_back_fail_zero_pass_keep_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_wrap_comp_always_back_fail_incc_pass_zero_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_zero_comp_equal_back_fail_keep_pass_keep_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_incc_comp_less_back_fail_wrap_pass_keep_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_decc_comp_always_back_fail_decw_pass_keep_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_decw_comp_greater_or_equal_back_fail_zero_pass_inv_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_decw_comp_never_back_fail_incc_pass_keep_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_incc_comp_not_equal_back_fail_keep_pass_decc_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_zero_comp_equal_back_fail_wrap_pass_keep_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_repl_comp_not_equal_back_fail_repl_pass_inv_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_inv_comp_less_or_equal_back_fail_incc_pass_wrap_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_keep_comp_greater_back_fail_zero_pass_decw_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_wrap_comp_less_or_equal_back_fail_keep_pass_zero_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_incc_comp_less_back_fail_repl_pass_zero_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_repl_comp_less_or_equal_back_fail_zero_pass_decc_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_decw_comp_never_back_fail_decw_pass_incc_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_decw_comp_less_or_equal_back_fail_incc_pass_zero_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_decw_comp_always_back_fail_repl_pass_decc_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_zero_comp_less_or_equal_back_fail_decw_pass_wrap_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_decc_comp_less_or_equal_back_fail_repl_pass_decw_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_repl_comp_not_equal_back_fail_keep_pass_wrap_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_repl_comp_less_back_fail_zero_pass_wrap_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_repl_comp_greater_back_fail_inv_pass_wrap_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_repl_comp_always_back_fail_decw_pass_decc_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_zero_comp_greater_back_fail_decc_pass_zero_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_repl_comp_equal_back_fail_repl_pass_repl_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_repl_comp_always_back_fail_keep_pass_zero_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_inv_comp_less_back_fail_repl_pass_wrap_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_repl_comp_always_back_fail_zero_pass_decw_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_zero_comp_greater_back_fail_decw_pass_decw_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_incc_comp_always_back_fail_decw_pass_keep_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_keep_comp_equal_back_fail_zero_pass_repl_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_decw_comp_less_or_equal_back_fail_inv_pass_incc_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_decc_comp_less_or_equal_back_fail_repl_pass_inv_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_inv_comp_equal_back_fail_keep_pass_keep_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_wrap_comp_less_back_fail_decw_pass_incc_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_decc_comp_greater_or_equal_back_fail_keep_pass_keep_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_wrap_comp_equal_back_fail_incc_pass_decw_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_decw_comp_greater_or_equal_back_fail_inv_pass_zero_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_decw_comp_never_back_fail_keep_pass_inv_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_inv_comp_less_back_fail_repl_pass_inv_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_inv_comp_greater_or_equal_back_fail_inv_pass_decw_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_zero_comp_greater_back_fail_keep_pass_zero_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_decw_comp_greater_or_equal_back_fail_zero_pass_zero_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_decc_comp_greater_back_fail_inv_pass_zero_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_inv_comp_less_back_fail_decc_pass_zero_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_decc_comp_greater_back_fail_keep_pass_inv_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_keep_comp_equal_back_fail_decw_pass_wrap_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_wrap_comp_equal_back_fail_incc_pass_zero_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_keep_comp_less_or_equal_back_fail_decc_pass_keep_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_keep_comp_equal_back_fail_wrap_pass_zero_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_wrap_comp_not_equal_back_fail_inv_pass_decw_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_incc_comp_less_back_fail_inv_pass_repl_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_wrap_comp_not_equal_back_fail_wrap_pass_inv_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_zero_comp_less_back_fail_zero_pass_repl_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_inv_comp_greater_back_fail_incc_pass_inv_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_incc_comp_never_back_fail_incc_pass_decw_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_decc_comp_greater_or_equal_back_fail_repl_pass_keep_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_decc_comp_not_equal_back_fail_decw_pass_zero_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_inv_comp_always_back_fail_incc_pass_decw_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_repl_comp_greater_back_fail_wrap_pass_repl_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_repl_comp_greater_or_equal_back_fail_repl_pass_zero_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_zero_comp_greater_or_equal_back_fail_wrap_pass_decc_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_keep_comp_always_back_fail_repl_pass_zero_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_decc_comp_greater_or_equal_back_fail_decw_pass_zero_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_repl_comp_greater_back_fail_wrap_pass_inv_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_keep_comp_equal_back_fail_incc_pass_wrap_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_inv_comp_less_back_fail_keep_pass_inv_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_decc_comp_not_equal_back_fail_inv_pass_wrap_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_decw_comp_less_or_equal_back_fail_inv_pass_decc_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_decc_comp_never_back_fail_decc_pass_inv_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_inv_comp_not_equal_back_fail_wrap_pass_decc_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_decc_comp_not_equal_back_fail_decc_pass_zero_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_wrap_comp_less_back_fail_repl_pass_wrap_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_zero_comp_greater_back_fail_repl_pass_decc_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_wrap_comp_equal_back_fail_repl_pass_wrap_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_inv_comp_always_back_fail_decc_pass_wrap_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_wrap_comp_less_back_fail_decw_pass_repl_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_keep_comp_greater_back_fail_zero_pass_decw_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_incc_comp_equal_back_fail_repl_pass_decw_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_decc_comp_never_back_fail_repl_pass_decw_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_zero_comp_never_back_fail_inv_pass_zero_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_keep_comp_less_back_fail_decw_pass_keep_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_zero_comp_not_equal_back_fail_keep_pass_incc_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_decc_comp_greater_or_equal_back_fail_decw_pass_incc_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_zero_comp_always_back_fail_keep_pass_inv_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_keep_comp_less_back_fail_decc_pass_wrap_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_wrap_comp_equal_back_fail_wrap_pass_keep_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_inv_comp_always_back_fail_repl_pass_zero_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_zero_comp_less_back_fail_repl_pass_keep_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_zero_comp_never_back_fail_repl_pass_repl_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_incc_comp_never_back_fail_incc_pass_decw_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_keep_comp_greater_or_equal_back_fail_keep_pass_inv_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_decw_comp_less_or_equal_back_fail_incc_pass_decw_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_decw_comp_not_equal_back_fail_wrap_pass_wrap_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_repl_comp_not_equal_back_fail_decc_pass_decc_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_zero_comp_always_back_fail_wrap_pass_keep_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_zero_comp_equal_back_fail_decw_pass_keep_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_wrap_comp_equal_back_fail_keep_pass_wrap_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_zero_comp_greater_back_fail_keep_pass_inv_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_decc_comp_greater_back_fail_keep_pass_keep_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_repl_comp_always_back_fail_decw_pass_keep_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_decw_comp_less_back_fail_keep_pass_repl_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_keep_comp_always_back_fail_decc_pass_wrap_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_keep_comp_less_back_fail_zero_pass_zero_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_repl_comp_never_back_fail_zero_pass_inv_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_decc_comp_always_back_fail_keep_pass_wrap_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_zero_comp_less_back_fail_decw_pass_decc_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_zero_comp_never_back_fail_incc_pass_incc_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_wrap_comp_never_back_fail_incc_pass_incc_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_repl_comp_never_back_fail_decw_pass_zero_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_keep_comp_always_back_fail_incc_pass_decw_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_repl_comp_less_or_equal_back_fail_decc_pass_zero_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_inv_comp_greater_or_equal_back_fail_wrap_pass_incc_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_incc_comp_always_back_fail_wrap_pass_keep_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_decc_comp_less_or_equal_back_fail_decw_pass_wrap_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_decw_comp_always_back_fail_inv_pass_decc_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_keep_comp_always_back_fail_inv_pass_wrap_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_keep_comp_never_back_fail_zero_pass_decw_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_repl_comp_greater_back_fail_repl_pass_repl_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_zero_comp_greater_back_fail_keep_pass_decc_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_keep_comp_equal_back_fail_decc_pass_zero_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_repl_comp_equal_back_fail_inv_pass_inv_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_decw_comp_less_or_equal_back_fail_decc_pass_inv_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_decw_comp_equal_back_fail_decc_pass_decc_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_incc_comp_always_back_fail_keep_pass_wrap_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_zero_comp_less_back_fail_zero_pass_zero_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_decc_comp_equal_back_fail_decc_pass_keep_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_decc_comp_greater_back_fail_keep_pass_zero_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_zero_comp_equal_back_fail_keep_pass_inv_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_inv_comp_less_back_fail_inv_pass_decw_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_wrap_comp_greater_back_fail_keep_pass_keep_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_incc_comp_equal_back_fail_repl_pass_decw_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_keep_comp_greater_or_equal_back_fail_zero_pass_keep_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_wrap_comp_never_back_fail_keep_pass_repl_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_zero_comp_always_back_fail_inv_pass_zero_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_keep_comp_greater_or_equal_back_fail_inv_pass_incc_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_zero_comp_never_back_fail_wrap_pass_wrap_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_zero_comp_greater_or_equal_back_fail_wrap_pass_decc_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_keep_comp_less_back_fail_zero_pass_incc_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_keep_comp_not_equal_back_fail_decw_pass_wrap_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_incc_comp_greater_or_equal_back_fail_zero_pass_inv_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_decw_comp_not_equal_back_fail_keep_pass_decc_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_incc_comp_greater_or_equal_back_fail_wrap_pass_decc_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_decw_comp_not_equal_back_fail_inv_pass_inv_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_incc_comp_greater_back_fail_repl_pass_decc_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_inv_comp_less_back_fail_keep_pass_decw_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_zero_comp_less_back_fail_zero_pass_incc_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_zero_comp_less_or_equal_back_fail_repl_pass_wrap_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_decw_comp_not_equal_back_fail_decw_pass_inv_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_wrap_comp_greater_or_equal_back_fail_incc_pass_zero_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_decw_comp_always_back_fail_zero_pass_decc_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_keep_comp_less_back_fail_decc_pass_zero_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_decc_comp_not_equal_back_fail_keep_pass_inv_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_repl_comp_less_or_equal_back_fail_inv_pass_inv_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_inv_comp_always_back_fail_keep_pass_decc_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_inv_comp_never_back_fail_incc_pass_keep_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_repl_comp_equal_back_fail_inv_pass_decc_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_inv_comp_always_back_fail_decw_pass_incc_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_zero_comp_less_or_equal_back_fail_incc_pass_zero_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_incc_comp_less_back_fail_repl_pass_wrap_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_decw_comp_less_back_fail_repl_pass_repl_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_keep_comp_less_or_equal_back_fail_zero_pass_inv_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_incc_comp_greater_back_fail_zero_pass_keep_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_decw_comp_less_or_equal_back_fail_zero_pass_wrap_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_keep_comp_never_back_fail_repl_pass_decw_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_repl_comp_less_back_fail_incc_pass_inv_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_zero_comp_less_or_equal_back_fail_zero_pass_repl_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_wrap_comp_always_back_fail_decw_pass_decw_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_incc_comp_always_back_fail_decc_pass_inv_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_incc_comp_always_back_fail_incc_pass_inv_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_incc_comp_less_back_fail_decc_pass_incc_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_keep_comp_not_equal_back_fail_keep_pass_zero_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_repl_comp_not_equal_back_fail_keep_pass_wrap_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_decw_comp_less_back_fail_wrap_pass_wrap_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_repl_comp_never_back_fail_incc_pass_decw_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_keep_comp_always_back_fail_zero_pass_zero_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_decw_comp_equal_back_fail_inv_pass_zero_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_decw_comp_greater_back_fail_decw_pass_wrap_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_decc_comp_greater_or_equal_back_fail_incc_pass_repl_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_repl_comp_never_back_fail_keep_pass_repl_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_incc_comp_equal_back_fail_incc_pass_zero_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_decc_comp_greater_back_fail_incc_pass_repl_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_decc_comp_greater_or_equal_back_fail_keep_pass_repl_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_inv_comp_greater_back_fail_keep_pass_decw_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_repl_comp_never_back_fail_decc_pass_decw_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_wrap_comp_equal_back_fail_repl_pass_incc_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_incc_comp_never_back_fail_decc_pass_inv_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_incc_comp_not_equal_back_fail_wrap_pass_keep_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_incc_comp_less_or_equal_back_fail_decw_pass_inv_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_incc_comp_not_equal_back_fail_keep_pass_zero_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_repl_comp_never_back_fail_wrap_pass_wrap_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_inv_comp_equal_back_fail_inv_pass_repl_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_incc_comp_equal_back_fail_repl_pass_inv_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_decw_comp_always_back_fail_inv_pass_decc_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_repl_comp_less_or_equal_back_fail_wrap_pass_incc_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_keep_comp_equal_back_fail_repl_pass_decc_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_keep_comp_always_back_fail_repl_pass_repl_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_decc_comp_never_back_fail_decw_pass_decc_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_incc_comp_not_equal_back_fail_keep_pass_repl_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_zero_comp_less_back_fail_inv_pass_repl_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_keep_comp_never_back_fail_incc_pass_zero_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_wrap_comp_greater_back_fail_incc_pass_keep_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_incc_comp_never_back_fail_inv_pass_decw_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_incc_comp_less_back_fail_zero_pass_zero_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_repl_comp_never_back_fail_wrap_pass_repl_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_decw_comp_less_back_fail_decw_pass_keep_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_incc_comp_always_back_fail_decc_pass_decc_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_decc_comp_equal_back_fail_decw_pass_repl_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_zero_comp_greater_or_equal_back_fail_repl_pass_incc_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_repl_comp_greater_back_fail_inv_pass_zero_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_repl_comp_less_or_equal_back_fail_decc_pass_incc_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_incc_comp_always_back_fail_decw_pass_wrap_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_keep_comp_less_back_fail_decc_pass_inv_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_decc_comp_equal_back_fail_incc_pass_decw_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_zero_comp_greater_or_equal_back_fail_inv_pass_incc_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_incc_comp_not_equal_back_fail_incc_pass_keep_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_wrap_comp_greater_back_fail_inv_pass_decw_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_keep_comp_not_equal_back_fail_repl_pass_incc_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_wrap_comp_greater_or_equal_back_fail_incc_pass_repl_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_incc_comp_not_equal_back_fail_keep_pass_zero_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_decc_comp_always_back_fail_decc_pass_inv_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_wrap_comp_greater_or_equal_back_fail_repl_pass_zero_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_zero_comp_not_equal_back_fail_repl_pass_keep_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_decw_comp_greater_or_equal_back_fail_wrap_pass_repl_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_incc_comp_never_back_fail_wrap_pass_repl_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_keep_comp_less_or_equal_back_fail_repl_pass_zero_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_incc_comp_greater_back_fail_repl_pass_inv_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_keep_comp_never_back_fail_incc_pass_decw_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_zero_comp_never_back_fail_decc_pass_decw_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_zero_comp_never_back_fail_repl_pass_incc_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_wrap_comp_always_back_fail_repl_pass_inv_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_keep_comp_greater_back_fail_zero_pass_incc_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_decw_comp_greater_or_equal_back_fail_incc_pass_keep_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_keep_comp_less_or_equal_back_fail_decw_pass_wrap_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_wrap_comp_greater_back_fail_wrap_pass_incc_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_wrap_comp_never_back_fail_decc_pass_zero_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_zero_comp_always_back_fail_zero_pass_inv_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_repl_comp_not_equal_back_fail_wrap_pass_decc_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_decw_comp_greater_or_equal_back_fail_inv_pass_repl_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_decc_comp_greater_or_equal_back_fail_zero_pass_wrap_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_decw_comp_equal_back_fail_decw_pass_decc_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_wrap_comp_less_back_fail_decc_pass_keep_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_decc_comp_never_back_fail_wrap_pass_inv_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_inv_comp_greater_or_equal_back_fail_incc_pass_zero_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_decw_comp_never_back_fail_zero_pass_decc_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_repl_comp_not_equal_back_fail_incc_pass_decc_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_incc_comp_always_back_fail_keep_pass_decw_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_zero_comp_never_back_fail_zero_pass_decc_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_inv_comp_not_equal_back_fail_decc_pass_decw_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_zero_comp_equal_back_fail_zero_pass_zero_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_repl_comp_never_back_fail_incc_pass_repl_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_zero_comp_less_back_fail_keep_pass_decw_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_repl_comp_always_back_fail_decc_pass_wrap_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_decw_comp_greater_back_fail_decc_pass_repl_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_inv_comp_less_back_fail_repl_pass_zero_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_keep_comp_greater_back_fail_decw_pass_wrap_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_decw_comp_less_back_fail_decc_pass_repl_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_decc_comp_greater_back_fail_inv_pass_decw_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_incc_comp_less_or_equal_back_fail_repl_pass_inv_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_zero_comp_greater_or_equal_back_fail_repl_pass_decw_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_keep_comp_never_back_fail_inv_pass_decc_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_inv_comp_equal_back_fail_keep_pass_zero_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_decc_comp_always_back_fail_zero_pass_decc_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_keep_comp_not_equal_back_fail_wrap_pass_repl_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_incc_comp_not_equal_back_fail_repl_pass_keep_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_repl_comp_not_equal_back_fail_keep_pass_repl_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_zero_comp_less_or_equal_back_fail_wrap_pass_decc_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_decc_comp_less_or_equal_back_fail_inv_pass_keep_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_decc_comp_greater_back_fail_keep_pass_zero_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_repl_comp_always_back_fail_decc_pass_keep_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_zero_comp_equal_back_fail_decw_pass_incc_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_wrap_comp_never_back_fail_incc_pass_keep_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_repl_comp_less_or_equal_back_fail_inv_pass_decc_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_repl_comp_greater_or_equal_back_fail_zero_pass_incc_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_inv_comp_never_back_fail_wrap_pass_zero_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_decc_comp_less_or_equal_back_fail_inv_pass_zero_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_keep_comp_equal_back_fail_incc_pass_decc_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_zero_comp_less_or_equal_back_fail_wrap_pass_zero_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_decc_comp_always_back_fail_zero_pass_inv_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_decw_comp_greater_or_equal_back_fail_wrap_pass_inv_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_repl_comp_less_back_fail_repl_pass_zero_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_inv_comp_always_back_fail_repl_pass_wrap_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_decc_comp_equal_back_fail_zero_pass_repl_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_repl_comp_always_back_fail_repl_pass_zero_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_incc_comp_never_back_fail_keep_pass_inv_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_wrap_comp_never_back_fail_incc_pass_wrap_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_zero_comp_less_or_equal_back_fail_inv_pass_decw_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_decw_comp_less_back_fail_inv_pass_incc_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_repl_comp_never_back_fail_incc_pass_repl_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_inv_comp_less_back_fail_zero_pass_incc_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_incc_comp_less_or_equal_back_fail_repl_pass_keep_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_wrap_comp_never_back_fail_zero_pass_incc_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_inv_comp_equal_back_fail_keep_pass_zero_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_decw_comp_greater_back_fail_decc_pass_keep_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_decw_comp_greater_back_fail_decw_pass_decc_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_repl_comp_less_back_fail_wrap_pass_repl_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_inv_comp_less_back_fail_zero_pass_inv_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_decc_comp_always_back_fail_decw_pass_inv_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_zero_comp_less_or_equal_back_fail_inv_pass_zero_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_incc_comp_greater_back_fail_keep_pass_inv_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_decw_comp_equal_back_fail_zero_pass_keep_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_decc_comp_always_back_fail_keep_pass_inv_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_wrap_comp_not_equal_back_fail_decc_pass_incc_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_decw_comp_always_back_fail_decc_pass_wrap_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_decc_comp_not_equal_back_fail_repl_pass_decc_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_decc_comp_always_back_fail_decc_pass_incc_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_incc_comp_always_back_fail_repl_pass_keep_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_wrap_comp_not_equal_back_fail_decc_pass_repl_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_keep_comp_not_equal_back_fail_zero_pass_inv_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_decw_comp_not_equal_back_fail_keep_pass_zero_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_zero_comp_not_equal_back_fail_wrap_pass_zero_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_incc_comp_not_equal_back_fail_decc_pass_repl_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_decw_comp_never_back_fail_decw_pass_incc_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_decc_comp_equal_back_fail_zero_pass_decc_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_incc_comp_less_back_fail_repl_pass_decc_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_wrap_comp_not_equal_back_fail_decw_pass_zero_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_keep_comp_not_equal_back_fail_keep_pass_zero_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_keep_comp_never_back_fail_wrap_pass_inv_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_incc_comp_never_back_fail_decc_pass_keep_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_decc_comp_less_back_fail_decc_pass_decc_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_wrap_comp_equal_back_fail_decw_pass_repl_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_inv_comp_equal_back_fail_keep_pass_incc_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_zero_comp_not_equal_back_fail_decc_pass_decc_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_zero_comp_never_back_fail_decw_pass_keep_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_zero_comp_always_back_fail_inv_pass_repl_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_zero_comp_always_back_fail_incc_pass_zero_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_decc_comp_less_back_fail_incc_pass_repl_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_decw_comp_equal_back_fail_incc_pass_decw_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_decc_comp_not_equal_back_fail_decc_pass_inv_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_decc_comp_greater_back_fail_wrap_pass_decw_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_decc_comp_less_or_equal_back_fail_inv_pass_wrap_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_wrap_comp_equal_back_fail_inv_pass_zero_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_decc_comp_greater_or_equal_back_fail_wrap_pass_keep_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_decc_comp_greater_or_equal_back_fail_keep_pass_wrap_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_inv_comp_less_or_equal_back_fail_decw_pass_inv_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_inv_comp_never_back_fail_decc_pass_repl_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_repl_comp_always_back_fail_repl_pass_incc_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_decc_comp_greater_or_equal_back_fail_decc_pass_wrap_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_inv_comp_greater_back_fail_decc_pass_inv_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_inv_comp_less_or_equal_back_fail_incc_pass_wrap_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_incc_comp_less_back_fail_inv_pass_zero_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_zero_comp_not_equal_back_fail_incc_pass_inv_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_inv_comp_equal_back_fail_zero_pass_wrap_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_wrap_comp_not_equal_back_fail_decw_pass_keep_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_wrap_comp_always_back_fail_keep_pass_wrap_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_repl_comp_not_equal_back_fail_incc_pass_wrap_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_decw_comp_less_or_equal_back_fail_wrap_pass_inv_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_zero_comp_less_or_equal_back_fail_zero_pass_zero_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_keep_comp_not_equal_back_fail_decc_pass_keep_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_repl_comp_equal_back_fail_keep_pass_keep_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_zero_comp_never_back_fail_inv_pass_decw_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_decw_comp_always_back_fail_keep_pass_decw_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_inv_comp_always_back_fail_keep_pass_inv_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_decc_comp_equal_back_fail_inv_pass_keep_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_zero_comp_not_equal_back_fail_incc_pass_repl_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_decc_comp_less_back_fail_repl_pass_keep_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_keep_comp_always_back_fail_repl_pass_zero_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_decc_comp_less_back_fail_repl_pass_incc_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_keep_comp_greater_back_fail_wrap_pass_inv_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_inv_comp_greater_or_equal_back_fail_decw_pass_incc_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_repl_comp_always_back_fail_zero_pass_zero_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_incc_comp_always_back_fail_keep_pass_incc_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_inv_comp_less_or_equal_back_fail_inv_pass_repl_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_repl_comp_equal_back_fail_incc_pass_decc_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_keep_comp_less_back_fail_zero_pass_incc_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_decw_comp_equal_back_fail_inv_pass_decw_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_repl_comp_less_back_fail_keep_pass_decc_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_zero_comp_never_back_fail_decc_pass_decc_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_incc_comp_always_back_fail_incc_pass_decc_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_repl_comp_equal_back_fail_inv_pass_wrap_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_decw_comp_greater_back_fail_decc_pass_keep_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_decc_comp_less_or_equal_back_fail_repl_pass_wrap_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_keep_comp_never_back_fail_inv_pass_incc_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_repl_comp_equal_back_fail_repl_pass_decw_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_wrap_comp_not_equal_back_fail_incc_pass_repl_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_keep_comp_greater_back_fail_keep_pass_incc_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_inv_comp_never_back_fail_inv_pass_decw_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_decc_comp_greater_back_fail_keep_pass_decw_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_keep_comp_equal_back_fail_incc_pass_decw_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_repl_comp_never_back_fail_wrap_pass_wrap_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_inv_comp_greater_back_fail_inv_pass_incc_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_inv_comp_always_back_fail_incc_pass_repl_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_keep_comp_less_or_equal_back_fail_repl_pass_zero_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_wrap_comp_greater_or_equal_back_fail_incc_pass_repl_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_repl_comp_never_back_fail_zero_pass_wrap_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_decw_comp_not_equal_back_fail_incc_pass_repl_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_decw_comp_less_back_fail_keep_pass_repl_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_wrap_comp_less_or_equal_back_fail_repl_pass_zero_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_inv_comp_equal_back_fail_zero_pass_decc_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_decw_comp_never_back_fail_zero_pass_inv_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_inv_comp_not_equal_back_fail_inv_pass_decw_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_wrap_comp_not_equal_back_fail_decw_pass_zero_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_decw_comp_never_back_fail_inv_pass_keep_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_inv_comp_never_back_fail_inv_pass_repl_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_wrap_comp_equal_back_fail_incc_pass_inv_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_keep_comp_less_back_fail_wrap_pass_incc_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_decc_comp_never_back_fail_incc_pass_keep_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_repl_comp_greater_back_fail_keep_pass_decw_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_repl_comp_less_or_equal_back_fail_wrap_pass_repl_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_keep_comp_less_back_fail_decc_pass_decc_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_inv_comp_never_back_fail_keep_pass_zero_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_zero_comp_not_equal_back_fail_zero_pass_inv_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_keep_comp_greater_back_fail_zero_pass_inv_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_keep_comp_always_back_fail_zero_pass_incc_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_zero_comp_greater_back_fail_incc_pass_repl_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_wrap_comp_less_or_equal_back_fail_inv_pass_decw_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_inv_comp_not_equal_back_fail_incc_pass_repl_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_incc_comp_always_back_fail_zero_pass_inv_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_incc_comp_less_or_equal_back_fail_inv_pass_decw_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_inv_comp_greater_back_fail_zero_pass_decw_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_wrap_comp_less_back_fail_decc_pass_zero_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_wrap_comp_less_or_equal_back_fail_inv_pass_inv_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_wrap_comp_not_equal_back_fail_incc_pass_inv_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_incc_comp_equal_back_fail_incc_pass_decc_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_incc_comp_always_back_fail_wrap_pass_zero_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_incc_comp_never_back_fail_wrap_pass_inv_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_incc_comp_less_back_fail_zero_pass_keep_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_inv_comp_greater_back_fail_decw_pass_inv_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_decc_comp_equal_back_fail_decc_pass_repl_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_decw_comp_equal_back_fail_decw_pass_wrap_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_repl_comp_not_equal_back_fail_repl_pass_incc_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_inv_comp_never_back_fail_repl_pass_repl_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_wrap_comp_not_equal_back_fail_decc_pass_repl_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_keep_comp_greater_or_equal_back_fail_inv_pass_zero_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_repl_comp_less_back_fail_repl_pass_wrap_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_keep_comp_greater_or_equal_back_fail_zero_pass_decc_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_inv_comp_equal_back_fail_zero_pass_wrap_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_decw_comp_less_back_fail_keep_pass_incc_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_decw_comp_always_back_fail_zero_pass_repl_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_zero_comp_equal_back_fail_inv_pass_decc_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_decw_comp_greater_or_equal_back_fail_zero_pass_decc_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_wrap_comp_greater_or_equal_back_fail_decw_pass_repl_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_incc_comp_always_back_fail_incc_pass_repl_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_inv_comp_equal_back_fail_repl_pass_incc_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_zero_comp_less_or_equal_back_fail_incc_pass_wrap_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_incc_comp_less_or_equal_back_fail_zero_pass_wrap_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_decc_comp_greater_back_fail_keep_pass_decc_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_inv_comp_greater_back_fail_decc_pass_repl_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_zero_comp_never_back_fail_wrap_pass_zero_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_wrap_comp_greater_back_fail_decc_pass_zero_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_repl_comp_greater_or_equal_back_fail_zero_pass_keep_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_zero_comp_less_back_fail_decc_pass_wrap_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_zero_comp_equal_back_fail_keep_pass_decw_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_keep_comp_less_back_fail_inv_pass_incc_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_decw_comp_equal_back_fail_keep_pass_decc_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_incc_comp_equal_back_fail_decw_pass_decw_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_inv_comp_less_or_equal_back_fail_incc_pass_inv_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_zero_comp_greater_or_equal_back_fail_inv_pass_decc_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_decw_comp_greater_or_equal_back_fail_repl_pass_decw_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_incc_comp_greater_or_equal_back_fail_zero_pass_repl_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_inv_comp_never_back_fail_inv_pass_wrap_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_wrap_comp_not_equal_back_fail_zero_pass_keep_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_repl_comp_equal_back_fail_repl_pass_decw_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_inv_comp_less_or_equal_back_fail_decw_pass_keep_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_zero_comp_not_equal_back_fail_decw_pass_zero_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_inv_comp_greater_or_equal_back_fail_repl_pass_decw_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_wrap_comp_greater_back_fail_inv_pass_decc_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_incc_comp_always_back_fail_repl_pass_inv_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_repl_comp_equal_back_fail_keep_pass_wrap_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_inv_comp_greater_back_fail_incc_pass_zero_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_keep_comp_never_back_fail_decw_pass_decw_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_repl_comp_not_equal_back_fail_wrap_pass_inv_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_keep_comp_less_or_equal_back_fail_decw_pass_decc_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_inv_comp_equal_back_fail_keep_pass_decc_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_decw_comp_less_back_fail_repl_pass_decw_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_repl_comp_greater_or_equal_back_fail_zero_pass_decw_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_wrap_comp_equal_back_fail_zero_pass_inv_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_incc_comp_greater_or_equal_back_fail_zero_pass_wrap_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_keep_comp_not_equal_back_fail_wrap_pass_zero_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_incc_comp_never_back_fail_decc_pass_keep_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_decc_comp_always_back_fail_decc_pass_incc_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_decc_comp_less_back_fail_incc_pass_incc_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_decw_comp_greater_or_equal_back_fail_inv_pass_wrap_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_keep_comp_not_equal_back_fail_wrap_pass_incc_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_repl_comp_always_back_fail_incc_pass_decw_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_zero_comp_less_or_equal_back_fail_zero_pass_inv_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_repl_comp_never_back_fail_incc_pass_zero_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_wrap_comp_never_back_fail_decc_pass_repl_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_incc_comp_never_back_fail_decw_pass_wrap_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_zero_comp_less_or_equal_back_fail_wrap_pass_decw_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_inv_comp_never_back_fail_incc_pass_decc_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_decc_comp_less_or_equal_back_fail_inv_pass_repl_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_decc_comp_never_back_fail_wrap_pass_decw_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_zero_comp_never_back_fail_decc_pass_zero_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_repl_comp_greater_back_fail_incc_pass_keep_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_decc_comp_never_back_fail_inv_pass_keep_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_zero_comp_greater_back_fail_decc_pass_incc_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_wrap_comp_less_back_fail_keep_pass_decc_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_inv_comp_always_back_fail_wrap_pass_incc_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_inv_comp_less_or_equal_back_fail_decc_pass_decc_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_incc_comp_equal_back_fail_wrap_pass_inv_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_inv_comp_equal_back_fail_decw_pass_keep_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_keep_comp_always_back_fail_repl_pass_decc_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_decc_comp_greater_back_fail_incc_pass_zero_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_zero_comp_equal_back_fail_decc_pass_decw_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_decw_comp_less_back_fail_zero_pass_zero_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_repl_comp_less_or_equal_back_fail_decw_pass_repl_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_zero_comp_always_back_fail_incc_pass_zero_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_keep_comp_not_equal_back_fail_decc_pass_decw_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_keep_comp_always_back_fail_incc_pass_zero_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_zero_comp_less_back_fail_repl_pass_keep_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_repl_comp_greater_or_equal_back_fail_decw_pass_zero_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_decw_comp_less_back_fail_inv_pass_decw_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_incc_comp_never_back_fail_repl_pass_decw_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_wrap_comp_less_or_equal_back_fail_inv_pass_decw_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_keep_comp_never_back_fail_repl_pass_repl_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_wrap_comp_greater_or_equal_back_fail_repl_pass_decc_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_decw_comp_greater_or_equal_back_fail_keep_pass_keep_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_incc_comp_greater_back_fail_repl_pass_decw_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_zero_comp_not_equal_back_fail_decc_pass_wrap_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_wrap_comp_equal_back_fail_decc_pass_decc_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_decc_comp_greater_or_equal_back_fail_wrap_pass_wrap_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_repl_comp_greater_or_equal_back_fail_inv_pass_keep_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_wrap_comp_less_or_equal_back_fail_inv_pass_zero_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_inv_comp_less_or_equal_back_fail_decw_pass_inv_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_inv_comp_greater_back_fail_incc_pass_inv_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_incc_comp_never_back_fail_inv_pass_incc_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_incc_comp_less_back_fail_decc_pass_inv_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_zero_comp_never_back_fail_keep_pass_keep_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_decw_comp_less_or_equal_back_fail_keep_pass_wrap_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_keep_comp_greater_or_equal_back_fail_incc_pass_incc_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_decw_comp_equal_back_fail_repl_pass_inv_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_keep_comp_never_back_fail_inv_pass_decc_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_keep_comp_greater_back_fail_repl_pass_incc_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_decc_comp_never_back_fail_decw_pass_zero_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_repl_comp_always_back_fail_incc_pass_repl_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_repl_comp_always_back_fail_incc_pass_decc_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_incc_comp_not_equal_back_fail_wrap_pass_keep_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_decw_comp_greater_back_fail_keep_pass_decw_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_decc_comp_not_equal_back_fail_incc_pass_decw_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_repl_comp_greater_or_equal_back_fail_keep_pass_inv_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_repl_comp_less_or_equal_back_fail_repl_pass_wrap_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_decw_comp_less_or_equal_back_fail_keep_pass_inv_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_zero_comp_not_equal_back_fail_repl_pass_repl_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_decw_comp_never_back_fail_wrap_pass_wrap_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_zero_comp_less_back_fail_decc_pass_decw_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_incc_comp_greater_back_fail_keep_pass_keep_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_decw_comp_greater_back_fail_decw_pass_decw_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_incc_comp_less_back_fail_zero_pass_zero_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_incc_comp_less_back_fail_keep_pass_decc_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_keep_comp_less_back_fail_repl_pass_decc_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_repl_comp_equal_back_fail_zero_pass_wrap_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_incc_comp_always_back_fail_keep_pass_decw_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_incc_comp_less_or_equal_back_fail_inv_pass_keep_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_decc_comp_not_equal_back_fail_wrap_pass_decw_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_keep_comp_equal_back_fail_repl_pass_inv_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_repl_comp_greater_back_fail_zero_pass_zero_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_decc_comp_less_or_equal_back_fail_inv_pass_inv_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_decc_comp_less_or_equal_back_fail_decc_pass_wrap_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_decc_comp_always_back_fail_wrap_pass_zero_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_keep_comp_not_equal_back_fail_keep_pass_keep_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_inv_comp_equal_back_fail_zero_pass_keep_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_wrap_comp_always_back_fail_repl_pass_repl_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_decc_comp_never_back_fail_repl_pass_wrap_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_inv_comp_not_equal_back_fail_repl_pass_inv_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_wrap_comp_never_back_fail_zero_pass_repl_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_decc_comp_never_back_fail_decw_pass_incc_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_repl_comp_greater_or_equal_back_fail_inv_pass_decw_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_inv_comp_greater_or_equal_back_fail_incc_pass_incc_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_keep_comp_greater_or_equal_back_fail_decc_pass_inv_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_repl_comp_never_back_fail_decw_pass_inv_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_incc_comp_equal_back_fail_wrap_pass_repl_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_repl_comp_equal_back_fail_decc_pass_decw_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_repl_comp_never_back_fail_decc_pass_decc_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_decw_comp_never_back_fail_keep_pass_repl_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_decw_comp_not_equal_back_fail_wrap_pass_keep_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_zero_comp_greater_or_equal_back_fail_repl_pass_inv_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_zero_comp_always_back_fail_zero_pass_wrap_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_repl_comp_always_back_fail_decw_pass_inv_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_keep_comp_not_equal_back_fail_decw_pass_inv_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_inv_comp_equal_back_fail_zero_pass_wrap_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_zero_comp_equal_back_fail_decc_pass_wrap_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_decw_comp_greater_or_equal_back_fail_zero_pass_decw_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_decw_comp_never_back_fail_inv_pass_decw_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_keep_comp_less_back_fail_wrap_pass_decc_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_zero_comp_never_back_fail_inv_pass_keep_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_incc_comp_never_back_fail_incc_pass_zero_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_keep_comp_less_or_equal_back_fail_keep_pass_keep_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_decw_comp_not_equal_back_fail_repl_pass_decw_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_repl_comp_never_back_fail_incc_pass_decw_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_keep_comp_always_back_fail_decw_pass_repl_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_zero_comp_less_or_equal_back_fail_decw_pass_keep_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_zero_comp_less_back_fail_repl_pass_incc_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_inv_comp_equal_back_fail_zero_pass_zero_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_decc_comp_less_back_fail_inv_pass_decw_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_keep_comp_not_equal_back_fail_incc_pass_zero_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_keep_comp_never_back_fail_keep_pass_decc_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_zero_comp_less_or_equal_back_fail_zero_pass_wrap_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_zero_comp_not_equal_back_fail_wrap_pass_keep_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_wrap_comp_greater_or_equal_back_fail_incc_pass_decc_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_inv_comp_greater_or_equal_back_fail_keep_pass_incc_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_incc_comp_equal_back_fail_incc_pass_keep_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_decw_comp_always_back_fail_incc_pass_keep_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_wrap_comp_equal_back_fail_zero_pass_zero_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_wrap_comp_greater_or_equal_back_fail_repl_pass_incc_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_wrap_comp_greater_or_equal_back_fail_decc_pass_wrap_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_zero_comp_always_back_fail_repl_pass_repl_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_inv_comp_greater_or_equal_back_fail_inv_pass_wrap_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_wrap_comp_less_or_equal_back_fail_wrap_pass_wrap_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_incc_dfail_decw_comp_always_back_fail_zero_pass_incc_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_keep_comp_equal_back_fail_keep_pass_incc_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_decw_comp_greater_back_fail_decw_pass_inv_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_zero_comp_greater_or_equal_back_fail_repl_pass_incc_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_incc_comp_greater_back_fail_inv_pass_keep_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_repl_comp_equal_back_fail_decw_pass_repl_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_decc_comp_less_or_equal_back_fail_repl_pass_decw_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_decw_comp_less_or_equal_back_fail_decw_pass_zero_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decc_dfail_inv_comp_greater_back_fail_decw_pass_zero_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_repl_comp_greater_or_equal_back_fail_zero_pass_decc_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_repl_comp_never_back_fail_decc_pass_incc_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_wrap_comp_never_back_fail_incc_pass_keep_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_zero_comp_always_back_fail_wrap_pass_repl_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_incc_comp_always_back_fail_incc_pass_decc_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_inv_comp_greater_back_fail_repl_pass_inv_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_inv_comp_less_back_fail_decw_pass_incc_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_decw_comp_always_back_fail_zero_pass_zero_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_zero_comp_not_equal_back_fail_repl_pass_decw_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_keep_comp_equal_back_fail_inv_pass_zero_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_wrap_comp_never_back_fail_repl_pass_inv_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_repl_comp_less_or_equal_back_fail_decc_pass_repl_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_decc_comp_greater_or_equal_back_fail_decc_pass_keep_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_decc_comp_less_or_equal_back_fail_decw_pass_keep_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_decc_comp_greater_or_equal_back_fail_keep_pass_decc_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_keep_comp_less_back_fail_inv_pass_zero_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_decw_comp_greater_or_equal_back_fail_zero_pass_repl_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_repl_comp_always_back_fail_keep_pass_wrap_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_repl_comp_less_back_fail_wrap_pass_zero_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_incc_comp_equal_back_fail_decc_pass_decw_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_wrap_comp_less_back_fail_inv_pass_decw_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_decw_comp_less_back_fail_decw_pass_decc_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_repl_comp_greater_back_fail_repl_pass_wrap_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_incc_comp_greater_or_equal_back_fail_wrap_pass_decc_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_wrap_comp_greater_or_equal_back_fail_zero_pass_incc_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_incc_dfail_incc_comp_greater_back_fail_incc_pass_zero_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_repl_comp_less_back_fail_inv_pass_incc_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_keep_comp_equal_back_fail_decw_pass_incc_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_decw_comp_greater_or_equal_back_fail_decw_pass_repl_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_keep_comp_always_back_fail_keep_pass_repl_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_incc_dfail_repl_comp_never_back_fail_incc_pass_keep_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_decc_comp_less_or_equal_back_fail_wrap_pass_incc_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_inv_comp_greater_or_equal_back_fail_decc_pass_keep_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_decw_comp_never_back_fail_decw_pass_wrap_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_repl_comp_greater_back_fail_decc_pass_inv_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_zero_comp_always_back_fail_inv_pass_decc_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_keep_comp_greater_or_equal_back_fail_zero_pass_zero_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_inv_comp_less_back_fail_zero_pass_inv_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_zero_comp_always_back_fail_inv_pass_keep_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_repl_comp_greater_back_fail_incc_pass_inv_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_inv_comp_not_equal_back_fail_wrap_pass_wrap_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_inv_comp_greater_or_equal_back_fail_keep_pass_zero_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_decw_comp_always_back_fail_zero_pass_wrap_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_zero_comp_always_back_fail_decw_pass_decw_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_keep_comp_equal_back_fail_repl_pass_wrap_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_keep_comp_never_back_fail_decw_pass_keep_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_inv_comp_greater_or_equal_back_fail_decw_pass_repl_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_decw_comp_less_or_equal_back_fail_repl_pass_repl_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_inv_comp_always_back_fail_decw_pass_incc_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_wrap_comp_always_back_fail_keep_pass_decw_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_inv_comp_greater_back_fail_incc_pass_decc_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_decc_comp_never_back_fail_repl_pass_inv_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_wrap_comp_never_back_fail_incc_pass_wrap_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_incc_comp_less_or_equal_back_fail_keep_pass_repl_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_inv_comp_greater_back_fail_wrap_pass_keep_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_decc_comp_less_back_fail_inv_pass_zero_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_zero_comp_less_back_fail_decc_pass_incc_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_repl_comp_greater_or_equal_back_fail_decw_pass_repl_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_wrap_comp_greater_or_equal_back_fail_wrap_pass_keep_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_decw_comp_greater_or_equal_back_fail_incc_pass_inv_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_repl_comp_greater_or_equal_back_fail_keep_pass_decc_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_incc_comp_less_or_equal_back_fail_inv_pass_decc_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_incc_comp_less_or_equal_back_fail_repl_pass_inv_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_wrap_comp_not_equal_back_fail_decc_pass_zero_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_incc_comp_less_back_fail_decc_pass_repl_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_incc_comp_equal_back_fail_zero_pass_repl_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_wrap_comp_always_back_fail_keep_pass_decc_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_zero_comp_greater_back_fail_incc_pass_zero_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_inv_comp_never_back_fail_wrap_pass_decw_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_inv_comp_greater_or_equal_back_fail_wrap_pass_inv_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_wrap_comp_less_back_fail_wrap_pass_repl_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_incc_comp_greater_or_equal_back_fail_incc_pass_repl_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_incc_comp_greater_back_fail_repl_pass_decw_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_keep_comp_equal_back_fail_repl_pass_incc_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_wrap_comp_greater_or_equal_back_fail_decc_pass_wrap_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_repl_comp_less_or_equal_back_fail_incc_pass_incc_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_inv_comp_less_back_fail_wrap_pass_decc_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_decw_comp_equal_back_fail_inv_pass_inv_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_wrap_comp_always_back_fail_zero_pass_wrap_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_decw_comp_greater_back_fail_repl_pass_zero_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_decw_comp_always_back_fail_keep_pass_decc_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_keep_comp_never_back_fail_inv_pass_repl_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_wrap_comp_equal_back_fail_zero_pass_zero_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_wrap_comp_never_back_fail_repl_pass_decc_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_decw_comp_less_back_fail_inv_pass_keep_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_keep_dfail_inv_comp_never_back_fail_decc_pass_inv_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_incc_comp_less_or_equal_back_fail_decw_pass_keep_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_incc_comp_never_back_fail_incc_pass_keep_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_decw_comp_not_equal_back_fail_decw_pass_decw_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_incc_comp_greater_back_fail_inv_pass_wrap_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_keep_comp_never_back_fail_zero_pass_zero_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_wrap_comp_greater_back_fail_incc_pass_wrap_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_wrap_comp_greater_back_fail_keep_pass_repl_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_decw_comp_less_or_equal_back_fail_wrap_pass_keep_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_decw_comp_not_equal_back_fail_inv_pass_inv_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_keep_comp_always_back_fail_decw_pass_decw_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_decc_comp_equal_back_fail_decc_pass_repl_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_inv_comp_greater_or_equal_back_fail_wrap_pass_inv_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_keep_comp_less_back_fail_repl_pass_wrap_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_keep_comp_less_or_equal_back_fail_inv_pass_wrap_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_incc_comp_never_back_fail_decw_pass_incc_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_decc_comp_always_back_fail_decc_pass_repl_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_incc_comp_never_back_fail_incc_pass_wrap_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_incc_comp_greater_or_equal_back_fail_decc_pass_wrap_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_zero_comp_equal_back_fail_inv_pass_decw_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_decc_comp_less_or_equal_back_fail_incc_pass_inv_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_incc_comp_not_equal_back_fail_incc_pass_decw_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_decc_comp_less_or_equal_back_fail_inv_pass_inv_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_repl_comp_greater_or_equal_back_fail_inv_pass_wrap_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_zero_comp_less_or_equal_back_fail_zero_pass_incc_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_decc_comp_always_back_fail_decc_pass_inv_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_repl_comp_never_back_fail_repl_pass_incc_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_zero_comp_always_back_fail_inv_pass_inv_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_repl_comp_equal_back_fail_decc_pass_zero_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_incc_comp_greater_or_equal_back_fail_decw_pass_zero_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_keep_comp_always_back_fail_decc_pass_repl_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_zero_comp_not_equal_back_fail_wrap_pass_inv_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_keep_comp_never_back_fail_keep_pass_repl_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_incc_comp_always_back_fail_zero_pass_decw_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_decc_comp_less_or_equal_back_fail_decw_pass_decw_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_incc_comp_greater_back_fail_repl_pass_incc_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_zero_comp_less_back_fail_decw_pass_wrap_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_decc_comp_greater_back_fail_inv_pass_keep_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_incc_comp_less_or_equal_back_fail_repl_pass_incc_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_zero_comp_always_back_fail_decw_pass_wrap_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_keep_comp_greater_or_equal_back_fail_zero_pass_inv_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_repl_comp_less_or_equal_back_fail_wrap_pass_decc_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_wrap_comp_greater_back_fail_repl_pass_zero_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_zero_comp_equal_back_fail_incc_pass_keep_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_incc_comp_never_back_fail_repl_pass_repl_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_repl_comp_greater_back_fail_wrap_pass_repl_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_inv_comp_less_or_equal_back_fail_keep_pass_zero_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_zero_comp_equal_back_fail_wrap_pass_decw_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_wrap_comp_greater_or_equal_back_fail_inv_pass_inv_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_repl_comp_equal_back_fail_decw_pass_decc_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_inv_comp_greater_or_equal_back_fail_decc_pass_repl_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_keep_comp_never_back_fail_repl_pass_decw_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_keep_comp_not_equal_back_fail_decw_pass_decc_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_repl_comp_greater_back_fail_decc_pass_decc_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_decw_comp_less_or_equal_back_fail_decw_pass_repl_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_repl_comp_never_back_fail_decw_pass_decw_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_incc_comp_less_or_equal_back_fail_decw_pass_decw_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_wrap_comp_greater_back_fail_inv_pass_keep_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_repl_comp_not_equal_back_fail_decw_pass_incc_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_incc_comp_less_back_fail_incc_pass_inv_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_repl_comp_always_back_fail_repl_pass_incc_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_wrap_comp_equal_back_fail_wrap_pass_decw_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_decw_comp_never_back_fail_decc_pass_decc_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_repl_comp_less_back_fail_zero_pass_decw_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_keep_comp_not_equal_back_fail_repl_pass_zero_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_decc_comp_greater_or_equal_back_fail_decc_pass_repl_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_incc_comp_greater_back_fail_wrap_pass_repl_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_inv_comp_equal_back_fail_decw_pass_decc_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_wrap_dfail_keep_comp_less_or_equal_back_fail_decc_pass_zero_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_inv_comp_less_back_fail_decc_pass_wrap_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_wrap_comp_less_or_equal_back_fail_incc_pass_decc_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_incc_comp_greater_or_equal_back_fail_keep_pass_zero_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_decc_comp_less_back_fail_incc_pass_decw_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_inv_comp_less_back_fail_inv_pass_decw_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_inv_comp_greater_or_equal_back_fail_keep_pass_zero_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_decw_comp_not_equal_back_fail_incc_pass_decc_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_inv_comp_never_back_fail_incc_pass_incc_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_zero_comp_less_or_equal_back_fail_repl_pass_decc_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_zero_comp_greater_back_fail_decc_pass_zero_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_wrap_comp_greater_back_fail_repl_pass_inv_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_wrap_comp_always_back_fail_repl_pass_zero_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_incc_comp_greater_back_fail_repl_pass_inv_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_wrap_comp_always_back_fail_wrap_pass_inv_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_repl_comp_greater_or_equal_back_fail_inv_pass_decc_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_repl_comp_always_back_fail_zero_pass_decw_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_inv_comp_always_back_fail_repl_pass_repl_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_keep_comp_greater_back_fail_zero_pass_zero_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_zero_comp_not_equal_back_fail_keep_pass_repl_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_incc_comp_never_back_fail_wrap_pass_keep_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_repl_comp_equal_back_fail_zero_pass_repl_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_keep_dfail_keep_comp_equal_back_fail_keep_pass_wrap_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_incc_comp_never_back_fail_decc_pass_keep_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_inv_comp_equal_back_fail_wrap_pass_zero_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_repl_dfail_incc_comp_equal_back_fail_inv_pass_decc_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_keep_comp_always_back_fail_zero_pass_repl_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_decw_comp_not_equal_back_fail_wrap_pass_wrap_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_repl_comp_always_back_fail_decc_pass_inv_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_zero_comp_never_back_fail_decc_pass_decc_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_wrap_comp_never_back_fail_inv_pass_zero_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_incc_comp_equal_back_fail_repl_pass_keep_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_keep_comp_equal_back_fail_repl_pass_zero_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_zero_comp_greater_or_equal_back_fail_zero_pass_decw_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_keep_comp_never_back_fail_keep_pass_inv_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_keep_comp_greater_back_fail_wrap_pass_zero_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_inv_comp_less_or_equal_back_fail_repl_pass_repl_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_inv_comp_less_or_equal_back_fail_decw_pass_inv_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_decc_comp_greater_back_fail_wrap_pass_wrap_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_decw_comp_greater_back_fail_inv_pass_zero_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_repl_comp_never_back_fail_decw_pass_incc_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_wrap_comp_equal_back_fail_zero_pass_decw_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_keep_comp_less_or_equal_back_fail_decw_pass_incc_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_zero_dfail_incc_comp_never_back_fail_incc_pass_wrap_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_incc_comp_not_equal_back_fail_decc_pass_zero_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_decc_comp_greater_back_fail_decc_pass_incc_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_decw_comp_equal_back_fail_zero_pass_zero_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_decw_comp_equal_back_fail_decw_pass_decc_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decw_dfail_wrap_comp_less_back_fail_wrap_pass_keep_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_wrap_comp_never_back_fail_incc_pass_decw_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_zero_dfail_wrap_comp_always_back_fail_keep_pass_wrap_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_incc_comp_always_back_fail_inv_pass_zero_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_inv_dfail_zero_comp_not_equal_back_fail_repl_pass_keep_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_inv_comp_never_back_fail_inv_pass_inv_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_decc_comp_never_back_fail_inv_pass_wrap_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_zero_dfail_decw_comp_greater_back_fail_decw_pass_decc_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_wrap_comp_less_or_equal_back_fail_keep_pass_zero_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_repl_comp_less_back_fail_decc_pass_repl_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_inv_comp_not_equal_back_fail_repl_pass_incc_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_repl_comp_less_or_equal_back_fail_incc_pass_wrap_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_zero_comp_equal_back_fail_zero_pass_zero_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_zero_comp_greater_back_fail_repl_pass_wrap_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_decc_comp_equal_back_fail_decc_pass_repl_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_decc_comp_greater_back_fail_wrap_pass_wrap_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_wrap_comp_always_back_fail_decw_pass_decc_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_zero_comp_never_back_fail_keep_pass_decw_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_incc_comp_never_back_fail_decw_pass_wrap_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decw_dfail_zero_comp_equal_back_fail_decw_pass_inv_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_zero_dfail_zero_comp_never_back_fail_repl_pass_decw_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_repl_comp_always_back_fail_zero_pass_zero_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_inv_comp_not_equal_back_fail_decc_pass_incc_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_zero_dfail_wrap_comp_not_equal_back_fail_wrap_pass_decc_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_keep_comp_less_back_fail_incc_pass_zero_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_decc_comp_always_back_fail_repl_pass_keep_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_keep_dfail_decc_comp_equal_back_fail_wrap_pass_decw_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_zero_comp_greater_back_fail_zero_pass_keep_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_decc_comp_always_back_fail_decw_pass_incc_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_zero_comp_equal_back_fail_incc_pass_inv_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_zero_dfail_wrap_comp_less_back_fail_decw_pass_incc_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_zero_comp_equal_back_fail_repl_pass_zero_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_incc_dfail_keep_comp_always_back_fail_wrap_pass_wrap_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decw_dfail_decc_comp_always_back_fail_zero_pass_incc_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_inv_dfail_incc_comp_less_or_equal_back_fail_inv_pass_decw_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_decw_comp_greater_back_fail_decw_pass_inv_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_keep_dfail_decw_comp_equal_back_fail_decc_pass_incc_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decc_dfail_repl_comp_greater_or_equal_back_fail_incc_pass_keep_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_inv_comp_less_or_equal_back_fail_decw_pass_decc_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_zero_comp_less_back_fail_decw_pass_repl_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_inv_comp_never_back_fail_decw_pass_decw_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_wrap_comp_less_or_equal_back_fail_keep_pass_inv_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_inv_dfail_wrap_comp_equal_back_fail_incc_pass_decc_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_incc_comp_equal_back_fail_zero_pass_inv_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_wrap_comp_equal_back_fail_incc_pass_decc_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_inv_comp_less_or_equal_back_fail_incc_pass_wrap_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_keep_dfail_repl_comp_equal_back_fail_incc_pass_incc_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_keep_comp_not_equal_back_fail_keep_pass_keep_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_wrap_comp_greater_back_fail_wrap_pass_repl_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decw_dfail_incc_comp_less_or_equal_back_fail_keep_pass_decw_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_keep_dfail_decw_comp_less_or_equal_back_fail_decc_pass_decw_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_decc_comp_not_equal_back_fail_inv_pass_keep_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_incc_comp_greater_back_fail_decc_pass_decc_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_incc_dfail_repl_comp_greater_back_fail_keep_pass_repl_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_decw_comp_greater_or_equal_back_fail_repl_pass_incc_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_incc_comp_greater_back_fail_repl_pass_repl_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_wrap_comp_greater_or_equal_back_fail_repl_pass_decc_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_keep_comp_less_or_equal_back_fail_decc_pass_decc_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_inv_dfail_decw_comp_less_or_equal_back_fail_keep_pass_wrap_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_repl_dfail_incc_comp_not_equal_back_fail_keep_pass_inv_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_inv_dfail_zero_comp_not_equal_back_fail_decw_pass_repl_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_zero_comp_less_back_fail_repl_pass_inv_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_wrap_dfail_keep_comp_equal_back_fail_zero_pass_decw_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_keep_comp_never_back_fail_keep_pass_wrap_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_incc_dfail_repl_comp_not_equal_back_fail_keep_pass_repl_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_keep_comp_less_back_fail_incc_pass_incc_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_zero_comp_always_back_fail_keep_pass_decw_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_repl_comp_less_back_fail_decw_pass_zero_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_keep_comp_less_or_equal_back_fail_incc_pass_inv_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_inv_dfail_wrap_comp_greater_or_equal_back_fail_inv_pass_wrap_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_inv_comp_not_equal_back_fail_wrap_pass_inv_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_repl_comp_equal_back_fail_repl_pass_decc_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_incc_comp_greater_back_fail_incc_pass_decc_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decw_dfail_inv_comp_greater_or_equal_back_fail_wrap_pass_zero_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_incc_comp_less_or_equal_back_fail_wrap_pass_decw_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_inv_comp_greater_back_fail_incc_pass_inv_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_decc_dfail_incc_comp_always_back_fail_keep_pass_decw_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_decc_dfail_incc_comp_equal_back_fail_decc_pass_decc_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_incc_comp_less_back_fail_repl_pass_decc_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_wrap_dfail_wrap_comp_less_back_fail_incc_pass_repl_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_zero_comp_equal_back_fail_inv_pass_wrap_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_inv_comp_less_back_fail_wrap_pass_zero_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_decw_dfail_repl_comp_always_back_fail_wrap_pass_wrap_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_keep_dfail_inv_comp_not_equal_back_fail_zero_pass_decw_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_decw_comp_equal_back_fail_repl_pass_keep_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_zero_dfail_incc_comp_always_back_fail_wrap_pass_wrap_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_decc_comp_always_back_fail_wrap_pass_zero_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_decc_dfail_repl_comp_not_equal_back_fail_decc_pass_repl_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_decc_comp_always_back_fail_incc_pass_decc_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_repl_dfail_decw_comp_never_back_fail_inv_pass_repl_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_zero_dfail_decc_comp_greater_back_fail_repl_pass_repl_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_repl_comp_not_equal_back_fail_decw_pass_zero_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_keep_dfail_keep_comp_less_or_equal_back_fail_inv_pass_decc_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_inv_dfail_decc_comp_always_back_fail_wrap_pass_keep_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_zero_pass_wrap_dfail_keep_comp_greater_back_fail_decc_pass_inv_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_incc_comp_greater_back_fail_zero_pass_wrap_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_repl_dfail_inv_comp_greater_back_fail_repl_pass_wrap_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_wrap_dfail_zero_comp_never_back_fail_wrap_pass_repl_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_repl_dfail_zero_comp_less_or_equal_back_fail_incc_pass_wrap_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_decw_dfail_inv_comp_greater_or_equal_back_fail_incc_pass_repl_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_wrap_dfail_keep_comp_always_back_fail_decw_pass_decw_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_wrap_dfail_incc_comp_always_back_fail_decw_pass_wrap_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_repl_dfail_wrap_comp_never_back_fail_wrap_pass_wrap_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decw_pass_incc_dfail_zero_comp_less_or_equal_back_fail_inv_pass_repl_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_incc_dfail_repl_comp_equal_back_fail_decw_pass_incc_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_wrap_pass_decc_dfail_wrap_comp_greater_back_fail_decc_pass_incc_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decw_dfail_keep_comp_always_back_fail_wrap_pass_decc_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_incc_pass_inv_dfail_incc_comp_not_equal_back_fail_keep_pass_decw_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_repl_dfail_inv_comp_greater_or_equal_back_fail_incc_pass_inv_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_repl_pass_wrap_dfail_keep_comp_always_back_fail_keep_pass_repl_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_inv_pass_decc_dfail_inv_comp_not_equal_back_fail_repl_pass_wrap_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_keep_pass_decc_dfail_zero_comp_less_back_fail_inv_pass_decc_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.front_fail_decc_pass_repl_dfail_keep_comp_less_back_fail_keep_pass_decc_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_repl_dfail_inv_comp_not_equal_back_fail_decc_pass_repl_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_keep_dfail_inv_comp_not_equal_back_fail_decc_pass_repl_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decw_dfail_wrap_comp_less_back_fail_incc_pass_keep_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_incc_dfail_keep_comp_greater_or_equal_back_fail_wrap_pass_decw_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_keep_dfail_wrap_comp_equal_back_fail_inv_pass_incc_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_inv_dfail_repl_comp_always_back_fail_incc_pass_keep_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_incc_dfail_decc_comp_not_equal_back_fail_repl_pass_inv_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_keep_dfail_incc_comp_greater_or_equal_back_fail_zero_pass_incc_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_zero_dfail_keep_comp_equal_back_fail_incc_pass_keep_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_wrap_dfail_decw_comp_less_or_equal_back_fail_decc_pass_zero_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_zero_dfail_zero_comp_greater_back_fail_keep_pass_wrap_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_wrap_dfail_decw_comp_less_or_equal_back_fail_inv_pass_zero_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_incc_dfail_decc_comp_equal_back_fail_incc_pass_wrap_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decc_dfail_decc_comp_less_or_equal_back_fail_wrap_pass_incc_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_wrap_dfail_decc_comp_never_back_fail_decc_pass_decc_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decw_dfail_decw_comp_greater_or_equal_back_fail_decc_pass_wrap_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decw_dfail_incc_comp_greater_or_equal_back_fail_wrap_pass_decw_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decw_dfail_decw_comp_always_back_fail_decw_pass_decw_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_keep_dfail_incc_comp_less_back_fail_keep_pass_decw_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_zero_dfail_inv_comp_always_back_fail_repl_pass_keep_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_wrap_dfail_repl_comp_never_back_fail_inv_pass_zero_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_incc_dfail_inv_comp_less_back_fail_decw_pass_wrap_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_incc_dfail_decc_comp_equal_back_fail_decc_pass_incc_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_wrap_dfail_wrap_comp_less_back_fail_decc_pass_incc_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_wrap_dfail_decc_comp_equal_back_fail_decw_pass_wrap_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_inv_dfail_wrap_comp_less_back_fail_inv_pass_wrap_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decc_dfail_incc_comp_greater_back_fail_zero_pass_inv_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_keep_dfail_inv_comp_greater_back_fail_wrap_pass_decc_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decc_dfail_wrap_comp_greater_or_equal_back_fail_keep_pass_keep_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_inv_dfail_decc_comp_less_or_equal_back_fail_inv_pass_decc_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_inv_dfail_repl_comp_greater_or_equal_back_fail_zero_pass_inv_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_keep_dfail_keep_comp_always_back_fail_decc_pass_inv_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_zero_dfail_decc_comp_never_back_fail_wrap_pass_keep_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_incc_dfail_zero_comp_never_back_fail_wrap_pass_zero_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_incc_dfail_decw_comp_never_back_fail_keep_pass_incc_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_keep_dfail_inv_comp_never_back_fail_incc_pass_incc_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_repl_dfail_wrap_comp_less_back_fail_incc_pass_keep_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decc_dfail_zero_comp_greater_or_equal_back_fail_keep_pass_repl_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_zero_dfail_decw_comp_equal_back_fail_decc_pass_decc_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_wrap_dfail_zero_comp_not_equal_back_fail_wrap_pass_zero_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decc_dfail_zero_comp_not_equal_back_fail_keep_pass_wrap_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decc_dfail_repl_comp_never_back_fail_keep_pass_decc_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_inv_dfail_inv_comp_greater_back_fail_inv_pass_decc_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decw_dfail_inv_comp_always_back_fail_wrap_pass_inv_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_keep_dfail_repl_comp_greater_back_fail_decw_pass_decw_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decc_dfail_decw_comp_equal_back_fail_incc_pass_keep_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_repl_dfail_keep_comp_less_or_equal_back_fail_zero_pass_decc_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decw_dfail_wrap_comp_always_back_fail_decc_pass_repl_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_incc_dfail_incc_comp_less_or_equal_back_fail_zero_pass_decw_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_incc_dfail_decc_comp_never_back_fail_incc_pass_incc_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_incc_dfail_inv_comp_greater_or_equal_back_fail_incc_pass_incc_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decc_dfail_decw_comp_greater_back_fail_incc_pass_incc_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_keep_dfail_repl_comp_never_back_fail_wrap_pass_decc_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_wrap_dfail_decc_comp_equal_back_fail_wrap_pass_keep_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decc_dfail_incc_comp_not_equal_back_fail_keep_pass_wrap_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decw_dfail_repl_comp_greater_back_fail_decc_pass_decc_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_zero_dfail_zero_comp_not_equal_back_fail_decc_pass_decw_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_keep_dfail_incc_comp_not_equal_back_fail_zero_pass_zero_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decc_dfail_incc_comp_always_back_fail_inv_pass_keep_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decc_dfail_incc_comp_greater_back_fail_keep_pass_decc_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_incc_dfail_wrap_comp_greater_back_fail_zero_pass_decc_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_keep_dfail_wrap_comp_less_or_equal_back_fail_zero_pass_incc_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_wrap_dfail_decw_comp_not_equal_back_fail_repl_pass_keep_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_incc_dfail_inv_comp_less_back_fail_wrap_pass_wrap_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_incc_dfail_keep_comp_less_back_fail_repl_pass_incc_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_inv_dfail_zero_comp_not_equal_back_fail_inv_pass_incc_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_wrap_dfail_wrap_comp_less_or_equal_back_fail_incc_pass_inv_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_zero_dfail_wrap_comp_greater_or_equal_back_fail_wrap_pass_wrap_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decc_dfail_repl_comp_equal_back_fail_inv_pass_zero_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_keep_dfail_repl_comp_always_back_fail_repl_pass_decc_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_inv_dfail_decw_comp_never_back_fail_zero_pass_keep_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_incc_dfail_incc_comp_equal_back_fail_incc_pass_inv_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decw_dfail_inv_comp_equal_back_fail_decw_pass_incc_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_wrap_dfail_zero_comp_greater_or_equal_back_fail_zero_pass_decw_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_repl_dfail_inv_comp_less_back_fail_decc_pass_wrap_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_zero_dfail_zero_comp_greater_or_equal_back_fail_wrap_pass_repl_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_keep_dfail_wrap_comp_always_back_fail_incc_pass_zero_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_zero_dfail_keep_comp_never_back_fail_decw_pass_keep_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decc_dfail_keep_comp_less_or_equal_back_fail_inv_pass_zero_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_wrap_dfail_keep_comp_never_back_fail_decc_pass_decc_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_keep_dfail_wrap_comp_greater_back_fail_keep_pass_wrap_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decw_dfail_wrap_comp_equal_back_fail_inv_pass_keep_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_repl_dfail_inv_comp_never_back_fail_zero_pass_decw_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_repl_dfail_decw_comp_greater_or_equal_back_fail_wrap_pass_repl_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_inv_dfail_keep_comp_greater_or_equal_back_fail_inv_pass_repl_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_wrap_dfail_repl_comp_never_back_fail_wrap_pass_inv_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decw_dfail_repl_comp_greater_or_equal_back_fail_wrap_pass_wrap_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_wrap_dfail_decw_comp_greater_back_fail_decc_pass_decw_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_repl_dfail_incc_comp_never_back_fail_decw_pass_wrap_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_zero_dfail_inv_comp_always_back_fail_keep_pass_repl_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decw_dfail_repl_comp_equal_back_fail_keep_pass_zero_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_repl_dfail_decc_comp_greater_back_fail_decc_pass_decw_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_incc_dfail_keep_comp_not_equal_back_fail_inv_pass_repl_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_wrap_dfail_inv_comp_always_back_fail_decc_pass_incc_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_inv_dfail_inv_comp_greater_or_equal_back_fail_keep_pass_wrap_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decc_dfail_zero_comp_always_back_fail_wrap_pass_inv_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_keep_dfail_wrap_comp_greater_or_equal_back_fail_zero_pass_decc_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decw_dfail_decc_comp_always_back_fail_decc_pass_keep_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_wrap_dfail_repl_comp_not_equal_back_fail_keep_pass_decw_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decc_dfail_wrap_comp_equal_back_fail_decc_pass_wrap_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_zero_dfail_keep_comp_less_or_equal_back_fail_zero_pass_decc_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decc_dfail_decw_comp_equal_back_fail_repl_pass_zero_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_zero_dfail_wrap_comp_greater_or_equal_back_fail_wrap_pass_decc_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_zero_dfail_incc_comp_greater_or_equal_back_fail_decc_pass_zero_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_wrap_dfail_repl_comp_not_equal_back_fail_decw_pass_zero_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_keep_dfail_keep_comp_greater_or_equal_back_fail_decw_pass_wrap_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decc_dfail_incc_comp_less_or_equal_back_fail_keep_pass_keep_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decc_dfail_inv_comp_greater_or_equal_back_fail_repl_pass_decc_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_keep_dfail_incc_comp_greater_or_equal_back_fail_repl_pass_decc_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_zero_dfail_inv_comp_greater_or_equal_back_fail_inv_pass_keep_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decw_dfail_repl_comp_less_or_equal_back_fail_repl_pass_zero_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_incc_dfail_wrap_comp_greater_back_fail_incc_pass_decw_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_repl_dfail_keep_comp_greater_back_fail_inv_pass_incc_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decw_dfail_repl_comp_equal_back_fail_decw_pass_repl_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decw_dfail_keep_comp_less_back_fail_zero_pass_decw_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_keep_dfail_wrap_comp_equal_back_fail_repl_pass_decw_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_repl_dfail_zero_comp_always_back_fail_inv_pass_keep_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decc_dfail_repl_comp_never_back_fail_inv_pass_repl_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_inv_dfail_keep_comp_never_back_fail_zero_pass_decc_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_zero_dfail_inv_comp_equal_back_fail_inv_pass_inv_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_repl_dfail_decw_comp_equal_back_fail_inv_pass_zero_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_zero_dfail_decc_comp_less_or_equal_back_fail_decw_pass_repl_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_incc_dfail_inv_comp_never_back_fail_incc_pass_zero_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decc_dfail_zero_comp_less_or_equal_back_fail_inv_pass_incc_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_wrap_dfail_decw_comp_always_back_fail_keep_pass_decc_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_inv_dfail_incc_comp_less_or_equal_back_fail_wrap_pass_wrap_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_repl_dfail_wrap_comp_not_equal_back_fail_inv_pass_inv_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decw_dfail_decc_comp_less_or_equal_back_fail_repl_pass_repl_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_inv_dfail_keep_comp_greater_back_fail_decw_pass_decw_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_keep_dfail_decc_comp_less_or_equal_back_fail_wrap_pass_inv_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_repl_dfail_repl_comp_equal_back_fail_repl_pass_keep_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_wrap_dfail_decc_comp_less_back_fail_inv_pass_repl_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decc_dfail_repl_comp_less_back_fail_incc_pass_wrap_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_repl_dfail_zero_comp_never_back_fail_inv_pass_decc_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decw_dfail_inv_comp_never_back_fail_keep_pass_repl_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_repl_dfail_decw_comp_not_equal_back_fail_repl_pass_decw_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_repl_dfail_inv_comp_greater_back_fail_inv_pass_repl_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_wrap_dfail_zero_comp_never_back_fail_inv_pass_repl_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decw_dfail_inv_comp_greater_or_equal_back_fail_repl_pass_wrap_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_incc_dfail_decw_comp_always_back_fail_decc_pass_decw_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decc_dfail_inv_comp_less_or_equal_back_fail_incc_pass_incc_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_repl_dfail_repl_comp_less_or_equal_back_fail_repl_pass_decc_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_repl_dfail_inv_comp_greater_back_fail_decw_pass_repl_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_keep_dfail_keep_comp_greater_or_equal_back_fail_zero_pass_repl_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_repl_dfail_decc_comp_less_or_equal_back_fail_zero_pass_keep_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decw_dfail_decc_comp_greater_or_equal_back_fail_repl_pass_repl_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_repl_dfail_incc_comp_less_or_equal_back_fail_decw_pass_decw_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decc_dfail_wrap_comp_never_back_fail_keep_pass_repl_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decc_dfail_zero_comp_never_back_fail_repl_pass_decc_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_inv_dfail_inv_comp_greater_back_fail_decc_pass_decc_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_wrap_dfail_keep_comp_always_back_fail_incc_pass_inv_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_keep_dfail_incc_comp_equal_back_fail_inv_pass_wrap_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decc_dfail_incc_comp_never_back_fail_inv_pass_keep_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_incc_dfail_keep_comp_always_back_fail_inv_pass_decc_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decc_dfail_incc_comp_always_back_fail_incc_pass_incc_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_zero_dfail_decw_comp_less_back_fail_decw_pass_decc_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decw_dfail_zero_comp_not_equal_back_fail_decw_pass_zero_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_incc_dfail_repl_comp_greater_or_equal_back_fail_incc_pass_decw_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_keep_dfail_keep_comp_equal_back_fail_repl_pass_incc_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decc_dfail_zero_comp_always_back_fail_wrap_pass_keep_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_zero_dfail_incc_comp_always_back_fail_decw_pass_decc_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_wrap_dfail_decc_comp_equal_back_fail_repl_pass_zero_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_incc_dfail_repl_comp_never_back_fail_decc_pass_wrap_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_zero_dfail_decc_comp_greater_or_equal_back_fail_decc_pass_incc_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_repl_dfail_zero_comp_always_back_fail_repl_pass_zero_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decw_dfail_keep_comp_not_equal_back_fail_wrap_pass_repl_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_zero_dfail_keep_comp_less_or_equal_back_fail_zero_pass_decw_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decw_dfail_incc_comp_never_back_fail_decc_pass_zero_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_keep_dfail_decc_comp_less_or_equal_back_fail_repl_pass_decw_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decc_dfail_decc_comp_less_back_fail_decw_pass_keep_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decw_dfail_wrap_comp_not_equal_back_fail_zero_pass_decc_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decc_dfail_inv_comp_less_or_equal_back_fail_zero_pass_decw_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_keep_dfail_incc_comp_greater_back_fail_wrap_pass_decc_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_inv_dfail_wrap_comp_less_back_fail_keep_pass_keep_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_keep_dfail_decc_comp_not_equal_back_fail_decc_pass_inv_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_inv_dfail_zero_comp_greater_or_equal_back_fail_zero_pass_keep_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_incc_dfail_decw_comp_always_back_fail_decw_pass_inv_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_incc_dfail_wrap_comp_always_back_fail_inv_pass_incc_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decw_dfail_wrap_comp_never_back_fail_keep_pass_incc_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_keep_dfail_keep_comp_not_equal_back_fail_zero_pass_decw_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decw_dfail_repl_comp_less_or_equal_back_fail_inv_pass_keep_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_inv_dfail_decw_comp_greater_back_fail_keep_pass_decw_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_repl_dfail_decc_comp_less_or_equal_back_fail_incc_pass_inv_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_zero_dfail_decw_comp_less_back_fail_wrap_pass_repl_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_zero_dfail_inv_comp_always_back_fail_decc_pass_zero_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_zero_dfail_inv_comp_greater_or_equal_back_fail_decw_pass_zero_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_wrap_dfail_decw_comp_always_back_fail_incc_pass_zero_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_inv_dfail_wrap_comp_not_equal_back_fail_incc_pass_wrap_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_inv_dfail_decc_comp_less_back_fail_inv_pass_inv_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_repl_dfail_keep_comp_equal_back_fail_inv_pass_inv_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_repl_dfail_wrap_comp_equal_back_fail_keep_pass_repl_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decc_dfail_repl_comp_greater_back_fail_decw_pass_repl_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_wrap_dfail_keep_comp_never_back_fail_repl_pass_decc_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_inv_dfail_inv_comp_equal_back_fail_inv_pass_wrap_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_repl_dfail_zero_comp_greater_back_fail_decc_pass_inv_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decw_dfail_decc_comp_always_back_fail_incc_pass_repl_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_zero_dfail_decc_comp_equal_back_fail_decw_pass_decw_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_incc_dfail_wrap_comp_less_back_fail_incc_pass_zero_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_zero_dfail_incc_comp_less_or_equal_back_fail_keep_pass_incc_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_keep_dfail_decc_comp_never_back_fail_incc_pass_zero_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_incc_dfail_inv_comp_not_equal_back_fail_repl_pass_keep_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decw_dfail_decc_comp_always_back_fail_zero_pass_incc_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_inv_dfail_wrap_comp_not_equal_back_fail_decc_pass_decw_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_keep_dfail_inv_comp_not_equal_back_fail_incc_pass_inv_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_repl_dfail_zero_comp_always_back_fail_decw_pass_keep_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_inv_dfail_decc_comp_greater_back_fail_decc_pass_repl_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_wrap_dfail_incc_comp_not_equal_back_fail_incc_pass_inv_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_keep_dfail_wrap_comp_less_or_equal_back_fail_inv_pass_wrap_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decw_dfail_zero_comp_never_back_fail_decw_pass_keep_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_repl_dfail_decc_comp_not_equal_back_fail_decw_pass_decw_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_keep_dfail_repl_comp_not_equal_back_fail_decc_pass_repl_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decw_dfail_repl_comp_less_or_equal_back_fail_repl_pass_keep_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_incc_dfail_wrap_comp_less_back_fail_decw_pass_decw_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decw_dfail_decw_comp_greater_back_fail_inv_pass_incc_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_incc_dfail_decw_comp_not_equal_back_fail_wrap_pass_decw_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decc_dfail_keep_comp_equal_back_fail_inv_pass_incc_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decw_dfail_incc_comp_greater_or_equal_back_fail_decc_pass_decc_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_inv_dfail_zero_comp_less_or_equal_back_fail_zero_pass_decw_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decw_dfail_decw_comp_not_equal_back_fail_repl_pass_inv_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_wrap_dfail_keep_comp_greater_or_equal_back_fail_wrap_pass_decw_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_wrap_dfail_wrap_comp_never_back_fail_inv_pass_wrap_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_incc_dfail_zero_comp_greater_or_equal_back_fail_repl_pass_wrap_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_zero_dfail_zero_comp_not_equal_back_fail_decw_pass_incc_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_keep_dfail_inv_comp_greater_back_fail_repl_pass_zero_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_inv_dfail_wrap_comp_not_equal_back_fail_wrap_pass_keep_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_zero_dfail_repl_comp_never_back_fail_repl_pass_inv_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_keep_dfail_decc_comp_less_back_fail_inv_pass_zero_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_incc_dfail_repl_comp_greater_back_fail_zero_pass_keep_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_inv_dfail_decc_comp_never_back_fail_keep_pass_incc_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_zero_dfail_zero_comp_less_or_equal_back_fail_inv_pass_inv_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decw_dfail_inv_comp_less_back_fail_decw_pass_zero_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_inv_dfail_keep_comp_always_back_fail_repl_pass_decw_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_inv_dfail_zero_comp_never_back_fail_incc_pass_inv_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_keep_dfail_keep_comp_greater_or_equal_back_fail_inv_pass_inv_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_keep_dfail_decc_comp_never_back_fail_inv_pass_keep_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_keep_dfail_inv_comp_less_back_fail_decc_pass_keep_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decc_dfail_decw_comp_not_equal_back_fail_decc_pass_keep_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_incc_dfail_zero_comp_not_equal_back_fail_zero_pass_decc_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decc_dfail_keep_comp_greater_or_equal_back_fail_keep_pass_incc_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_keep_dfail_zero_comp_greater_or_equal_back_fail_decc_pass_decc_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_wrap_dfail_decc_comp_greater_or_equal_back_fail_decc_pass_keep_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_incc_dfail_decc_comp_greater_back_fail_zero_pass_wrap_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_keep_dfail_decc_comp_equal_back_fail_incc_pass_incc_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_keep_dfail_zero_comp_always_back_fail_inv_pass_keep_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_inv_dfail_inv_comp_always_back_fail_inv_pass_keep_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decw_dfail_inv_comp_always_back_fail_incc_pass_inv_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decw_dfail_keep_comp_always_back_fail_wrap_pass_decw_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_incc_dfail_inv_comp_equal_back_fail_decw_pass_decw_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decc_dfail_keep_comp_always_back_fail_zero_pass_incc_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_incc_dfail_wrap_comp_never_back_fail_keep_pass_decc_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_wrap_dfail_decw_comp_greater_back_fail_zero_pass_incc_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_repl_dfail_wrap_comp_never_back_fail_wrap_pass_wrap_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_zero_dfail_keep_comp_greater_back_fail_repl_pass_repl_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_repl_dfail_wrap_comp_less_or_equal_back_fail_incc_pass_zero_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_incc_dfail_inv_comp_less_or_equal_back_fail_decw_pass_repl_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_inv_dfail_incc_comp_equal_back_fail_decw_pass_incc_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_incc_dfail_decw_comp_equal_back_fail_decc_pass_inv_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_zero_dfail_zero_comp_greater_back_fail_keep_pass_incc_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_keep_dfail_zero_comp_equal_back_fail_wrap_pass_zero_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_zero_dfail_keep_comp_less_or_equal_back_fail_repl_pass_keep_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_inv_dfail_repl_comp_never_back_fail_inv_pass_zero_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_wrap_dfail_inv_comp_equal_back_fail_zero_pass_inv_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_zero_dfail_decw_comp_less_or_equal_back_fail_decw_pass_wrap_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_wrap_dfail_inv_comp_not_equal_back_fail_wrap_pass_zero_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_repl_dfail_wrap_comp_less_or_equal_back_fail_inv_pass_wrap_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_repl_dfail_repl_comp_greater_or_equal_back_fail_zero_pass_repl_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_inv_dfail_wrap_comp_always_back_fail_incc_pass_repl_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_incc_dfail_incc_comp_less_or_equal_back_fail_decw_pass_inv_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decw_dfail_keep_comp_greater_or_equal_back_fail_inv_pass_incc_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decc_dfail_incc_comp_greater_back_fail_decw_pass_decw_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_keep_dfail_incc_comp_equal_back_fail_keep_pass_decc_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decw_dfail_repl_comp_greater_back_fail_wrap_pass_keep_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_wrap_dfail_repl_comp_never_back_fail_incc_pass_decw_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decc_dfail_decc_comp_not_equal_back_fail_decc_pass_wrap_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_inv_dfail_keep_comp_greater_back_fail_wrap_pass_decc_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_incc_dfail_keep_comp_greater_or_equal_back_fail_incc_pass_inv_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_inv_dfail_zero_comp_less_back_fail_wrap_pass_incc_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_keep_dfail_decc_comp_never_back_fail_repl_pass_inv_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_wrap_dfail_zero_comp_greater_back_fail_inv_pass_keep_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_incc_dfail_keep_comp_always_back_fail_decw_pass_wrap_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decw_dfail_decc_comp_always_back_fail_inv_pass_incc_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_keep_dfail_zero_comp_not_equal_back_fail_zero_pass_decw_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decw_dfail_inv_comp_equal_back_fail_decc_pass_keep_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_keep_dfail_decw_comp_greater_back_fail_decc_pass_decw_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_keep_dfail_inv_comp_never_back_fail_repl_pass_keep_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decc_dfail_zero_comp_less_back_fail_inv_pass_keep_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_wrap_dfail_decc_comp_not_equal_back_fail_wrap_pass_decc_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_inv_dfail_decw_comp_less_or_equal_back_fail_incc_pass_wrap_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_inv_dfail_keep_comp_never_back_fail_decw_pass_inv_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_repl_dfail_decc_comp_less_back_fail_repl_pass_inv_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decc_dfail_zero_comp_less_or_equal_back_fail_inv_pass_repl_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decw_dfail_incc_comp_less_back_fail_inv_pass_decc_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decc_dfail_decc_comp_greater_or_equal_back_fail_decw_pass_decw_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_incc_dfail_incc_comp_never_back_fail_wrap_pass_decc_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_keep_dfail_keep_comp_greater_back_fail_repl_pass_incc_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decw_dfail_incc_comp_always_back_fail_decw_pass_keep_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_incc_dfail_keep_comp_greater_back_fail_zero_pass_decw_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decc_dfail_decc_comp_not_equal_back_fail_incc_pass_incc_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decc_dfail_incc_comp_less_or_equal_back_fail_incc_pass_decc_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_repl_dfail_keep_comp_never_back_fail_inv_pass_decc_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decw_dfail_zero_comp_less_or_equal_back_fail_wrap_pass_repl_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_wrap_dfail_zero_comp_greater_or_equal_back_fail_zero_pass_decw_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_repl_dfail_keep_comp_equal_back_fail_repl_pass_wrap_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_keep_dfail_repl_comp_greater_back_fail_decc_pass_repl_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_zero_dfail_inv_comp_greater_back_fail_repl_pass_keep_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_zero_dfail_zero_comp_always_back_fail_keep_pass_zero_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_incc_dfail_decc_comp_always_back_fail_keep_pass_zero_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decw_dfail_keep_comp_less_back_fail_wrap_pass_incc_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_inv_dfail_keep_comp_greater_back_fail_zero_pass_decw_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_keep_dfail_decc_comp_greater_back_fail_zero_pass_inv_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_keep_dfail_decc_comp_greater_or_equal_back_fail_inv_pass_keep_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_wrap_dfail_decc_comp_less_or_equal_back_fail_decc_pass_keep_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_inv_dfail_decw_comp_equal_back_fail_decw_pass_wrap_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_repl_dfail_wrap_comp_greater_or_equal_back_fail_zero_pass_inv_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_repl_dfail_keep_comp_never_back_fail_keep_pass_repl_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_inv_dfail_wrap_comp_less_or_equal_back_fail_inv_pass_repl_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_wrap_dfail_zero_comp_less_or_equal_back_fail_keep_pass_inv_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decc_dfail_keep_comp_less_back_fail_inv_pass_wrap_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_inv_dfail_inv_comp_not_equal_back_fail_zero_pass_decc_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decw_dfail_zero_comp_never_back_fail_decc_pass_inv_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_keep_dfail_inv_comp_less_or_equal_back_fail_repl_pass_decw_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_zero_dfail_keep_comp_less_or_equal_back_fail_decc_pass_keep_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_repl_dfail_repl_comp_equal_back_fail_keep_pass_zero_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_incc_dfail_repl_comp_greater_back_fail_keep_pass_repl_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_repl_dfail_decw_comp_greater_back_fail_zero_pass_incc_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_wrap_dfail_keep_comp_not_equal_back_fail_keep_pass_repl_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decw_dfail_zero_comp_greater_back_fail_decw_pass_wrap_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_incc_dfail_decw_comp_greater_or_equal_back_fail_repl_pass_decw_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_zero_dfail_keep_comp_never_back_fail_decc_pass_incc_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_repl_dfail_incc_comp_less_or_equal_back_fail_decc_pass_zero_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_zero_dfail_inv_comp_always_back_fail_incc_pass_repl_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_zero_dfail_incc_comp_always_back_fail_decc_pass_zero_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decw_dfail_repl_comp_greater_or_equal_back_fail_incc_pass_zero_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_keep_dfail_decw_comp_less_or_equal_back_fail_keep_pass_decw_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_wrap_dfail_incc_comp_always_back_fail_keep_pass_keep_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_inv_dfail_incc_comp_always_back_fail_incc_pass_wrap_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_zero_dfail_decc_comp_less_or_equal_back_fail_keep_pass_inv_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_keep_dfail_keep_comp_never_back_fail_zero_pass_zero_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_incc_dfail_decc_comp_equal_back_fail_inv_pass_keep_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_wrap_dfail_decc_comp_always_back_fail_keep_pass_incc_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_incc_dfail_wrap_comp_never_back_fail_wrap_pass_wrap_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_inv_dfail_keep_comp_less_back_fail_decc_pass_incc_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_zero_dfail_repl_comp_never_back_fail_inv_pass_inv_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decc_dfail_zero_comp_greater_or_equal_back_fail_keep_pass_zero_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_wrap_dfail_decc_comp_equal_back_fail_keep_pass_decc_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decc_dfail_decc_comp_less_back_fail_zero_pass_wrap_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_incc_dfail_keep_comp_equal_back_fail_incc_pass_decc_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_inv_dfail_inv_comp_always_back_fail_zero_pass_incc_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_keep_dfail_repl_comp_less_or_equal_back_fail_inv_pass_inv_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_keep_dfail_incc_comp_greater_or_equal_back_fail_inv_pass_keep_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_inv_dfail_wrap_comp_less_back_fail_zero_pass_keep_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_incc_dfail_inv_comp_equal_back_fail_incc_pass_inv_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_repl_dfail_inv_comp_equal_back_fail_inv_pass_incc_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_inv_dfail_decc_comp_not_equal_back_fail_decw_pass_repl_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_inv_dfail_wrap_comp_greater_or_equal_back_fail_wrap_pass_inv_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_repl_dfail_repl_comp_less_back_fail_decc_pass_inv_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decc_dfail_decw_comp_less_back_fail_wrap_pass_repl_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decw_dfail_zero_comp_equal_back_fail_incc_pass_decc_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_incc_dfail_zero_comp_greater_back_fail_wrap_pass_decw_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_zero_dfail_decw_comp_equal_back_fail_keep_pass_incc_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decc_dfail_wrap_comp_never_back_fail_incc_pass_zero_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_incc_dfail_zero_comp_greater_back_fail_zero_pass_decc_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_repl_dfail_incc_comp_always_back_fail_incc_pass_incc_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_zero_dfail_incc_comp_less_back_fail_repl_pass_repl_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_inv_dfail_wrap_comp_never_back_fail_zero_pass_zero_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_keep_dfail_inv_comp_equal_back_fail_keep_pass_inv_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_repl_dfail_keep_comp_not_equal_back_fail_wrap_pass_keep_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_incc_dfail_keep_comp_less_back_fail_zero_pass_repl_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decc_dfail_decw_comp_greater_or_equal_back_fail_wrap_pass_incc_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_wrap_dfail_incc_comp_greater_or_equal_back_fail_zero_pass_decc_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_wrap_dfail_decw_comp_always_back_fail_decw_pass_wrap_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_zero_dfail_decc_comp_equal_back_fail_keep_pass_wrap_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decw_dfail_zero_comp_equal_back_fail_decw_pass_zero_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_incc_dfail_decw_comp_less_or_equal_back_fail_incc_pass_decw_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_inv_dfail_incc_comp_never_back_fail_decc_pass_incc_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_wrap_dfail_decc_comp_greater_back_fail_repl_pass_inv_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decc_dfail_inv_comp_not_equal_back_fail_wrap_pass_wrap_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decw_dfail_repl_comp_greater_or_equal_back_fail_decw_pass_decc_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_keep_dfail_repl_comp_never_back_fail_incc_pass_decw_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decc_dfail_repl_comp_greater_or_equal_back_fail_repl_pass_keep_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decw_dfail_decc_comp_never_back_fail_incc_pass_decc_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_incc_dfail_keep_comp_less_back_fail_decc_pass_decw_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_keep_dfail_inv_comp_equal_back_fail_repl_pass_incc_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_wrap_dfail_keep_comp_less_back_fail_incc_pass_keep_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decc_dfail_inv_comp_never_back_fail_keep_pass_wrap_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decw_dfail_repl_comp_less_back_fail_decc_pass_decc_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_keep_dfail_decc_comp_not_equal_back_fail_inv_pass_decw_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_wrap_dfail_inv_comp_never_back_fail_decc_pass_keep_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_incc_dfail_keep_comp_equal_back_fail_decc_pass_wrap_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_incc_dfail_incc_comp_never_back_fail_incc_pass_incc_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_repl_dfail_decc_comp_less_back_fail_incc_pass_incc_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decw_dfail_repl_comp_never_back_fail_incc_pass_repl_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decc_dfail_wrap_comp_always_back_fail_decc_pass_decw_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_incc_dfail_keep_comp_less_or_equal_back_fail_decw_pass_decc_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_incc_dfail_wrap_comp_less_or_equal_back_fail_inv_pass_incc_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_wrap_dfail_wrap_comp_less_or_equal_back_fail_decw_pass_incc_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_zero_dfail_decw_comp_never_back_fail_inv_pass_wrap_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_keep_dfail_decw_comp_equal_back_fail_decc_pass_zero_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_zero_dfail_decw_comp_greater_or_equal_back_fail_inv_pass_keep_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_zero_dfail_repl_comp_less_back_fail_incc_pass_zero_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decw_dfail_decw_comp_greater_back_fail_decc_pass_zero_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_incc_dfail_keep_comp_not_equal_back_fail_decw_pass_decw_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_incc_dfail_zero_comp_less_back_fail_incc_pass_incc_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_inv_dfail_inv_comp_less_back_fail_repl_pass_incc_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decw_dfail_decc_comp_less_back_fail_decc_pass_inv_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_wrap_dfail_decc_comp_less_back_fail_keep_pass_decw_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_keep_dfail_decc_comp_not_equal_back_fail_decw_pass_wrap_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decw_dfail_keep_comp_equal_back_fail_wrap_pass_keep_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_incc_dfail_incc_comp_not_equal_back_fail_repl_pass_decw_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_zero_dfail_keep_comp_equal_back_fail_keep_pass_incc_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_zero_dfail_decc_comp_not_equal_back_fail_keep_pass_zero_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_inv_dfail_repl_comp_never_back_fail_wrap_pass_zero_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_zero_dfail_repl_comp_not_equal_back_fail_wrap_pass_inv_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_wrap_dfail_zero_comp_greater_or_equal_back_fail_decw_pass_zero_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_incc_dfail_incc_comp_greater_back_fail_keep_pass_wrap_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_zero_dfail_decc_comp_greater_or_equal_back_fail_incc_pass_incc_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decc_dfail_inv_comp_always_back_fail_keep_pass_zero_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decw_dfail_keep_comp_not_equal_back_fail_zero_pass_decc_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decw_dfail_inv_comp_always_back_fail_decc_pass_decw_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_inv_dfail_repl_comp_not_equal_back_fail_decc_pass_decw_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_keep_dfail_decw_comp_less_back_fail_decc_pass_inv_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_wrap_dfail_decc_comp_always_back_fail_decw_pass_keep_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decw_dfail_wrap_comp_never_back_fail_zero_pass_wrap_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_inv_dfail_repl_comp_less_back_fail_repl_pass_decw_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_inv_dfail_decw_comp_less_back_fail_repl_pass_inv_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decc_dfail_wrap_comp_always_back_fail_keep_pass_inv_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_zero_dfail_decc_comp_equal_back_fail_wrap_pass_decc_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_incc_dfail_incc_comp_greater_or_equal_back_fail_zero_pass_zero_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_incc_dfail_inv_comp_always_back_fail_decw_pass_incc_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decc_dfail_zero_comp_greater_back_fail_keep_pass_incc_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decc_dfail_keep_comp_less_or_equal_back_fail_incc_pass_decc_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decw_dfail_wrap_comp_greater_or_equal_back_fail_decw_pass_decc_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_keep_dfail_repl_comp_never_back_fail_repl_pass_decw_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_inv_dfail_decw_comp_less_or_equal_back_fail_inv_pass_keep_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_zero_dfail_decw_comp_not_equal_back_fail_zero_pass_inv_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_incc_dfail_zero_comp_always_back_fail_keep_pass_zero_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_inv_dfail_keep_comp_not_equal_back_fail_wrap_pass_incc_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_wrap_dfail_repl_comp_greater_or_equal_back_fail_incc_pass_inv_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_wrap_dfail_incc_comp_greater_back_fail_wrap_pass_wrap_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_incc_dfail_inv_comp_greater_back_fail_inv_pass_wrap_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_wrap_dfail_keep_comp_greater_or_equal_back_fail_incc_pass_incc_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_repl_dfail_zero_comp_equal_back_fail_keep_pass_wrap_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_wrap_dfail_zero_comp_greater_back_fail_inv_pass_repl_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decc_dfail_zero_comp_greater_back_fail_wrap_pass_wrap_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_zero_dfail_zero_comp_never_back_fail_repl_pass_decc_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decc_dfail_decc_comp_greater_or_equal_back_fail_repl_pass_zero_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decw_dfail_decw_comp_not_equal_back_fail_decc_pass_decc_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decw_dfail_incc_comp_not_equal_back_fail_zero_pass_decw_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_repl_dfail_keep_comp_greater_back_fail_decc_pass_decw_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_inv_dfail_wrap_comp_greater_or_equal_back_fail_zero_pass_repl_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_repl_dfail_keep_comp_not_equal_back_fail_inv_pass_inv_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decc_dfail_decw_comp_not_equal_back_fail_decw_pass_repl_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_keep_dfail_decw_comp_greater_or_equal_back_fail_keep_pass_decc_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_wrap_dfail_repl_comp_equal_back_fail_inv_pass_keep_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_inv_dfail_repl_comp_greater_back_fail_incc_pass_wrap_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_wrap_dfail_inv_comp_always_back_fail_keep_pass_inv_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_repl_dfail_decw_comp_equal_back_fail_repl_pass_wrap_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decc_dfail_wrap_comp_greater_back_fail_wrap_pass_repl_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_repl_dfail_incc_comp_not_equal_back_fail_keep_pass_decc_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_repl_dfail_keep_comp_greater_or_equal_back_fail_incc_pass_repl_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_repl_dfail_decc_comp_less_back_fail_zero_pass_repl_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decw_dfail_decw_comp_less_back_fail_repl_pass_repl_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_wrap_dfail_repl_comp_equal_back_fail_wrap_pass_decw_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_zero_dfail_incc_comp_not_equal_back_fail_inv_pass_wrap_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_keep_dfail_keep_comp_not_equal_back_fail_decc_pass_zero_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decc_dfail_repl_comp_always_back_fail_decw_pass_keep_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_keep_dfail_inv_comp_equal_back_fail_wrap_pass_decc_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_repl_dfail_wrap_comp_less_back_fail_zero_pass_keep_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_inv_dfail_incc_comp_less_or_equal_back_fail_zero_pass_repl_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decw_dfail_keep_comp_not_equal_back_fail_keep_pass_inv_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_incc_dfail_inv_comp_greater_or_equal_back_fail_keep_pass_decw_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decc_dfail_zero_comp_less_back_fail_zero_pass_incc_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_keep_dfail_decw_comp_always_back_fail_zero_pass_decc_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_repl_dfail_zero_comp_not_equal_back_fail_repl_pass_keep_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_wrap_dfail_keep_comp_less_or_equal_back_fail_repl_pass_repl_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_keep_dfail_zero_comp_not_equal_back_fail_decw_pass_wrap_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_zero_dfail_decw_comp_never_back_fail_zero_pass_keep_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_repl_dfail_decw_comp_never_back_fail_keep_pass_zero_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_keep_dfail_inv_comp_not_equal_back_fail_zero_pass_repl_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decw_dfail_decc_comp_equal_back_fail_decc_pass_keep_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_repl_dfail_wrap_comp_always_back_fail_incc_pass_decw_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decw_dfail_repl_comp_less_back_fail_inv_pass_repl_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decc_dfail_incc_comp_always_back_fail_wrap_pass_decw_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decw_dfail_inv_comp_greater_or_equal_back_fail_incc_pass_decc_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_zero_dfail_decw_comp_greater_or_equal_back_fail_keep_pass_decw_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_keep_dfail_incc_comp_greater_back_fail_wrap_pass_zero_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_keep_dfail_repl_comp_less_or_equal_back_fail_decw_pass_keep_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_keep_dfail_inv_comp_never_back_fail_keep_pass_keep_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_zero_dfail_inv_comp_greater_or_equal_back_fail_wrap_pass_keep_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_repl_dfail_keep_comp_greater_or_equal_back_fail_decw_pass_zero_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_incc_dfail_keep_comp_greater_back_fail_inv_pass_repl_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decw_dfail_wrap_comp_greater_back_fail_wrap_pass_incc_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_zero_dfail_wrap_comp_greater_back_fail_incc_pass_decw_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_incc_dfail_wrap_comp_not_equal_back_fail_zero_pass_zero_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_repl_dfail_wrap_comp_equal_back_fail_inv_pass_incc_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_keep_dfail_wrap_comp_equal_back_fail_inv_pass_repl_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_incc_dfail_keep_comp_less_back_fail_repl_pass_keep_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_inv_dfail_zero_comp_never_back_fail_decw_pass_incc_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_wrap_dfail_keep_comp_always_back_fail_incc_pass_inv_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_inv_dfail_keep_comp_equal_back_fail_decc_pass_wrap_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_wrap_dfail_zero_comp_always_back_fail_wrap_pass_inv_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_wrap_dfail_zero_comp_never_back_fail_zero_pass_wrap_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_incc_dfail_keep_comp_greater_back_fail_zero_pass_wrap_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_incc_dfail_wrap_comp_never_back_fail_repl_pass_incc_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_zero_dfail_decc_comp_not_equal_back_fail_wrap_pass_incc_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_keep_dfail_wrap_comp_not_equal_back_fail_incc_pass_zero_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_keep_dfail_incc_comp_less_back_fail_repl_pass_keep_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_keep_dfail_incc_comp_greater_or_equal_back_fail_incc_pass_keep_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_incc_dfail_inv_comp_not_equal_back_fail_wrap_pass_keep_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_wrap_dfail_wrap_comp_greater_or_equal_back_fail_decw_pass_incc_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decw_dfail_decw_comp_equal_back_fail_decw_pass_wrap_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_inv_dfail_wrap_comp_never_back_fail_zero_pass_decw_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_inv_dfail_keep_comp_always_back_fail_incc_pass_inv_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_inv_dfail_repl_comp_less_or_equal_back_fail_keep_pass_inv_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_inv_dfail_inv_comp_never_back_fail_wrap_pass_inv_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_inv_dfail_zero_comp_greater_back_fail_decc_pass_inv_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decw_dfail_decw_comp_not_equal_back_fail_keep_pass_inv_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decc_dfail_decc_comp_less_back_fail_repl_pass_decw_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decc_dfail_decc_comp_greater_or_equal_back_fail_wrap_pass_decc_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_keep_dfail_decc_comp_greater_back_fail_inv_pass_decc_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decc_dfail_incc_comp_not_equal_back_fail_incc_pass_keep_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decc_dfail_wrap_comp_equal_back_fail_zero_pass_decc_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_inv_dfail_repl_comp_equal_back_fail_inv_pass_decc_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_repl_dfail_incc_comp_less_or_equal_back_fail_inv_pass_inv_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_incc_dfail_wrap_comp_never_back_fail_inv_pass_repl_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_inv_dfail_zero_comp_greater_back_fail_repl_pass_incc_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decc_dfail_repl_comp_greater_back_fail_decw_pass_inv_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_inv_dfail_decc_comp_less_or_equal_back_fail_decc_pass_decc_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_repl_dfail_zero_comp_less_back_fail_keep_pass_inv_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_incc_dfail_zero_comp_greater_or_equal_back_fail_keep_pass_repl_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_inv_dfail_keep_comp_less_or_equal_back_fail_decc_pass_incc_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_wrap_dfail_incc_comp_less_back_fail_decw_pass_inv_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_incc_dfail_decc_comp_less_or_equal_back_fail_inv_pass_wrap_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_incc_dfail_repl_comp_greater_or_equal_back_fail_zero_pass_incc_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_incc_dfail_zero_comp_always_back_fail_decw_pass_incc_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_repl_dfail_repl_comp_less_back_fail_keep_pass_incc_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_zero_dfail_repl_comp_less_back_fail_keep_pass_repl_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decc_dfail_wrap_comp_not_equal_back_fail_incc_pass_zero_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decw_dfail_inv_comp_not_equal_back_fail_decc_pass_decc_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_repl_dfail_decc_comp_greater_or_equal_back_fail_wrap_pass_decw_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decw_dfail_wrap_comp_never_back_fail_incc_pass_repl_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_wrap_dfail_wrap_comp_greater_back_fail_decw_pass_decw_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decc_dfail_zero_comp_greater_back_fail_zero_pass_wrap_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_repl_dfail_keep_comp_greater_or_equal_back_fail_decc_pass_decc_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_incc_dfail_zero_comp_not_equal_back_fail_wrap_pass_repl_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_zero_dfail_keep_comp_greater_back_fail_wrap_pass_incc_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_keep_dfail_decc_comp_less_or_equal_back_fail_decc_pass_zero_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decc_dfail_repl_comp_equal_back_fail_zero_pass_keep_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_incc_dfail_zero_comp_greater_back_fail_wrap_pass_decc_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_incc_dfail_decc_comp_greater_back_fail_wrap_pass_incc_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decc_dfail_keep_comp_less_or_equal_back_fail_zero_pass_incc_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_incc_dfail_repl_comp_greater_back_fail_wrap_pass_decc_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decc_dfail_inv_comp_greater_back_fail_inv_pass_incc_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_incc_dfail_inv_comp_less_or_equal_back_fail_inv_pass_decc_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_incc_dfail_keep_comp_greater_or_equal_back_fail_inv_pass_incc_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_wrap_dfail_decc_comp_equal_back_fail_keep_pass_incc_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_incc_dfail_zero_comp_always_back_fail_incc_pass_wrap_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decc_dfail_zero_comp_less_or_equal_back_fail_zero_pass_incc_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_zero_dfail_keep_comp_equal_back_fail_repl_pass_decc_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_keep_dfail_repl_comp_less_back_fail_inv_pass_zero_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_zero_dfail_decc_comp_less_back_fail_decw_pass_keep_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_incc_dfail_decw_comp_greater_or_equal_back_fail_decw_pass_zero_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decc_dfail_inv_comp_less_back_fail_keep_pass_incc_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_keep_dfail_inv_comp_less_or_equal_back_fail_decc_pass_decc_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decc_dfail_incc_comp_equal_back_fail_wrap_pass_keep_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_zero_dfail_decc_comp_always_back_fail_decw_pass_decc_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_zero_dfail_incc_comp_not_equal_back_fail_wrap_pass_zero_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decw_dfail_inv_comp_less_or_equal_back_fail_wrap_pass_zero_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_keep_dfail_repl_comp_less_back_fail_incc_pass_decw_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_keep_dfail_inv_comp_always_back_fail_incc_pass_keep_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_keep_dfail_inv_comp_never_back_fail_wrap_pass_keep_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_keep_dfail_decw_comp_equal_back_fail_repl_pass_keep_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decw_dfail_repl_comp_greater_back_fail_decw_pass_keep_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_repl_dfail_wrap_comp_equal_back_fail_inv_pass_decw_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_keep_dfail_incc_comp_equal_back_fail_decc_pass_repl_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_wrap_dfail_keep_comp_greater_back_fail_keep_pass_keep_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decw_dfail_inv_comp_not_equal_back_fail_decw_pass_wrap_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_zero_dfail_wrap_comp_less_back_fail_repl_pass_decw_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decc_dfail_decc_comp_equal_back_fail_keep_pass_zero_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decc_dfail_decc_comp_never_back_fail_inv_pass_decc_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_keep_dfail_zero_comp_less_back_fail_keep_pass_decc_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_repl_dfail_repl_comp_not_equal_back_fail_incc_pass_keep_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_repl_dfail_repl_comp_less_back_fail_zero_pass_repl_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decw_dfail_decw_comp_greater_back_fail_decc_pass_repl_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decc_dfail_zero_comp_less_back_fail_repl_pass_decw_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_repl_dfail_repl_comp_greater_back_fail_decw_pass_decc_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_wrap_dfail_keep_comp_greater_back_fail_keep_pass_repl_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_repl_dfail_inv_comp_not_equal_back_fail_inv_pass_wrap_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_keep_dfail_decw_comp_less_back_fail_keep_pass_repl_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_zero_dfail_inv_comp_always_back_fail_decc_pass_keep_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_incc_dfail_decw_comp_greater_or_equal_back_fail_wrap_pass_zero_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_zero_dfail_incc_comp_never_back_fail_decw_pass_incc_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_zero_dfail_decc_comp_greater_or_equal_back_fail_inv_pass_zero_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_keep_dfail_zero_comp_not_equal_back_fail_wrap_pass_zero_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_repl_dfail_incc_comp_never_back_fail_inv_pass_keep_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_keep_dfail_keep_comp_less_or_equal_back_fail_incc_pass_repl_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_inv_dfail_decc_comp_less_or_equal_back_fail_decw_pass_keep_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_keep_dfail_decc_comp_less_back_fail_incc_pass_inv_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_wrap_dfail_zero_comp_less_or_equal_back_fail_keep_pass_keep_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_inv_dfail_zero_comp_equal_back_fail_wrap_pass_wrap_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decw_dfail_incc_comp_equal_back_fail_zero_pass_inv_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_incc_dfail_decw_comp_never_back_fail_wrap_pass_decw_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_wrap_dfail_keep_comp_equal_back_fail_wrap_pass_incc_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decw_dfail_decw_comp_greater_back_fail_zero_pass_wrap_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_zero_dfail_decc_comp_never_back_fail_zero_pass_decw_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_repl_dfail_decc_comp_greater_back_fail_repl_pass_zero_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_keep_dfail_repl_comp_greater_back_fail_incc_pass_repl_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_inv_dfail_wrap_comp_greater_back_fail_decc_pass_keep_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_repl_dfail_zero_comp_greater_or_equal_back_fail_inv_pass_inv_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decc_dfail_incc_comp_never_back_fail_repl_pass_repl_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decc_dfail_inv_comp_not_equal_back_fail_decw_pass_decc_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_incc_dfail_decw_comp_never_back_fail_keep_pass_decc_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_incc_dfail_incc_comp_never_back_fail_keep_pass_incc_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decw_dfail_wrap_comp_greater_or_equal_back_fail_inv_pass_incc_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_keep_dfail_repl_comp_always_back_fail_zero_pass_decw_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_incc_dfail_decw_comp_never_back_fail_incc_pass_keep_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_keep_dfail_decw_comp_not_equal_back_fail_decc_pass_incc_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decw_dfail_wrap_comp_greater_or_equal_back_fail_zero_pass_keep_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_zero_dfail_repl_comp_equal_back_fail_incc_pass_decw_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_incc_dfail_inv_comp_never_back_fail_zero_pass_zero_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_wrap_dfail_zero_comp_greater_or_equal_back_fail_zero_pass_incc_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_keep_dfail_inv_comp_less_back_fail_incc_pass_wrap_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_zero_dfail_decc_comp_less_back_fail_zero_pass_keep_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_repl_dfail_decw_comp_less_back_fail_wrap_pass_zero_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decw_dfail_decc_comp_less_or_equal_back_fail_repl_pass_repl_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_keep_dfail_incc_comp_not_equal_back_fail_inv_pass_decw_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_keep_dfail_keep_comp_less_or_equal_back_fail_decc_pass_keep_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_zero_dfail_wrap_comp_greater_or_equal_back_fail_inv_pass_keep_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_keep_dfail_inv_comp_less_or_equal_back_fail_zero_pass_zero_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decc_dfail_decw_comp_never_back_fail_inv_pass_keep_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_inv_dfail_incc_comp_greater_or_equal_back_fail_repl_pass_decc_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_wrap_dfail_incc_comp_equal_back_fail_decw_pass_inv_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decw_dfail_keep_comp_equal_back_fail_decc_pass_wrap_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decc_dfail_repl_comp_less_back_fail_decw_pass_decw_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decc_dfail_decw_comp_greater_or_equal_back_fail_decw_pass_decc_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_repl_dfail_decc_comp_always_back_fail_wrap_pass_decc_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_keep_dfail_decc_comp_less_or_equal_back_fail_zero_pass_repl_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_keep_dfail_repl_comp_greater_or_equal_back_fail_inv_pass_keep_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_zero_dfail_decw_comp_equal_back_fail_repl_pass_keep_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_inv_dfail_decw_comp_never_back_fail_repl_pass_zero_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_wrap_dfail_decc_comp_greater_or_equal_back_fail_wrap_pass_inv_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decw_dfail_decw_comp_equal_back_fail_inv_pass_wrap_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_inv_dfail_incc_comp_not_equal_back_fail_inv_pass_decw_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decw_dfail_repl_comp_greater_back_fail_repl_pass_inv_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_incc_dfail_inv_comp_always_back_fail_wrap_pass_decw_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decw_dfail_decw_comp_greater_back_fail_decc_pass_incc_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_wrap_dfail_inv_comp_never_back_fail_keep_pass_decw_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_keep_dfail_decw_comp_always_back_fail_decw_pass_wrap_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_repl_dfail_zero_comp_less_back_fail_keep_pass_keep_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_incc_dfail_decc_comp_not_equal_back_fail_decc_pass_repl_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_zero_dfail_keep_comp_less_back_fail_keep_pass_incc_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_keep_dfail_repl_comp_greater_back_fail_decc_pass_zero_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_keep_dfail_decc_comp_equal_back_fail_zero_pass_keep_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_repl_dfail_repl_comp_greater_or_equal_back_fail_decw_pass_keep_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_inv_dfail_keep_comp_greater_or_equal_back_fail_decw_pass_repl_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_incc_dfail_inv_comp_never_back_fail_decc_pass_inv_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decw_dfail_keep_comp_always_back_fail_wrap_pass_incc_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decc_dfail_repl_comp_equal_back_fail_wrap_pass_decw_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_incc_dfail_repl_comp_not_equal_back_fail_inv_pass_decc_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decw_dfail_decw_comp_equal_back_fail_repl_pass_incc_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_wrap_dfail_decc_comp_never_back_fail_incc_pass_decw_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_incc_dfail_decc_comp_not_equal_back_fail_zero_pass_wrap_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decw_dfail_repl_comp_not_equal_back_fail_incc_pass_incc_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decw_dfail_inv_comp_less_or_equal_back_fail_zero_pass_decw_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_inv_dfail_zero_comp_less_back_fail_inv_pass_decw_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decc_dfail_repl_comp_never_back_fail_keep_pass_inv_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decw_dfail_wrap_comp_not_equal_back_fail_keep_pass_decc_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_inv_dfail_decw_comp_greater_or_equal_back_fail_keep_pass_decw_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_keep_dfail_inv_comp_greater_back_fail_decc_pass_inv_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_keep_dfail_keep_comp_greater_back_fail_zero_pass_keep_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decw_dfail_wrap_comp_never_back_fail_repl_pass_keep_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decw_dfail_repl_comp_always_back_fail_incc_pass_decw_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_wrap_dfail_incc_comp_not_equal_back_fail_incc_pass_decw_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decw_dfail_inv_comp_less_or_equal_back_fail_zero_pass_wrap_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_zero_dfail_wrap_comp_equal_back_fail_keep_pass_decw_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_zero_dfail_repl_comp_not_equal_back_fail_decw_pass_zero_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decc_dfail_decw_comp_less_or_equal_back_fail_repl_pass_zero_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_keep_dfail_zero_comp_never_back_fail_inv_pass_decc_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_keep_dfail_repl_comp_always_back_fail_keep_pass_keep_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decc_dfail_keep_comp_never_back_fail_decw_pass_keep_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decc_dfail_decc_comp_greater_back_fail_incc_pass_decc_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_zero_dfail_keep_comp_always_back_fail_repl_pass_decc_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decw_dfail_repl_comp_always_back_fail_wrap_pass_zero_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decc_dfail_wrap_comp_greater_back_fail_keep_pass_decw_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_repl_dfail_inv_comp_less_or_equal_back_fail_repl_pass_decc_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decc_dfail_wrap_comp_less_back_fail_wrap_pass_repl_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_incc_dfail_incc_comp_equal_back_fail_keep_pass_decc_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_inv_dfail_decc_comp_greater_back_fail_inv_pass_incc_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_inv_dfail_inv_comp_equal_back_fail_decc_pass_inv_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decc_dfail_inv_comp_never_back_fail_inv_pass_inv_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_keep_dfail_keep_comp_never_back_fail_keep_pass_decc_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_repl_dfail_repl_comp_less_back_fail_decw_pass_keep_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_repl_dfail_decw_comp_greater_back_fail_inv_pass_repl_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decc_dfail_inv_comp_always_back_fail_repl_pass_repl_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decw_dfail_wrap_comp_less_or_equal_back_fail_repl_pass_decc_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_zero_dfail_wrap_comp_greater_back_fail_inv_pass_decw_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_repl_dfail_decc_comp_always_back_fail_wrap_pass_zero_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_wrap_dfail_repl_comp_equal_back_fail_repl_pass_repl_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_inv_dfail_decc_comp_never_back_fail_wrap_pass_wrap_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decc_dfail_inv_comp_never_back_fail_decc_pass_inv_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decw_dfail_decc_comp_never_back_fail_wrap_pass_decc_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_incc_dfail_zero_comp_less_or_equal_back_fail_repl_pass_decw_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_repl_dfail_incc_comp_equal_back_fail_zero_pass_incc_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_zero_dfail_inv_comp_less_back_fail_wrap_pass_repl_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_repl_dfail_keep_comp_never_back_fail_decw_pass_zero_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decc_dfail_repl_comp_never_back_fail_decc_pass_repl_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_repl_dfail_decw_comp_equal_back_fail_decc_pass_decc_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decc_dfail_decw_comp_not_equal_back_fail_inv_pass_repl_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decw_dfail_keep_comp_never_back_fail_incc_pass_decc_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decc_dfail_keep_comp_less_back_fail_wrap_pass_decw_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decw_dfail_repl_comp_not_equal_back_fail_decc_pass_decc_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_incc_dfail_wrap_comp_greater_back_fail_incc_pass_decw_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decw_dfail_incc_comp_less_back_fail_wrap_pass_incc_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decw_dfail_inv_comp_less_back_fail_incc_pass_decw_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_keep_dfail_repl_comp_less_or_equal_back_fail_incc_pass_decw_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decw_dfail_zero_comp_always_back_fail_zero_pass_keep_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_repl_dfail_keep_comp_greater_or_equal_back_fail_inv_pass_decw_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_repl_dfail_repl_comp_less_or_equal_back_fail_repl_pass_repl_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decc_dfail_decw_comp_less_or_equal_back_fail_inv_pass_repl_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_incc_dfail_keep_comp_greater_or_equal_back_fail_wrap_pass_decc_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_repl_dfail_zero_comp_greater_or_equal_back_fail_zero_pass_incc_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_zero_dfail_decw_comp_less_or_equal_back_fail_decw_pass_repl_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decw_dfail_decc_comp_greater_or_equal_back_fail_repl_pass_zero_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_zero_dfail_zero_comp_greater_or_equal_back_fail_decc_pass_decw_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_wrap_dfail_incc_comp_always_back_fail_zero_pass_zero_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decc_dfail_decc_comp_always_back_fail_decc_pass_wrap_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decw_dfail_zero_comp_not_equal_back_fail_keep_pass_decc_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_incc_dfail_inv_comp_greater_or_equal_back_fail_wrap_pass_decw_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decw_dfail_decc_comp_not_equal_back_fail_decw_pass_incc_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_zero_dfail_repl_comp_not_equal_back_fail_repl_pass_decw_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decw_dfail_decc_comp_equal_back_fail_keep_pass_zero_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decc_dfail_incc_comp_always_back_fail_decc_pass_decw_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decw_dfail_incc_comp_not_equal_back_fail_wrap_pass_decc_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_incc_dfail_wrap_comp_never_back_fail_decw_pass_decw_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decc_dfail_keep_comp_always_back_fail_keep_pass_incc_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decc_dfail_keep_comp_not_equal_back_fail_wrap_pass_decc_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_keep_dfail_inv_comp_equal_back_fail_incc_pass_decc_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decw_dfail_decc_comp_equal_back_fail_inv_pass_keep_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_inv_dfail_decc_comp_not_equal_back_fail_repl_pass_decw_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_repl_dfail_zero_comp_less_or_equal_back_fail_decc_pass_inv_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decc_dfail_inv_comp_never_back_fail_keep_pass_repl_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_inv_dfail_inv_comp_equal_back_fail_zero_pass_decc_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decc_dfail_zero_comp_greater_or_equal_back_fail_wrap_pass_inv_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decw_dfail_repl_comp_greater_back_fail_incc_pass_decc_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_zero_dfail_inv_comp_less_or_equal_back_fail_repl_pass_decw_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_wrap_dfail_inv_comp_less_or_equal_back_fail_incc_pass_zero_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_wrap_dfail_zero_comp_always_back_fail_inv_pass_wrap_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_keep_dfail_zero_comp_less_back_fail_keep_pass_wrap_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_wrap_dfail_incc_comp_less_or_equal_back_fail_decw_pass_keep_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_keep_dfail_inv_comp_less_or_equal_back_fail_incc_pass_wrap_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decw_dfail_decc_comp_less_or_equal_back_fail_incc_pass_keep_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decw_dfail_wrap_comp_never_back_fail_decc_pass_decw_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_inv_dfail_wrap_comp_greater_or_equal_back_fail_wrap_pass_decw_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decw_dfail_zero_comp_equal_back_fail_repl_pass_inv_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_incc_dfail_incc_comp_less_or_equal_back_fail_decw_pass_decw_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decw_dfail_decw_comp_greater_or_equal_back_fail_wrap_pass_incc_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_keep_dfail_zero_comp_greater_back_fail_zero_pass_decw_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_wrap_dfail_inv_comp_not_equal_back_fail_repl_pass_keep_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decw_dfail_keep_comp_not_equal_back_fail_decw_pass_wrap_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_keep_dfail_zero_comp_never_back_fail_repl_pass_decw_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_zero_dfail_incc_comp_equal_back_fail_inv_pass_keep_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_zero_dfail_keep_comp_less_back_fail_decw_pass_zero_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decc_dfail_decc_comp_greater_back_fail_inv_pass_zero_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_zero_dfail_wrap_comp_always_back_fail_decc_pass_decc_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_repl_dfail_decw_comp_less_back_fail_keep_pass_zero_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_incc_dfail_decw_comp_never_back_fail_keep_pass_repl_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decw_dfail_repl_comp_always_back_fail_decw_pass_incc_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_wrap_dfail_wrap_comp_less_back_fail_inv_pass_decw_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_wrap_dfail_decc_comp_never_back_fail_keep_pass_wrap_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_wrap_dfail_incc_comp_never_back_fail_repl_pass_wrap_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_inv_dfail_inv_comp_greater_back_fail_zero_pass_wrap_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decw_dfail_decc_comp_never_back_fail_keep_pass_inv_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_incc_dfail_decw_comp_less_or_equal_back_fail_zero_pass_decw_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_wrap_dfail_inv_comp_not_equal_back_fail_zero_pass_incc_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_wrap_dfail_wrap_comp_greater_back_fail_decc_pass_wrap_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decc_dfail_incc_comp_less_or_equal_back_fail_decc_pass_wrap_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_keep_dfail_incc_comp_less_back_fail_wrap_pass_decc_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_incc_dfail_zero_comp_never_back_fail_decc_pass_keep_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_inv_dfail_inv_comp_less_or_equal_back_fail_wrap_pass_incc_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_keep_dfail_keep_comp_greater_or_equal_back_fail_repl_pass_inv_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_repl_dfail_repl_comp_greater_back_fail_wrap_pass_keep_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decw_dfail_zero_comp_equal_back_fail_repl_pass_repl_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_keep_dfail_zero_comp_greater_back_fail_keep_pass_decw_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decc_dfail_decc_comp_always_back_fail_zero_pass_keep_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_wrap_dfail_decw_comp_always_back_fail_wrap_pass_decc_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_incc_dfail_incc_comp_always_back_fail_repl_pass_wrap_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_zero_dfail_wrap_comp_equal_back_fail_keep_pass_incc_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_keep_dfail_incc_comp_always_back_fail_wrap_pass_zero_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_inv_dfail_inv_comp_never_back_fail_wrap_pass_keep_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_keep_dfail_repl_comp_greater_or_equal_back_fail_inv_pass_inv_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_keep_dfail_decw_comp_greater_back_fail_incc_pass_keep_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_incc_dfail_incc_comp_equal_back_fail_keep_pass_keep_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_zero_dfail_wrap_comp_less_back_fail_repl_pass_incc_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_zero_dfail_incc_comp_greater_back_fail_zero_pass_zero_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_keep_dfail_incc_comp_never_back_fail_incc_pass_zero_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_inv_dfail_repl_comp_never_back_fail_decw_pass_keep_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_keep_dfail_inv_comp_greater_back_fail_decw_pass_inv_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_zero_dfail_zero_comp_not_equal_back_fail_decc_pass_keep_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_inv_dfail_inv_comp_equal_back_fail_decc_pass_zero_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decw_dfail_repl_comp_less_or_equal_back_fail_decw_pass_inv_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decc_dfail_keep_comp_never_back_fail_wrap_pass_decw_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decw_dfail_incc_comp_equal_back_fail_keep_pass_decc_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_wrap_dfail_decw_comp_less_back_fail_decw_pass_decw_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_keep_dfail_incc_comp_less_or_equal_back_fail_keep_pass_wrap_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_incc_dfail_decw_comp_not_equal_back_fail_zero_pass_keep_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_zero_dfail_decw_comp_equal_back_fail_wrap_pass_incc_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decc_dfail_zero_comp_greater_or_equal_back_fail_inv_pass_zero_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_zero_dfail_zero_comp_always_back_fail_decw_pass_decc_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_zero_dfail_decc_comp_always_back_fail_inv_pass_zero_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decc_dfail_keep_comp_never_back_fail_incc_pass_zero_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decw_dfail_incc_comp_equal_back_fail_zero_pass_decc_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_incc_dfail_decw_comp_less_back_fail_zero_pass_decw_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decw_dfail_incc_comp_equal_back_fail_decw_pass_incc_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_keep_dfail_decc_comp_never_back_fail_keep_pass_decw_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_wrap_dfail_wrap_comp_not_equal_back_fail_decw_pass_keep_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_repl_dfail_keep_comp_never_back_fail_repl_pass_wrap_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_wrap_dfail_inv_comp_always_back_fail_incc_pass_repl_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_keep_dfail_repl_comp_not_equal_back_fail_decw_pass_wrap_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decc_dfail_wrap_comp_greater_back_fail_keep_pass_keep_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decc_dfail_zero_comp_less_back_fail_inv_pass_decc_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_repl_dfail_zero_comp_equal_back_fail_repl_pass_decc_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decc_dfail_inv_comp_always_back_fail_zero_pass_repl_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_wrap_dfail_wrap_comp_always_back_fail_keep_pass_decc_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_repl_dfail_inv_comp_never_back_fail_zero_pass_wrap_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decw_dfail_wrap_comp_greater_or_equal_back_fail_keep_pass_repl_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_keep_dfail_keep_comp_not_equal_back_fail_inv_pass_decw_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_keep_dfail_zero_comp_less_back_fail_incc_pass_keep_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decc_dfail_inv_comp_less_or_equal_back_fail_repl_pass_keep_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_repl_dfail_zero_comp_equal_back_fail_decc_pass_decc_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decw_dfail_zero_comp_always_back_fail_decc_pass_repl_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_incc_dfail_decc_comp_never_back_fail_repl_pass_decw_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_keep_dfail_wrap_comp_less_or_equal_back_fail_inv_pass_incc_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_zero_dfail_wrap_comp_less_back_fail_keep_pass_keep_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_keep_dfail_decw_comp_greater_back_fail_incc_pass_zero_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_inv_dfail_incc_comp_less_or_equal_back_fail_decc_pass_keep_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_inv_dfail_keep_comp_less_or_equal_back_fail_zero_pass_inv_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decc_dfail_decc_comp_less_back_fail_incc_pass_inv_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decc_dfail_decw_comp_never_back_fail_keep_pass_decc_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decw_dfail_zero_comp_not_equal_back_fail_decw_pass_decc_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_zero_dfail_incc_comp_less_or_equal_back_fail_keep_pass_decw_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_zero_dfail_repl_comp_greater_back_fail_decw_pass_zero_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decw_dfail_decw_comp_less_back_fail_zero_pass_zero_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_wrap_dfail_decw_comp_never_back_fail_decw_pass_decw_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_inv_dfail_inv_comp_equal_back_fail_wrap_pass_wrap_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_keep_dfail_incc_comp_less_or_equal_back_fail_incc_pass_inv_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_incc_dfail_zero_comp_greater_or_equal_back_fail_decw_pass_keep_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_inv_dfail_incc_comp_greater_back_fail_wrap_pass_incc_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_incc_dfail_decc_comp_never_back_fail_repl_pass_inv_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_repl_dfail_decw_comp_always_back_fail_decw_pass_incc_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_incc_dfail_repl_comp_less_or_equal_back_fail_decc_pass_repl_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decw_dfail_wrap_comp_greater_back_fail_inv_pass_incc_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decw_dfail_wrap_comp_less_back_fail_decw_pass_decw_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_keep_dfail_decw_comp_not_equal_back_fail_inv_pass_decw_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_zero_dfail_zero_comp_equal_back_fail_keep_pass_keep_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_incc_dfail_incc_comp_not_equal_back_fail_decw_pass_zero_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decc_dfail_decc_comp_always_back_fail_inv_pass_incc_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_inv_dfail_wrap_comp_greater_back_fail_zero_pass_decc_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_wrap_dfail_incc_comp_not_equal_back_fail_decw_pass_inv_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_inv_dfail_inv_comp_always_back_fail_incc_pass_wrap_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_repl_dfail_incc_comp_greater_or_equal_back_fail_wrap_pass_inv_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_inv_dfail_incc_comp_greater_or_equal_back_fail_decw_pass_repl_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decw_dfail_inv_comp_greater_back_fail_zero_pass_inv_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_inv_dfail_zero_comp_equal_back_fail_inv_pass_decw_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decw_dfail_zero_comp_not_equal_back_fail_wrap_pass_inv_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_keep_dfail_decw_comp_less_back_fail_decc_pass_decw_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_inv_dfail_zero_comp_greater_or_equal_back_fail_wrap_pass_keep_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decw_dfail_incc_comp_less_back_fail_incc_pass_inv_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decw_dfail_zero_comp_equal_back_fail_decc_pass_decw_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decc_dfail_incc_comp_always_back_fail_decc_pass_decw_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_repl_dfail_repl_comp_less_back_fail_repl_pass_decc_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_inv_dfail_wrap_comp_equal_back_fail_incc_pass_repl_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_repl_dfail_decw_comp_equal_back_fail_incc_pass_inv_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_wrap_dfail_inv_comp_less_back_fail_repl_pass_repl_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_inv_dfail_incc_comp_less_back_fail_repl_pass_wrap_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_keep_dfail_decw_comp_greater_or_equal_back_fail_inv_pass_inv_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_repl_dfail_decw_comp_always_back_fail_wrap_pass_keep_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_incc_dfail_zero_comp_always_back_fail_wrap_pass_repl_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decc_dfail_decw_comp_less_or_equal_back_fail_incc_pass_incc_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_inv_dfail_keep_comp_not_equal_back_fail_incc_pass_decc_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_repl_dfail_decc_comp_not_equal_back_fail_keep_pass_inv_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_inv_dfail_wrap_comp_equal_back_fail_decw_pass_repl_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_inv_dfail_decc_comp_not_equal_back_fail_wrap_pass_inv_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_keep_dfail_decw_comp_not_equal_back_fail_zero_pass_inv_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decc_dfail_zero_comp_equal_back_fail_decw_pass_keep_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decc_dfail_wrap_comp_not_equal_back_fail_repl_pass_decc_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decw_dfail_inv_comp_not_equal_back_fail_zero_pass_decc_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_incc_dfail_incc_comp_always_back_fail_incc_pass_decw_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_inv_dfail_repl_comp_equal_back_fail_incc_pass_incc_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_zero_dfail_decc_comp_not_equal_back_fail_keep_pass_inv_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decw_dfail_keep_comp_less_back_fail_decc_pass_zero_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_incc_dfail_wrap_comp_less_back_fail_decw_pass_decw_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_wrap_dfail_decw_comp_less_or_equal_back_fail_decc_pass_incc_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_incc_dfail_zero_comp_not_equal_back_fail_repl_pass_wrap_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_zero_dfail_incc_comp_always_back_fail_repl_pass_incc_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_wrap_dfail_decc_comp_always_back_fail_inv_pass_zero_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_keep_dfail_repl_comp_equal_back_fail_repl_pass_wrap_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_keep_dfail_incc_comp_not_equal_back_fail_wrap_pass_keep_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_keep_dfail_keep_comp_always_back_fail_repl_pass_keep_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_keep_dfail_inv_comp_never_back_fail_zero_pass_keep_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_incc_dfail_wrap_comp_less_back_fail_keep_pass_keep_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_incc_dfail_inv_comp_greater_or_equal_back_fail_decw_pass_incc_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_keep_dfail_keep_comp_greater_back_fail_decc_pass_incc_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_incc_dfail_incc_comp_always_back_fail_inv_pass_keep_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_wrap_dfail_inv_comp_not_equal_back_fail_wrap_pass_incc_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_inv_dfail_repl_comp_always_back_fail_wrap_pass_wrap_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_inv_dfail_keep_comp_never_back_fail_decc_pass_inv_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_keep_dfail_decw_comp_never_back_fail_decc_pass_inv_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_incc_dfail_inv_comp_always_back_fail_inv_pass_keep_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_keep_dfail_decw_comp_always_back_fail_inv_pass_incc_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_zero_dfail_wrap_comp_greater_back_fail_incc_pass_keep_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_inv_dfail_repl_comp_equal_back_fail_decw_pass_zero_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_repl_dfail_keep_comp_greater_back_fail_repl_pass_inv_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decc_dfail_inv_comp_greater_or_equal_back_fail_wrap_pass_repl_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_zero_dfail_repl_comp_not_equal_back_fail_wrap_pass_decc_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_zero_dfail_keep_comp_never_back_fail_zero_pass_zero_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decw_dfail_inv_comp_greater_or_equal_back_fail_decw_pass_zero_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_zero_dfail_keep_comp_greater_or_equal_back_fail_inv_pass_decw_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_wrap_dfail_decw_comp_always_back_fail_keep_pass_zero_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decw_dfail_keep_comp_always_back_fail_zero_pass_wrap_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decc_dfail_wrap_comp_less_or_equal_back_fail_repl_pass_decw_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_zero_dfail_wrap_comp_greater_back_fail_decw_pass_decc_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_repl_dfail_inv_comp_always_back_fail_keep_pass_zero_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_inv_dfail_incc_comp_greater_or_equal_back_fail_keep_pass_repl_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_wrap_dfail_zero_comp_always_back_fail_repl_pass_inv_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_wrap_dfail_incc_comp_never_back_fail_decw_pass_wrap_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_repl_dfail_wrap_comp_greater_or_equal_back_fail_keep_pass_wrap_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_incc_dfail_wrap_comp_less_back_fail_decw_pass_repl_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_wrap_dfail_keep_comp_less_or_equal_back_fail_repl_pass_incc_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_incc_dfail_zero_comp_greater_back_fail_zero_pass_wrap_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_repl_dfail_decc_comp_equal_back_fail_repl_pass_incc_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decc_dfail_zero_comp_not_equal_back_fail_repl_pass_repl_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_wrap_dfail_repl_comp_always_back_fail_wrap_pass_decc_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decc_dfail_decw_comp_greater_or_equal_back_fail_keep_pass_wrap_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_zero_dfail_incc_comp_less_or_equal_back_fail_decc_pass_decc_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_wrap_dfail_zero_comp_greater_or_equal_back_fail_wrap_pass_zero_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_inv_dfail_repl_comp_equal_back_fail_decw_pass_wrap_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_incc_dfail_inv_comp_never_back_fail_decw_pass_inv_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_repl_dfail_wrap_comp_equal_back_fail_decc_pass_incc_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_zero_dfail_repl_comp_less_back_fail_repl_pass_repl_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_wrap_dfail_wrap_comp_greater_back_fail_zero_pass_zero_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decc_dfail_zero_comp_less_back_fail_inv_pass_wrap_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_keep_dfail_repl_comp_greater_or_equal_back_fail_incc_pass_decc_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decw_dfail_zero_comp_greater_or_equal_back_fail_decw_pass_keep_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_repl_dfail_zero_comp_greater_or_equal_back_fail_zero_pass_decw_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decw_dfail_zero_comp_always_back_fail_incc_pass_repl_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decw_dfail_decc_comp_less_back_fail_zero_pass_decw_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_inv_dfail_decc_comp_never_back_fail_repl_pass_decw_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_zero_dfail_incc_comp_greater_back_fail_keep_pass_inv_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decw_dfail_zero_comp_less_or_equal_back_fail_decc_pass_zero_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_incc_dfail_zero_comp_less_back_fail_incc_pass_decw_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_incc_dfail_repl_comp_never_back_fail_zero_pass_incc_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decw_dfail_wrap_comp_never_back_fail_decw_pass_incc_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_repl_dfail_decw_comp_less_or_equal_back_fail_keep_pass_decw_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decc_dfail_keep_comp_greater_back_fail_inv_pass_repl_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decw_dfail_inv_comp_not_equal_back_fail_keep_pass_decc_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decw_dfail_inv_comp_greater_or_equal_back_fail_decw_pass_decw_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_incc_dfail_keep_comp_less_or_equal_back_fail_zero_pass_decw_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_zero_dfail_decc_comp_always_back_fail_zero_pass_incc_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_incc_dfail_incc_comp_less_back_fail_decc_pass_zero_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decc_dfail_keep_comp_never_back_fail_incc_pass_incc_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_repl_dfail_keep_comp_never_back_fail_inv_pass_decc_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_zero_dfail_wrap_comp_not_equal_back_fail_zero_pass_repl_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_repl_dfail_incc_comp_less_back_fail_wrap_pass_zero_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_keep_dfail_decw_comp_always_back_fail_decw_pass_repl_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_zero_dfail_wrap_comp_greater_back_fail_decc_pass_keep_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decw_dfail_keep_comp_greater_or_equal_back_fail_inv_pass_zero_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decw_dfail_wrap_comp_always_back_fail_keep_pass_decw_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decw_dfail_incc_comp_less_or_equal_back_fail_incc_pass_decw_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_keep_dfail_decc_comp_never_back_fail_keep_pass_decw_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_zero_dfail_decc_comp_never_back_fail_keep_pass_keep_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_incc_dfail_zero_comp_equal_back_fail_keep_pass_zero_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_zero_dfail_wrap_comp_greater_back_fail_zero_pass_incc_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_incc_dfail_decc_comp_less_back_fail_incc_pass_zero_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_incc_dfail_decc_comp_always_back_fail_inv_pass_incc_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decc_dfail_repl_comp_always_back_fail_zero_pass_incc_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_zero_dfail_zero_comp_less_or_equal_back_fail_keep_pass_decc_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_incc_dfail_zero_comp_equal_back_fail_zero_pass_zero_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_zero_dfail_zero_comp_not_equal_back_fail_keep_pass_incc_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_incc_dfail_inv_comp_greater_back_fail_decw_pass_zero_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_keep_dfail_zero_comp_equal_back_fail_zero_pass_incc_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_keep_dfail_wrap_comp_greater_or_equal_back_fail_decw_pass_keep_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_incc_dfail_keep_comp_never_back_fail_zero_pass_keep_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decc_dfail_keep_comp_less_or_equal_back_fail_decc_pass_incc_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_repl_dfail_incc_comp_always_back_fail_incc_pass_decc_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decc_dfail_wrap_comp_equal_back_fail_keep_pass_repl_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_inv_dfail_decw_comp_less_back_fail_incc_pass_decc_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decc_dfail_keep_comp_less_or_equal_back_fail_repl_pass_inv_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_zero_dfail_repl_comp_greater_back_fail_inv_pass_decc_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decc_dfail_wrap_comp_greater_or_equal_back_fail_inv_pass_zero_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_inv_dfail_decw_comp_equal_back_fail_wrap_pass_decc_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_wrap_dfail_repl_comp_not_equal_back_fail_wrap_pass_inv_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decc_dfail_wrap_comp_greater_back_fail_keep_pass_wrap_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decc_dfail_wrap_comp_less_back_fail_zero_pass_decc_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_incc_dfail_decw_comp_less_back_fail_incc_pass_decc_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_repl_dfail_keep_comp_less_or_equal_back_fail_keep_pass_incc_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_incc_dfail_incc_comp_greater_or_equal_back_fail_inv_pass_repl_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_zero_dfail_wrap_comp_greater_or_equal_back_fail_repl_pass_incc_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_inv_dfail_zero_comp_always_back_fail_decw_pass_zero_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_inv_dfail_incc_comp_equal_back_fail_keep_pass_inv_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_repl_dfail_zero_comp_not_equal_back_fail_zero_pass_inv_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_inv_dfail_repl_comp_greater_back_fail_zero_pass_repl_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_repl_dfail_keep_comp_always_back_fail_repl_pass_inv_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_incc_dfail_decw_comp_greater_or_equal_back_fail_zero_pass_repl_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_wrap_dfail_keep_comp_greater_back_fail_zero_pass_incc_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_incc_dfail_incc_comp_greater_back_fail_repl_pass_wrap_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_incc_dfail_wrap_comp_less_or_equal_back_fail_decw_pass_incc_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decc_dfail_repl_comp_less_or_equal_back_fail_repl_pass_incc_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_keep_dfail_inv_comp_less_back_fail_incc_pass_decc_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decc_dfail_decc_comp_greater_or_equal_back_fail_incc_pass_keep_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_inv_dfail_keep_comp_equal_back_fail_zero_pass_decc_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_wrap_dfail_wrap_comp_greater_or_equal_back_fail_incc_pass_inv_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_inv_dfail_incc_comp_not_equal_back_fail_keep_pass_wrap_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_keep_dfail_keep_comp_always_back_fail_wrap_pass_inv_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_wrap_dfail_decw_comp_greater_back_fail_inv_pass_keep_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decc_dfail_decw_comp_less_back_fail_inv_pass_wrap_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decc_dfail_keep_comp_greater_back_fail_zero_pass_decc_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_zero_dfail_zero_comp_less_or_equal_back_fail_zero_pass_decc_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_incc_dfail_decw_comp_greater_back_fail_inv_pass_zero_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decw_dfail_decc_comp_less_or_equal_back_fail_zero_pass_incc_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_repl_dfail_zero_comp_less_or_equal_back_fail_zero_pass_decw_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_repl_dfail_decw_comp_less_back_fail_inv_pass_repl_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decw_dfail_incc_comp_less_back_fail_decc_pass_repl_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_wrap_dfail_zero_comp_greater_back_fail_zero_pass_decw_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_keep_dfail_wrap_comp_less_back_fail_inv_pass_wrap_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_zero_dfail_keep_comp_less_back_fail_incc_pass_keep_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decw_dfail_decw_comp_greater_or_equal_back_fail_zero_pass_zero_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_zero_dfail_repl_comp_greater_or_equal_back_fail_decw_pass_decw_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_inv_dfail_decw_comp_greater_back_fail_repl_pass_zero_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_repl_dfail_decw_comp_always_back_fail_wrap_pass_inv_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_zero_dfail_wrap_comp_always_back_fail_repl_pass_repl_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_keep_dfail_repl_comp_equal_back_fail_zero_pass_zero_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_wrap_dfail_repl_comp_always_back_fail_inv_pass_keep_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_inv_dfail_decw_comp_not_equal_back_fail_wrap_pass_wrap_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_incc_dfail_incc_comp_never_back_fail_inv_pass_inv_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_incc_dfail_zero_comp_always_back_fail_decw_pass_incc_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_repl_dfail_zero_comp_greater_or_equal_back_fail_repl_pass_incc_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_incc_dfail_incc_comp_less_or_equal_back_fail_decc_pass_repl_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_wrap_dfail_wrap_comp_always_back_fail_keep_pass_incc_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decw_dfail_wrap_comp_greater_or_equal_back_fail_keep_pass_wrap_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_inv_dfail_inv_comp_greater_or_equal_back_fail_wrap_pass_decw_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_inv_dfail_incc_comp_always_back_fail_zero_pass_inv_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_inv_dfail_inv_comp_greater_back_fail_decw_pass_inv_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decc_dfail_decw_comp_never_back_fail_decc_pass_inv_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_keep_dfail_inv_comp_not_equal_back_fail_inv_pass_decc_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_wrap_dfail_inv_comp_greater_back_fail_inv_pass_keep_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_inv_dfail_zero_comp_greater_back_fail_wrap_pass_wrap_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decw_dfail_incc_comp_never_back_fail_decc_pass_inv_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_repl_dfail_repl_comp_equal_back_fail_zero_pass_decw_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_inv_dfail_decw_comp_not_equal_back_fail_decw_pass_repl_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_wrap_dfail_wrap_comp_less_back_fail_incc_pass_inv_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_incc_dfail_repl_comp_equal_back_fail_wrap_pass_wrap_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decc_dfail_decc_comp_equal_back_fail_repl_pass_incc_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_incc_dfail_incc_comp_less_or_equal_back_fail_keep_pass_decc_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decc_dfail_decc_comp_not_equal_back_fail_decw_pass_incc_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decc_dfail_repl_comp_less_or_equal_back_fail_zero_pass_decc_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_zero_dfail_incc_comp_equal_back_fail_inv_pass_decc_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_keep_dfail_wrap_comp_always_back_fail_zero_pass_zero_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decc_dfail_incc_comp_greater_back_fail_inv_pass_keep_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_keep_dfail_decw_comp_greater_or_equal_back_fail_inv_pass_decc_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_wrap_dfail_keep_comp_not_equal_back_fail_zero_pass_keep_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decw_dfail_inv_comp_equal_back_fail_wrap_pass_wrap_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_inv_dfail_incc_comp_less_or_equal_back_fail_wrap_pass_decw_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decc_dfail_wrap_comp_not_equal_back_fail_wrap_pass_inv_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_incc_dfail_incc_comp_greater_back_fail_wrap_pass_decc_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_inv_dfail_wrap_comp_always_back_fail_zero_pass_incc_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_wrap_dfail_inv_comp_equal_back_fail_incc_pass_inv_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_wrap_dfail_incc_comp_greater_back_fail_wrap_pass_wrap_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_inv_dfail_repl_comp_greater_or_equal_back_fail_incc_pass_wrap_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_inv_dfail_zero_comp_never_back_fail_incc_pass_inv_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_keep_dfail_wrap_comp_less_back_fail_wrap_pass_inv_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decc_dfail_zero_comp_less_or_equal_back_fail_zero_pass_keep_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_wrap_dfail_decc_comp_never_back_fail_zero_pass_decc_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decc_dfail_zero_comp_equal_back_fail_inv_pass_wrap_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_incc_dfail_decc_comp_never_back_fail_keep_pass_decc_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decw_dfail_decw_comp_not_equal_back_fail_keep_pass_incc_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_keep_dfail_decc_comp_never_back_fail_inv_pass_decw_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_keep_dfail_decc_comp_less_back_fail_wrap_pass_keep_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_inv_dfail_decw_comp_not_equal_back_fail_wrap_pass_keep_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_keep_dfail_wrap_comp_less_or_equal_back_fail_decw_pass_inv_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_inv_dfail_zero_comp_greater_or_equal_back_fail_decc_pass_keep_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decc_dfail_decw_comp_always_back_fail_decc_pass_inv_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_inv_dfail_zero_comp_greater_or_equal_back_fail_decw_pass_decc_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_repl_dfail_inv_comp_not_equal_back_fail_wrap_pass_inv_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_repl_dfail_zero_comp_greater_back_fail_decw_pass_repl_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_wrap_dfail_incc_comp_never_back_fail_wrap_pass_repl_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_wrap_dfail_incc_comp_less_or_equal_back_fail_inv_pass_wrap_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decw_dfail_repl_comp_greater_or_equal_back_fail_decc_pass_wrap_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_inv_dfail_repl_comp_greater_back_fail_wrap_pass_decw_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_wrap_dfail_inv_comp_less_back_fail_incc_pass_inv_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_incc_dfail_decc_comp_never_back_fail_decc_pass_wrap_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decc_dfail_zero_comp_greater_back_fail_zero_pass_incc_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_wrap_dfail_incc_comp_greater_back_fail_decw_pass_decc_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decw_dfail_decw_comp_equal_back_fail_wrap_pass_wrap_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_keep_dfail_repl_comp_equal_back_fail_wrap_pass_decw_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_inv_dfail_incc_comp_never_back_fail_incc_pass_keep_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_inv_dfail_decw_comp_greater_or_equal_back_fail_incc_pass_inv_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_zero_dfail_keep_comp_always_back_fail_repl_pass_inv_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_incc_dfail_incc_comp_greater_or_equal_back_fail_keep_pass_zero_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_wrap_dfail_inv_comp_equal_back_fail_inv_pass_incc_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decw_dfail_zero_comp_never_back_fail_repl_pass_wrap_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_wrap_dfail_wrap_comp_always_back_fail_inv_pass_decw_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_inv_dfail_repl_comp_less_or_equal_back_fail_decw_pass_wrap_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_wrap_dfail_repl_comp_greater_or_equal_back_fail_zero_pass_inv_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_wrap_dfail_decc_comp_never_back_fail_incc_pass_wrap_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_zero_dfail_wrap_comp_never_back_fail_wrap_pass_wrap_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_wrap_dfail_decw_comp_not_equal_back_fail_wrap_pass_zero_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_incc_dfail_repl_comp_always_back_fail_keep_pass_wrap_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_keep_dfail_inv_comp_not_equal_back_fail_wrap_pass_incc_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_incc_dfail_incc_comp_greater_back_fail_wrap_pass_keep_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_wrap_dfail_inv_comp_never_back_fail_wrap_pass_incc_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_zero_dfail_inv_comp_not_equal_back_fail_incc_pass_wrap_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_wrap_dfail_inv_comp_greater_back_fail_repl_pass_zero_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_inv_dfail_decc_comp_less_back_fail_keep_pass_wrap_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_inv_dfail_repl_comp_not_equal_back_fail_incc_pass_inv_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_repl_dfail_wrap_comp_less_back_fail_repl_pass_inv_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decc_dfail_incc_comp_not_equal_back_fail_decw_pass_repl_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_repl_dfail_decc_comp_not_equal_back_fail_inv_pass_decc_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_inv_dfail_zero_comp_equal_back_fail_keep_pass_repl_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_incc_dfail_wrap_comp_always_back_fail_decw_pass_inv_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_keep_dfail_decw_comp_never_back_fail_inv_pass_incc_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_inv_dfail_wrap_comp_greater_back_fail_keep_pass_keep_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decc_dfail_wrap_comp_less_back_fail_incc_pass_inv_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_repl_dfail_decc_comp_greater_back_fail_wrap_pass_decc_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decc_dfail_inv_comp_always_back_fail_repl_pass_repl_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decw_dfail_wrap_comp_equal_back_fail_decw_pass_decc_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_inv_dfail_decw_comp_never_back_fail_incc_pass_decw_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_inv_dfail_decw_comp_less_back_fail_inv_pass_inv_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_zero_dfail_decw_comp_not_equal_back_fail_wrap_pass_inv_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decw_dfail_repl_comp_greater_or_equal_back_fail_zero_pass_zero_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_incc_dfail_decc_comp_always_back_fail_decw_pass_decw_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decc_dfail_inv_comp_greater_back_fail_inv_pass_incc_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_zero_dfail_zero_comp_always_back_fail_incc_pass_decc_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_inv_dfail_inv_comp_less_or_equal_back_fail_repl_pass_zero_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_zero_dfail_decw_comp_greater_or_equal_back_fail_zero_pass_inv_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decw_dfail_wrap_comp_equal_back_fail_zero_pass_zero_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_keep_dfail_zero_comp_less_or_equal_back_fail_wrap_pass_decw_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_zero_dfail_zero_comp_greater_back_fail_zero_pass_keep_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_keep_dfail_inv_comp_greater_or_equal_back_fail_keep_pass_zero_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decw_dfail_incc_comp_greater_back_fail_zero_pass_keep_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_repl_dfail_incc_comp_less_or_equal_back_fail_decc_pass_decw_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_keep_dfail_repl_comp_greater_or_equal_back_fail_repl_pass_repl_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_wrap_dfail_decw_comp_less_back_fail_inv_pass_keep_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decc_dfail_decw_comp_greater_or_equal_back_fail_decw_pass_wrap_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_inv_dfail_decw_comp_greater_or_equal_back_fail_decw_pass_decc_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_inv_dfail_repl_comp_less_back_fail_zero_pass_inv_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_keep_dfail_zero_comp_equal_back_fail_decc_pass_inv_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decc_dfail_repl_comp_less_back_fail_keep_pass_keep_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decw_dfail_incc_comp_greater_or_equal_back_fail_keep_pass_decc_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_repl_dfail_decw_comp_greater_or_equal_back_fail_keep_pass_decw_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decc_dfail_keep_comp_greater_back_fail_decc_pass_repl_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_zero_dfail_wrap_comp_equal_back_fail_incc_pass_decc_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_keep_dfail_zero_comp_greater_or_equal_back_fail_zero_pass_zero_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decc_dfail_decw_comp_always_back_fail_zero_pass_keep_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_zero_dfail_inv_comp_less_or_equal_back_fail_incc_pass_decc_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_zero_dfail_inv_comp_greater_back_fail_decc_pass_zero_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_incc_dfail_zero_comp_never_back_fail_repl_pass_zero_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decw_dfail_decw_comp_less_or_equal_back_fail_zero_pass_incc_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_repl_dfail_decw_comp_less_or_equal_back_fail_inv_pass_decw_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_zero_dfail_inv_comp_equal_back_fail_wrap_pass_repl_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_repl_dfail_zero_comp_never_back_fail_incc_pass_zero_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_keep_dfail_repl_comp_always_back_fail_decc_pass_repl_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_wrap_dfail_zero_comp_greater_or_equal_back_fail_keep_pass_keep_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_inv_dfail_inv_comp_greater_or_equal_back_fail_wrap_pass_wrap_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_repl_dfail_repl_comp_greater_back_fail_incc_pass_inv_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_wrap_dfail_keep_comp_never_back_fail_decc_pass_repl_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_repl_dfail_zero_comp_greater_or_equal_back_fail_decw_pass_wrap_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_wrap_dfail_inv_comp_equal_back_fail_wrap_pass_repl_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_inv_dfail_zero_comp_less_back_fail_zero_pass_wrap_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_keep_dfail_decw_comp_equal_back_fail_decc_pass_inv_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_zero_dfail_decc_comp_always_back_fail_keep_pass_keep_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_incc_dfail_zero_comp_less_or_equal_back_fail_zero_pass_zero_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_incc_dfail_incc_comp_less_or_equal_back_fail_incc_pass_incc_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_incc_dfail_repl_comp_equal_back_fail_repl_pass_incc_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_zero_dfail_zero_comp_less_back_fail_wrap_pass_incc_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_wrap_dfail_decw_comp_greater_back_fail_decc_pass_zero_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_zero_dfail_repl_comp_not_equal_back_fail_keep_pass_wrap_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_keep_dfail_repl_comp_less_or_equal_back_fail_decc_pass_zero_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decw_dfail_zero_comp_greater_or_equal_back_fail_incc_pass_keep_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_keep_dfail_decc_comp_never_back_fail_decw_pass_decw_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_incc_dfail_keep_comp_equal_back_fail_incc_pass_keep_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_zero_dfail_zero_comp_greater_back_fail_repl_pass_incc_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_incc_dfail_keep_comp_always_back_fail_repl_pass_zero_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_incc_dfail_keep_comp_not_equal_back_fail_decw_pass_incc_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_wrap_dfail_repl_comp_always_back_fail_repl_pass_incc_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_keep_dfail_keep_comp_less_or_equal_back_fail_inv_pass_wrap_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_wrap_dfail_incc_comp_greater_or_equal_back_fail_decc_pass_keep_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_inv_dfail_zero_comp_greater_back_fail_wrap_pass_wrap_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decw_dfail_zero_comp_greater_back_fail_incc_pass_inv_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_repl_dfail_decw_comp_always_back_fail_zero_pass_decw_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_repl_dfail_inv_comp_less_or_equal_back_fail_zero_pass_repl_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_incc_dfail_incc_comp_less_back_fail_inv_pass_repl_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_zero_dfail_inv_comp_equal_back_fail_wrap_pass_incc_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_wrap_dfail_keep_comp_equal_back_fail_repl_pass_zero_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decw_dfail_wrap_comp_greater_or_equal_back_fail_incc_pass_wrap_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decc_dfail_decc_comp_less_back_fail_decw_pass_decw_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_incc_dfail_keep_comp_always_back_fail_decw_pass_decc_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decc_dfail_wrap_comp_less_back_fail_keep_pass_incc_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_incc_dfail_keep_comp_less_or_equal_back_fail_decc_pass_decc_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_zero_dfail_decw_comp_always_back_fail_repl_pass_incc_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decc_dfail_wrap_comp_not_equal_back_fail_wrap_pass_zero_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_keep_dfail_decc_comp_always_back_fail_decw_pass_decc_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_repl_dfail_inv_comp_less_or_equal_back_fail_decc_pass_keep_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_keep_dfail_wrap_comp_less_back_fail_repl_pass_repl_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decw_dfail_repl_comp_less_or_equal_back_fail_repl_pass_keep_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decw_dfail_zero_comp_greater_back_fail_decc_pass_decw_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_repl_dfail_decw_comp_greater_back_fail_decw_pass_decw_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_inv_dfail_decc_comp_never_back_fail_zero_pass_repl_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decc_dfail_repl_comp_always_back_fail_zero_pass_inv_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_zero_dfail_zero_comp_not_equal_back_fail_zero_pass_decc_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_keep_dfail_zero_comp_never_back_fail_keep_pass_zero_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_repl_dfail_decc_comp_less_back_fail_decc_pass_keep_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decw_dfail_wrap_comp_always_back_fail_zero_pass_repl_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_inv_dfail_incc_comp_greater_or_equal_back_fail_inv_pass_decw_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_incc_dfail_incc_comp_not_equal_back_fail_incc_pass_inv_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_zero_dfail_decc_comp_greater_or_equal_back_fail_repl_pass_incc_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_inv_dfail_decw_comp_always_back_fail_decc_pass_zero_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_zero_dfail_decw_comp_always_back_fail_zero_pass_inv_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_inv_dfail_incc_comp_less_back_fail_decw_pass_zero_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_keep_dfail_wrap_comp_less_or_equal_back_fail_repl_pass_inv_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decc_dfail_repl_comp_not_equal_back_fail_inv_pass_keep_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_keep_dfail_incc_comp_not_equal_back_fail_zero_pass_decc_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decw_dfail_inv_comp_always_back_fail_zero_pass_keep_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_zero_dfail_keep_comp_never_back_fail_zero_pass_decw_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_keep_dfail_keep_comp_not_equal_back_fail_incc_pass_zero_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decc_dfail_wrap_comp_greater_or_equal_back_fail_wrap_pass_keep_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decw_dfail_wrap_comp_not_equal_back_fail_incc_pass_decc_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_wrap_dfail_decc_comp_not_equal_back_fail_decc_pass_decw_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_zero_dfail_keep_comp_greater_or_equal_back_fail_wrap_pass_wrap_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_repl_dfail_decw_comp_less_back_fail_decw_pass_zero_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_wrap_dfail_wrap_comp_less_back_fail_wrap_pass_repl_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_zero_dfail_inv_comp_less_or_equal_back_fail_decc_pass_wrap_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_repl_dfail_incc_comp_never_back_fail_repl_pass_zero_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_keep_dfail_decw_comp_never_back_fail_inv_pass_repl_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decc_dfail_decc_comp_greater_or_equal_back_fail_zero_pass_keep_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_repl_dfail_decc_comp_less_back_fail_repl_pass_decc_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_keep_dfail_wrap_comp_less_back_fail_keep_pass_repl_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decc_dfail_repl_comp_never_back_fail_inv_pass_keep_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_keep_dfail_inv_comp_equal_back_fail_repl_pass_decc_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_incc_dfail_inv_comp_never_back_fail_repl_pass_keep_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_inv_dfail_decw_comp_equal_back_fail_incc_pass_incc_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decw_dfail_decc_comp_not_equal_back_fail_decw_pass_inv_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_repl_dfail_decc_comp_equal_back_fail_decc_pass_decw_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_zero_dfail_incc_comp_always_back_fail_decc_pass_repl_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_repl_dfail_decc_comp_equal_back_fail_decw_pass_zero_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_incc_dfail_decw_comp_less_back_fail_zero_pass_repl_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decc_dfail_decw_comp_not_equal_back_fail_zero_pass_incc_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_inv_dfail_repl_comp_always_back_fail_decw_pass_decc_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_inv_dfail_zero_comp_not_equal_back_fail_wrap_pass_inv_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decw_dfail_decc_comp_less_back_fail_keep_pass_inv_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_repl_dfail_incc_comp_greater_back_fail_decw_pass_decw_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_zero_dfail_decw_comp_not_equal_back_fail_incc_pass_repl_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_inv_dfail_incc_comp_greater_back_fail_decc_pass_zero_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decc_dfail_wrap_comp_greater_back_fail_decc_pass_inv_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_zero_dfail_decw_comp_always_back_fail_decw_pass_decc_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_keep_dfail_wrap_comp_less_back_fail_incc_pass_zero_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_zero_dfail_inv_comp_equal_back_fail_decw_pass_keep_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_zero_dfail_zero_comp_greater_or_equal_back_fail_wrap_pass_zero_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decc_dfail_repl_comp_greater_or_equal_back_fail_keep_pass_zero_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decc_dfail_inv_comp_not_equal_back_fail_decc_pass_decc_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decc_dfail_keep_comp_not_equal_back_fail_decc_pass_decc_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_inv_dfail_wrap_comp_less_or_equal_back_fail_decw_pass_decc_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_zero_dfail_incc_comp_less_or_equal_back_fail_zero_pass_inv_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_keep_dfail_repl_comp_greater_or_equal_back_fail_repl_pass_zero_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decw_dfail_decc_comp_less_back_fail_keep_pass_keep_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decc_dfail_decc_comp_greater_or_equal_back_fail_wrap_pass_decw_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_repl_dfail_decw_comp_never_back_fail_incc_pass_decc_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_incc_dfail_incc_comp_not_equal_back_fail_wrap_pass_repl_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_zero_dfail_inv_comp_not_equal_back_fail_wrap_pass_incc_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_repl_dfail_repl_comp_less_or_equal_back_fail_inv_pass_zero_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_keep_dfail_keep_comp_less_back_fail_decc_pass_repl_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_wrap_dfail_zero_comp_equal_back_fail_zero_pass_keep_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_zero_dfail_decw_comp_less_or_equal_back_fail_decc_pass_wrap_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_incc_dfail_decw_comp_greater_back_fail_keep_pass_zero_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_zero_dfail_zero_comp_greater_back_fail_keep_pass_incc_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_wrap_dfail_decc_comp_always_back_fail_incc_pass_zero_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_wrap_dfail_decc_comp_greater_back_fail_inv_pass_wrap_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_zero_dfail_keep_comp_not_equal_back_fail_repl_pass_wrap_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decc_dfail_incc_comp_not_equal_back_fail_decc_pass_zero_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_wrap_dfail_zero_comp_greater_back_fail_keep_pass_decc_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_incc_dfail_inv_comp_greater_or_equal_back_fail_incc_pass_wrap_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_repl_dfail_incc_comp_equal_back_fail_repl_pass_incc_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_incc_dfail_decc_comp_equal_back_fail_repl_pass_repl_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_zero_dfail_decc_comp_not_equal_back_fail_incc_pass_incc_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decc_dfail_inv_comp_greater_back_fail_inv_pass_zero_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_wrap_dfail_decw_comp_equal_back_fail_decw_pass_decc_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_repl_dfail_repl_comp_less_back_fail_incc_pass_wrap_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_keep_dfail_decc_comp_always_back_fail_repl_pass_repl_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decw_dfail_zero_comp_not_equal_back_fail_zero_pass_keep_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decw_dfail_keep_comp_greater_or_equal_back_fail_decw_pass_decw_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_wrap_dfail_incc_comp_equal_back_fail_wrap_pass_decw_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_repl_dfail_repl_comp_always_back_fail_zero_pass_wrap_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decc_dfail_zero_comp_equal_back_fail_decw_pass_repl_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_keep_dfail_repl_comp_greater_or_equal_back_fail_incc_pass_decc_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_repl_dfail_inv_comp_less_or_equal_back_fail_decc_pass_keep_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decc_dfail_incc_comp_greater_or_equal_back_fail_incc_pass_repl_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_wrap_dfail_inv_comp_not_equal_back_fail_repl_pass_decc_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decc_dfail_decc_comp_greater_or_equal_back_fail_keep_pass_wrap_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_keep_dfail_inv_comp_greater_back_fail_keep_pass_decc_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_wrap_dfail_inv_comp_always_back_fail_inv_pass_keep_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_inv_dfail_decw_comp_equal_back_fail_incc_pass_wrap_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decc_dfail_inv_comp_never_back_fail_repl_pass_inv_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_incc_dfail_wrap_comp_greater_or_equal_back_fail_decw_pass_decc_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_inv_dfail_wrap_comp_greater_back_fail_wrap_pass_incc_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decw_dfail_keep_comp_greater_back_fail_wrap_pass_inv_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decw_dfail_decw_comp_equal_back_fail_zero_pass_decw_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_incc_dfail_decc_comp_less_or_equal_back_fail_keep_pass_decw_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_keep_dfail_decc_comp_greater_back_fail_wrap_pass_incc_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_inv_dfail_keep_comp_greater_back_fail_wrap_pass_keep_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_zero_dfail_decw_comp_less_back_fail_inv_pass_inv_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decw_dfail_repl_comp_less_or_equal_back_fail_inv_pass_zero_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_zero_dfail_wrap_comp_never_back_fail_inv_pass_decw_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_repl_dfail_inv_comp_always_back_fail_incc_pass_zero_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_keep_dfail_keep_comp_greater_or_equal_back_fail_repl_pass_repl_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_repl_dfail_inv_comp_greater_back_fail_incc_pass_keep_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_inv_dfail_incc_comp_greater_or_equal_back_fail_keep_pass_repl_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_zero_dfail_keep_comp_not_equal_back_fail_decc_pass_inv_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_incc_dfail_wrap_comp_greater_back_fail_zero_pass_zero_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_repl_dfail_inv_comp_greater_back_fail_keep_pass_incc_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_zero_dfail_decw_comp_greater_or_equal_back_fail_decw_pass_repl_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_keep_dfail_incc_comp_greater_or_equal_back_fail_keep_pass_zero_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_zero_dfail_zero_comp_less_or_equal_back_fail_decw_pass_keep_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_zero_dfail_incc_comp_greater_or_equal_back_fail_wrap_pass_zero_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_repl_dfail_zero_comp_less_back_fail_zero_pass_zero_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_repl_dfail_inv_comp_not_equal_back_fail_incc_pass_repl_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_incc_dfail_keep_comp_greater_or_equal_back_fail_incc_pass_repl_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decc_dfail_incc_comp_less_or_equal_back_fail_incc_pass_incc_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decw_dfail_repl_comp_greater_back_fail_zero_pass_decc_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_repl_dfail_incc_comp_equal_back_fail_zero_pass_decw_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_zero_dfail_incc_comp_greater_back_fail_decw_pass_repl_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_keep_dfail_decw_comp_always_back_fail_inv_pass_zero_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_keep_dfail_wrap_comp_always_back_fail_inv_pass_keep_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_zero_dfail_zero_comp_never_back_fail_decc_pass_keep_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_repl_dfail_repl_comp_always_back_fail_wrap_pass_zero_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decc_dfail_incc_comp_never_back_fail_wrap_pass_repl_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decc_dfail_repl_comp_greater_back_fail_incc_pass_decc_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decw_dfail_keep_comp_greater_back_fail_zero_pass_decc_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_keep_dfail_zero_comp_greater_back_fail_wrap_pass_decw_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_keep_dfail_inv_comp_never_back_fail_decc_pass_keep_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_incc_dfail_zero_comp_greater_or_equal_back_fail_decc_pass_keep_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_zero_dfail_decc_comp_always_back_fail_incc_pass_incc_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_incc_dfail_repl_comp_less_back_fail_keep_pass_zero_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_wrap_dfail_decw_comp_less_back_fail_wrap_pass_incc_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decw_dfail_decc_comp_less_or_equal_back_fail_inv_pass_wrap_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_inv_dfail_keep_comp_never_back_fail_repl_pass_decw_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decc_dfail_decw_comp_less_back_fail_decw_pass_inv_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decw_dfail_decw_comp_never_back_fail_inv_pass_decc_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_wrap_dfail_repl_comp_equal_back_fail_keep_pass_decw_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decw_dfail_inv_comp_always_back_fail_decc_pass_wrap_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_inv_dfail_zero_comp_equal_back_fail_inv_pass_decw_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decw_dfail_zero_comp_greater_or_equal_back_fail_keep_pass_inv_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_incc_dfail_decw_comp_greater_back_fail_decc_pass_decw_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_zero_dfail_wrap_comp_less_back_fail_wrap_pass_incc_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_incc_dfail_keep_comp_less_back_fail_wrap_pass_zero_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_inv_dfail_decw_comp_greater_back_fail_zero_pass_incc_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_incc_dfail_incc_comp_less_back_fail_zero_pass_inv_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_zero_dfail_wrap_comp_less_or_equal_back_fail_zero_pass_incc_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decw_dfail_zero_comp_always_back_fail_inv_pass_zero_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_wrap_dfail_wrap_comp_not_equal_back_fail_decw_pass_decw_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decc_dfail_decc_comp_not_equal_back_fail_zero_pass_wrap_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_incc_dfail_decc_comp_greater_back_fail_decw_pass_decc_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decc_dfail_decw_comp_equal_back_fail_keep_pass_incc_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_incc_dfail_inv_comp_always_back_fail_incc_pass_decc_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decc_dfail_decw_comp_always_back_fail_zero_pass_incc_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_wrap_dfail_decw_comp_greater_or_equal_back_fail_zero_pass_decc_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_incc_dfail_keep_comp_always_back_fail_repl_pass_wrap_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_zero_dfail_repl_comp_never_back_fail_wrap_pass_incc_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_wrap_dfail_wrap_comp_greater_back_fail_decc_pass_zero_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decw_dfail_inv_comp_never_back_fail_repl_pass_wrap_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_repl_dfail_repl_comp_less_or_equal_back_fail_incc_pass_decw_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_incc_dfail_decw_comp_greater_or_equal_back_fail_incc_pass_repl_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_incc_dfail_decw_comp_not_equal_back_fail_inv_pass_incc_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_zero_dfail_decw_comp_equal_back_fail_keep_pass_incc_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_keep_dfail_incc_comp_equal_back_fail_keep_pass_zero_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_inv_dfail_decc_comp_equal_back_fail_decc_pass_keep_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_incc_dfail_repl_comp_greater_or_equal_back_fail_keep_pass_inv_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_keep_dfail_zero_comp_never_back_fail_inv_pass_incc_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_incc_dfail_inv_comp_greater_or_equal_back_fail_wrap_pass_keep_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_wrap_dfail_wrap_comp_always_back_fail_inv_pass_incc_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_zero_dfail_zero_comp_greater_or_equal_back_fail_decc_pass_wrap_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_keep_dfail_decc_comp_equal_back_fail_decc_pass_zero_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_zero_dfail_decw_comp_not_equal_back_fail_incc_pass_keep_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_keep_dfail_decw_comp_less_back_fail_repl_pass_zero_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_keep_dfail_repl_comp_equal_back_fail_inv_pass_keep_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_wrap_dfail_inv_comp_greater_back_fail_zero_pass_keep_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_inv_dfail_zero_comp_less_back_fail_decw_pass_wrap_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_incc_dfail_repl_comp_not_equal_back_fail_wrap_pass_inv_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decw_dfail_incc_comp_greater_or_equal_back_fail_inv_pass_incc_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_wrap_dfail_repl_comp_less_or_equal_back_fail_decc_pass_decw_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_incc_dfail_inv_comp_always_back_fail_decc_pass_wrap_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_zero_dfail_incc_comp_equal_back_fail_incc_pass_incc_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decw_dfail_incc_comp_less_or_equal_back_fail_decc_pass_zero_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_inv_dfail_wrap_comp_always_back_fail_decw_pass_decw_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_inv_dfail_decw_comp_less_or_equal_back_fail_keep_pass_inv_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decw_dfail_decc_comp_always_back_fail_wrap_pass_inv_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decc_dfail_repl_comp_less_back_fail_incc_pass_decw_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decw_dfail_decc_comp_greater_back_fail_repl_pass_decc_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decw_dfail_keep_comp_equal_back_fail_wrap_pass_decw_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_incc_dfail_repl_comp_less_back_fail_wrap_pass_decw_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_inv_dfail_decw_comp_greater_or_equal_back_fail_zero_pass_incc_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decw_dfail_inv_comp_always_back_fail_wrap_pass_inv_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_inv_dfail_decc_comp_greater_or_equal_back_fail_incc_pass_decw_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decc_dfail_decw_comp_less_back_fail_incc_pass_inv_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_incc_dfail_wrap_comp_always_back_fail_decw_pass_decc_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_keep_dfail_incc_comp_greater_back_fail_decw_pass_incc_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_incc_dfail_inv_comp_less_back_fail_inv_pass_keep_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_keep_dfail_wrap_comp_greater_or_equal_back_fail_wrap_pass_incc_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_incc_dfail_wrap_comp_always_back_fail_inv_pass_keep_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decc_dfail_incc_comp_never_back_fail_wrap_pass_incc_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decw_dfail_decw_comp_equal_back_fail_repl_pass_decc_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_keep_dfail_wrap_comp_less_back_fail_decc_pass_decw_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decw_dfail_keep_comp_less_or_equal_back_fail_decc_pass_keep_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_zero_dfail_keep_comp_greater_or_equal_back_fail_incc_pass_decw_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_wrap_dfail_incc_comp_never_back_fail_repl_pass_zero_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_zero_dfail_zero_comp_less_back_fail_decw_pass_wrap_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_inv_dfail_keep_comp_greater_or_equal_back_fail_inv_pass_zero_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_repl_dfail_wrap_comp_not_equal_back_fail_inv_pass_inv_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decc_dfail_decc_comp_always_back_fail_incc_pass_repl_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decc_dfail_keep_comp_equal_back_fail_incc_pass_decc_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_keep_dfail_wrap_comp_equal_back_fail_repl_pass_decc_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decw_dfail_keep_comp_always_back_fail_decw_pass_keep_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decw_dfail_decc_comp_greater_or_equal_back_fail_inv_pass_decw_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decc_dfail_keep_comp_less_back_fail_repl_pass_decw_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decw_dfail_decc_comp_equal_back_fail_decw_pass_decc_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_incc_dfail_incc_comp_never_back_fail_keep_pass_decw_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_inv_dfail_incc_comp_never_back_fail_zero_pass_incc_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_incc_dfail_decc_comp_greater_or_equal_back_fail_wrap_pass_inv_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_keep_dfail_incc_comp_equal_back_fail_decw_pass_incc_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_zero_dfail_decc_comp_less_or_equal_back_fail_repl_pass_keep_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_inv_dfail_keep_comp_not_equal_back_fail_decc_pass_zero_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decc_dfail_decc_comp_not_equal_back_fail_decw_pass_inv_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_repl_dfail_decc_comp_not_equal_back_fail_repl_pass_decc_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_keep_dfail_keep_comp_less_back_fail_inv_pass_repl_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_keep_dfail_zero_comp_greater_back_fail_keep_pass_keep_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_repl_dfail_decw_comp_equal_back_fail_incc_pass_keep_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_repl_dfail_inv_comp_less_back_fail_keep_pass_repl_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_zero_dfail_wrap_comp_always_back_fail_incc_pass_repl_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_repl_dfail_incc_comp_never_back_fail_wrap_pass_zero_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_zero_dfail_inv_comp_never_back_fail_decw_pass_repl_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_inv_dfail_keep_comp_less_back_fail_repl_pass_zero_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_incc_dfail_wrap_comp_not_equal_back_fail_repl_pass_inv_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_incc_dfail_decw_comp_equal_back_fail_zero_pass_incc_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_keep_dfail_inv_comp_equal_back_fail_incc_pass_incc_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decc_dfail_wrap_comp_always_back_fail_keep_pass_keep_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_inv_dfail_inv_comp_less_or_equal_back_fail_zero_pass_decc_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decc_dfail_decw_comp_equal_back_fail_inv_pass_inv_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_repl_dfail_decc_comp_never_back_fail_decc_pass_decc_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decc_dfail_wrap_comp_less_or_equal_back_fail_wrap_pass_repl_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_incc_dfail_inv_comp_less_back_fail_repl_pass_decc_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_keep_dfail_incc_comp_less_back_fail_incc_pass_incc_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_zero_dfail_decw_comp_greater_back_fail_zero_pass_keep_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_incc_dfail_keep_comp_greater_or_equal_back_fail_decc_pass_zero_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_repl_dfail_inv_comp_less_back_fail_repl_pass_incc_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decw_dfail_decw_comp_less_or_equal_back_fail_repl_pass_repl_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decc_dfail_zero_comp_greater_back_fail_decc_pass_decw_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_incc_dfail_decc_comp_greater_or_equal_back_fail_inv_pass_decc_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decw_dfail_decc_comp_greater_back_fail_wrap_pass_incc_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_inv_dfail_repl_comp_greater_or_equal_back_fail_zero_pass_decw_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_repl_dfail_decc_comp_less_or_equal_back_fail_decw_pass_inv_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decw_dfail_repl_comp_less_back_fail_zero_pass_repl_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_zero_dfail_inv_comp_greater_back_fail_zero_pass_decw_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_inv_dfail_decc_comp_greater_or_equal_back_fail_incc_pass_zero_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decc_dfail_decc_comp_not_equal_back_fail_zero_pass_inv_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decw_dfail_inv_comp_less_or_equal_back_fail_keep_pass_decc_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_incc_dfail_repl_comp_less_or_equal_back_fail_repl_pass_decw_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_incc_dfail_decw_comp_less_or_equal_back_fail_decc_pass_incc_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_wrap_dfail_zero_comp_never_back_fail_inv_pass_incc_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decc_dfail_decc_comp_equal_back_fail_wrap_pass_wrap_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decw_dfail_zero_comp_less_or_equal_back_fail_incc_pass_decc_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_zero_dfail_zero_comp_equal_back_fail_wrap_pass_decw_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_incc_dfail_inv_comp_less_or_equal_back_fail_inv_pass_zero_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_incc_dfail_zero_comp_never_back_fail_keep_pass_incc_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_inv_dfail_inv_comp_always_back_fail_decw_pass_incc_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_zero_dfail_inv_comp_equal_back_fail_keep_pass_inv_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_repl_dfail_zero_comp_always_back_fail_decw_pass_zero_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_zero_dfail_inv_comp_greater_back_fail_decw_pass_repl_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_wrap_dfail_zero_comp_not_equal_back_fail_decw_pass_zero_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_zero_dfail_repl_comp_greater_or_equal_back_fail_repl_pass_wrap_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_keep_dfail_decw_comp_less_back_fail_incc_pass_zero_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_wrap_dfail_keep_comp_less_or_equal_back_fail_repl_pass_keep_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decw_dfail_incc_comp_not_equal_back_fail_wrap_pass_wrap_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decc_dfail_repl_comp_always_back_fail_repl_pass_decw_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_repl_dfail_repl_comp_not_equal_back_fail_decw_pass_decc_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_zero_dfail_decc_comp_less_back_fail_incc_pass_repl_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_keep_dfail_decc_comp_not_equal_back_fail_zero_pass_zero_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decw_dfail_decc_comp_greater_back_fail_repl_pass_keep_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_inv_dfail_decc_comp_equal_back_fail_inv_pass_decw_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decc_dfail_zero_comp_never_back_fail_repl_pass_inv_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_inv_dfail_keep_comp_always_back_fail_decw_pass_decc_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_wrap_dfail_decw_comp_greater_back_fail_decw_pass_inv_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_wrap_dfail_inv_comp_equal_back_fail_decc_pass_wrap_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_repl_dfail_keep_comp_less_or_equal_back_fail_inv_pass_wrap_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_keep_dfail_wrap_comp_not_equal_back_fail_repl_pass_repl_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_repl_dfail_incc_comp_greater_back_fail_keep_pass_keep_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decc_dfail_repl_comp_greater_back_fail_inv_pass_repl_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_zero_dfail_keep_comp_greater_back_fail_incc_pass_decc_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_wrap_dfail_repl_comp_equal_back_fail_wrap_pass_zero_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_repl_dfail_decw_comp_never_back_fail_decw_pass_wrap_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_incc_dfail_inv_comp_always_back_fail_decw_pass_repl_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_zero_dfail_repl_comp_greater_back_fail_decw_pass_incc_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decw_dfail_keep_comp_equal_back_fail_wrap_pass_zero_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decw_dfail_incc_comp_less_or_equal_back_fail_incc_pass_decw_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_wrap_dfail_wrap_comp_never_back_fail_inv_pass_decw_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_repl_dfail_wrap_comp_always_back_fail_inv_pass_wrap_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_repl_dfail_keep_comp_less_or_equal_back_fail_wrap_pass_repl_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_keep_dfail_zero_comp_always_back_fail_decw_pass_repl_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_incc_dfail_keep_comp_equal_back_fail_zero_pass_keep_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_wrap_dfail_repl_comp_greater_back_fail_decc_pass_incc_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decw_dfail_decc_comp_never_back_fail_decc_pass_wrap_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_keep_dfail_decw_comp_greater_back_fail_incc_pass_decw_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_wrap_dfail_wrap_comp_never_back_fail_wrap_pass_keep_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_inv_dfail_inv_comp_not_equal_back_fail_wrap_pass_wrap_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_inv_dfail_repl_comp_never_back_fail_keep_pass_inv_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_keep_dfail_inv_comp_less_or_equal_back_fail_decc_pass_inv_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decc_dfail_incc_comp_less_or_equal_back_fail_repl_pass_keep_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_keep_dfail_zero_comp_equal_back_fail_decc_pass_decc_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decc_dfail_keep_comp_greater_or_equal_back_fail_decc_pass_keep_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decw_dfail_decc_comp_greater_back_fail_repl_pass_decc_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_keep_dfail_wrap_comp_never_back_fail_keep_pass_decw_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_zero_dfail_inv_comp_less_back_fail_keep_pass_keep_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_inv_dfail_inv_comp_greater_back_fail_inv_pass_zero_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_zero_dfail_repl_comp_never_back_fail_inv_pass_inv_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_wrap_dfail_repl_comp_equal_back_fail_repl_pass_zero_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_keep_dfail_repl_comp_less_or_equal_back_fail_repl_pass_wrap_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_incc_dfail_zero_comp_equal_back_fail_wrap_pass_keep_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_wrap_dfail_inv_comp_less_or_equal_back_fail_decc_pass_incc_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_inv_dfail_zero_comp_never_back_fail_zero_pass_wrap_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_inv_dfail_decw_comp_less_or_equal_back_fail_decw_pass_inv_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_wrap_dfail_repl_comp_equal_back_fail_incc_pass_inv_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_zero_dfail_wrap_comp_less_back_fail_zero_pass_wrap_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_zero_dfail_repl_comp_never_back_fail_decc_pass_zero_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_keep_dfail_wrap_comp_less_or_equal_back_fail_decw_pass_zero_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_zero_dfail_incc_comp_less_or_equal_back_fail_incc_pass_keep_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decc_dfail_decc_comp_always_back_fail_zero_pass_zero_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_zero_dfail_zero_comp_less_back_fail_repl_pass_decc_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_repl_dfail_decc_comp_greater_or_equal_back_fail_wrap_pass_zero_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_keep_dfail_decc_comp_less_back_fail_decw_pass_repl_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_repl_dfail_repl_comp_always_back_fail_decc_pass_keep_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_incc_dfail_incc_comp_never_back_fail_incc_pass_repl_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_repl_dfail_zero_comp_equal_back_fail_keep_pass_incc_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_wrap_dfail_repl_comp_greater_or_equal_back_fail_keep_pass_repl_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_repl_dfail_inv_comp_equal_back_fail_inv_pass_wrap_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_incc_dfail_zero_comp_less_back_fail_zero_pass_repl_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_keep_dfail_incc_comp_greater_or_equal_back_fail_wrap_pass_incc_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_zero_dfail_keep_comp_greater_or_equal_back_fail_decc_pass_keep_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_incc_dfail_decc_comp_greater_or_equal_back_fail_decc_pass_zero_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_incc_dfail_decw_comp_always_back_fail_repl_pass_incc_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_incc_dfail_incc_comp_never_back_fail_repl_pass_incc_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decw_dfail_repl_comp_always_back_fail_wrap_pass_incc_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_repl_dfail_wrap_comp_never_back_fail_repl_pass_decw_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decw_dfail_keep_comp_never_back_fail_decw_pass_repl_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_repl_dfail_decc_comp_greater_or_equal_back_fail_keep_pass_decw_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_keep_dfail_zero_comp_less_or_equal_back_fail_inv_pass_repl_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_wrap_dfail_inv_comp_greater_or_equal_back_fail_decw_pass_keep_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_keep_dfail_inv_comp_greater_or_equal_back_fail_keep_pass_wrap_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_incc_dfail_repl_comp_greater_or_equal_back_fail_inv_pass_keep_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_repl_dfail_zero_comp_always_back_fail_keep_pass_incc_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_repl_dfail_zero_comp_greater_back_fail_zero_pass_repl_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_wrap_dfail_decw_comp_equal_back_fail_zero_pass_repl_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_wrap_dfail_keep_comp_greater_or_equal_back_fail_decc_pass_wrap_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_repl_dfail_decc_comp_not_equal_back_fail_decw_pass_wrap_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decc_dfail_repl_comp_greater_or_equal_back_fail_wrap_pass_repl_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_wrap_dfail_incc_comp_greater_back_fail_repl_pass_decc_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_keep_dfail_keep_comp_equal_back_fail_keep_pass_wrap_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_incc_dfail_incc_comp_greater_back_fail_repl_pass_keep_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decc_dfail_wrap_comp_less_or_equal_back_fail_decc_pass_incc_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_wrap_dfail_wrap_comp_less_or_equal_back_fail_keep_pass_decc_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_repl_dfail_inv_comp_greater_or_equal_back_fail_keep_pass_wrap_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_inv_dfail_inv_comp_less_back_fail_incc_pass_repl_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_incc_dfail_repl_comp_not_equal_back_fail_repl_pass_inv_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_keep_dfail_zero_comp_greater_or_equal_back_fail_zero_pass_incc_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decc_dfail_inv_comp_less_back_fail_repl_pass_keep_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_inv_dfail_incc_comp_greater_back_fail_wrap_pass_decc_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_repl_dfail_inv_comp_always_back_fail_inv_pass_inv_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decc_dfail_keep_comp_greater_or_equal_back_fail_decc_pass_repl_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_incc_dfail_decc_comp_equal_back_fail_decw_pass_decc_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_keep_dfail_inv_comp_greater_or_equal_back_fail_decw_pass_incc_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_zero_dfail_incc_comp_not_equal_back_fail_decw_pass_keep_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_keep_dfail_decc_comp_greater_back_fail_incc_pass_zero_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_repl_dfail_wrap_comp_greater_back_fail_zero_pass_keep_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decw_dfail_decw_comp_less_or_equal_back_fail_decw_pass_repl_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_wrap_dfail_decw_comp_never_back_fail_zero_pass_decw_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_repl_dfail_incc_comp_greater_or_equal_back_fail_inv_pass_wrap_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_repl_dfail_keep_comp_less_back_fail_wrap_pass_repl_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_keep_dfail_incc_comp_greater_or_equal_back_fail_decw_pass_repl_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_incc_dfail_wrap_comp_not_equal_back_fail_repl_pass_keep_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_keep_dfail_inv_comp_always_back_fail_decc_pass_incc_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_wrap_dfail_wrap_comp_equal_back_fail_zero_pass_keep_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_wrap_dfail_repl_comp_greater_back_fail_inv_pass_wrap_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_inv_dfail_decw_comp_equal_back_fail_decw_pass_wrap_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_repl_dfail_incc_comp_greater_or_equal_back_fail_incc_pass_inv_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_inv_dfail_decw_comp_greater_or_equal_back_fail_incc_pass_repl_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_wrap_dfail_repl_comp_not_equal_back_fail_inv_pass_inv_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decw_dfail_incc_comp_always_back_fail_inv_pass_wrap_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_keep_dfail_keep_comp_greater_or_equal_back_fail_decc_pass_decw_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_repl_dfail_incc_comp_always_back_fail_decc_pass_keep_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_incc_dfail_zero_comp_less_back_fail_wrap_pass_repl_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_zero_dfail_wrap_comp_greater_or_equal_back_fail_keep_pass_incc_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_wrap_dfail_decw_comp_greater_or_equal_back_fail_repl_pass_zero_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decc_dfail_inv_comp_less_back_fail_decc_pass_wrap_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_keep_dfail_repl_comp_less_back_fail_repl_pass_decc_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_wrap_dfail_decc_comp_less_back_fail_inv_pass_keep_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_wrap_dfail_incc_comp_always_back_fail_zero_pass_wrap_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_wrap_dfail_zero_comp_greater_back_fail_zero_pass_wrap_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_wrap_dfail_wrap_comp_always_back_fail_keep_pass_wrap_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_repl_dfail_inv_comp_not_equal_back_fail_wrap_pass_wrap_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_keep_dfail_keep_comp_less_back_fail_inv_pass_repl_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_inv_dfail_keep_comp_less_or_equal_back_fail_decw_pass_keep_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decw_dfail_decc_comp_not_equal_back_fail_keep_pass_inv_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_repl_dfail_decc_comp_equal_back_fail_zero_pass_decw_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_inv_dfail_repl_comp_not_equal_back_fail_wrap_pass_repl_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_keep_dfail_decw_comp_less_or_equal_back_fail_inv_pass_inv_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_inv_dfail_decc_comp_greater_back_fail_decw_pass_keep_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_wrap_dfail_inv_comp_never_back_fail_decw_pass_inv_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_keep_dfail_repl_comp_not_equal_back_fail_keep_pass_wrap_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decc_dfail_keep_comp_always_back_fail_inv_pass_keep_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_wrap_dfail_decw_comp_not_equal_back_fail_decc_pass_decc_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decc_dfail_repl_comp_less_or_equal_back_fail_repl_pass_wrap_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decw_dfail_zero_comp_less_or_equal_back_fail_decw_pass_decc_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decw_dfail_inv_comp_never_back_fail_decc_pass_decw_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_repl_dfail_decw_comp_less_or_equal_back_fail_inv_pass_decw_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decw_dfail_zero_comp_less_or_equal_back_fail_zero_pass_repl_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_inv_dfail_wrap_comp_always_back_fail_keep_pass_decw_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decw_dfail_incc_comp_greater_or_equal_back_fail_wrap_pass_inv_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_wrap_dfail_zero_comp_less_or_equal_back_fail_wrap_pass_decw_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_zero_dfail_repl_comp_always_back_fail_keep_pass_wrap_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_zero_dfail_repl_comp_less_or_equal_back_fail_zero_pass_zero_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_repl_dfail_decw_comp_never_back_fail_inv_pass_zero_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_zero_dfail_wrap_comp_less_or_equal_back_fail_incc_pass_repl_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decc_dfail_repl_comp_always_back_fail_decc_pass_zero_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decw_dfail_zero_comp_less_back_fail_repl_pass_decc_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_wrap_dfail_wrap_comp_greater_back_fail_wrap_pass_decw_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_keep_dfail_decc_comp_not_equal_back_fail_decw_pass_wrap_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_keep_dfail_decw_comp_always_back_fail_keep_pass_keep_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_keep_dfail_repl_comp_not_equal_back_fail_wrap_pass_keep_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decw_dfail_inv_comp_not_equal_back_fail_zero_pass_keep_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_keep_dfail_wrap_comp_greater_or_equal_back_fail_decc_pass_decw_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_zero_dfail_repl_comp_less_or_equal_back_fail_decw_pass_keep_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_incc_dfail_wrap_comp_less_back_fail_decc_pass_zero_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_incc_dfail_decw_comp_never_back_fail_incc_pass_incc_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_incc_dfail_decc_comp_greater_back_fail_repl_pass_incc_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_incc_dfail_decc_comp_not_equal_back_fail_wrap_pass_incc_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_repl_dfail_repl_comp_greater_or_equal_back_fail_inv_pass_incc_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decc_dfail_inv_comp_greater_or_equal_back_fail_repl_pass_repl_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_inv_dfail_repl_comp_never_back_fail_decw_pass_decc_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_repl_dfail_wrap_comp_less_back_fail_keep_pass_inv_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decc_dfail_incc_comp_greater_or_equal_back_fail_wrap_pass_repl_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decw_dfail_wrap_comp_less_back_fail_inv_pass_decc_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_zero_dfail_inv_comp_not_equal_back_fail_repl_pass_decw_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_keep_dfail_wrap_comp_greater_back_fail_wrap_pass_zero_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_inv_dfail_keep_comp_less_back_fail_decc_pass_keep_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decw_dfail_keep_comp_always_back_fail_decw_pass_inv_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_incc_dfail_inv_comp_greater_back_fail_incc_pass_decw_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_repl_dfail_incc_comp_less_back_fail_wrap_pass_incc_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decw_dfail_repl_comp_not_equal_back_fail_keep_pass_repl_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_keep_dfail_wrap_comp_less_or_equal_back_fail_repl_pass_decw_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decw_dfail_keep_comp_equal_back_fail_zero_pass_keep_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_inv_dfail_wrap_comp_less_or_equal_back_fail_decc_pass_decw_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_inv_dfail_decc_comp_always_back_fail_inv_pass_inv_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_zero_dfail_repl_comp_greater_or_equal_back_fail_repl_pass_inv_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_repl_dfail_decw_comp_not_equal_back_fail_decc_pass_zero_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_inv_dfail_keep_comp_greater_or_equal_back_fail_wrap_pass_repl_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decw_dfail_inv_comp_less_back_fail_keep_pass_inv_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decw_dfail_inv_comp_never_back_fail_decw_pass_decw_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_keep_dfail_incc_comp_less_back_fail_decw_pass_decw_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_keep_dfail_incc_comp_greater_back_fail_inv_pass_keep_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_repl_dfail_wrap_comp_less_back_fail_repl_pass_keep_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_repl_dfail_decw_comp_not_equal_back_fail_decc_pass_repl_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_inv_dfail_incc_comp_greater_back_fail_repl_pass_repl_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_zero_dfail_decw_comp_equal_back_fail_decw_pass_inv_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_incc_dfail_decc_comp_less_back_fail_zero_pass_zero_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_keep_dfail_decc_comp_not_equal_back_fail_decw_pass_incc_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decc_dfail_decw_comp_less_or_equal_back_fail_inv_pass_keep_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_repl_dfail_decw_comp_not_equal_back_fail_keep_pass_decc_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_wrap_dfail_inv_comp_never_back_fail_decc_pass_repl_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_inv_dfail_repl_comp_not_equal_back_fail_repl_pass_wrap_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decc_dfail_decc_comp_never_back_fail_zero_pass_inv_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_incc_dfail_incc_comp_less_back_fail_incc_pass_decc_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_incc_dfail_decc_comp_not_equal_back_fail_keep_pass_incc_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_incc_dfail_inv_comp_never_back_fail_wrap_pass_incc_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_zero_dfail_incc_comp_greater_back_fail_keep_pass_incc_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_inv_dfail_keep_comp_equal_back_fail_keep_pass_zero_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_keep_dfail_zero_comp_less_back_fail_decc_pass_inv_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decc_dfail_inv_comp_less_or_equal_back_fail_zero_pass_keep_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_zero_dfail_zero_comp_never_back_fail_decw_pass_decc_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_inv_dfail_keep_comp_always_back_fail_decw_pass_zero_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_repl_dfail_repl_comp_less_or_equal_back_fail_zero_pass_inv_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_incc_dfail_decw_comp_greater_back_fail_repl_pass_repl_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decc_dfail_incc_comp_never_back_fail_inv_pass_incc_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_wrap_dfail_keep_comp_not_equal_back_fail_zero_pass_decc_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_incc_dfail_inv_comp_equal_back_fail_incc_pass_wrap_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_incc_dfail_decw_comp_less_or_equal_back_fail_wrap_pass_incc_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_zero_dfail_wrap_comp_equal_back_fail_keep_pass_incc_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_incc_dfail_decc_comp_less_back_fail_decc_pass_zero_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_repl_dfail_incc_comp_not_equal_back_fail_keep_pass_incc_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_zero_dfail_keep_comp_greater_back_fail_repl_pass_repl_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_inv_dfail_decw_comp_always_back_fail_zero_pass_zero_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decc_dfail_keep_comp_not_equal_back_fail_repl_pass_inv_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_inv_dfail_keep_comp_less_back_fail_wrap_pass_decc_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decc_dfail_decw_comp_greater_back_fail_decc_pass_inv_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_repl_dfail_keep_comp_less_back_fail_decc_pass_decc_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decw_dfail_inv_comp_never_back_fail_wrap_pass_repl_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_keep_dfail_decw_comp_never_back_fail_wrap_pass_decw_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_keep_dfail_repl_comp_always_back_fail_decc_pass_keep_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decc_dfail_keep_comp_less_back_fail_inv_pass_keep_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_repl_dfail_inv_comp_not_equal_back_fail_inv_pass_decc_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_repl_dfail_zero_comp_greater_or_equal_back_fail_repl_pass_repl_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decc_dfail_keep_comp_always_back_fail_zero_pass_repl_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_incc_dfail_repl_comp_less_back_fail_inv_pass_decc_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_inv_dfail_decw_comp_greater_back_fail_inv_pass_incc_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decc_dfail_zero_comp_never_back_fail_repl_pass_inv_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_zero_dfail_zero_comp_less_or_equal_back_fail_repl_pass_decc_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decc_dfail_keep_comp_always_back_fail_keep_pass_zero_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decw_dfail_decw_comp_always_back_fail_incc_pass_decc_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_repl_dfail_keep_comp_not_equal_back_fail_decc_pass_decw_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_keep_dfail_zero_comp_less_or_equal_back_fail_inv_pass_repl_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_zero_dfail_repl_comp_less_or_equal_back_fail_repl_pass_keep_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_wrap_dfail_keep_comp_less_back_fail_keep_pass_zero_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_wrap_dfail_incc_comp_greater_or_equal_back_fail_incc_pass_wrap_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_wrap_dfail_incc_comp_less_or_equal_back_fail_decc_pass_wrap_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_incc_dfail_repl_comp_less_back_fail_wrap_pass_wrap_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_wrap_dfail_decw_comp_never_back_fail_decc_pass_incc_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_incc_dfail_incc_comp_greater_back_fail_zero_pass_wrap_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decw_dfail_incc_comp_less_back_fail_keep_pass_incc_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decw_dfail_decc_comp_equal_back_fail_wrap_pass_decw_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_zero_dfail_decw_comp_not_equal_back_fail_decw_pass_decw_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_wrap_dfail_wrap_comp_equal_back_fail_inv_pass_zero_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_zero_dfail_repl_comp_always_back_fail_repl_pass_wrap_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decc_dfail_decc_comp_equal_back_fail_inv_pass_zero_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decw_dfail_decw_comp_always_back_fail_decc_pass_decc_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decw_dfail_decc_comp_not_equal_back_fail_incc_pass_decw_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_repl_dfail_zero_comp_less_back_fail_keep_pass_decw_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_inv_dfail_decc_comp_greater_or_equal_back_fail_wrap_pass_repl_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_incc_dfail_decc_comp_greater_or_equal_back_fail_repl_pass_inv_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_incc_dfail_inv_comp_less_back_fail_decc_pass_incc_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_keep_dfail_incc_comp_never_back_fail_keep_pass_incc_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_incc_dfail_incc_comp_greater_or_equal_back_fail_incc_pass_keep_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_inv_dfail_decc_comp_less_back_fail_wrap_pass_incc_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_inv_dfail_keep_comp_greater_back_fail_keep_pass_inv_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_zero_dfail_keep_comp_never_back_fail_keep_pass_inv_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_incc_dfail_inv_comp_equal_back_fail_repl_pass_zero_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_repl_dfail_incc_comp_greater_or_equal_back_fail_repl_pass_incc_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_incc_dfail_zero_comp_less_back_fail_zero_pass_repl_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_zero_dfail_incc_comp_not_equal_back_fail_decc_pass_incc_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decw_dfail_repl_comp_equal_back_fail_zero_pass_zero_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_repl_dfail_decw_comp_greater_back_fail_wrap_pass_decw_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_keep_dfail_zero_comp_greater_back_fail_decw_pass_repl_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_inv_dfail_keep_comp_greater_or_equal_back_fail_wrap_pass_keep_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_repl_dfail_inv_comp_never_back_fail_incc_pass_inv_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_repl_dfail_decw_comp_always_back_fail_decw_pass_repl_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decw_dfail_wrap_comp_less_or_equal_back_fail_decw_pass_repl_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_keep_dfail_decw_comp_not_equal_back_fail_decw_pass_decw_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_keep_dfail_repl_comp_less_back_fail_repl_pass_keep_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decc_dfail_decw_comp_greater_back_fail_keep_pass_keep_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decw_dfail_repl_comp_never_back_fail_incc_pass_decc_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_incc_dfail_incc_comp_not_equal_back_fail_inv_pass_decw_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decc_dfail_repl_comp_equal_back_fail_incc_pass_incc_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_inv_dfail_wrap_comp_greater_or_equal_back_fail_decw_pass_decc_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_zero_dfail_zero_comp_less_or_equal_back_fail_keep_pass_inv_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_wrap_dfail_decw_comp_never_back_fail_repl_pass_zero_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_incc_dfail_decc_comp_greater_or_equal_back_fail_incc_pass_wrap_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_zero_dfail_decc_comp_greater_back_fail_incc_pass_incc_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_repl_dfail_wrap_comp_greater_back_fail_incc_pass_zero_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_wrap_dfail_decw_comp_greater_or_equal_back_fail_wrap_pass_repl_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_repl_dfail_inv_comp_not_equal_back_fail_wrap_pass_wrap_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_wrap_dfail_wrap_comp_less_or_equal_back_fail_wrap_pass_repl_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_zero_dfail_zero_comp_always_back_fail_decc_pass_wrap_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_zero_dfail_incc_comp_equal_back_fail_wrap_pass_zero_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_wrap_dfail_incc_comp_less_back_fail_inv_pass_zero_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_incc_dfail_zero_comp_never_back_fail_keep_pass_wrap_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_incc_dfail_decw_comp_not_equal_back_fail_inv_pass_incc_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_incc_dfail_zero_comp_less_back_fail_decw_pass_incc_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_keep_dfail_incc_comp_always_back_fail_inv_pass_incc_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decc_dfail_inv_comp_greater_back_fail_incc_pass_keep_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decc_dfail_decw_comp_less_or_equal_back_fail_keep_pass_decc_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decc_dfail_zero_comp_always_back_fail_zero_pass_decc_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_inv_dfail_decc_comp_less_or_equal_back_fail_inv_pass_decc_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_keep_dfail_wrap_comp_always_back_fail_inv_pass_inv_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_incc_dfail_inv_comp_equal_back_fail_incc_pass_keep_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_keep_dfail_zero_comp_always_back_fail_incc_pass_incc_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_inv_dfail_keep_comp_not_equal_back_fail_keep_pass_keep_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_wrap_dfail_incc_comp_not_equal_back_fail_inv_pass_inv_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_repl_dfail_incc_comp_less_or_equal_back_fail_repl_pass_wrap_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_keep_dfail_decc_comp_not_equal_back_fail_decc_pass_repl_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_zero_dfail_inv_comp_never_back_fail_decw_pass_keep_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_wrap_dfail_inv_comp_always_back_fail_keep_pass_zero_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_keep_dfail_wrap_comp_not_equal_back_fail_decc_pass_wrap_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_repl_dfail_wrap_comp_always_back_fail_incc_pass_keep_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decw_dfail_wrap_comp_less_or_equal_back_fail_keep_pass_repl_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decw_dfail_zero_comp_always_back_fail_keep_pass_decw_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_repl_dfail_inv_comp_greater_or_equal_back_fail_incc_pass_decw_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decc_dfail_inv_comp_equal_back_fail_zero_pass_repl_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_zero_dfail_repl_comp_not_equal_back_fail_incc_pass_decc_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_wrap_dfail_wrap_comp_equal_back_fail_inv_pass_zero_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_inv_dfail_keep_comp_not_equal_back_fail_keep_pass_wrap_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_repl_dfail_incc_comp_greater_or_equal_back_fail_decc_pass_inv_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_inv_dfail_repl_comp_equal_back_fail_keep_pass_repl_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decw_dfail_repl_comp_never_back_fail_wrap_pass_inv_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_wrap_dfail_inv_comp_less_or_equal_back_fail_wrap_pass_decw_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decw_dfail_decc_comp_equal_back_fail_incc_pass_wrap_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decw_dfail_decw_comp_always_back_fail_inv_pass_decw_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_inv_dfail_inv_comp_greater_back_fail_wrap_pass_decw_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_repl_dfail_zero_comp_not_equal_back_fail_zero_pass_inv_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_wrap_dfail_zero_comp_always_back_fail_decw_pass_repl_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decc_dfail_incc_comp_equal_back_fail_wrap_pass_wrap_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decc_dfail_zero_comp_always_back_fail_zero_pass_decc_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_wrap_dfail_inv_comp_always_back_fail_repl_pass_decc_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decw_dfail_incc_comp_always_back_fail_inv_pass_wrap_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_inv_dfail_decc_comp_equal_back_fail_keep_pass_decw_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_inv_dfail_decw_comp_greater_or_equal_back_fail_zero_pass_inv_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_zero_dfail_keep_comp_greater_back_fail_incc_pass_inv_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_keep_dfail_decc_comp_not_equal_back_fail_inv_pass_zero_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decw_dfail_keep_comp_less_or_equal_back_fail_incc_pass_keep_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_wrap_dfail_incc_comp_equal_back_fail_keep_pass_decw_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decw_dfail_zero_comp_never_back_fail_wrap_pass_wrap_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_zero_dfail_decw_comp_never_back_fail_wrap_pass_decw_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_incc_dfail_zero_comp_equal_back_fail_decw_pass_zero_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_incc_dfail_decw_comp_never_back_fail_incc_pass_incc_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decw_dfail_decc_comp_less_or_equal_back_fail_zero_pass_incc_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_keep_dfail_wrap_comp_greater_back_fail_keep_pass_decw_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_keep_dfail_keep_comp_always_back_fail_decw_pass_keep_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_repl_dfail_decc_comp_equal_back_fail_keep_pass_keep_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decc_dfail_decc_comp_never_back_fail_keep_pass_repl_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_keep_dfail_incc_comp_not_equal_back_fail_inv_pass_decc_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_zero_dfail_decw_comp_greater_back_fail_keep_pass_keep_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_incc_dfail_repl_comp_less_or_equal_back_fail_incc_pass_zero_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decc_dfail_inv_comp_greater_or_equal_back_fail_incc_pass_incc_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_repl_dfail_inv_comp_equal_back_fail_keep_pass_decc_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decc_dfail_inv_comp_always_back_fail_decc_pass_repl_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decc_dfail_incc_comp_less_or_equal_back_fail_inv_pass_decc_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decc_dfail_inv_comp_less_back_fail_decw_pass_decc_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_keep_dfail_keep_comp_greater_or_equal_back_fail_inv_pass_decc_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_zero_dfail_inv_comp_greater_or_equal_back_fail_repl_pass_keep_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_incc_dfail_zero_comp_greater_or_equal_back_fail_wrap_pass_zero_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decw_dfail_zero_comp_always_back_fail_inv_pass_incc_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_zero_dfail_repl_comp_less_back_fail_keep_pass_decw_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decw_dfail_wrap_comp_equal_back_fail_wrap_pass_zero_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_zero_dfail_decw_comp_less_or_equal_back_fail_keep_pass_decw_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_keep_dfail_incc_comp_less_back_fail_inv_pass_zero_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_keep_dfail_inv_comp_greater_back_fail_wrap_pass_keep_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_wrap_dfail_zero_comp_equal_back_fail_incc_pass_keep_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_wrap_dfail_decc_comp_less_or_equal_back_fail_zero_pass_wrap_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_zero_dfail_inv_comp_never_back_fail_wrap_pass_wrap_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_wrap_dfail_decc_comp_less_back_fail_decw_pass_zero_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_inv_dfail_decw_comp_not_equal_back_fail_keep_pass_wrap_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decc_dfail_decw_comp_never_back_fail_zero_pass_inv_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decw_dfail_repl_comp_not_equal_back_fail_decc_pass_decc_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_keep_dfail_decw_comp_equal_back_fail_wrap_pass_decw_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_repl_dfail_decc_comp_not_equal_back_fail_zero_pass_keep_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_incc_dfail_wrap_comp_equal_back_fail_repl_pass_repl_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decw_dfail_wrap_comp_less_or_equal_back_fail_decc_pass_incc_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_incc_dfail_zero_comp_always_back_fail_zero_pass_decw_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decc_dfail_incc_comp_less_back_fail_decc_pass_incc_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_incc_dfail_zero_comp_less_or_equal_back_fail_decw_pass_decc_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_keep_dfail_decw_comp_greater_or_equal_back_fail_decc_pass_incc_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_keep_dfail_decw_comp_greater_back_fail_repl_pass_keep_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_keep_dfail_repl_comp_never_back_fail_decw_pass_keep_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_repl_dfail_keep_comp_equal_back_fail_decc_pass_keep_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_incc_dfail_zero_comp_greater_back_fail_zero_pass_repl_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decw_dfail_decw_comp_greater_or_equal_back_fail_zero_pass_incc_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decw_dfail_incc_comp_equal_back_fail_incc_pass_decw_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_repl_dfail_inv_comp_equal_back_fail_incc_pass_decw_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_wrap_dfail_wrap_comp_not_equal_back_fail_incc_pass_repl_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_wrap_dfail_inv_comp_never_back_fail_inv_pass_wrap_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decc_dfail_wrap_comp_greater_back_fail_zero_pass_wrap_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_incc_dfail_inv_comp_greater_back_fail_decc_pass_decc_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_wrap_dfail_repl_comp_never_back_fail_keep_pass_incc_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decw_dfail_wrap_comp_equal_back_fail_inv_pass_wrap_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_inv_dfail_zero_comp_always_back_fail_decc_pass_decw_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_repl_dfail_decc_comp_less_or_equal_back_fail_decc_pass_inv_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_keep_dfail_decc_comp_always_back_fail_inv_pass_repl_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_repl_dfail_zero_comp_greater_back_fail_inv_pass_keep_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_incc_dfail_incc_comp_always_back_fail_keep_pass_repl_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_wrap_dfail_wrap_comp_not_equal_back_fail_zero_pass_incc_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decc_dfail_keep_comp_less_back_fail_wrap_pass_wrap_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_wrap_dfail_zero_comp_greater_back_fail_repl_pass_decc_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_repl_dfail_decc_comp_equal_back_fail_zero_pass_wrap_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_zero_dfail_repl_comp_less_back_fail_decw_pass_repl_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_keep_dfail_wrap_comp_greater_back_fail_keep_pass_zero_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_keep_dfail_incc_comp_greater_back_fail_keep_pass_keep_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_incc_dfail_decc_comp_greater_back_fail_wrap_pass_keep_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_inv_dfail_decw_comp_always_back_fail_decc_pass_incc_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_repl_dfail_decc_comp_never_back_fail_wrap_pass_inv_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_incc_dfail_decw_comp_equal_back_fail_decw_pass_repl_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_wrap_dfail_keep_comp_equal_back_fail_zero_pass_incc_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_repl_dfail_repl_comp_less_or_equal_back_fail_decw_pass_wrap_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decc_dfail_keep_comp_greater_back_fail_zero_pass_repl_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_wrap_dfail_decc_comp_greater_or_equal_back_fail_wrap_pass_decc_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_incc_dfail_wrap_comp_less_or_equal_back_fail_repl_pass_wrap_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_incc_dfail_repl_comp_equal_back_fail_incc_pass_incc_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decc_dfail_wrap_comp_greater_back_fail_keep_pass_incc_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_keep_dfail_zero_comp_never_back_fail_incc_pass_decc_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_incc_dfail_keep_comp_never_back_fail_repl_pass_keep_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_wrap_dfail_wrap_comp_less_or_equal_back_fail_incc_pass_incc_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_wrap_dfail_decc_comp_always_back_fail_incc_pass_wrap_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_wrap_dfail_wrap_comp_never_back_fail_decw_pass_wrap_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decw_dfail_keep_comp_greater_back_fail_decc_pass_wrap_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_inv_dfail_decc_comp_greater_back_fail_decw_pass_decw_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decw_dfail_zero_comp_less_back_fail_zero_pass_inv_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_inv_dfail_zero_comp_less_or_equal_back_fail_inv_pass_decw_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decw_dfail_incc_comp_less_or_equal_back_fail_incc_pass_inv_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_incc_dfail_inv_comp_not_equal_back_fail_incc_pass_decw_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_zero_dfail_repl_comp_always_back_fail_keep_pass_incc_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decc_dfail_keep_comp_equal_back_fail_incc_pass_zero_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_inv_dfail_inv_comp_less_back_fail_inv_pass_decc_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_incc_dfail_decw_comp_always_back_fail_wrap_pass_inv_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_zero_dfail_keep_comp_always_back_fail_decc_pass_incc_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_zero_dfail_decc_comp_less_back_fail_repl_pass_zero_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_keep_dfail_repl_comp_not_equal_back_fail_keep_pass_zero_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_wrap_dfail_repl_comp_less_or_equal_back_fail_decc_pass_keep_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_incc_dfail_decc_comp_not_equal_back_fail_keep_pass_wrap_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_zero_dfail_decw_comp_less_or_equal_back_fail_repl_pass_incc_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_wrap_dfail_wrap_comp_equal_back_fail_incc_pass_zero_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decc_dfail_decc_comp_never_back_fail_decw_pass_wrap_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_inv_dfail_decc_comp_always_back_fail_repl_pass_decc_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_inv_dfail_decw_comp_not_equal_back_fail_keep_pass_inv_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_inv_dfail_incc_comp_less_or_equal_back_fail_wrap_pass_inv_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decw_dfail_keep_comp_not_equal_back_fail_decc_pass_inv_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_inv_dfail_inv_comp_not_equal_back_fail_wrap_pass_decw_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decc_dfail_repl_comp_less_or_equal_back_fail_incc_pass_inv_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_inv_dfail_repl_comp_greater_back_fail_zero_pass_decc_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_repl_dfail_decc_comp_equal_back_fail_decc_pass_inv_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_keep_dfail_incc_comp_greater_back_fail_inv_pass_repl_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_repl_dfail_wrap_comp_less_or_equal_back_fail_incc_pass_keep_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_inv_dfail_wrap_comp_greater_back_fail_keep_pass_repl_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_inv_dfail_wrap_comp_less_back_fail_keep_pass_inv_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_incc_dfail_keep_comp_greater_back_fail_decw_pass_inv_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_repl_dfail_decw_comp_not_equal_back_fail_inv_pass_incc_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_zero_dfail_keep_comp_greater_or_equal_back_fail_zero_pass_repl_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_incc_dfail_keep_comp_greater_back_fail_incc_pass_zero_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_repl_dfail_decc_comp_never_back_fail_decc_pass_incc_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_wrap_dfail_repl_comp_not_equal_back_fail_repl_pass_repl_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_wrap_dfail_repl_comp_greater_back_fail_repl_pass_wrap_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_inv_dfail_keep_comp_never_back_fail_inv_pass_wrap_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_incc_dfail_decc_comp_greater_back_fail_zero_pass_inv_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_incc_dfail_inv_comp_not_equal_back_fail_inv_pass_incc_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_wrap_dfail_decc_comp_greater_or_equal_back_fail_decc_pass_incc_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_incc_dfail_incc_comp_less_back_fail_wrap_pass_wrap_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decc_dfail_keep_comp_less_back_fail_decc_pass_incc_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_zero_dfail_incc_comp_greater_back_fail_incc_pass_decc_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_zero_dfail_repl_comp_greater_or_equal_back_fail_decw_pass_zero_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_keep_dfail_incc_comp_not_equal_back_fail_decw_pass_zero_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decw_dfail_decw_comp_less_or_equal_back_fail_decw_pass_keep_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decw_dfail_wrap_comp_less_or_equal_back_fail_wrap_pass_decw_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_inv_dfail_incc_comp_not_equal_back_fail_repl_pass_decw_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decc_dfail_incc_comp_less_back_fail_zero_pass_inv_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_wrap_dfail_keep_comp_not_equal_back_fail_wrap_pass_decc_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_zero_dfail_inv_comp_not_equal_back_fail_decc_pass_wrap_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decc_dfail_inv_comp_never_back_fail_incc_pass_zero_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_incc_dfail_incc_comp_equal_back_fail_incc_pass_decc_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_repl_dfail_decc_comp_greater_or_equal_back_fail_keep_pass_incc_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decc_dfail_repl_comp_not_equal_back_fail_repl_pass_repl_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_repl_dfail_wrap_comp_greater_or_equal_back_fail_keep_pass_decc_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decc_dfail_decw_comp_less_back_fail_inv_pass_repl_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_keep_dfail_incc_comp_less_or_equal_back_fail_repl_pass_decc_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_repl_dfail_wrap_comp_greater_or_equal_back_fail_keep_pass_keep_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_wrap_dfail_inv_comp_less_back_fail_decc_pass_repl_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_wrap_dfail_wrap_comp_greater_or_equal_back_fail_incc_pass_wrap_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decc_dfail_zero_comp_greater_or_equal_back_fail_incc_pass_wrap_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_repl_dfail_inv_comp_less_or_equal_back_fail_wrap_pass_decc_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decc_dfail_zero_comp_equal_back_fail_keep_pass_repl_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_wrap_dfail_wrap_comp_less_back_fail_decc_pass_decc_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_zero_dfail_repl_comp_always_back_fail_zero_pass_wrap_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_repl_dfail_wrap_comp_less_or_equal_back_fail_decw_pass_zero_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_wrap_dfail_decc_comp_less_back_fail_inv_pass_repl_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decw_dfail_decw_comp_always_back_fail_wrap_pass_wrap_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decw_dfail_keep_comp_less_or_equal_back_fail_zero_pass_decw_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decw_dfail_repl_comp_never_back_fail_decc_pass_decw_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_keep_dfail_keep_comp_never_back_fail_repl_pass_decw_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_inv_dfail_keep_comp_greater_back_fail_wrap_pass_keep_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_incc_dfail_keep_comp_equal_back_fail_decc_pass_inv_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_incc_dfail_wrap_comp_less_or_equal_back_fail_keep_pass_incc_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_incc_dfail_decw_comp_less_back_fail_inv_pass_incc_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_incc_dfail_keep_comp_equal_back_fail_decc_pass_incc_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_wrap_dfail_decc_comp_always_back_fail_wrap_pass_incc_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_incc_dfail_incc_comp_equal_back_fail_decc_pass_wrap_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_repl_dfail_keep_comp_less_back_fail_decc_pass_incc_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_wrap_dfail_zero_comp_less_back_fail_incc_pass_repl_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_repl_dfail_incc_comp_greater_or_equal_back_fail_zero_pass_wrap_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_keep_dfail_incc_comp_never_back_fail_repl_pass_repl_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_wrap_dfail_decw_comp_never_back_fail_decc_pass_keep_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_repl_dfail_wrap_comp_always_back_fail_decc_pass_wrap_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_repl_dfail_incc_comp_greater_back_fail_zero_pass_repl_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_keep_dfail_zero_comp_not_equal_back_fail_repl_pass_repl_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_wrap_dfail_zero_comp_equal_back_fail_incc_pass_keep_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_incc_dfail_incc_comp_equal_back_fail_incc_pass_wrap_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_keep_dfail_wrap_comp_always_back_fail_zero_pass_incc_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_inv_dfail_wrap_comp_never_back_fail_repl_pass_keep_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_wrap_dfail_repl_comp_less_or_equal_back_fail_decc_pass_inv_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_zero_dfail_repl_comp_never_back_fail_repl_pass_wrap_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_repl_dfail_wrap_comp_less_or_equal_back_fail_wrap_pass_zero_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decw_dfail_wrap_comp_less_or_equal_back_fail_wrap_pass_repl_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decw_dfail_inv_comp_greater_back_fail_decc_pass_decw_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decc_dfail_inv_comp_less_or_equal_back_fail_wrap_pass_decw_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_keep_dfail_decw_comp_equal_back_fail_zero_pass_decc_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_repl_dfail_keep_comp_less_back_fail_repl_pass_keep_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decw_dfail_keep_comp_never_back_fail_keep_pass_repl_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_incc_dfail_repl_comp_not_equal_back_fail_inv_pass_decw_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_keep_dfail_wrap_comp_never_back_fail_decc_pass_incc_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_repl_dfail_wrap_comp_not_equal_back_fail_incc_pass_keep_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_repl_dfail_wrap_comp_equal_back_fail_wrap_pass_repl_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_keep_dfail_incc_comp_never_back_fail_zero_pass_repl_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decw_dfail_wrap_comp_equal_back_fail_inv_pass_keep_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_repl_dfail_keep_comp_always_back_fail_inv_pass_decw_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_repl_dfail_keep_comp_greater_back_fail_wrap_pass_repl_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decc_dfail_incc_comp_less_back_fail_inv_pass_repl_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decw_dfail_wrap_comp_greater_back_fail_inv_pass_decc_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_repl_dfail_zero_comp_less_back_fail_zero_pass_decw_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decc_dfail_zero_comp_always_back_fail_zero_pass_repl_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_inv_dfail_incc_comp_equal_back_fail_decc_pass_decc_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_inv_dfail_zero_comp_always_back_fail_decw_pass_inv_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_wrap_dfail_incc_comp_always_back_fail_repl_pass_inv_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_zero_dfail_inv_comp_never_back_fail_repl_pass_wrap_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_keep_dfail_decc_comp_less_or_equal_back_fail_zero_pass_zero_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_wrap_dfail_inv_comp_not_equal_back_fail_wrap_pass_keep_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_incc_dfail_keep_comp_greater_back_fail_zero_pass_wrap_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_repl_dfail_keep_comp_less_or_equal_back_fail_keep_pass_incc_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decw_dfail_keep_comp_always_back_fail_keep_pass_repl_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decc_dfail_wrap_comp_always_back_fail_decc_pass_decw_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_inv_dfail_incc_comp_equal_back_fail_repl_pass_decc_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_zero_dfail_decw_comp_greater_back_fail_inv_pass_inv_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decc_dfail_decw_comp_less_back_fail_decw_pass_zero_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decc_dfail_decc_comp_greater_back_fail_wrap_pass_decc_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_keep_dfail_incc_comp_always_back_fail_incc_pass_decc_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decc_dfail_wrap_comp_greater_or_equal_back_fail_keep_pass_keep_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_keep_dfail_keep_comp_never_back_fail_keep_pass_decc_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_zero_dfail_incc_comp_less_back_fail_keep_pass_keep_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_keep_dfail_decw_comp_less_back_fail_repl_pass_zero_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_zero_dfail_incc_comp_greater_or_equal_back_fail_keep_pass_keep_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_repl_dfail_repl_comp_never_back_fail_inv_pass_zero_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_inv_dfail_decc_comp_less_back_fail_repl_pass_repl_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decc_dfail_incc_comp_greater_or_equal_back_fail_decw_pass_inv_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_zero_dfail_decw_comp_less_back_fail_decw_pass_decc_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_wrap_dfail_repl_comp_less_back_fail_wrap_pass_zero_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_incc_dfail_keep_comp_less_or_equal_back_fail_decc_pass_wrap_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_repl_dfail_zero_comp_less_or_equal_back_fail_incc_pass_incc_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_incc_dfail_keep_comp_less_or_equal_back_fail_decc_pass_repl_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_wrap_dfail_decc_comp_greater_back_fail_decc_pass_incc_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_zero_dfail_wrap_comp_not_equal_back_fail_zero_pass_wrap_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_inv_dfail_repl_comp_greater_back_fail_repl_pass_zero_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_inv_dfail_decw_comp_never_back_fail_decw_pass_inv_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_wrap_dfail_zero_comp_less_back_fail_decw_pass_inv_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_repl_dfail_decw_comp_greater_back_fail_incc_pass_wrap_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_inv_dfail_incc_comp_greater_or_equal_back_fail_decc_pass_repl_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_inv_dfail_repl_comp_less_or_equal_back_fail_keep_pass_inv_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_zero_dfail_decw_comp_less_back_fail_incc_pass_inv_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_incc_dfail_decc_comp_less_or_equal_back_fail_keep_pass_zero_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_inv_dfail_zero_comp_greater_or_equal_back_fail_keep_pass_incc_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_incc_dfail_zero_comp_not_equal_back_fail_zero_pass_inv_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_zero_dfail_incc_comp_less_back_fail_zero_pass_incc_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_wrap_dfail_inv_comp_never_back_fail_wrap_pass_zero_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_keep_dfail_decw_comp_greater_or_equal_back_fail_wrap_pass_wrap_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_zero_dfail_keep_comp_less_back_fail_decw_pass_keep_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_incc_dfail_zero_comp_greater_or_equal_back_fail_wrap_pass_zero_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_keep_dfail_inv_comp_greater_back_fail_repl_pass_incc_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_zero_dfail_decc_comp_equal_back_fail_decw_pass_keep_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_wrap_dfail_decc_comp_less_or_equal_back_fail_wrap_pass_zero_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_incc_dfail_repl_comp_never_back_fail_repl_pass_wrap_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decc_dfail_wrap_comp_equal_back_fail_keep_pass_incc_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_keep_dfail_decw_comp_greater_back_fail_decw_pass_decc_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_incc_dfail_inv_comp_not_equal_back_fail_incc_pass_keep_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_wrap_dfail_wrap_comp_greater_or_equal_back_fail_wrap_pass_incc_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_inv_dfail_decc_comp_not_equal_back_fail_inv_pass_wrap_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decw_dfail_wrap_comp_greater_back_fail_incc_pass_inv_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_repl_dfail_inv_comp_never_back_fail_wrap_pass_decw_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_keep_dfail_repl_comp_less_back_fail_repl_pass_repl_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decc_dfail_keep_comp_less_or_equal_back_fail_repl_pass_keep_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decw_dfail_decc_comp_never_back_fail_zero_pass_decc_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decw_dfail_decw_comp_greater_back_fail_decw_pass_decw_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_repl_dfail_zero_comp_always_back_fail_decc_pass_decw_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decc_dfail_zero_comp_greater_or_equal_back_fail_keep_pass_repl_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_keep_dfail_decw_comp_greater_or_equal_back_fail_zero_pass_decc_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decw_dfail_inv_comp_not_equal_back_fail_keep_pass_keep_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_keep_dfail_decw_comp_less_or_equal_back_fail_zero_pass_decw_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decc_dfail_inv_comp_greater_back_fail_repl_pass_keep_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_keep_dfail_incc_comp_always_back_fail_decc_pass_decc_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decw_dfail_incc_comp_never_back_fail_zero_pass_keep_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_wrap_dfail_incc_comp_less_or_equal_back_fail_decc_pass_decw_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_incc_dfail_repl_comp_always_back_fail_zero_pass_wrap_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_inv_dfail_decc_comp_less_or_equal_back_fail_incc_pass_incc_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_inv_dfail_wrap_comp_never_back_fail_wrap_pass_inv_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decw_dfail_incc_comp_less_back_fail_inv_pass_inv_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_inv_dfail_repl_comp_less_or_equal_back_fail_keep_pass_decw_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_keep_dfail_keep_comp_less_or_equal_back_fail_repl_pass_inv_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_inv_dfail_wrap_comp_not_equal_back_fail_incc_pass_keep_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_repl_dfail_keep_comp_less_back_fail_keep_pass_inv_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_repl_dfail_incc_comp_not_equal_back_fail_inv_pass_repl_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decc_dfail_zero_comp_less_or_equal_back_fail_zero_pass_repl_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decw_dfail_incc_comp_never_back_fail_wrap_pass_decc_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decw_dfail_keep_comp_equal_back_fail_incc_pass_decw_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_inv_dfail_decc_comp_less_or_equal_back_fail_keep_pass_decw_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_zero_dfail_repl_comp_not_equal_back_fail_repl_pass_inv_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_wrap_dfail_decw_comp_equal_back_fail_wrap_pass_zero_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_zero_dfail_incc_comp_never_back_fail_inv_pass_wrap_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_zero_dfail_zero_comp_greater_or_equal_back_fail_incc_pass_zero_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_wrap_dfail_zero_comp_not_equal_back_fail_decw_pass_zero_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_keep_dfail_repl_comp_never_back_fail_incc_pass_wrap_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_wrap_dfail_incc_comp_never_back_fail_zero_pass_keep_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_zero_dfail_decc_comp_never_back_fail_repl_pass_wrap_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_inv_dfail_repl_comp_always_back_fail_decw_pass_zero_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_keep_dfail_repl_comp_less_back_fail_inv_pass_inv_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_incc_dfail_decw_comp_less_or_equal_back_fail_wrap_pass_keep_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_keep_dfail_decw_comp_not_equal_back_fail_repl_pass_incc_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decw_dfail_inv_comp_greater_back_fail_inv_pass_keep_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_keep_dfail_decc_comp_less_back_fail_zero_pass_decw_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_incc_dfail_zero_comp_less_back_fail_decw_pass_keep_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_wrap_dfail_decc_comp_less_back_fail_decw_pass_incc_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_zero_dfail_decw_comp_always_back_fail_decc_pass_wrap_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_repl_dfail_decw_comp_less_or_equal_back_fail_repl_pass_zero_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_incc_dfail_decc_comp_greater_or_equal_back_fail_decw_pass_repl_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_inv_dfail_inv_comp_always_back_fail_inv_pass_incc_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_incc_dfail_repl_comp_not_equal_back_fail_zero_pass_inv_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_inv_dfail_zero_comp_always_back_fail_keep_pass_incc_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_zero_dfail_decw_comp_always_back_fail_inv_pass_inv_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_zero_dfail_zero_comp_not_equal_back_fail_keep_pass_zero_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_wrap_dfail_keep_comp_always_back_fail_incc_pass_zero_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_repl_dfail_inv_comp_less_back_fail_incc_pass_wrap_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_keep_dfail_keep_comp_less_or_equal_back_fail_keep_pass_repl_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decc_dfail_zero_comp_never_back_fail_keep_pass_keep_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_inv_dfail_inv_comp_greater_back_fail_zero_pass_decc_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_repl_dfail_decw_comp_less_or_equal_back_fail_decw_pass_inv_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_zero_dfail_incc_comp_not_equal_back_fail_keep_pass_repl_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_wrap_dfail_repl_comp_never_back_fail_decw_pass_zero_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_keep_dfail_zero_comp_always_back_fail_zero_pass_wrap_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_incc_dfail_decc_comp_less_or_equal_back_fail_wrap_pass_keep_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decw_dfail_decw_comp_less_or_equal_back_fail_decw_pass_incc_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decw_dfail_wrap_comp_not_equal_back_fail_keep_pass_decw_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_inv_dfail_zero_comp_never_back_fail_inv_pass_decw_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_incc_dfail_inv_comp_not_equal_back_fail_decc_pass_inv_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_keep_dfail_keep_comp_always_back_fail_inv_pass_incc_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_wrap_dfail_decw_comp_less_or_equal_back_fail_decc_pass_keep_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_keep_dfail_wrap_comp_never_back_fail_inv_pass_wrap_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_keep_dfail_wrap_comp_never_back_fail_zero_pass_keep_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_wrap_dfail_zero_comp_less_back_fail_wrap_pass_keep_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_zero_dfail_zero_comp_equal_back_fail_decw_pass_wrap_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_wrap_dfail_zero_comp_not_equal_back_fail_keep_pass_zero_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_inv_dfail_inv_comp_never_back_fail_inv_pass_wrap_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decw_dfail_decw_comp_never_back_fail_repl_pass_inv_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_inv_dfail_incc_comp_greater_back_fail_wrap_pass_decw_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_zero_dfail_decc_comp_not_equal_back_fail_incc_pass_inv_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_repl_dfail_wrap_comp_always_back_fail_decw_pass_zero_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_inv_dfail_zero_comp_greater_or_equal_back_fail_incc_pass_repl_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_incc_dfail_keep_comp_always_back_fail_inv_pass_inv_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decc_dfail_inv_comp_less_back_fail_decc_pass_incc_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_incc_dfail_wrap_comp_never_back_fail_zero_pass_decc_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_wrap_dfail_zero_comp_not_equal_back_fail_inv_pass_incc_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_zero_dfail_keep_comp_not_equal_back_fail_decc_pass_wrap_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_incc_dfail_keep_comp_not_equal_back_fail_inv_pass_zero_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_keep_dfail_incc_comp_always_back_fail_keep_pass_incc_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_repl_dfail_wrap_comp_greater_back_fail_decw_pass_keep_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_zero_dfail_zero_comp_greater_or_equal_back_fail_repl_pass_repl_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_inv_dfail_repl_comp_not_equal_back_fail_wrap_pass_zero_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_repl_dfail_decw_comp_less_or_equal_back_fail_keep_pass_inv_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_incc_dfail_wrap_comp_greater_back_fail_decc_pass_repl_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decc_dfail_decw_comp_greater_back_fail_decc_pass_incc_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decw_dfail_wrap_comp_not_equal_back_fail_zero_pass_decc_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_keep_dfail_inv_comp_greater_back_fail_incc_pass_decw_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_repl_dfail_zero_comp_less_back_fail_repl_pass_keep_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_inv_dfail_repl_comp_equal_back_fail_inv_pass_repl_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decw_dfail_inv_comp_less_or_equal_back_fail_incc_pass_inv_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_zero_dfail_zero_comp_equal_back_fail_decc_pass_decw_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_keep_dfail_zero_comp_greater_or_equal_back_fail_repl_pass_zero_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_wrap_dfail_inv_comp_greater_back_fail_keep_pass_keep_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decw_dfail_zero_comp_always_back_fail_inv_pass_wrap_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_keep_dfail_decc_comp_never_back_fail_wrap_pass_decw_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_wrap_dfail_repl_comp_greater_back_fail_zero_pass_keep_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_wrap_dfail_decc_comp_not_equal_back_fail_keep_pass_wrap_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_incc_dfail_wrap_comp_always_back_fail_decw_pass_wrap_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_repl_dfail_zero_comp_never_back_fail_decc_pass_incc_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_wrap_dfail_keep_comp_never_back_fail_incc_pass_repl_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_repl_dfail_zero_comp_greater_back_fail_wrap_pass_wrap_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decc_dfail_incc_comp_never_back_fail_decw_pass_repl_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_zero_dfail_repl_comp_less_back_fail_wrap_pass_decc_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_wrap_dfail_incc_comp_greater_or_equal_back_fail_decw_pass_zero_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_inv_dfail_inv_comp_never_back_fail_keep_pass_wrap_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_zero_dfail_repl_comp_greater_back_fail_decw_pass_inv_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_inv_dfail_zero_comp_never_back_fail_incc_pass_zero_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_zero_dfail_incc_comp_less_back_fail_keep_pass_inv_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decc_dfail_repl_comp_equal_back_fail_inv_pass_zero_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_incc_dfail_keep_comp_greater_or_equal_back_fail_zero_pass_decc_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_inv_dfail_zero_comp_greater_back_fail_decc_pass_incc_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_keep_dfail_decc_comp_equal_back_fail_zero_pass_inv_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_incc_dfail_repl_comp_less_back_fail_wrap_pass_keep_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decw_dfail_decw_comp_never_back_fail_incc_pass_incc_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_wrap_dfail_decc_comp_less_back_fail_repl_pass_decw_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decw_dfail_inv_comp_equal_back_fail_repl_pass_wrap_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decc_dfail_incc_comp_not_equal_back_fail_keep_pass_decw_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_inv_dfail_incc_comp_greater_or_equal_back_fail_repl_pass_decc_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_wrap_dfail_incc_comp_less_back_fail_wrap_pass_inv_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_keep_dfail_repl_comp_always_back_fail_decc_pass_wrap_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_repl_dfail_keep_comp_greater_back_fail_repl_pass_keep_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_incc_dfail_decc_comp_less_back_fail_incc_pass_repl_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_zero_dfail_incc_comp_greater_back_fail_repl_pass_incc_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_keep_dfail_incc_comp_always_back_fail_repl_pass_zero_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_wrap_dfail_decw_comp_never_back_fail_decc_pass_keep_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_incc_dfail_keep_comp_never_back_fail_repl_pass_wrap_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_repl_dfail_keep_comp_greater_or_equal_back_fail_inv_pass_incc_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decc_dfail_zero_comp_never_back_fail_decc_pass_repl_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_wrap_dfail_wrap_comp_less_or_equal_back_fail_inv_pass_decc_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decw_dfail_wrap_comp_not_equal_back_fail_repl_pass_wrap_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decc_dfail_wrap_comp_equal_back_fail_wrap_pass_decw_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_incc_dfail_decc_comp_greater_back_fail_keep_pass_decc_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_incc_dfail_keep_comp_never_back_fail_decw_pass_incc_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_zero_dfail_decw_comp_less_back_fail_decw_pass_incc_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_zero_dfail_keep_comp_less_back_fail_zero_pass_zero_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_repl_dfail_incc_comp_greater_back_fail_incc_pass_zero_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decw_dfail_zero_comp_greater_or_equal_back_fail_decc_pass_repl_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_repl_dfail_repl_comp_less_back_fail_inv_pass_decw_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_incc_dfail_inv_comp_greater_or_equal_back_fail_decw_pass_repl_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decw_dfail_decc_comp_greater_or_equal_back_fail_keep_pass_incc_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decc_dfail_decc_comp_less_or_equal_back_fail_wrap_pass_decw_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_repl_dfail_keep_comp_greater_or_equal_back_fail_decw_pass_decc_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_repl_dfail_decc_comp_never_back_fail_decw_pass_repl_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_repl_dfail_repl_comp_greater_or_equal_back_fail_decc_pass_repl_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decw_dfail_keep_comp_greater_or_equal_back_fail_zero_pass_repl_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_inv_dfail_decc_comp_never_back_fail_zero_pass_decw_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_wrap_dfail_repl_comp_less_back_fail_wrap_pass_inv_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decc_dfail_repl_comp_never_back_fail_zero_pass_wrap_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decw_dfail_keep_comp_less_back_fail_decw_pass_decc_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_zero_dfail_decw_comp_not_equal_back_fail_wrap_pass_decw_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_inv_dfail_incc_comp_greater_back_fail_decw_pass_zero_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_zero_dfail_inv_comp_greater_back_fail_zero_pass_inv_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_repl_dfail_repl_comp_not_equal_back_fail_zero_pass_zero_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_repl_dfail_repl_comp_equal_back_fail_decc_pass_repl_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_wrap_dfail_repl_comp_never_back_fail_zero_pass_repl_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decw_dfail_decw_comp_never_back_fail_incc_pass_wrap_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_repl_dfail_wrap_comp_equal_back_fail_incc_pass_decw_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_zero_dfail_keep_comp_less_or_equal_back_fail_wrap_pass_repl_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_zero_dfail_inv_comp_never_back_fail_incc_pass_zero_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_incc_dfail_incc_comp_equal_back_fail_wrap_pass_zero_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_zero_dfail_incc_comp_greater_or_equal_back_fail_wrap_pass_incc_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_incc_dfail_inv_comp_always_back_fail_keep_pass_zero_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_inv_dfail_wrap_comp_not_equal_back_fail_repl_pass_incc_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_inv_dfail_decw_comp_greater_or_equal_back_fail_decw_pass_inv_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_wrap_dfail_inv_comp_less_or_equal_back_fail_decw_pass_inv_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_incc_dfail_inv_comp_not_equal_back_fail_decc_pass_wrap_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_incc_dfail_decw_comp_equal_back_fail_incc_pass_incc_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_keep_dfail_wrap_comp_equal_back_fail_decc_pass_incc_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_keep_dfail_decc_comp_greater_or_equal_back_fail_zero_pass_keep_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_wrap_dfail_zero_comp_greater_back_fail_repl_pass_keep_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decw_dfail_repl_comp_equal_back_fail_decc_pass_wrap_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decw_dfail_decw_comp_less_back_fail_incc_pass_decw_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decc_dfail_incc_comp_not_equal_back_fail_decc_pass_decw_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decc_dfail_repl_comp_greater_or_equal_back_fail_wrap_pass_decc_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decc_dfail_repl_comp_never_back_fail_zero_pass_decc_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_wrap_dfail_decc_comp_greater_back_fail_incc_pass_decc_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decc_dfail_keep_comp_equal_back_fail_keep_pass_wrap_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_keep_dfail_decw_comp_never_back_fail_keep_pass_decc_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_incc_dfail_decw_comp_less_back_fail_repl_pass_keep_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_keep_dfail_zero_comp_greater_back_fail_repl_pass_incc_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decc_dfail_decw_comp_greater_or_equal_back_fail_inv_pass_keep_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_zero_dfail_wrap_comp_greater_or_equal_back_fail_inv_pass_decc_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_wrap_dfail_wrap_comp_less_back_fail_wrap_pass_zero_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decw_dfail_keep_comp_less_or_equal_back_fail_incc_pass_wrap_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_repl_dfail_zero_comp_never_back_fail_zero_pass_decw_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_wrap_dfail_zero_comp_equal_back_fail_repl_pass_repl_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_wrap_dfail_wrap_comp_not_equal_back_fail_decw_pass_wrap_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decw_dfail_repl_comp_not_equal_back_fail_incc_pass_wrap_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_repl_dfail_keep_comp_not_equal_back_fail_decc_pass_decw_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_inv_dfail_repl_comp_less_back_fail_repl_pass_repl_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decw_dfail_inv_comp_always_back_fail_wrap_pass_inv_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_keep_dfail_decc_comp_equal_back_fail_repl_pass_decw_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_zero_dfail_wrap_comp_less_back_fail_keep_pass_keep_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decw_dfail_wrap_comp_never_back_fail_decw_pass_zero_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decc_dfail_incc_comp_not_equal_back_fail_decc_pass_decw_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_wrap_dfail_incc_comp_greater_or_equal_back_fail_incc_pass_decc_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_incc_dfail_keep_comp_less_or_equal_back_fail_zero_pass_wrap_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_inv_dfail_wrap_comp_less_back_fail_keep_pass_incc_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decw_dfail_zero_comp_not_equal_back_fail_repl_pass_inv_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_keep_dfail_incc_comp_not_equal_back_fail_inv_pass_decw_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decc_dfail_zero_comp_less_or_equal_back_fail_incc_pass_keep_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_zero_dfail_zero_comp_never_back_fail_decc_pass_decc_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_inv_dfail_decw_comp_never_back_fail_keep_pass_zero_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_repl_dfail_decc_comp_not_equal_back_fail_keep_pass_inv_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decw_dfail_wrap_comp_equal_back_fail_incc_pass_repl_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decc_dfail_zero_comp_never_back_fail_repl_pass_decw_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decc_dfail_decc_comp_equal_back_fail_keep_pass_decc_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decw_dfail_zero_comp_less_back_fail_zero_pass_decc_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_zero_dfail_decw_comp_greater_back_fail_decc_pass_decw_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_wrap_dfail_repl_comp_less_back_fail_inv_pass_zero_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_repl_dfail_decc_comp_greater_or_equal_back_fail_decw_pass_wrap_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_repl_dfail_wrap_comp_greater_or_equal_back_fail_zero_pass_repl_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_wrap_dfail_inv_comp_less_or_equal_back_fail_wrap_pass_repl_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decw_dfail_incc_comp_not_equal_back_fail_keep_pass_wrap_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_repl_dfail_repl_comp_equal_back_fail_incc_pass_decw_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_inv_dfail_incc_comp_greater_back_fail_wrap_pass_repl_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_inv_dfail_repl_comp_less_or_equal_back_fail_keep_pass_inv_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_incc_dfail_inv_comp_less_back_fail_decw_pass_inv_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decw_dfail_incc_comp_less_back_fail_decw_pass_incc_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_incc_dfail_keep_comp_not_equal_back_fail_repl_pass_decw_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_keep_dfail_inv_comp_always_back_fail_wrap_pass_incc_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decw_dfail_decw_comp_not_equal_back_fail_decc_pass_keep_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decc_dfail_decw_comp_always_back_fail_keep_pass_decw_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decc_dfail_incc_comp_equal_back_fail_wrap_pass_decc_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_inv_dfail_zero_comp_greater_back_fail_wrap_pass_decc_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_wrap_dfail_repl_comp_always_back_fail_wrap_pass_inv_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_repl_dfail_keep_comp_less_or_equal_back_fail_incc_pass_wrap_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decw_dfail_wrap_comp_less_or_equal_back_fail_wrap_pass_repl_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decw_dfail_inv_comp_less_or_equal_back_fail_incc_pass_decw_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_incc_dfail_repl_comp_greater_back_fail_decw_pass_decw_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_wrap_dfail_incc_comp_less_back_fail_decw_pass_incc_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_incc_dfail_repl_comp_greater_or_equal_back_fail_repl_pass_wrap_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_inv_dfail_decw_comp_equal_back_fail_wrap_pass_incc_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decw_dfail_zero_comp_less_or_equal_back_fail_inv_pass_inv_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decw_dfail_keep_comp_not_equal_back_fail_inv_pass_decw_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decw_dfail_wrap_comp_greater_or_equal_back_fail_inv_pass_decw_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_keep_dfail_wrap_comp_not_equal_back_fail_decc_pass_decw_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_keep_dfail_keep_comp_equal_back_fail_decw_pass_keep_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_inv_dfail_zero_comp_not_equal_back_fail_incc_pass_keep_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_inv_dfail_keep_comp_less_back_fail_decw_pass_inv_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decw_dfail_zero_comp_never_back_fail_incc_pass_inv_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_zero_dfail_zero_comp_greater_back_fail_zero_pass_decw_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decc_dfail_inv_comp_greater_or_equal_back_fail_decw_pass_zero_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_inv_dfail_keep_comp_not_equal_back_fail_decc_pass_decc_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_wrap_dfail_zero_comp_less_back_fail_repl_pass_inv_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decw_dfail_wrap_comp_less_back_fail_keep_pass_wrap_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_zero_dfail_decw_comp_never_back_fail_decw_pass_decw_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decw_dfail_inv_comp_less_back_fail_zero_pass_zero_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decc_dfail_incc_comp_greater_or_equal_back_fail_keep_pass_decw_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_repl_dfail_zero_comp_less_or_equal_back_fail_decc_pass_decc_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_keep_dfail_inv_comp_not_equal_back_fail_repl_pass_repl_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decw_dfail_wrap_comp_always_back_fail_zero_pass_keep_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_incc_dfail_decw_comp_less_or_equal_back_fail_decw_pass_decw_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_repl_dfail_keep_comp_always_back_fail_wrap_pass_incc_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decc_dfail_inv_comp_equal_back_fail_keep_pass_repl_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_wrap_dfail_keep_comp_less_back_fail_decw_pass_decc_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decc_dfail_zero_comp_not_equal_back_fail_decc_pass_wrap_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decw_dfail_decc_comp_equal_back_fail_repl_pass_decc_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_zero_dfail_repl_comp_always_back_fail_wrap_pass_decw_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_incc_dfail_inv_comp_greater_or_equal_back_fail_keep_pass_zero_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_incc_dfail_wrap_comp_always_back_fail_wrap_pass_incc_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_repl_dfail_repl_comp_not_equal_back_fail_incc_pass_incc_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_repl_dfail_keep_comp_always_back_fail_decw_pass_repl_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_zero_dfail_decc_comp_less_back_fail_decw_pass_repl_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_incc_dfail_inv_comp_less_or_equal_back_fail_decc_pass_zero_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_repl_dfail_decc_comp_less_or_equal_back_fail_decc_pass_incc_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_zero_dfail_wrap_comp_not_equal_back_fail_decw_pass_repl_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_keep_dfail_decc_comp_less_back_fail_decw_pass_zero_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_repl_dfail_repl_comp_less_or_equal_back_fail_inv_pass_keep_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decw_dfail_inv_comp_greater_back_fail_keep_pass_repl_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_wrap_dfail_decc_comp_greater_or_equal_back_fail_repl_pass_decw_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_inv_dfail_decw_comp_never_back_fail_decw_pass_wrap_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_incc_dfail_zero_comp_not_equal_back_fail_zero_pass_inv_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decc_dfail_decc_comp_less_back_fail_inv_pass_incc_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_wrap_dfail_decc_comp_never_back_fail_repl_pass_decc_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_wrap_dfail_repl_comp_always_back_fail_keep_pass_wrap_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_wrap_dfail_decw_comp_less_back_fail_zero_pass_wrap_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decc_dfail_incc_comp_less_back_fail_zero_pass_wrap_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_keep_dfail_repl_comp_less_or_equal_back_fail_decc_pass_decc_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_repl_dfail_repl_comp_equal_back_fail_decw_pass_keep_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_inv_dfail_decw_comp_greater_back_fail_repl_pass_repl_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_incc_dfail_repl_comp_less_or_equal_back_fail_keep_pass_inv_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_keep_dfail_incc_comp_greater_or_equal_back_fail_repl_pass_incc_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_zero_dfail_wrap_comp_never_back_fail_keep_pass_keep_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_wrap_dfail_decw_comp_less_or_equal_back_fail_repl_pass_zero_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_zero_dfail_inv_comp_never_back_fail_zero_pass_wrap_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_incc_dfail_decw_comp_not_equal_back_fail_incc_pass_zero_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_wrap_dfail_decc_comp_less_or_equal_back_fail_zero_pass_incc_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decc_dfail_decc_comp_never_back_fail_zero_pass_wrap_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_repl_dfail_wrap_comp_never_back_fail_decc_pass_decc_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decc_dfail_inv_comp_less_back_fail_zero_pass_repl_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_incc_dfail_decc_comp_less_back_fail_decw_pass_decc_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decc_dfail_keep_comp_greater_or_equal_back_fail_zero_pass_incc_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_incc_dfail_decw_comp_greater_or_equal_back_fail_incc_pass_decc_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_zero_dfail_keep_comp_greater_or_equal_back_fail_incc_pass_incc_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decc_dfail_decc_comp_less_back_fail_zero_pass_zero_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_keep_dfail_repl_comp_less_back_fail_inv_pass_decc_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decc_dfail_keep_comp_greater_back_fail_zero_pass_keep_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_repl_dfail_zero_comp_greater_or_equal_back_fail_inv_pass_decc_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_repl_dfail_incc_comp_not_equal_back_fail_inv_pass_repl_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decw_dfail_keep_comp_greater_back_fail_wrap_pass_repl_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_wrap_dfail_keep_comp_greater_back_fail_keep_pass_decw_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_inv_dfail_wrap_comp_always_back_fail_decc_pass_wrap_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_wrap_dfail_wrap_comp_less_or_equal_back_fail_zero_pass_inv_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_zero_dfail_wrap_comp_less_or_equal_back_fail_decw_pass_wrap_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_inv_dfail_incc_comp_never_back_fail_incc_pass_zero_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_inv_dfail_incc_comp_equal_back_fail_zero_pass_inv_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decw_dfail_keep_comp_greater_back_fail_repl_pass_inv_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_wrap_dfail_repl_comp_less_or_equal_back_fail_decc_pass_decw_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decw_dfail_incc_comp_not_equal_back_fail_zero_pass_wrap_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_repl_dfail_repl_comp_greater_back_fail_zero_pass_decw_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_inv_dfail_repl_comp_greater_back_fail_zero_pass_repl_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_zero_dfail_incc_comp_greater_or_equal_back_fail_zero_pass_inv_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decc_dfail_keep_comp_greater_or_equal_back_fail_incc_pass_zero_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_wrap_dfail_wrap_comp_not_equal_back_fail_keep_pass_decc_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_wrap_dfail_wrap_comp_less_back_fail_decw_pass_wrap_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decc_dfail_repl_comp_equal_back_fail_repl_pass_wrap_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decc_dfail_incc_comp_greater_or_equal_back_fail_keep_pass_decc_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_incc_dfail_repl_comp_always_back_fail_zero_pass_decc_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decw_dfail_zero_comp_less_back_fail_repl_pass_incc_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_keep_dfail_wrap_comp_less_back_fail_incc_pass_decw_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_repl_dfail_decw_comp_never_back_fail_wrap_pass_keep_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_wrap_dfail_decc_comp_greater_or_equal_back_fail_keep_pass_repl_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_keep_dfail_inv_comp_greater_or_equal_back_fail_incc_pass_wrap_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_wrap_dfail_repl_comp_less_or_equal_back_fail_keep_pass_keep_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_wrap_dfail_wrap_comp_greater_back_fail_incc_pass_wrap_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_inv_dfail_incc_comp_less_back_fail_keep_pass_wrap_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decw_dfail_keep_comp_greater_or_equal_back_fail_zero_pass_inv_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_inv_dfail_inv_comp_less_or_equal_back_fail_inv_pass_decw_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_wrap_dfail_decw_comp_less_back_fail_decc_pass_inv_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_repl_dfail_zero_comp_equal_back_fail_incc_pass_wrap_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_zero_dfail_wrap_comp_never_back_fail_decw_pass_repl_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_wrap_dfail_zero_comp_always_back_fail_decc_pass_zero_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decw_dfail_decw_comp_greater_or_equal_back_fail_incc_pass_wrap_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_keep_dfail_decw_comp_less_back_fail_decc_pass_decw_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_keep_dfail_repl_comp_greater_back_fail_incc_pass_keep_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_repl_dfail_zero_comp_always_back_fail_wrap_pass_keep_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_incc_dfail_zero_comp_always_back_fail_repl_pass_repl_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_inv_dfail_wrap_comp_less_or_equal_back_fail_decw_pass_incc_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_wrap_dfail_decc_comp_not_equal_back_fail_decc_pass_inv_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decw_dfail_decw_comp_greater_back_fail_zero_pass_wrap_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_wrap_dfail_repl_comp_never_back_fail_inv_pass_decw_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_repl_dfail_decc_comp_less_back_fail_repl_pass_wrap_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decw_dfail_zero_comp_greater_or_equal_back_fail_wrap_pass_repl_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_incc_dfail_decw_comp_not_equal_back_fail_keep_pass_decw_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decc_dfail_decw_comp_always_back_fail_repl_pass_incc_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decw_dfail_wrap_comp_not_equal_back_fail_decc_pass_decc_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_keep_dfail_wrap_comp_greater_or_equal_back_fail_decw_pass_decw_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decc_dfail_decc_comp_never_back_fail_wrap_pass_keep_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_keep_dfail_wrap_comp_greater_or_equal_back_fail_zero_pass_decc_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_inv_dfail_incc_comp_always_back_fail_incc_pass_keep_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decw_dfail_decw_comp_less_back_fail_inv_pass_inv_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_inv_dfail_wrap_comp_not_equal_back_fail_keep_pass_decw_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_keep_dfail_inv_comp_always_back_fail_decc_pass_inv_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_inv_dfail_wrap_comp_never_back_fail_keep_pass_keep_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_repl_dfail_repl_comp_never_back_fail_wrap_pass_inv_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_repl_dfail_decw_comp_greater_back_fail_zero_pass_repl_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_wrap_dfail_decc_comp_not_equal_back_fail_inv_pass_repl_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_keep_dfail_inv_comp_less_back_fail_keep_pass_wrap_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decw_dfail_repl_comp_less_back_fail_wrap_pass_keep_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_inv_dfail_wrap_comp_always_back_fail_keep_pass_decw_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_zero_dfail_incc_comp_not_equal_back_fail_inv_pass_inv_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_wrap_dfail_incc_comp_not_equal_back_fail_repl_pass_zero_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_incc_dfail_zero_comp_equal_back_fail_decw_pass_wrap_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_keep_dfail_decw_comp_not_equal_back_fail_wrap_pass_incc_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_repl_dfail_incc_comp_greater_or_equal_back_fail_incc_pass_keep_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decw_dfail_decc_comp_less_back_fail_inv_pass_repl_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_inv_dfail_decc_comp_never_back_fail_zero_pass_decw_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_repl_dfail_decc_comp_greater_back_fail_decw_pass_inv_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_repl_dfail_incc_comp_less_or_equal_back_fail_zero_pass_repl_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_repl_dfail_decw_comp_less_or_equal_back_fail_decw_pass_repl_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_zero_dfail_repl_comp_greater_back_fail_incc_pass_repl_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_inv_dfail_decc_comp_greater_back_fail_decc_pass_zero_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_zero_dfail_decc_comp_equal_back_fail_wrap_pass_inv_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decc_dfail_zero_comp_not_equal_back_fail_inv_pass_zero_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_wrap_dfail_incc_comp_equal_back_fail_inv_pass_decc_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_wrap_dfail_zero_comp_less_back_fail_keep_pass_wrap_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_wrap_dfail_inv_comp_greater_back_fail_inv_pass_wrap_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_wrap_dfail_decw_comp_not_equal_back_fail_decc_pass_wrap_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_zero_dfail_inv_comp_less_back_fail_zero_pass_wrap_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decc_dfail_keep_comp_never_back_fail_incc_pass_zero_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decc_dfail_decc_comp_less_back_fail_decc_pass_decc_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decw_dfail_zero_comp_greater_back_fail_decc_pass_decc_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decw_dfail_wrap_comp_always_back_fail_decc_pass_decw_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_wrap_dfail_decc_comp_not_equal_back_fail_wrap_pass_decw_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_repl_dfail_keep_comp_always_back_fail_decc_pass_wrap_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_zero_dfail_keep_comp_equal_back_fail_repl_pass_repl_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decc_dfail_decc_comp_less_or_equal_back_fail_decw_pass_zero_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_repl_dfail_zero_comp_less_or_equal_back_fail_repl_pass_decc_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_inv_dfail_decc_comp_equal_back_fail_zero_pass_repl_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decc_dfail_inv_comp_always_back_fail_decw_pass_inv_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_repl_dfail_inv_comp_greater_or_equal_back_fail_wrap_pass_decc_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_wrap_dfail_decw_comp_always_back_fail_decc_pass_repl_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_inv_dfail_decc_comp_always_back_fail_decc_pass_wrap_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_keep_dfail_decw_comp_less_or_equal_back_fail_decw_pass_inv_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_incc_dfail_zero_comp_greater_or_equal_back_fail_zero_pass_keep_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_wrap_dfail_incc_comp_less_back_fail_keep_pass_incc_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decc_dfail_incc_comp_never_back_fail_decw_pass_wrap_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decw_dfail_repl_comp_greater_or_equal_back_fail_keep_pass_decc_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_keep_dfail_decw_comp_less_or_equal_back_fail_repl_pass_decw_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_inv_dfail_repl_comp_not_equal_back_fail_wrap_pass_keep_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_inv_dfail_wrap_comp_less_or_equal_back_fail_decw_pass_inv_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_incc_dfail_incc_comp_not_equal_back_fail_wrap_pass_inv_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_zero_dfail_inv_comp_never_back_fail_zero_pass_incc_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_wrap_dfail_keep_comp_not_equal_back_fail_decc_pass_zero_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_keep_dfail_keep_comp_greater_back_fail_inv_pass_wrap_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_keep_dfail_repl_comp_greater_back_fail_decc_pass_keep_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decc_dfail_repl_comp_less_back_fail_decw_pass_keep_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_repl_dfail_repl_comp_always_back_fail_incc_pass_decc_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_incc_dfail_repl_comp_less_back_fail_zero_pass_repl_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_wrap_dfail_keep_comp_greater_or_equal_back_fail_keep_pass_incc_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decw_dfail_decc_comp_not_equal_back_fail_incc_pass_wrap_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_repl_dfail_inv_comp_greater_or_equal_back_fail_inv_pass_decw_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decc_dfail_incc_comp_less_back_fail_decw_pass_repl_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_incc_dfail_wrap_comp_always_back_fail_incc_pass_decc_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_keep_dfail_keep_comp_greater_back_fail_repl_pass_incc_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_repl_dfail_repl_comp_not_equal_back_fail_zero_pass_keep_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_zero_dfail_incc_comp_not_equal_back_fail_wrap_pass_repl_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decc_dfail_wrap_comp_never_back_fail_inv_pass_zero_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_zero_dfail_repl_comp_always_back_fail_wrap_pass_decc_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_zero_dfail_zero_comp_equal_back_fail_repl_pass_zero_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_incc_dfail_incc_comp_less_back_fail_decc_pass_zero_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decw_dfail_inv_comp_never_back_fail_decw_pass_incc_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_repl_dfail_zero_comp_never_back_fail_decc_pass_decw_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_inv_dfail_decc_comp_equal_back_fail_zero_pass_repl_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_zero_dfail_decc_comp_not_equal_back_fail_incc_pass_inv_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decc_dfail_repl_comp_not_equal_back_fail_zero_pass_zero_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_zero_dfail_decw_comp_greater_or_equal_back_fail_decc_pass_decc_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decw_dfail_inv_comp_equal_back_fail_decc_pass_zero_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decc_dfail_keep_comp_not_equal_back_fail_decw_pass_decw_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_keep_dfail_inv_comp_less_or_equal_back_fail_repl_pass_decc_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_incc_dfail_inv_comp_always_back_fail_keep_pass_keep_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_repl_dfail_decc_comp_always_back_fail_wrap_pass_incc_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_inv_dfail_repl_comp_equal_back_fail_keep_pass_repl_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decw_dfail_repl_comp_not_equal_back_fail_zero_pass_inv_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_repl_dfail_inv_comp_greater_back_fail_decw_pass_decw_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_zero_dfail_keep_comp_not_equal_back_fail_repl_pass_repl_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_repl_dfail_incc_comp_less_back_fail_repl_pass_zero_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_keep_dfail_wrap_comp_never_back_fail_inv_pass_repl_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_wrap_dfail_incc_comp_greater_or_equal_back_fail_decw_pass_keep_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_inv_dfail_zero_comp_less_back_fail_repl_pass_wrap_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_wrap_dfail_keep_comp_less_or_equal_back_fail_decw_pass_inv_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_repl_dfail_wrap_comp_always_back_fail_repl_pass_wrap_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decc_dfail_inv_comp_always_back_fail_repl_pass_repl_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decc_dfail_wrap_comp_less_back_fail_incc_pass_decc_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_keep_dfail_keep_comp_equal_back_fail_inv_pass_decc_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decw_dfail_incc_comp_less_back_fail_keep_pass_keep_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_incc_dfail_inv_comp_less_or_equal_back_fail_inv_pass_decw_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_inv_dfail_repl_comp_never_back_fail_wrap_pass_incc_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_keep_dfail_repl_comp_never_back_fail_repl_pass_inv_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_repl_dfail_decc_comp_less_back_fail_keep_pass_keep_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_repl_dfail_incc_comp_less_or_equal_back_fail_decc_pass_repl_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_wrap_dfail_zero_comp_less_or_equal_back_fail_zero_pass_repl_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_keep_dfail_decc_comp_always_back_fail_decw_pass_wrap_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decc_dfail_decc_comp_less_or_equal_back_fail_incc_pass_keep_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_inv_dfail_wrap_comp_less_or_equal_back_fail_wrap_pass_decc_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_zero_dfail_wrap_comp_not_equal_back_fail_repl_pass_inv_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decw_dfail_incc_comp_not_equal_back_fail_decc_pass_zero_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decw_dfail_repl_comp_less_back_fail_wrap_pass_decw_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decc_dfail_keep_comp_greater_back_fail_incc_pass_decw_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decw_dfail_zero_comp_greater_or_equal_back_fail_decc_pass_decc_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_repl_dfail_wrap_comp_greater_back_fail_incc_pass_decw_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_zero_dfail_decc_comp_greater_back_fail_inv_pass_repl_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_wrap_dfail_decc_comp_greater_or_equal_back_fail_wrap_pass_zero_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_zero_dfail_keep_comp_less_back_fail_decc_pass_wrap_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_zero_dfail_incc_comp_greater_or_equal_back_fail_decw_pass_zero_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_inv_dfail_decw_comp_always_back_fail_decc_pass_zero_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_zero_dfail_decc_comp_greater_or_equal_back_fail_incc_pass_inv_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_wrap_dfail_inv_comp_greater_or_equal_back_fail_incc_pass_zero_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_incc_dfail_zero_comp_greater_back_fail_inv_pass_wrap_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_wrap_dfail_wrap_comp_never_back_fail_decc_pass_incc_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_wrap_dfail_wrap_comp_greater_or_equal_back_fail_incc_pass_wrap_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_wrap_dfail_incc_comp_equal_back_fail_wrap_pass_wrap_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_inv_dfail_decc_comp_less_or_equal_back_fail_decw_pass_wrap_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_keep_dfail_zero_comp_always_back_fail_decw_pass_inv_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_inv_dfail_wrap_comp_equal_back_fail_repl_pass_keep_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decw_dfail_inv_comp_less_back_fail_repl_pass_inv_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_keep_dfail_repl_comp_equal_back_fail_decc_pass_decw_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_inv_dfail_incc_comp_less_back_fail_repl_pass_keep_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_incc_dfail_repl_comp_always_back_fail_decc_pass_inv_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_inv_dfail_decw_comp_always_back_fail_zero_pass_incc_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_zero_dfail_wrap_comp_less_or_equal_back_fail_decw_pass_inv_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decw_dfail_wrap_comp_less_or_equal_back_fail_wrap_pass_zero_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_inv_dfail_zero_comp_greater_or_equal_back_fail_wrap_pass_decw_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_incc_dfail_wrap_comp_not_equal_back_fail_repl_pass_inv_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_keep_dfail_wrap_comp_equal_back_fail_decw_pass_incc_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_inv_dfail_wrap_comp_less_back_fail_keep_pass_keep_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_wrap_dfail_repl_comp_less_or_equal_back_fail_keep_pass_inv_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_wrap_dfail_repl_comp_less_or_equal_back_fail_inv_pass_wrap_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decw_dfail_zero_comp_greater_back_fail_wrap_pass_wrap_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_keep_dfail_decw_comp_not_equal_back_fail_incc_pass_decw_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_inv_dfail_decw_comp_always_back_fail_decc_pass_keep_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_zero_dfail_inv_comp_equal_back_fail_decc_pass_inv_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_zero_dfail_decw_comp_less_or_equal_back_fail_keep_pass_zero_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_incc_dfail_repl_comp_always_back_fail_decc_pass_zero_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_inv_dfail_zero_comp_equal_back_fail_inv_pass_incc_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_repl_dfail_incc_comp_greater_back_fail_decc_pass_inv_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decc_dfail_decc_comp_always_back_fail_wrap_pass_repl_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_wrap_dfail_keep_comp_less_back_fail_decc_pass_decc_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_zero_dfail_inv_comp_less_back_fail_wrap_pass_wrap_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decc_dfail_incc_comp_greater_back_fail_repl_pass_zero_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_repl_dfail_wrap_comp_greater_or_equal_back_fail_incc_pass_decc_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decc_dfail_decw_comp_always_back_fail_zero_pass_repl_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decc_dfail_zero_comp_less_or_equal_back_fail_keep_pass_decc_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_repl_dfail_repl_comp_greater_or_equal_back_fail_decw_pass_decc_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_wrap_dfail_decw_comp_not_equal_back_fail_wrap_pass_repl_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_keep_dfail_wrap_comp_never_back_fail_decw_pass_wrap_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_zero_dfail_decw_comp_always_back_fail_decc_pass_keep_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_incc_dfail_decc_comp_always_back_fail_inv_pass_zero_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_inv_dfail_decc_comp_always_back_fail_keep_pass_incc_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_incc_dfail_decw_comp_less_back_fail_inv_pass_inv_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_wrap_dfail_repl_comp_greater_or_equal_back_fail_inv_pass_incc_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_wrap_dfail_decw_comp_greater_back_fail_zero_pass_wrap_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_incc_dfail_incc_comp_greater_or_equal_back_fail_incc_pass_wrap_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decw_dfail_wrap_comp_less_back_fail_decc_pass_incc_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_keep_dfail_keep_comp_never_back_fail_keep_pass_decw_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_repl_dfail_incc_comp_always_back_fail_repl_pass_keep_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decw_dfail_wrap_comp_equal_back_fail_incc_pass_repl_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_inv_dfail_inv_comp_not_equal_back_fail_decw_pass_decw_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_inv_dfail_inv_comp_less_back_fail_decw_pass_inv_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decw_dfail_decc_comp_not_equal_back_fail_zero_pass_inv_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_inv_dfail_inv_comp_greater_or_equal_back_fail_decw_pass_decw_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decc_dfail_decc_comp_greater_back_fail_decw_pass_inv_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_wrap_dfail_decw_comp_greater_back_fail_keep_pass_decc_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decw_dfail_incc_comp_greater_back_fail_zero_pass_wrap_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decw_dfail_wrap_comp_greater_back_fail_inv_pass_decw_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_repl_dfail_decc_comp_not_equal_back_fail_decc_pass_decw_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_keep_dfail_decw_comp_less_or_equal_back_fail_zero_pass_repl_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_inv_dfail_zero_comp_less_back_fail_decc_pass_keep_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_zero_dfail_wrap_comp_always_back_fail_inv_pass_inv_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_incc_dfail_keep_comp_never_back_fail_decw_pass_zero_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_wrap_dfail_incc_comp_never_back_fail_wrap_pass_incc_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_zero_dfail_repl_comp_less_or_equal_back_fail_wrap_pass_wrap_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_wrap_dfail_keep_comp_greater_back_fail_decw_pass_zero_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decc_dfail_decc_comp_greater_back_fail_incc_pass_wrap_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_keep_dfail_zero_comp_not_equal_back_fail_wrap_pass_decc_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decc_dfail_decc_comp_greater_back_fail_keep_pass_keep_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_incc_dfail_decw_comp_greater_back_fail_inv_pass_decc_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decc_dfail_keep_comp_greater_back_fail_incc_pass_incc_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_keep_dfail_wrap_comp_not_equal_back_fail_decw_pass_decc_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decw_dfail_decc_comp_greater_back_fail_wrap_pass_keep_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_keep_dfail_decc_comp_less_back_fail_decw_pass_decw_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decw_dfail_decc_comp_less_back_fail_incc_pass_keep_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decc_dfail_keep_comp_always_back_fail_decc_pass_decw_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_keep_dfail_zero_comp_always_back_fail_repl_pass_decc_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_wrap_dfail_zero_comp_less_or_equal_back_fail_decc_pass_keep_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_inv_dfail_wrap_comp_greater_or_equal_back_fail_decc_pass_wrap_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_incc_dfail_repl_comp_not_equal_back_fail_decw_pass_inv_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decc_dfail_wrap_comp_never_back_fail_wrap_pass_incc_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_zero_dfail_decw_comp_never_back_fail_incc_pass_decc_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_wrap_dfail_keep_comp_never_back_fail_inv_pass_zero_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decw_dfail_decc_comp_never_back_fail_repl_pass_wrap_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_repl_dfail_repl_comp_not_equal_back_fail_wrap_pass_decw_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decc_dfail_decc_comp_equal_back_fail_keep_pass_repl_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_wrap_dfail_decw_comp_never_back_fail_decw_pass_decc_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_wrap_dfail_incc_comp_less_or_equal_back_fail_keep_pass_wrap_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decw_dfail_keep_comp_greater_or_equal_back_fail_inv_pass_wrap_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_repl_dfail_decw_comp_always_back_fail_repl_pass_decw_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_inv_dfail_repl_comp_less_back_fail_keep_pass_repl_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_wrap_dfail_keep_comp_always_back_fail_inv_pass_inv_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decw_dfail_incc_comp_always_back_fail_keep_pass_wrap_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_keep_dfail_decc_comp_less_or_equal_back_fail_repl_pass_decw_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_keep_dfail_zero_comp_greater_or_equal_back_fail_incc_pass_keep_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_wrap_dfail_wrap_comp_never_back_fail_wrap_pass_keep_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decc_dfail_repl_comp_not_equal_back_fail_zero_pass_wrap_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_keep_dfail_keep_comp_less_back_fail_repl_pass_decc_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_keep_dfail_decc_comp_greater_or_equal_back_fail_decc_pass_keep_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_inv_dfail_keep_comp_equal_back_fail_zero_pass_keep_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_zero_dfail_decc_comp_always_back_fail_zero_pass_inv_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_wrap_dfail_incc_comp_less_back_fail_decw_pass_zero_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_wrap_dfail_zero_comp_less_back_fail_incc_pass_wrap_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decc_dfail_decc_comp_less_or_equal_back_fail_wrap_pass_wrap_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_zero_dfail_decw_comp_equal_back_fail_zero_pass_decc_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_wrap_dfail_keep_comp_equal_back_fail_decc_pass_zero_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decc_dfail_decw_comp_less_or_equal_back_fail_inv_pass_wrap_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decw_dfail_repl_comp_greater_back_fail_decw_pass_decc_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_keep_dfail_inv_comp_greater_or_equal_back_fail_keep_pass_decw_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decw_dfail_incc_comp_always_back_fail_repl_pass_keep_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_zero_dfail_wrap_comp_always_back_fail_wrap_pass_decw_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_repl_dfail_zero_comp_equal_back_fail_decc_pass_zero_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_incc_dfail_decw_comp_never_back_fail_wrap_pass_repl_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_zero_dfail_decc_comp_greater_back_fail_inv_pass_incc_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_repl_dfail_decc_comp_always_back_fail_keep_pass_zero_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_incc_dfail_zero_comp_not_equal_back_fail_incc_pass_repl_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_wrap_dfail_repl_comp_less_back_fail_incc_pass_incc_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_zero_dfail_repl_comp_greater_back_fail_wrap_pass_wrap_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decw_dfail_wrap_comp_less_back_fail_decw_pass_zero_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decc_dfail_inv_comp_greater_back_fail_decc_pass_decw_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_keep_dfail_decc_comp_greater_or_equal_back_fail_wrap_pass_decc_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_repl_dfail_repl_comp_greater_back_fail_wrap_pass_keep_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_wrap_dfail_decw_comp_less_or_equal_back_fail_incc_pass_repl_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decw_dfail_decw_comp_always_back_fail_decw_pass_wrap_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_repl_dfail_incc_comp_equal_back_fail_inv_pass_decw_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_keep_dfail_decw_comp_greater_back_fail_inv_pass_repl_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_repl_dfail_zero_comp_never_back_fail_zero_pass_keep_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_wrap_dfail_keep_comp_less_back_fail_decw_pass_repl_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_inv_dfail_keep_comp_greater_back_fail_repl_pass_wrap_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_zero_dfail_repl_comp_equal_back_fail_decw_pass_inv_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decc_dfail_incc_comp_greater_back_fail_wrap_pass_zero_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_inv_dfail_decw_comp_greater_back_fail_decc_pass_decc_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_inv_dfail_wrap_comp_greater_back_fail_inv_pass_inv_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decc_dfail_wrap_comp_not_equal_back_fail_zero_pass_inv_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_wrap_dfail_zero_comp_not_equal_back_fail_keep_pass_decc_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_inv_dfail_decw_comp_not_equal_back_fail_decw_pass_wrap_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_inv_dfail_inv_comp_equal_back_fail_keep_pass_inv_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_incc_dfail_wrap_comp_equal_back_fail_keep_pass_inv_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_inv_dfail_incc_comp_always_back_fail_zero_pass_incc_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_repl_dfail_decc_comp_never_back_fail_zero_pass_inv_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_wrap_dfail_inv_comp_greater_or_equal_back_fail_inv_pass_repl_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_wrap_dfail_repl_comp_always_back_fail_incc_pass_wrap_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_repl_dfail_wrap_comp_greater_back_fail_decw_pass_wrap_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_repl_dfail_decw_comp_equal_back_fail_decc_pass_repl_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_keep_dfail_zero_comp_greater_or_equal_back_fail_zero_pass_repl_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decw_dfail_zero_comp_greater_back_fail_decw_pass_keep_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_zero_dfail_keep_comp_less_back_fail_keep_pass_decw_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_keep_dfail_decc_comp_greater_or_equal_back_fail_repl_pass_zero_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_keep_dfail_keep_comp_equal_back_fail_incc_pass_keep_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_zero_dfail_decw_comp_never_back_fail_zero_pass_keep_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_wrap_dfail_inv_comp_less_back_fail_repl_pass_zero_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decc_dfail_repl_comp_always_back_fail_keep_pass_wrap_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decc_dfail_inv_comp_less_back_fail_inv_pass_decc_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decw_dfail_decc_comp_always_back_fail_keep_pass_decc_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_incc_dfail_decc_comp_less_or_equal_back_fail_repl_pass_decw_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_inv_dfail_keep_comp_always_back_fail_decc_pass_incc_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_zero_dfail_decw_comp_greater_or_equal_back_fail_decc_pass_inv_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_zero_dfail_decw_comp_less_back_fail_decw_pass_zero_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_zero_dfail_wrap_comp_equal_back_fail_incc_pass_zero_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_inv_dfail_inv_comp_greater_or_equal_back_fail_keep_pass_zero_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decw_dfail_repl_comp_less_or_equal_back_fail_repl_pass_inv_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decc_dfail_wrap_comp_less_back_fail_zero_pass_decw_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_wrap_dfail_inv_comp_less_back_fail_zero_pass_decc_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_zero_dfail_wrap_comp_less_or_equal_back_fail_zero_pass_wrap_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_inv_dfail_decc_comp_never_back_fail_zero_pass_zero_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_zero_dfail_keep_comp_less_or_equal_back_fail_incc_pass_inv_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decc_dfail_keep_comp_always_back_fail_zero_pass_zero_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_zero_dfail_keep_comp_equal_back_fail_zero_pass_decc_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_incc_dfail_wrap_comp_less_or_equal_back_fail_repl_pass_zero_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_incc_dfail_decw_comp_equal_back_fail_decc_pass_incc_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_inv_dfail_keep_comp_never_back_fail_inv_pass_incc_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_incc_dfail_repl_comp_greater_back_fail_keep_pass_inv_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decc_dfail_inv_comp_greater_back_fail_incc_pass_incc_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_wrap_dfail_decw_comp_not_equal_back_fail_repl_pass_decc_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_keep_dfail_keep_comp_greater_or_equal_back_fail_incc_pass_wrap_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decw_dfail_decw_comp_never_back_fail_decw_pass_keep_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decc_dfail_zero_comp_less_back_fail_decw_pass_decw_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_repl_dfail_keep_comp_equal_back_fail_inv_pass_decc_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decw_dfail_inv_comp_not_equal_back_fail_wrap_pass_repl_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_zero_dfail_repl_comp_equal_back_fail_inv_pass_decw_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_keep_dfail_decw_comp_greater_or_equal_back_fail_inv_pass_zero_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decw_dfail_inv_comp_not_equal_back_fail_decc_pass_keep_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decc_dfail_decc_comp_equal_back_fail_keep_pass_decw_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decw_dfail_incc_comp_never_back_fail_wrap_pass_decc_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_inv_dfail_keep_comp_less_or_equal_back_fail_keep_pass_decw_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_repl_dfail_repl_comp_less_or_equal_back_fail_wrap_pass_inv_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_incc_dfail_repl_comp_greater_back_fail_wrap_pass_repl_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_inv_dfail_wrap_comp_equal_back_fail_wrap_pass_incc_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_wrap_dfail_repl_comp_less_back_fail_decw_pass_inv_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_incc_dfail_inv_comp_equal_back_fail_incc_pass_wrap_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decw_dfail_wrap_comp_greater_or_equal_back_fail_decc_pass_incc_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_inv_dfail_wrap_comp_greater_back_fail_keep_pass_decw_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_keep_dfail_decc_comp_less_back_fail_decc_pass_inv_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_inv_dfail_wrap_comp_equal_back_fail_repl_pass_keep_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_incc_dfail_keep_comp_greater_or_equal_back_fail_inv_pass_inv_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_wrap_dfail_keep_comp_always_back_fail_decw_pass_incc_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_inv_dfail_zero_comp_never_back_fail_zero_pass_wrap_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_keep_dfail_wrap_comp_greater_back_fail_zero_pass_inv_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_wrap_dfail_decw_comp_greater_or_equal_back_fail_repl_pass_keep_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_zero_dfail_inv_comp_greater_or_equal_back_fail_inv_pass_wrap_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_wrap_dfail_decc_comp_less_or_equal_back_fail_decc_pass_zero_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_keep_dfail_decw_comp_less_back_fail_incc_pass_wrap_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_inv_dfail_repl_comp_greater_or_equal_back_fail_zero_pass_keep_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decc_dfail_inv_comp_equal_back_fail_wrap_pass_inv_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_incc_dfail_wrap_comp_equal_back_fail_keep_pass_decc_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decw_dfail_decw_comp_greater_or_equal_back_fail_incc_pass_incc_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_wrap_dfail_incc_comp_not_equal_back_fail_keep_pass_decw_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_wrap_dfail_decc_comp_not_equal_back_fail_decc_pass_wrap_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decc_dfail_keep_comp_not_equal_back_fail_inv_pass_wrap_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_wrap_dfail_wrap_comp_always_back_fail_zero_pass_decc_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_zero_dfail_wrap_comp_less_or_equal_back_fail_inv_pass_wrap_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_keep_dfail_wrap_comp_less_or_equal_back_fail_decw_pass_zero_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_repl_dfail_zero_comp_greater_back_fail_wrap_pass_keep_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_wrap_dfail_incc_comp_greater_or_equal_back_fail_inv_pass_repl_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_inv_dfail_incc_comp_less_back_fail_incc_pass_wrap_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_incc_dfail_wrap_comp_less_back_fail_keep_pass_inv_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decw_dfail_decc_comp_greater_back_fail_zero_pass_incc_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_inv_dfail_keep_comp_greater_back_fail_repl_pass_decw_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_repl_dfail_decw_comp_less_back_fail_repl_pass_inv_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_keep_dfail_decc_comp_always_back_fail_inv_pass_repl_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_repl_dfail_zero_comp_less_or_equal_back_fail_decw_pass_keep_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_keep_dfail_keep_comp_less_or_equal_back_fail_wrap_pass_repl_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_inv_dfail_incc_comp_equal_back_fail_repl_pass_keep_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_repl_dfail_wrap_comp_equal_back_fail_wrap_pass_inv_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_wrap_dfail_zero_comp_less_or_equal_back_fail_keep_pass_repl_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decw_dfail_decc_comp_equal_back_fail_incc_pass_wrap_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decc_dfail_zero_comp_equal_back_fail_zero_pass_decw_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_zero_dfail_decc_comp_less_or_equal_back_fail_decw_pass_decc_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_inv_dfail_incc_comp_not_equal_back_fail_repl_pass_zero_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_wrap_dfail_decc_comp_always_back_fail_keep_pass_inv_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_repl_dfail_inv_comp_equal_back_fail_keep_pass_wrap_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_repl_dfail_wrap_comp_always_back_fail_inv_pass_repl_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decc_dfail_zero_comp_not_equal_back_fail_decc_pass_repl_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_incc_dfail_repl_comp_equal_back_fail_decw_pass_decc_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_repl_dfail_repl_comp_greater_or_equal_back_fail_inv_pass_incc_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decw_dfail_decw_comp_less_or_equal_back_fail_keep_pass_repl_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_repl_dfail_decw_comp_always_back_fail_incc_pass_decw_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_keep_dfail_repl_comp_greater_back_fail_incc_pass_repl_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_repl_dfail_wrap_comp_less_back_fail_keep_pass_keep_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decc_dfail_wrap_comp_not_equal_back_fail_inv_pass_repl_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_inv_dfail_wrap_comp_never_back_fail_repl_pass_decc_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_inv_dfail_keep_comp_less_back_fail_decw_pass_inv_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_keep_dfail_decw_comp_never_back_fail_wrap_pass_inv_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decc_dfail_decw_comp_greater_back_fail_decw_pass_keep_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_wrap_dfail_inv_comp_not_equal_back_fail_repl_pass_decc_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_wrap_dfail_decw_comp_less_back_fail_repl_pass_wrap_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_incc_dfail_inv_comp_greater_back_fail_wrap_pass_wrap_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_zero_dfail_repl_comp_less_or_equal_back_fail_repl_pass_incc_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_keep_dfail_wrap_comp_not_equal_back_fail_wrap_pass_zero_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_repl_dfail_inv_comp_less_back_fail_decc_pass_keep_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_zero_dfail_decc_comp_greater_back_fail_decc_pass_repl_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_inv_dfail_repl_comp_greater_or_equal_back_fail_repl_pass_zero_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decc_dfail_zero_comp_greater_back_fail_repl_pass_inv_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_wrap_dfail_zero_comp_never_back_fail_zero_pass_decc_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_repl_dfail_decc_comp_less_or_equal_back_fail_inv_pass_wrap_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decw_dfail_keep_comp_less_or_equal_back_fail_decc_pass_repl_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decc_dfail_wrap_comp_less_or_equal_back_fail_inv_pass_decw_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_keep_dfail_inv_comp_greater_or_equal_back_fail_inv_pass_decc_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_incc_dfail_wrap_comp_less_or_equal_back_fail_decc_pass_keep_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_zero_dfail_zero_comp_less_back_fail_wrap_pass_incc_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decc_dfail_inv_comp_not_equal_back_fail_keep_pass_zero_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_repl_dfail_repl_comp_always_back_fail_incc_pass_decc_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_zero_dfail_decc_comp_greater_or_equal_back_fail_inv_pass_repl_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decw_dfail_zero_comp_greater_or_equal_back_fail_zero_pass_zero_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decw_dfail_repl_comp_less_back_fail_wrap_pass_decw_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decw_dfail_incc_comp_greater_back_fail_repl_pass_decw_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_repl_dfail_wrap_comp_not_equal_back_fail_repl_pass_decw_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_keep_dfail_zero_comp_less_back_fail_decw_pass_repl_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decw_dfail_inv_comp_less_back_fail_wrap_pass_keep_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_inv_dfail_zero_comp_not_equal_back_fail_wrap_pass_decw_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_repl_dfail_wrap_comp_always_back_fail_wrap_pass_inv_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_wrap_dfail_repl_comp_less_back_fail_decw_pass_repl_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decc_dfail_wrap_comp_less_or_equal_back_fail_keep_pass_wrap_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decc_dfail_repl_comp_less_back_fail_wrap_pass_decc_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_inv_dfail_zero_comp_always_back_fail_wrap_pass_decc_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_inv_dfail_decc_comp_less_or_equal_back_fail_wrap_pass_inv_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decc_dfail_keep_comp_equal_back_fail_decc_pass_inv_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_incc_dfail_zero_comp_less_or_equal_back_fail_decw_pass_decc_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decc_dfail_repl_comp_never_back_fail_wrap_pass_incc_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_inv_dfail_inv_comp_greater_or_equal_back_fail_wrap_pass_decc_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_keep_dfail_decw_comp_never_back_fail_keep_pass_inv_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_repl_dfail_decw_comp_greater_or_equal_back_fail_incc_pass_keep_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_wrap_dfail_inv_comp_greater_back_fail_incc_pass_repl_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decc_dfail_keep_comp_equal_back_fail_zero_pass_wrap_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_wrap_dfail_incc_comp_not_equal_back_fail_incc_pass_decc_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_repl_dfail_decw_comp_equal_back_fail_keep_pass_wrap_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_wrap_dfail_wrap_comp_less_or_equal_back_fail_incc_pass_repl_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_repl_dfail_keep_comp_less_back_fail_zero_pass_wrap_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_inv_dfail_inv_comp_greater_or_equal_back_fail_repl_pass_repl_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_repl_dfail_zero_comp_not_equal_back_fail_inv_pass_inv_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_inv_dfail_zero_comp_less_back_fail_inv_pass_repl_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_incc_dfail_decw_comp_equal_back_fail_zero_pass_inv_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_wrap_dfail_inv_comp_less_or_equal_back_fail_decw_pass_incc_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_wrap_dfail_repl_comp_greater_or_equal_back_fail_repl_pass_wrap_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_incc_dfail_wrap_comp_greater_or_equal_back_fail_decw_pass_wrap_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_inv_dfail_inv_comp_less_back_fail_decc_pass_incc_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_wrap_dfail_decw_comp_not_equal_back_fail_incc_pass_inv_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_incc_dfail_zero_comp_equal_back_fail_decc_pass_wrap_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_zero_dfail_incc_comp_not_equal_back_fail_repl_pass_incc_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_wrap_dfail_zero_comp_greater_or_equal_back_fail_keep_pass_zero_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_inv_dfail_wrap_comp_not_equal_back_fail_inv_pass_wrap_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_incc_dfail_incc_comp_always_back_fail_wrap_pass_inv_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_zero_dfail_decc_comp_equal_back_fail_inv_pass_incc_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_zero_dfail_keep_comp_not_equal_back_fail_decc_pass_zero_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_repl_dfail_decw_comp_equal_back_fail_wrap_pass_zero_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_inv_dfail_decw_comp_always_back_fail_decc_pass_repl_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_inv_dfail_repl_comp_greater_back_fail_inv_pass_inv_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decw_dfail_zero_comp_less_back_fail_wrap_pass_inv_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_wrap_dfail_decw_comp_less_or_equal_back_fail_repl_pass_decw_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_incc_dfail_keep_comp_less_back_fail_decc_pass_wrap_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_inv_dfail_repl_comp_less_back_fail_incc_pass_incc_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decc_dfail_incc_comp_greater_or_equal_back_fail_decw_pass_inv_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_keep_dfail_repl_comp_less_or_equal_back_fail_incc_pass_decc_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decw_dfail_repl_comp_less_back_fail_repl_pass_keep_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_inv_dfail_keep_comp_always_back_fail_decw_pass_decw_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_zero_dfail_inv_comp_equal_back_fail_repl_pass_inv_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decw_dfail_zero_comp_not_equal_back_fail_zero_pass_zero_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_incc_dfail_wrap_comp_equal_back_fail_zero_pass_decw_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_zero_dfail_keep_comp_greater_or_equal_back_fail_inv_pass_incc_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_incc_dfail_repl_comp_equal_back_fail_inv_pass_zero_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_wrap_dfail_wrap_comp_greater_or_equal_back_fail_incc_pass_incc_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decc_dfail_incc_comp_greater_or_equal_back_fail_repl_pass_wrap_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_incc_dfail_wrap_comp_not_equal_back_fail_wrap_pass_decc_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_incc_dfail_incc_comp_always_back_fail_wrap_pass_incc_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_repl_dfail_wrap_comp_greater_back_fail_decw_pass_incc_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_repl_dfail_incc_comp_not_equal_back_fail_incc_pass_repl_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decc_dfail_keep_comp_less_back_fail_decc_pass_repl_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_repl_dfail_keep_comp_greater_or_equal_back_fail_wrap_pass_decc_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_inv_dfail_repl_comp_never_back_fail_incc_pass_repl_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_repl_dfail_inv_comp_less_back_fail_incc_pass_inv_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_incc_dfail_keep_comp_never_back_fail_decw_pass_repl_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decc_dfail_decc_comp_greater_back_fail_zero_pass_incc_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_repl_dfail_decc_comp_less_or_equal_back_fail_zero_pass_decc_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_repl_dfail_keep_comp_equal_back_fail_keep_pass_repl_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_keep_dfail_wrap_comp_always_back_fail_incc_pass_repl_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_repl_dfail_decc_comp_always_back_fail_wrap_pass_keep_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_wrap_dfail_repl_comp_greater_back_fail_decw_pass_repl_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_zero_dfail_inv_comp_less_or_equal_back_fail_repl_pass_wrap_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decc_dfail_incc_comp_not_equal_back_fail_keep_pass_zero_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_wrap_dfail_inv_comp_equal_back_fail_decw_pass_decc_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_zero_dfail_incc_comp_less_back_fail_keep_pass_wrap_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decw_dfail_repl_comp_greater_back_fail_incc_pass_zero_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_zero_dfail_repl_comp_greater_or_equal_back_fail_decw_pass_decw_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_zero_dfail_keep_comp_greater_or_equal_back_fail_zero_pass_zero_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_incc_dfail_inv_comp_never_back_fail_wrap_pass_zero_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_inv_dfail_decc_comp_not_equal_back_fail_decw_pass_incc_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_keep_dfail_decc_comp_greater_back_fail_decw_pass_inv_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decc_dfail_decw_comp_greater_back_fail_keep_pass_keep_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decw_dfail_decc_comp_greater_or_equal_back_fail_inv_pass_decc_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_keep_dfail_repl_comp_not_equal_back_fail_zero_pass_decw_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_wrap_dfail_incc_comp_less_back_fail_decw_pass_keep_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_keep_dfail_wrap_comp_not_equal_back_fail_wrap_pass_wrap_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decc_dfail_wrap_comp_never_back_fail_zero_pass_keep_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decc_dfail_keep_comp_not_equal_back_fail_decw_pass_decc_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_wrap_dfail_decw_comp_equal_back_fail_inv_pass_decc_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_zero_dfail_keep_comp_not_equal_back_fail_repl_pass_wrap_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_inv_dfail_decc_comp_equal_back_fail_decw_pass_zero_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decw_dfail_wrap_comp_always_back_fail_inv_pass_inv_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decw_dfail_keep_comp_less_or_equal_back_fail_repl_pass_decw_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_repl_dfail_inv_comp_equal_back_fail_decw_pass_decw_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_keep_dfail_decw_comp_always_back_fail_wrap_pass_repl_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_repl_dfail_incc_comp_equal_back_fail_decw_pass_keep_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_repl_dfail_repl_comp_greater_or_equal_back_fail_decc_pass_repl_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_repl_dfail_inv_comp_always_back_fail_inv_pass_repl_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_keep_dfail_zero_comp_less_or_equal_back_fail_incc_pass_repl_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_incc_dfail_zero_comp_greater_back_fail_keep_pass_keep_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_incc_dfail_decw_comp_always_back_fail_inv_pass_incc_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_keep_dfail_incc_comp_less_or_equal_back_fail_decw_pass_incc_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_wrap_dfail_inv_comp_less_or_equal_back_fail_decc_pass_keep_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_zero_dfail_repl_comp_less_back_fail_decw_pass_wrap_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decc_dfail_keep_comp_never_back_fail_inv_pass_zero_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_inv_dfail_zero_comp_greater_back_fail_wrap_pass_decc_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decc_dfail_repl_comp_greater_or_equal_back_fail_inv_pass_inv_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_inv_dfail_decw_comp_less_back_fail_keep_pass_decc_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_inv_dfail_inv_comp_not_equal_back_fail_decw_pass_inv_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_zero_dfail_zero_comp_less_back_fail_inv_pass_inv_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_zero_dfail_wrap_comp_not_equal_back_fail_repl_pass_zero_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_repl_dfail_inv_comp_equal_back_fail_zero_pass_zero_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_incc_dfail_decc_comp_never_back_fail_keep_pass_repl_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_repl_dfail_decc_comp_greater_back_fail_wrap_pass_incc_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decw_dfail_decc_comp_greater_or_equal_back_fail_decw_pass_repl_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_zero_dfail_repl_comp_equal_back_fail_inv_pass_decw_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_repl_dfail_inv_comp_never_back_fail_decc_pass_zero_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decc_dfail_incc_comp_equal_back_fail_incc_pass_repl_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_incc_dfail_incc_comp_greater_or_equal_back_fail_decc_pass_decc_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_inv_dfail_keep_comp_always_back_fail_incc_pass_incc_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_incc_dfail_incc_comp_less_back_fail_inv_pass_inv_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_repl_dfail_inv_comp_less_or_equal_back_fail_inv_pass_incc_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_inv_dfail_repl_comp_always_back_fail_zero_pass_repl_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_wrap_dfail_wrap_comp_greater_back_fail_incc_pass_inv_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_inv_dfail_zero_comp_less_or_equal_back_fail_incc_pass_wrap_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_wrap_dfail_inv_comp_greater_or_equal_back_fail_wrap_pass_inv_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_incc_dfail_decw_comp_less_back_fail_decc_pass_wrap_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_incc_dfail_decw_comp_equal_back_fail_wrap_pass_incc_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_keep_dfail_decw_comp_less_or_equal_back_fail_wrap_pass_incc_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_inv_dfail_repl_comp_greater_or_equal_back_fail_incc_pass_keep_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_zero_dfail_incc_comp_greater_or_equal_back_fail_keep_pass_inv_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_incc_dfail_wrap_comp_greater_back_fail_repl_pass_zero_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_repl_dfail_decc_comp_less_or_equal_back_fail_incc_pass_incc_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_repl_dfail_inv_comp_always_back_fail_incc_pass_repl_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_incc_dfail_inv_comp_less_back_fail_inv_pass_repl_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_repl_dfail_keep_comp_not_equal_back_fail_inv_pass_incc_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_repl_dfail_wrap_comp_never_back_fail_keep_pass_repl_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decw_dfail_keep_comp_never_back_fail_incc_pass_repl_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_zero_dfail_inv_comp_less_back_fail_incc_pass_decw_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_incc_dfail_inv_comp_less_or_equal_back_fail_decc_pass_zero_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_wrap_dfail_inv_comp_greater_back_fail_repl_pass_incc_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_repl_dfail_wrap_comp_equal_back_fail_repl_pass_wrap_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decc_dfail_decc_comp_always_back_fail_incc_pass_repl_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_incc_dfail_keep_comp_less_back_fail_inv_pass_decc_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_incc_dfail_decw_comp_not_equal_back_fail_decc_pass_incc_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_incc_dfail_wrap_comp_never_back_fail_decc_pass_incc_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_incc_dfail_decw_comp_greater_or_equal_back_fail_incc_pass_incc_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_keep_dfail_decw_comp_greater_back_fail_repl_pass_incc_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_incc_dfail_decc_comp_equal_back_fail_inv_pass_keep_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_wrap_dfail_keep_comp_not_equal_back_fail_zero_pass_incc_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_repl_dfail_keep_comp_equal_back_fail_repl_pass_wrap_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decw_dfail_keep_comp_never_back_fail_inv_pass_repl_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_keep_dfail_inv_comp_less_back_fail_decw_pass_decw_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_inv_dfail_repl_comp_less_or_equal_back_fail_decw_pass_keep_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decc_dfail_zero_comp_greater_or_equal_back_fail_decc_pass_inv_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_incc_dfail_inv_comp_not_equal_back_fail_repl_pass_decc_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_repl_dfail_incc_comp_greater_back_fail_repl_pass_incc_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_incc_dfail_decc_comp_greater_or_equal_back_fail_zero_pass_repl_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_wrap_dfail_inv_comp_always_back_fail_keep_pass_incc_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_incc_dfail_wrap_comp_greater_or_equal_back_fail_wrap_pass_wrap_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decc_dfail_incc_comp_always_back_fail_repl_pass_incc_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decc_dfail_zero_comp_less_back_fail_inv_pass_decc_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decc_dfail_wrap_comp_always_back_fail_decc_pass_decc_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_zero_dfail_incc_comp_never_back_fail_keep_pass_decc_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_repl_dfail_incc_comp_equal_back_fail_keep_pass_zero_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_inv_dfail_decc_comp_equal_back_fail_keep_pass_repl_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_zero_dfail_incc_comp_never_back_fail_decc_pass_inv_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_wrap_dfail_decc_comp_never_back_fail_decw_pass_zero_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_inv_dfail_wrap_comp_never_back_fail_decw_pass_wrap_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decc_dfail_zero_comp_not_equal_back_fail_repl_pass_inv_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_wrap_dfail_decc_comp_greater_back_fail_zero_pass_decc_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_repl_dfail_wrap_comp_less_back_fail_decc_pass_wrap_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_wrap_dfail_repl_comp_greater_back_fail_repl_pass_repl_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decw_dfail_incc_comp_always_back_fail_zero_pass_wrap_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_repl_dfail_repl_comp_greater_or_equal_back_fail_incc_pass_decw_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_repl_dfail_repl_comp_greater_back_fail_decc_pass_repl_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_incc_dfail_repl_comp_less_or_equal_back_fail_inv_pass_repl_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_keep_dfail_wrap_comp_always_back_fail_keep_pass_incc_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decc_dfail_decw_comp_greater_or_equal_back_fail_zero_pass_keep_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decw_dfail_keep_comp_greater_back_fail_repl_pass_decc_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decc_dfail_zero_comp_equal_back_fail_incc_pass_decw_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_zero_dfail_repl_comp_equal_back_fail_inv_pass_decc_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_repl_dfail_wrap_comp_greater_back_fail_repl_pass_zero_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decc_dfail_keep_comp_less_or_equal_back_fail_zero_pass_repl_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_repl_dfail_incc_comp_less_back_fail_repl_pass_decc_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_incc_dfail_decc_comp_less_back_fail_decc_pass_repl_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_incc_dfail_inv_comp_less_or_equal_back_fail_incc_pass_incc_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_incc_dfail_decc_comp_always_back_fail_zero_pass_incc_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_wrap_dfail_zero_comp_never_back_fail_decw_pass_incc_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decc_dfail_inv_comp_not_equal_back_fail_decc_pass_wrap_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_zero_dfail_inv_comp_less_back_fail_zero_pass_decc_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_wrap_dfail_keep_comp_greater_or_equal_back_fail_wrap_pass_zero_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_inv_dfail_keep_comp_less_or_equal_back_fail_decc_pass_wrap_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_wrap_dfail_keep_comp_never_back_fail_decc_pass_inv_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decc_dfail_wrap_comp_not_equal_back_fail_decc_pass_wrap_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decc_dfail_wrap_comp_always_back_fail_inv_pass_decc_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_repl_dfail_decw_comp_not_equal_back_fail_decc_pass_decc_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_incc_dfail_decc_comp_less_back_fail_decw_pass_repl_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_incc_dfail_repl_comp_never_back_fail_wrap_pass_incc_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decc_dfail_keep_comp_equal_back_fail_incc_pass_incc_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_wrap_dfail_decc_comp_greater_back_fail_zero_pass_decc_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_zero_dfail_inv_comp_less_or_equal_back_fail_incc_pass_wrap_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decw_dfail_incc_comp_greater_back_fail_zero_pass_zero_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_zero_dfail_incc_comp_less_back_fail_zero_pass_decw_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_keep_dfail_decc_comp_equal_back_fail_decc_pass_zero_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_keep_dfail_repl_comp_not_equal_back_fail_decc_pass_keep_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_repl_dfail_incc_comp_never_back_fail_incc_pass_keep_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decw_dfail_wrap_comp_always_back_fail_repl_pass_repl_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_repl_dfail_decw_comp_never_back_fail_decc_pass_decw_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_zero_dfail_zero_comp_not_equal_back_fail_decc_pass_repl_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decc_dfail_zero_comp_greater_back_fail_wrap_pass_zero_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_inv_dfail_inv_comp_always_back_fail_wrap_pass_decc_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decw_dfail_inv_comp_never_back_fail_decw_pass_inv_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_repl_dfail_decc_comp_greater_or_equal_back_fail_zero_pass_decw_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_keep_dfail_repl_comp_always_back_fail_decc_pass_repl_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_repl_dfail_inv_comp_greater_or_equal_back_fail_decc_pass_keep_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_incc_dfail_decw_comp_less_back_fail_inv_pass_repl_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_incc_dfail_wrap_comp_not_equal_back_fail_incc_pass_incc_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_incc_dfail_wrap_comp_not_equal_back_fail_repl_pass_incc_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_incc_dfail_wrap_comp_greater_or_equal_back_fail_incc_pass_incc_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_keep_dfail_inv_comp_always_back_fail_zero_pass_incc_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decw_dfail_decw_comp_equal_back_fail_decw_pass_keep_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_keep_dfail_zero_comp_equal_back_fail_repl_pass_decw_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decc_dfail_keep_comp_equal_back_fail_zero_pass_keep_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_zero_dfail_incc_comp_equal_back_fail_wrap_pass_decc_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decc_dfail_inv_comp_less_or_equal_back_fail_incc_pass_zero_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decc_dfail_keep_comp_greater_back_fail_keep_pass_decc_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_repl_dfail_decc_comp_never_back_fail_repl_pass_decc_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decw_dfail_keep_comp_less_back_fail_zero_pass_repl_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_wrap_dfail_incc_comp_less_or_equal_back_fail_decc_pass_decw_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_zero_dfail_keep_comp_greater_back_fail_repl_pass_wrap_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decc_dfail_decw_comp_greater_or_equal_back_fail_repl_pass_zero_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_inv_dfail_inv_comp_always_back_fail_incc_pass_decc_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_wrap_dfail_repl_comp_greater_or_equal_back_fail_repl_pass_inv_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_wrap_dfail_decw_comp_greater_or_equal_back_fail_keep_pass_wrap_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decc_dfail_wrap_comp_never_back_fail_incc_pass_wrap_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_wrap_dfail_zero_comp_equal_back_fail_decc_pass_decc_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_zero_dfail_decw_comp_equal_back_fail_inv_pass_wrap_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_incc_dfail_wrap_comp_less_or_equal_back_fail_decw_pass_zero_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decw_dfail_repl_comp_not_equal_back_fail_keep_pass_incc_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_incc_dfail_keep_comp_never_back_fail_inv_pass_decw_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_zero_dfail_incc_comp_less_or_equal_back_fail_keep_pass_incc_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_wrap_dfail_keep_comp_greater_back_fail_inv_pass_zero_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_wrap_dfail_decw_comp_never_back_fail_wrap_pass_wrap_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_zero_dfail_repl_comp_greater_or_equal_back_fail_decw_pass_wrap_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_wrap_dfail_inv_comp_always_back_fail_keep_pass_zero_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_zero_dfail_incc_comp_equal_back_fail_zero_pass_wrap_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_repl_dfail_incc_comp_less_or_equal_back_fail_keep_pass_zero_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decw_dfail_inv_comp_equal_back_fail_wrap_pass_repl_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_inv_dfail_wrap_comp_greater_or_equal_back_fail_incc_pass_decw_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_wrap_dfail_incc_comp_less_or_equal_back_fail_zero_pass_inv_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_keep_dfail_inv_comp_not_equal_back_fail_keep_pass_wrap_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_zero_dfail_decw_comp_greater_back_fail_keep_pass_keep_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_inv_dfail_zero_comp_less_or_equal_back_fail_wrap_pass_zero_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_zero_dfail_keep_comp_less_or_equal_back_fail_inv_pass_inv_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decw_dfail_incc_comp_greater_back_fail_decw_pass_zero_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_incc_dfail_decc_comp_never_back_fail_wrap_pass_decw_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_incc_dfail_keep_comp_not_equal_back_fail_repl_pass_incc_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_wrap_dfail_incc_comp_equal_back_fail_inv_pass_incc_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_zero_dfail_incc_comp_always_back_fail_inv_pass_wrap_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_inv_dfail_decw_comp_less_back_fail_decc_pass_zero_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_inv_dfail_decc_comp_less_back_fail_inv_pass_inv_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_wrap_dfail_keep_comp_greater_back_fail_zero_pass_inv_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decc_dfail_keep_comp_greater_or_equal_back_fail_keep_pass_wrap_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_inv_dfail_decw_comp_greater_back_fail_zero_pass_decc_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_keep_dfail_repl_comp_less_back_fail_decc_pass_inv_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_keep_dfail_decc_comp_greater_or_equal_back_fail_decc_pass_keep_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_inv_dfail_incc_comp_never_back_fail_keep_pass_keep_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_repl_dfail_decc_comp_greater_back_fail_inv_pass_inv_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decc_dfail_incc_comp_less_or_equal_back_fail_wrap_pass_repl_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decw_dfail_repl_comp_always_back_fail_incc_pass_decc_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_keep_dfail_decc_comp_always_back_fail_decc_pass_decw_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_keep_dfail_repl_comp_greater_or_equal_back_fail_wrap_pass_keep_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_inv_dfail_keep_comp_less_or_equal_back_fail_zero_pass_keep_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_repl_dfail_decw_comp_not_equal_back_fail_zero_pass_inv_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decc_dfail_decw_comp_equal_back_fail_incc_pass_repl_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_inv_dfail_decc_comp_greater_back_fail_repl_pass_decc_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_zero_dfail_incc_comp_always_back_fail_inv_pass_inv_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_inv_dfail_decw_comp_less_back_fail_keep_pass_zero_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_incc_dfail_zero_comp_not_equal_back_fail_incc_pass_inv_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decw_dfail_repl_comp_less_or_equal_back_fail_decc_pass_incc_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_wrap_dfail_wrap_comp_greater_back_fail_repl_pass_decw_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_inv_dfail_inv_comp_not_equal_back_fail_wrap_pass_wrap_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_keep_dfail_keep_comp_greater_back_fail_repl_pass_inv_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_wrap_dfail_decc_comp_equal_back_fail_keep_pass_keep_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_incc_dfail_keep_comp_not_equal_back_fail_repl_pass_wrap_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_keep_dfail_inv_comp_less_or_equal_back_fail_zero_pass_incc_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_incc_dfail_incc_comp_greater_or_equal_back_fail_zero_pass_keep_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decc_dfail_decw_comp_not_equal_back_fail_keep_pass_incc_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_keep_dfail_keep_comp_greater_back_fail_inv_pass_decc_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_incc_dfail_decc_comp_not_equal_back_fail_wrap_pass_keep_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_incc_dfail_inv_comp_greater_back_fail_decw_pass_incc_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decc_dfail_wrap_comp_greater_or_equal_back_fail_decc_pass_incc_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_keep_dfail_keep_comp_never_back_fail_repl_pass_decc_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_inv_dfail_repl_comp_greater_or_equal_back_fail_zero_pass_keep_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_zero_dfail_decw_comp_never_back_fail_inv_pass_inv_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decc_dfail_keep_comp_greater_or_equal_back_fail_wrap_pass_zero_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_keep_dfail_incc_comp_greater_back_fail_inv_pass_decc_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_wrap_dfail_incc_comp_less_back_fail_decc_pass_keep_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_keep_dfail_decw_comp_not_equal_back_fail_zero_pass_wrap_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_zero_dfail_wrap_comp_never_back_fail_wrap_pass_keep_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_incc_dfail_keep_comp_not_equal_back_fail_zero_pass_zero_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_repl_dfail_zero_comp_never_back_fail_decw_pass_incc_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_keep_dfail_zero_comp_always_back_fail_wrap_pass_repl_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_zero_dfail_inv_comp_greater_or_equal_back_fail_incc_pass_keep_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_repl_dfail_zero_comp_not_equal_back_fail_inv_pass_zero_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_zero_dfail_inv_comp_less_or_equal_back_fail_incc_pass_repl_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_repl_dfail_wrap_comp_not_equal_back_fail_wrap_pass_zero_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decc_dfail_decw_comp_less_back_fail_keep_pass_repl_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_incc_dfail_zero_comp_never_back_fail_keep_pass_decc_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decc_dfail_wrap_comp_less_or_equal_back_fail_decc_pass_incc_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_inv_dfail_repl_comp_less_or_equal_back_fail_decc_pass_decc_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decw_dfail_inv_comp_greater_or_equal_back_fail_inv_pass_inv_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_repl_dfail_zero_comp_greater_or_equal_back_fail_incc_pass_decw_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decc_dfail_zero_comp_always_back_fail_keep_pass_repl_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decc_dfail_zero_comp_equal_back_fail_keep_pass_decc_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_wrap_dfail_keep_comp_equal_back_fail_wrap_pass_decc_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_repl_dfail_inv_comp_less_back_fail_repl_pass_wrap_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_incc_dfail_incc_comp_less_or_equal_back_fail_zero_pass_repl_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_incc_dfail_repl_comp_not_equal_back_fail_decc_pass_incc_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_inv_dfail_decc_comp_greater_or_equal_back_fail_decw_pass_incc_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_repl_dfail_zero_comp_less_or_equal_back_fail_inv_pass_inv_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decw_dfail_keep_comp_less_or_equal_back_fail_decw_pass_repl_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_wrap_dfail_incc_comp_equal_back_fail_wrap_pass_decw_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_inv_dfail_incc_comp_equal_back_fail_repl_pass_wrap_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_incc_dfail_decc_comp_greater_or_equal_back_fail_keep_pass_inv_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_inv_dfail_inv_comp_less_or_equal_back_fail_zero_pass_incc_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decw_dfail_decw_comp_not_equal_back_fail_keep_pass_inv_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_inv_dfail_repl_comp_less_back_fail_decc_pass_decw_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_incc_dfail_zero_comp_less_or_equal_back_fail_keep_pass_inv_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_repl_dfail_keep_comp_less_or_equal_back_fail_keep_pass_incc_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decc_dfail_wrap_comp_equal_back_fail_zero_pass_repl_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_incc_dfail_decw_comp_always_back_fail_wrap_pass_decc_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_incc_dfail_wrap_comp_greater_or_equal_back_fail_zero_pass_incc_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_repl_dfail_inv_comp_never_back_fail_decw_pass_incc_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_zero_dfail_wrap_comp_less_back_fail_zero_pass_repl_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_inv_dfail_inv_comp_not_equal_back_fail_inv_pass_zero_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_incc_dfail_decc_comp_less_or_equal_back_fail_wrap_pass_inv_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_keep_dfail_keep_comp_equal_back_fail_incc_pass_incc_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_zero_dfail_repl_comp_not_equal_back_fail_inv_pass_keep_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_keep_dfail_incc_comp_less_or_equal_back_fail_incc_pass_zero_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_zero_dfail_wrap_comp_equal_back_fail_repl_pass_keep_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_inv_dfail_inv_comp_always_back_fail_incc_pass_zero_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_keep_dfail_zero_comp_less_or_equal_back_fail_decc_pass_inv_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_repl_dfail_inv_comp_less_back_fail_incc_pass_keep_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_keep_dfail_decc_comp_greater_back_fail_inv_pass_repl_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decw_dfail_keep_comp_greater_or_equal_back_fail_repl_pass_keep_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_keep_dfail_decw_comp_always_back_fail_decc_pass_decw_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_zero_dfail_decc_comp_less_back_fail_zero_pass_keep_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_zero_dfail_decc_comp_not_equal_back_fail_inv_pass_zero_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_incc_dfail_incc_comp_equal_back_fail_keep_pass_zero_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_inv_dfail_decc_comp_less_back_fail_incc_pass_incc_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_repl_dfail_keep_comp_always_back_fail_repl_pass_inv_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_inv_dfail_zero_comp_not_equal_back_fail_inv_pass_repl_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_inv_dfail_decw_comp_greater_back_fail_decc_pass_inv_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_inv_dfail_keep_comp_less_or_equal_back_fail_decw_pass_inv_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decc_dfail_inv_comp_equal_back_fail_inv_pass_inv_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_zero_dfail_decc_comp_never_back_fail_wrap_pass_decc_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_keep_dfail_zero_comp_equal_back_fail_zero_pass_zero_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decw_dfail_repl_comp_equal_back_fail_inv_pass_keep_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decw_dfail_keep_comp_not_equal_back_fail_decw_pass_decw_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_incc_dfail_wrap_comp_greater_or_equal_back_fail_decw_pass_decw_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_keep_dfail_decc_comp_equal_back_fail_inv_pass_incc_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_zero_dfail_decc_comp_not_equal_back_fail_repl_pass_keep_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decc_dfail_wrap_comp_never_back_fail_repl_pass_zero_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_wrap_dfail_incc_comp_equal_back_fail_keep_pass_decc_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_keep_dfail_inv_comp_less_or_equal_back_fail_incc_pass_wrap_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_inv_dfail_decc_comp_less_back_fail_decw_pass_keep_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_incc_dfail_keep_comp_equal_back_fail_decc_pass_inv_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_keep_dfail_zero_comp_never_back_fail_decw_pass_incc_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_zero_dfail_zero_comp_equal_back_fail_zero_pass_keep_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_keep_dfail_wrap_comp_always_back_fail_incc_pass_zero_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_keep_dfail_zero_comp_equal_back_fail_keep_pass_keep_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_keep_dfail_incc_comp_less_back_fail_wrap_pass_keep_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_inv_dfail_decc_comp_always_back_fail_decw_pass_keep_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_keep_dfail_decw_comp_greater_or_equal_back_fail_zero_pass_inv_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decc_dfail_decw_comp_never_back_fail_incc_pass_keep_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_keep_dfail_incc_comp_not_equal_back_fail_keep_pass_decc_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_inv_dfail_zero_comp_equal_back_fail_wrap_pass_keep_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_wrap_dfail_repl_comp_not_equal_back_fail_repl_pass_inv_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decw_dfail_inv_comp_less_or_equal_back_fail_incc_pass_wrap_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_zero_dfail_keep_comp_greater_back_fail_zero_pass_decw_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_zero_dfail_wrap_comp_less_or_equal_back_fail_keep_pass_zero_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decc_dfail_incc_comp_less_back_fail_repl_pass_zero_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_incc_dfail_repl_comp_less_or_equal_back_fail_zero_pass_decc_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_zero_dfail_decw_comp_never_back_fail_decw_pass_incc_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decc_dfail_decw_comp_less_or_equal_back_fail_incc_pass_zero_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_wrap_dfail_decw_comp_always_back_fail_repl_pass_decc_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decw_dfail_zero_comp_less_or_equal_back_fail_decw_pass_wrap_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_wrap_dfail_decc_comp_less_or_equal_back_fail_repl_pass_decw_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_wrap_dfail_repl_comp_not_equal_back_fail_keep_pass_wrap_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_wrap_dfail_repl_comp_less_back_fail_zero_pass_wrap_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decc_dfail_repl_comp_greater_back_fail_inv_pass_wrap_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_zero_dfail_repl_comp_always_back_fail_decw_pass_decc_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_repl_dfail_zero_comp_greater_back_fail_decc_pass_zero_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_zero_dfail_repl_comp_equal_back_fail_repl_pass_repl_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_wrap_dfail_repl_comp_always_back_fail_keep_pass_zero_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decw_dfail_inv_comp_less_back_fail_repl_pass_wrap_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decw_dfail_repl_comp_always_back_fail_zero_pass_decw_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_keep_dfail_zero_comp_greater_back_fail_decw_pass_decw_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_repl_dfail_incc_comp_always_back_fail_decw_pass_keep_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_incc_dfail_keep_comp_equal_back_fail_zero_pass_repl_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_inv_dfail_decw_comp_less_or_equal_back_fail_inv_pass_incc_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_keep_dfail_decc_comp_less_or_equal_back_fail_repl_pass_inv_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_incc_dfail_inv_comp_equal_back_fail_keep_pass_keep_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_keep_dfail_wrap_comp_less_back_fail_decw_pass_incc_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decw_dfail_decc_comp_greater_or_equal_back_fail_keep_pass_keep_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_zero_dfail_wrap_comp_equal_back_fail_incc_pass_decw_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_inv_dfail_decw_comp_greater_or_equal_back_fail_inv_pass_zero_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_inv_dfail_decw_comp_never_back_fail_keep_pass_inv_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decw_dfail_inv_comp_less_back_fail_repl_pass_inv_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_zero_dfail_inv_comp_greater_or_equal_back_fail_inv_pass_decw_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_zero_dfail_zero_comp_greater_back_fail_keep_pass_zero_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_zero_dfail_decw_comp_greater_or_equal_back_fail_zero_pass_zero_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_zero_dfail_decc_comp_greater_back_fail_inv_pass_zero_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_inv_dfail_inv_comp_less_back_fail_decc_pass_zero_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_wrap_dfail_decc_comp_greater_back_fail_keep_pass_inv_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_zero_dfail_keep_comp_equal_back_fail_decw_pass_wrap_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_keep_dfail_wrap_comp_equal_back_fail_incc_pass_zero_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_zero_dfail_keep_comp_less_or_equal_back_fail_decc_pass_keep_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decw_dfail_keep_comp_equal_back_fail_wrap_pass_zero_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_repl_dfail_wrap_comp_not_equal_back_fail_inv_pass_decw_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_inv_dfail_incc_comp_less_back_fail_inv_pass_repl_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_repl_dfail_wrap_comp_not_equal_back_fail_wrap_pass_inv_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_inv_dfail_zero_comp_less_back_fail_zero_pass_repl_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decw_dfail_inv_comp_greater_back_fail_incc_pass_inv_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_keep_dfail_incc_comp_never_back_fail_incc_pass_decw_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_zero_dfail_decc_comp_greater_or_equal_back_fail_repl_pass_keep_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decw_dfail_decc_comp_not_equal_back_fail_decw_pass_zero_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_repl_dfail_inv_comp_always_back_fail_incc_pass_decw_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_zero_dfail_repl_comp_greater_back_fail_wrap_pass_repl_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decc_dfail_repl_comp_greater_or_equal_back_fail_repl_pass_zero_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_zero_dfail_zero_comp_greater_or_equal_back_fail_wrap_pass_decc_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_zero_dfail_keep_comp_always_back_fail_repl_pass_zero_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_inv_dfail_decc_comp_greater_or_equal_back_fail_decw_pass_zero_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_wrap_dfail_repl_comp_greater_back_fail_wrap_pass_inv_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_inv_dfail_keep_comp_equal_back_fail_incc_pass_wrap_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_wrap_dfail_inv_comp_less_back_fail_keep_pass_inv_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decc_dfail_decc_comp_not_equal_back_fail_inv_pass_wrap_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_inv_dfail_decw_comp_less_or_equal_back_fail_inv_pass_decc_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decc_dfail_decc_comp_never_back_fail_decc_pass_inv_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_zero_dfail_inv_comp_not_equal_back_fail_wrap_pass_decc_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_wrap_dfail_decc_comp_not_equal_back_fail_decc_pass_zero_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decc_dfail_wrap_comp_less_back_fail_repl_pass_wrap_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_wrap_dfail_zero_comp_greater_back_fail_repl_pass_decc_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_wrap_dfail_wrap_comp_equal_back_fail_repl_pass_wrap_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_repl_dfail_inv_comp_always_back_fail_decc_pass_wrap_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decw_dfail_wrap_comp_less_back_fail_decw_pass_repl_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decw_dfail_keep_comp_greater_back_fail_zero_pass_decw_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decw_dfail_incc_comp_equal_back_fail_repl_pass_decw_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_zero_dfail_decc_comp_never_back_fail_repl_pass_decw_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_keep_dfail_zero_comp_never_back_fail_inv_pass_zero_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_incc_dfail_keep_comp_less_back_fail_decw_pass_keep_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_incc_dfail_zero_comp_not_equal_back_fail_keep_pass_incc_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_inv_dfail_decc_comp_greater_or_equal_back_fail_decw_pass_incc_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_wrap_dfail_zero_comp_always_back_fail_keep_pass_inv_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_keep_dfail_keep_comp_less_back_fail_decc_pass_wrap_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_zero_dfail_wrap_comp_equal_back_fail_wrap_pass_keep_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_keep_dfail_inv_comp_always_back_fail_repl_pass_zero_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_repl_dfail_zero_comp_less_back_fail_repl_pass_keep_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decw_dfail_zero_comp_never_back_fail_repl_pass_repl_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_inv_dfail_incc_comp_never_back_fail_incc_pass_decw_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decw_dfail_keep_comp_greater_or_equal_back_fail_keep_pass_inv_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_wrap_dfail_decw_comp_less_or_equal_back_fail_incc_pass_decw_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decc_dfail_decw_comp_not_equal_back_fail_wrap_pass_wrap_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_keep_dfail_repl_comp_not_equal_back_fail_decc_pass_decc_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_keep_dfail_zero_comp_always_back_fail_wrap_pass_keep_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_wrap_dfail_zero_comp_equal_back_fail_decw_pass_keep_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_inv_dfail_wrap_comp_equal_back_fail_keep_pass_wrap_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_keep_dfail_zero_comp_greater_back_fail_keep_pass_inv_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_keep_dfail_decc_comp_greater_back_fail_keep_pass_keep_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_repl_dfail_repl_comp_always_back_fail_decw_pass_keep_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_wrap_dfail_decw_comp_less_back_fail_keep_pass_repl_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_zero_dfail_keep_comp_always_back_fail_decc_pass_wrap_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_inv_dfail_keep_comp_less_back_fail_zero_pass_zero_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_wrap_dfail_repl_comp_never_back_fail_zero_pass_inv_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decc_dfail_decc_comp_always_back_fail_keep_pass_wrap_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_incc_dfail_zero_comp_less_back_fail_decw_pass_decc_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_incc_dfail_zero_comp_never_back_fail_incc_pass_incc_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_zero_dfail_wrap_comp_never_back_fail_incc_pass_incc_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decw_dfail_repl_comp_never_back_fail_decw_pass_zero_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_zero_dfail_keep_comp_always_back_fail_incc_pass_decw_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_incc_dfail_repl_comp_less_or_equal_back_fail_decc_pass_zero_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_keep_dfail_inv_comp_greater_or_equal_back_fail_wrap_pass_incc_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_wrap_dfail_incc_comp_always_back_fail_wrap_pass_keep_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decc_dfail_decc_comp_less_or_equal_back_fail_decw_pass_wrap_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_wrap_dfail_decw_comp_always_back_fail_inv_pass_decc_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decw_dfail_keep_comp_always_back_fail_inv_pass_wrap_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_repl_dfail_keep_comp_never_back_fail_zero_pass_decw_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decc_dfail_repl_comp_greater_back_fail_repl_pass_repl_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_zero_dfail_zero_comp_greater_back_fail_keep_pass_decc_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_inv_dfail_keep_comp_equal_back_fail_decc_pass_zero_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_inv_dfail_repl_comp_equal_back_fail_inv_pass_inv_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decc_dfail_decw_comp_less_or_equal_back_fail_decc_pass_inv_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_wrap_dfail_decw_comp_equal_back_fail_decc_pass_decc_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_zero_dfail_incc_comp_always_back_fail_keep_pass_wrap_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_keep_dfail_zero_comp_less_back_fail_zero_pass_zero_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_zero_dfail_decc_comp_equal_back_fail_decc_pass_keep_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_inv_dfail_decc_comp_greater_back_fail_keep_pass_zero_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decw_dfail_zero_comp_equal_back_fail_keep_pass_inv_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_keep_dfail_inv_comp_less_back_fail_inv_pass_decw_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decw_dfail_wrap_comp_greater_back_fail_keep_pass_keep_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_keep_dfail_incc_comp_equal_back_fail_repl_pass_decw_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_repl_dfail_keep_comp_greater_or_equal_back_fail_zero_pass_keep_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_zero_dfail_wrap_comp_never_back_fail_keep_pass_repl_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_incc_dfail_zero_comp_always_back_fail_inv_pass_zero_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_wrap_dfail_keep_comp_greater_or_equal_back_fail_inv_pass_incc_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decc_dfail_zero_comp_never_back_fail_wrap_pass_wrap_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_incc_dfail_zero_comp_greater_or_equal_back_fail_wrap_pass_decc_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_wrap_dfail_keep_comp_less_back_fail_zero_pass_incc_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_inv_dfail_keep_comp_not_equal_back_fail_decw_pass_wrap_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decc_dfail_incc_comp_greater_or_equal_back_fail_zero_pass_inv_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decc_dfail_decw_comp_not_equal_back_fail_keep_pass_decc_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_inv_dfail_incc_comp_greater_or_equal_back_fail_wrap_pass_decc_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decc_dfail_decw_comp_not_equal_back_fail_inv_pass_inv_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decw_dfail_incc_comp_greater_back_fail_repl_pass_decc_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_incc_dfail_inv_comp_less_back_fail_keep_pass_decw_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_wrap_dfail_zero_comp_less_back_fail_zero_pass_incc_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_inv_dfail_zero_comp_less_or_equal_back_fail_repl_pass_wrap_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_zero_dfail_decw_comp_not_equal_back_fail_decw_pass_inv_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decc_dfail_wrap_comp_greater_or_equal_back_fail_incc_pass_zero_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_zero_dfail_decw_comp_always_back_fail_zero_pass_decc_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_inv_dfail_keep_comp_less_back_fail_decc_pass_zero_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_inv_dfail_decc_comp_not_equal_back_fail_keep_pass_inv_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decc_dfail_repl_comp_less_or_equal_back_fail_inv_pass_inv_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_keep_dfail_inv_comp_always_back_fail_keep_pass_decc_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decc_dfail_inv_comp_never_back_fail_incc_pass_keep_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_incc_dfail_repl_comp_equal_back_fail_inv_pass_decc_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_zero_dfail_inv_comp_always_back_fail_decw_pass_incc_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_wrap_dfail_zero_comp_less_or_equal_back_fail_incc_pass_zero_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_repl_dfail_incc_comp_less_back_fail_repl_pass_wrap_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_inv_dfail_decw_comp_less_back_fail_repl_pass_repl_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_keep_dfail_keep_comp_less_or_equal_back_fail_zero_pass_inv_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_wrap_dfail_incc_comp_greater_back_fail_zero_pass_keep_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decw_dfail_decw_comp_less_or_equal_back_fail_zero_pass_wrap_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_inv_dfail_keep_comp_never_back_fail_repl_pass_decw_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_repl_dfail_repl_comp_less_back_fail_incc_pass_inv_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decw_dfail_zero_comp_less_or_equal_back_fail_zero_pass_repl_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_inv_dfail_wrap_comp_always_back_fail_decw_pass_decw_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_inv_dfail_incc_comp_always_back_fail_decc_pass_inv_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_incc_dfail_incc_comp_always_back_fail_incc_pass_inv_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_zero_dfail_incc_comp_less_back_fail_decc_pass_incc_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_wrap_dfail_keep_comp_not_equal_back_fail_keep_pass_zero_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_wrap_dfail_repl_comp_not_equal_back_fail_keep_pass_wrap_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decw_dfail_decw_comp_less_back_fail_wrap_pass_wrap_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_zero_dfail_repl_comp_never_back_fail_incc_pass_decw_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_zero_dfail_keep_comp_always_back_fail_zero_pass_zero_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_wrap_dfail_decw_comp_equal_back_fail_inv_pass_zero_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_repl_dfail_decw_comp_greater_back_fail_decw_pass_wrap_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_repl_dfail_decc_comp_greater_or_equal_back_fail_incc_pass_repl_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_zero_dfail_repl_comp_never_back_fail_keep_pass_repl_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_repl_dfail_incc_comp_equal_back_fail_incc_pass_zero_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_repl_dfail_decc_comp_greater_back_fail_incc_pass_repl_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decw_dfail_decc_comp_greater_or_equal_back_fail_keep_pass_repl_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decw_dfail_inv_comp_greater_back_fail_keep_pass_decw_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_incc_dfail_repl_comp_never_back_fail_decc_pass_decw_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_inv_dfail_wrap_comp_equal_back_fail_repl_pass_incc_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_keep_dfail_incc_comp_never_back_fail_decc_pass_inv_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_inv_dfail_incc_comp_not_equal_back_fail_wrap_pass_keep_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_zero_dfail_incc_comp_less_or_equal_back_fail_decw_pass_inv_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_wrap_dfail_incc_comp_not_equal_back_fail_keep_pass_zero_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_repl_dfail_repl_comp_never_back_fail_wrap_pass_wrap_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_inv_dfail_inv_comp_equal_back_fail_inv_pass_repl_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decc_dfail_incc_comp_equal_back_fail_repl_pass_inv_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_incc_dfail_decw_comp_always_back_fail_inv_pass_decc_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decc_dfail_repl_comp_less_or_equal_back_fail_wrap_pass_incc_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_repl_dfail_keep_comp_equal_back_fail_repl_pass_decc_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decc_dfail_keep_comp_always_back_fail_repl_pass_repl_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_repl_dfail_decc_comp_never_back_fail_decw_pass_decc_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_repl_dfail_incc_comp_not_equal_back_fail_keep_pass_repl_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_zero_dfail_zero_comp_less_back_fail_inv_pass_repl_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_keep_dfail_keep_comp_never_back_fail_incc_pass_zero_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decw_dfail_wrap_comp_greater_back_fail_incc_pass_keep_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_zero_dfail_incc_comp_never_back_fail_inv_pass_decw_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_repl_dfail_incc_comp_less_back_fail_zero_pass_zero_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_keep_dfail_repl_comp_never_back_fail_wrap_pass_repl_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decc_dfail_decw_comp_less_back_fail_decw_pass_keep_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_repl_dfail_incc_comp_always_back_fail_decc_pass_decc_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_incc_dfail_decc_comp_equal_back_fail_decw_pass_repl_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_zero_dfail_zero_comp_greater_or_equal_back_fail_repl_pass_incc_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_incc_dfail_repl_comp_greater_back_fail_inv_pass_zero_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_wrap_dfail_repl_comp_less_or_equal_back_fail_decc_pass_incc_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_inv_dfail_incc_comp_always_back_fail_decw_pass_wrap_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decw_dfail_keep_comp_less_back_fail_decc_pass_inv_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_incc_dfail_decc_comp_equal_back_fail_incc_pass_decw_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_keep_dfail_zero_comp_greater_or_equal_back_fail_inv_pass_incc_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decw_dfail_incc_comp_not_equal_back_fail_incc_pass_keep_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_incc_dfail_wrap_comp_greater_back_fail_inv_pass_decw_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_repl_dfail_keep_comp_not_equal_back_fail_repl_pass_incc_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_zero_dfail_wrap_comp_greater_or_equal_back_fail_incc_pass_repl_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_inv_dfail_incc_comp_not_equal_back_fail_keep_pass_zero_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_zero_dfail_decc_comp_always_back_fail_decc_pass_inv_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_keep_dfail_wrap_comp_greater_or_equal_back_fail_repl_pass_zero_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_repl_dfail_zero_comp_not_equal_back_fail_repl_pass_keep_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_repl_dfail_decw_comp_greater_or_equal_back_fail_wrap_pass_repl_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_zero_dfail_incc_comp_never_back_fail_wrap_pass_repl_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_inv_dfail_keep_comp_less_or_equal_back_fail_repl_pass_zero_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decw_dfail_incc_comp_greater_back_fail_repl_pass_inv_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decw_dfail_keep_comp_never_back_fail_incc_pass_decw_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_incc_dfail_zero_comp_never_back_fail_decc_pass_decw_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_inv_dfail_zero_comp_never_back_fail_repl_pass_incc_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_incc_dfail_wrap_comp_always_back_fail_repl_pass_inv_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_keep_dfail_keep_comp_greater_back_fail_zero_pass_incc_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_wrap_dfail_decw_comp_greater_or_equal_back_fail_incc_pass_keep_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_incc_dfail_keep_comp_less_or_equal_back_fail_decw_pass_wrap_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_zero_dfail_wrap_comp_greater_back_fail_wrap_pass_incc_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_inv_dfail_wrap_comp_never_back_fail_decc_pass_zero_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decc_dfail_zero_comp_always_back_fail_zero_pass_inv_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_repl_dfail_repl_comp_not_equal_back_fail_wrap_pass_decc_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_wrap_dfail_decw_comp_greater_or_equal_back_fail_inv_pass_repl_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decc_dfail_decc_comp_greater_or_equal_back_fail_zero_pass_wrap_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_keep_dfail_decw_comp_equal_back_fail_decw_pass_decc_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_inv_dfail_wrap_comp_less_back_fail_decc_pass_keep_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_zero_dfail_decc_comp_never_back_fail_wrap_pass_inv_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decc_dfail_inv_comp_greater_or_equal_back_fail_incc_pass_zero_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decc_dfail_decw_comp_never_back_fail_zero_pass_decc_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decw_dfail_repl_comp_not_equal_back_fail_incc_pass_decc_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decc_dfail_incc_comp_always_back_fail_keep_pass_decw_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decw_dfail_zero_comp_never_back_fail_zero_pass_decc_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_zero_dfail_inv_comp_not_equal_back_fail_decc_pass_decw_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_repl_dfail_zero_comp_equal_back_fail_zero_pass_zero_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decw_dfail_repl_comp_never_back_fail_incc_pass_repl_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_wrap_dfail_zero_comp_less_back_fail_keep_pass_decw_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_repl_dfail_repl_comp_always_back_fail_decc_pass_wrap_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_zero_dfail_decw_comp_greater_back_fail_decc_pass_repl_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_wrap_dfail_inv_comp_less_back_fail_repl_pass_zero_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_repl_dfail_keep_comp_greater_back_fail_decw_pass_wrap_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decw_dfail_decw_comp_less_back_fail_decc_pass_repl_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_inv_dfail_decc_comp_greater_back_fail_inv_pass_decw_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decw_dfail_incc_comp_less_or_equal_back_fail_repl_pass_inv_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decc_dfail_zero_comp_greater_or_equal_back_fail_repl_pass_decw_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_zero_dfail_keep_comp_never_back_fail_inv_pass_decc_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decc_dfail_inv_comp_equal_back_fail_keep_pass_zero_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_repl_dfail_decc_comp_always_back_fail_zero_pass_decc_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_keep_dfail_keep_comp_not_equal_back_fail_wrap_pass_repl_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_repl_dfail_incc_comp_not_equal_back_fail_repl_pass_keep_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decc_dfail_repl_comp_not_equal_back_fail_keep_pass_repl_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_keep_dfail_zero_comp_less_or_equal_back_fail_wrap_pass_decc_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_zero_dfail_decc_comp_less_or_equal_back_fail_inv_pass_keep_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_keep_dfail_decc_comp_greater_back_fail_keep_pass_zero_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_incc_dfail_repl_comp_always_back_fail_decc_pass_keep_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_keep_dfail_zero_comp_equal_back_fail_decw_pass_incc_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decc_dfail_wrap_comp_never_back_fail_incc_pass_keep_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_incc_dfail_repl_comp_less_or_equal_back_fail_inv_pass_decc_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_zero_dfail_repl_comp_greater_or_equal_back_fail_zero_pass_incc_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_zero_dfail_inv_comp_never_back_fail_wrap_pass_zero_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decc_dfail_decc_comp_less_or_equal_back_fail_inv_pass_zero_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_zero_dfail_keep_comp_equal_back_fail_incc_pass_decc_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_inv_dfail_zero_comp_less_or_equal_back_fail_wrap_pass_zero_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_inv_dfail_decc_comp_always_back_fail_zero_pass_inv_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_zero_dfail_decw_comp_greater_or_equal_back_fail_wrap_pass_inv_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_wrap_dfail_repl_comp_less_back_fail_repl_pass_zero_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_repl_dfail_inv_comp_always_back_fail_repl_pass_wrap_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_zero_dfail_decc_comp_equal_back_fail_zero_pass_repl_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_inv_dfail_repl_comp_always_back_fail_repl_pass_zero_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_wrap_dfail_incc_comp_never_back_fail_keep_pass_inv_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decw_dfail_wrap_comp_never_back_fail_incc_pass_wrap_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_incc_dfail_zero_comp_less_or_equal_back_fail_inv_pass_decw_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_repl_dfail_decw_comp_less_back_fail_inv_pass_incc_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_incc_dfail_repl_comp_never_back_fail_incc_pass_repl_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_keep_dfail_inv_comp_less_back_fail_zero_pass_incc_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_incc_dfail_incc_comp_less_or_equal_back_fail_repl_pass_keep_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_zero_dfail_wrap_comp_never_back_fail_zero_pass_incc_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_keep_dfail_inv_comp_equal_back_fail_keep_pass_zero_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decc_dfail_decw_comp_greater_back_fail_decc_pass_keep_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_repl_dfail_decw_comp_greater_back_fail_decw_pass_decc_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_inv_dfail_repl_comp_less_back_fail_wrap_pass_repl_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_inv_dfail_inv_comp_less_back_fail_zero_pass_inv_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_zero_dfail_decc_comp_always_back_fail_decw_pass_inv_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_inv_dfail_zero_comp_less_or_equal_back_fail_inv_pass_zero_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_keep_dfail_incc_comp_greater_back_fail_keep_pass_inv_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_inv_dfail_decw_comp_equal_back_fail_zero_pass_keep_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_incc_dfail_decc_comp_always_back_fail_keep_pass_inv_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_wrap_dfail_wrap_comp_not_equal_back_fail_decc_pass_incc_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decc_dfail_decw_comp_always_back_fail_decc_pass_wrap_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_incc_dfail_decc_comp_not_equal_back_fail_repl_pass_decc_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_keep_dfail_decc_comp_always_back_fail_decc_pass_incc_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_repl_dfail_incc_comp_always_back_fail_repl_pass_keep_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_inv_dfail_wrap_comp_not_equal_back_fail_decc_pass_repl_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_zero_dfail_keep_comp_not_equal_back_fail_zero_pass_inv_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_zero_dfail_decw_comp_not_equal_back_fail_keep_pass_zero_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_repl_dfail_zero_comp_not_equal_back_fail_wrap_pass_zero_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_incc_dfail_incc_comp_not_equal_back_fail_decc_pass_repl_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decc_dfail_decw_comp_never_back_fail_decw_pass_incc_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decc_dfail_decc_comp_equal_back_fail_zero_pass_decc_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_zero_dfail_incc_comp_less_back_fail_repl_pass_decc_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_zero_dfail_wrap_comp_not_equal_back_fail_decw_pass_zero_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_inv_dfail_keep_comp_not_equal_back_fail_keep_pass_zero_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_keep_dfail_keep_comp_never_back_fail_wrap_pass_inv_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decc_dfail_incc_comp_never_back_fail_decc_pass_keep_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_repl_dfail_decc_comp_less_back_fail_decc_pass_decc_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_incc_dfail_wrap_comp_equal_back_fail_decw_pass_repl_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decc_dfail_inv_comp_equal_back_fail_keep_pass_incc_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_keep_dfail_zero_comp_not_equal_back_fail_decc_pass_decc_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_repl_dfail_zero_comp_never_back_fail_decw_pass_keep_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_zero_dfail_zero_comp_always_back_fail_inv_pass_repl_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_repl_dfail_zero_comp_always_back_fail_incc_pass_zero_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decw_dfail_decc_comp_less_back_fail_incc_pass_repl_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_inv_dfail_decw_comp_equal_back_fail_incc_pass_decw_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decw_dfail_decc_comp_not_equal_back_fail_decc_pass_inv_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_wrap_dfail_decc_comp_greater_back_fail_wrap_pass_decw_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_zero_dfail_decc_comp_less_or_equal_back_fail_inv_pass_wrap_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_keep_dfail_wrap_comp_equal_back_fail_inv_pass_zero_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_wrap_dfail_decc_comp_greater_or_equal_back_fail_wrap_pass_keep_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_inv_dfail_decc_comp_greater_or_equal_back_fail_keep_pass_wrap_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_repl_dfail_inv_comp_less_or_equal_back_fail_decw_pass_inv_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_incc_dfail_inv_comp_never_back_fail_decc_pass_repl_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_wrap_dfail_repl_comp_always_back_fail_repl_pass_incc_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_inv_dfail_decc_comp_greater_or_equal_back_fail_decc_pass_wrap_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_wrap_dfail_inv_comp_greater_back_fail_decc_pass_inv_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_zero_dfail_inv_comp_less_or_equal_back_fail_incc_pass_wrap_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_inv_dfail_incc_comp_less_back_fail_inv_pass_zero_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_wrap_dfail_zero_comp_not_equal_back_fail_incc_pass_inv_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_keep_dfail_inv_comp_equal_back_fail_zero_pass_wrap_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_wrap_dfail_wrap_comp_not_equal_back_fail_decw_pass_keep_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_wrap_dfail_wrap_comp_always_back_fail_keep_pass_wrap_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_inv_dfail_repl_comp_not_equal_back_fail_incc_pass_wrap_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_zero_dfail_decw_comp_less_or_equal_back_fail_wrap_pass_inv_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_keep_dfail_zero_comp_less_or_equal_back_fail_zero_pass_zero_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_keep_dfail_keep_comp_not_equal_back_fail_decc_pass_keep_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decw_dfail_repl_comp_equal_back_fail_keep_pass_keep_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decw_dfail_zero_comp_never_back_fail_inv_pass_decw_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_inv_dfail_decw_comp_always_back_fail_keep_pass_decw_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_keep_dfail_inv_comp_always_back_fail_keep_pass_inv_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_repl_dfail_decc_comp_equal_back_fail_inv_pass_keep_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_keep_dfail_zero_comp_not_equal_back_fail_incc_pass_repl_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_zero_dfail_decc_comp_less_back_fail_repl_pass_keep_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_incc_dfail_keep_comp_always_back_fail_repl_pass_zero_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_inv_dfail_decc_comp_less_back_fail_repl_pass_incc_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_incc_dfail_keep_comp_greater_back_fail_wrap_pass_inv_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_zero_dfail_inv_comp_greater_or_equal_back_fail_decw_pass_incc_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_incc_dfail_repl_comp_always_back_fail_zero_pass_zero_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_repl_dfail_incc_comp_always_back_fail_keep_pass_incc_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decc_dfail_inv_comp_less_or_equal_back_fail_inv_pass_repl_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_incc_dfail_repl_comp_equal_back_fail_incc_pass_decc_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decw_dfail_keep_comp_less_back_fail_zero_pass_incc_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decc_dfail_decw_comp_equal_back_fail_inv_pass_decw_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decc_dfail_repl_comp_less_back_fail_keep_pass_decc_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decc_dfail_zero_comp_never_back_fail_decc_pass_decc_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_wrap_dfail_incc_comp_always_back_fail_incc_pass_decc_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_keep_dfail_repl_comp_equal_back_fail_inv_pass_wrap_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_wrap_dfail_decw_comp_greater_back_fail_decc_pass_keep_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_incc_dfail_decc_comp_less_or_equal_back_fail_repl_pass_wrap_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decw_dfail_keep_comp_never_back_fail_inv_pass_incc_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_repl_dfail_repl_comp_equal_back_fail_repl_pass_decw_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_incc_dfail_wrap_comp_not_equal_back_fail_incc_pass_repl_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decw_dfail_keep_comp_greater_back_fail_keep_pass_incc_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decw_dfail_inv_comp_never_back_fail_inv_pass_decw_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decw_dfail_decc_comp_greater_back_fail_keep_pass_decw_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_wrap_dfail_keep_comp_equal_back_fail_incc_pass_decw_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_incc_dfail_repl_comp_never_back_fail_wrap_pass_wrap_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_repl_dfail_inv_comp_greater_back_fail_inv_pass_incc_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_zero_dfail_inv_comp_always_back_fail_incc_pass_repl_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_repl_dfail_keep_comp_less_or_equal_back_fail_repl_pass_zero_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_wrap_dfail_wrap_comp_greater_or_equal_back_fail_incc_pass_repl_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_repl_dfail_repl_comp_never_back_fail_zero_pass_wrap_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_repl_dfail_decw_comp_not_equal_back_fail_incc_pass_repl_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_zero_dfail_decw_comp_less_back_fail_keep_pass_repl_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decc_dfail_wrap_comp_less_or_equal_back_fail_repl_pass_zero_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_inv_dfail_inv_comp_equal_back_fail_zero_pass_decc_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decw_dfail_decw_comp_never_back_fail_zero_pass_inv_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_zero_dfail_inv_comp_not_equal_back_fail_inv_pass_decw_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_keep_dfail_wrap_comp_not_equal_back_fail_decw_pass_zero_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_repl_dfail_decw_comp_never_back_fail_inv_pass_keep_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_inv_dfail_inv_comp_never_back_fail_inv_pass_repl_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_incc_dfail_wrap_comp_equal_back_fail_incc_pass_inv_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_keep_dfail_keep_comp_less_back_fail_wrap_pass_incc_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decw_dfail_decc_comp_never_back_fail_incc_pass_keep_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_repl_dfail_repl_comp_greater_back_fail_keep_pass_decw_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decc_dfail_repl_comp_less_or_equal_back_fail_wrap_pass_repl_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_zero_dfail_keep_comp_less_back_fail_decc_pass_decc_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_inv_dfail_inv_comp_never_back_fail_keep_pass_zero_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_inv_dfail_zero_comp_not_equal_back_fail_zero_pass_inv_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_incc_dfail_keep_comp_greater_back_fail_zero_pass_inv_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_repl_dfail_keep_comp_always_back_fail_zero_pass_incc_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decw_dfail_zero_comp_greater_back_fail_incc_pass_repl_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_repl_dfail_wrap_comp_less_or_equal_back_fail_inv_pass_decw_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_inv_dfail_inv_comp_not_equal_back_fail_incc_pass_repl_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decw_dfail_incc_comp_always_back_fail_zero_pass_inv_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decw_dfail_incc_comp_less_or_equal_back_fail_inv_pass_decw_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_zero_dfail_inv_comp_greater_back_fail_zero_pass_decw_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_inv_dfail_wrap_comp_less_back_fail_decc_pass_zero_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_inv_dfail_wrap_comp_less_or_equal_back_fail_inv_pass_inv_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decc_dfail_wrap_comp_not_equal_back_fail_incc_pass_inv_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_zero_dfail_incc_comp_equal_back_fail_incc_pass_decc_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_inv_dfail_incc_comp_always_back_fail_wrap_pass_zero_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_keep_dfail_incc_comp_never_back_fail_wrap_pass_inv_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_inv_dfail_incc_comp_less_back_fail_zero_pass_keep_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_repl_dfail_inv_comp_greater_back_fail_decw_pass_inv_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_wrap_dfail_decc_comp_equal_back_fail_decc_pass_repl_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_incc_dfail_decw_comp_equal_back_fail_decw_pass_wrap_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_repl_dfail_repl_comp_not_equal_back_fail_repl_pass_incc_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_repl_dfail_inv_comp_never_back_fail_repl_pass_repl_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_zero_dfail_wrap_comp_not_equal_back_fail_decc_pass_repl_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_wrap_dfail_keep_comp_greater_or_equal_back_fail_inv_pass_zero_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decc_dfail_repl_comp_less_back_fail_repl_pass_wrap_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_wrap_dfail_keep_comp_greater_or_equal_back_fail_zero_pass_decc_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_incc_dfail_inv_comp_equal_back_fail_zero_pass_wrap_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_repl_dfail_decw_comp_less_back_fail_keep_pass_incc_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decc_dfail_decw_comp_always_back_fail_zero_pass_repl_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decc_dfail_zero_comp_equal_back_fail_inv_pass_decc_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_repl_dfail_decw_comp_greater_or_equal_back_fail_zero_pass_decc_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_repl_dfail_wrap_comp_greater_or_equal_back_fail_decw_pass_repl_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_incc_dfail_incc_comp_always_back_fail_incc_pass_repl_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_wrap_dfail_inv_comp_equal_back_fail_repl_pass_incc_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_wrap_dfail_zero_comp_less_or_equal_back_fail_incc_pass_wrap_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decc_dfail_incc_comp_less_or_equal_back_fail_zero_pass_wrap_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_repl_dfail_decc_comp_greater_back_fail_keep_pass_decc_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_zero_dfail_inv_comp_greater_back_fail_decc_pass_repl_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_zero_dfail_zero_comp_never_back_fail_wrap_pass_zero_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_keep_dfail_wrap_comp_greater_back_fail_decc_pass_zero_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_wrap_dfail_repl_comp_greater_or_equal_back_fail_zero_pass_keep_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decw_dfail_zero_comp_less_back_fail_decc_pass_wrap_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_incc_dfail_zero_comp_equal_back_fail_keep_pass_decw_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decc_dfail_keep_comp_less_back_fail_inv_pass_incc_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decw_dfail_decw_comp_equal_back_fail_keep_pass_decc_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_inv_dfail_incc_comp_equal_back_fail_decw_pass_decw_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decc_dfail_inv_comp_less_or_equal_back_fail_incc_pass_inv_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decw_dfail_zero_comp_greater_or_equal_back_fail_inv_pass_decc_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_repl_dfail_decw_comp_greater_or_equal_back_fail_repl_pass_decw_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_wrap_dfail_incc_comp_greater_or_equal_back_fail_zero_pass_repl_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_keep_dfail_inv_comp_never_back_fail_inv_pass_wrap_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decw_dfail_wrap_comp_not_equal_back_fail_zero_pass_keep_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_keep_dfail_repl_comp_equal_back_fail_repl_pass_decw_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_zero_dfail_inv_comp_less_or_equal_back_fail_decw_pass_keep_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decw_dfail_zero_comp_not_equal_back_fail_decw_pass_zero_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decc_dfail_inv_comp_greater_or_equal_back_fail_repl_pass_decw_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_inv_dfail_wrap_comp_greater_back_fail_inv_pass_decc_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_wrap_dfail_incc_comp_always_back_fail_repl_pass_inv_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_zero_dfail_repl_comp_equal_back_fail_keep_pass_wrap_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decw_dfail_inv_comp_greater_back_fail_incc_pass_zero_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_inv_dfail_keep_comp_never_back_fail_decw_pass_decw_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decc_dfail_repl_comp_not_equal_back_fail_wrap_pass_inv_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decc_dfail_keep_comp_less_or_equal_back_fail_decw_pass_decc_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decw_dfail_inv_comp_equal_back_fail_keep_pass_decc_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decw_dfail_decw_comp_less_back_fail_repl_pass_decw_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_inv_dfail_repl_comp_greater_or_equal_back_fail_zero_pass_decw_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_wrap_dfail_wrap_comp_equal_back_fail_zero_pass_inv_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_zero_dfail_incc_comp_greater_or_equal_back_fail_zero_pass_wrap_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_keep_dfail_keep_comp_not_equal_back_fail_wrap_pass_zero_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_incc_dfail_incc_comp_never_back_fail_decc_pass_keep_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_incc_dfail_decc_comp_always_back_fail_decc_pass_incc_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_wrap_dfail_decc_comp_less_back_fail_incc_pass_incc_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_incc_dfail_decw_comp_greater_or_equal_back_fail_inv_pass_wrap_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decw_dfail_keep_comp_not_equal_back_fail_wrap_pass_incc_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_inv_dfail_repl_comp_always_back_fail_incc_pass_decw_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_zero_dfail_zero_comp_less_or_equal_back_fail_zero_pass_inv_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_repl_dfail_repl_comp_never_back_fail_incc_pass_zero_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_wrap_dfail_wrap_comp_never_back_fail_decc_pass_repl_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decw_dfail_incc_comp_never_back_fail_decw_pass_wrap_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decc_dfail_zero_comp_less_or_equal_back_fail_wrap_pass_decw_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_repl_dfail_inv_comp_never_back_fail_incc_pass_decc_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decw_dfail_decc_comp_less_or_equal_back_fail_inv_pass_repl_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_zero_dfail_decc_comp_never_back_fail_wrap_pass_decw_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_keep_dfail_zero_comp_never_back_fail_decc_pass_zero_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_keep_dfail_repl_comp_greater_back_fail_incc_pass_keep_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_incc_dfail_decc_comp_never_back_fail_inv_pass_keep_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decc_dfail_zero_comp_greater_back_fail_decc_pass_incc_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_incc_dfail_wrap_comp_less_back_fail_keep_pass_decc_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decc_dfail_inv_comp_always_back_fail_wrap_pass_incc_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_inv_dfail_inv_comp_less_or_equal_back_fail_decc_pass_decc_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_keep_dfail_incc_comp_equal_back_fail_wrap_pass_inv_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decc_dfail_inv_comp_equal_back_fail_decw_pass_keep_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_zero_dfail_keep_comp_always_back_fail_repl_pass_decc_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decw_dfail_decc_comp_greater_back_fail_incc_pass_zero_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_zero_dfail_zero_comp_equal_back_fail_decc_pass_decw_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_repl_dfail_decw_comp_less_back_fail_zero_pass_zero_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_zero_dfail_repl_comp_less_or_equal_back_fail_decw_pass_repl_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decw_dfail_zero_comp_always_back_fail_incc_pass_zero_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_zero_dfail_keep_comp_not_equal_back_fail_decc_pass_decw_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_keep_dfail_keep_comp_always_back_fail_incc_pass_zero_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_zero_dfail_zero_comp_less_back_fail_repl_pass_keep_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decw_dfail_repl_comp_greater_or_equal_back_fail_decw_pass_zero_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decw_dfail_decw_comp_less_back_fail_inv_pass_decw_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decw_dfail_incc_comp_never_back_fail_repl_pass_decw_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_repl_dfail_wrap_comp_less_or_equal_back_fail_inv_pass_decw_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decc_dfail_keep_comp_never_back_fail_repl_pass_repl_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_keep_dfail_wrap_comp_greater_or_equal_back_fail_repl_pass_decc_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decw_dfail_decw_comp_greater_or_equal_back_fail_keep_pass_keep_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_wrap_dfail_incc_comp_greater_back_fail_repl_pass_decw_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decc_dfail_zero_comp_not_equal_back_fail_decc_pass_wrap_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_wrap_dfail_wrap_comp_equal_back_fail_decc_pass_decc_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_keep_dfail_decc_comp_greater_or_equal_back_fail_wrap_pass_wrap_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_zero_dfail_repl_comp_greater_or_equal_back_fail_inv_pass_keep_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_inv_dfail_wrap_comp_less_or_equal_back_fail_inv_pass_zero_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_inv_dfail_inv_comp_less_or_equal_back_fail_decw_pass_inv_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_incc_dfail_inv_comp_greater_back_fail_incc_pass_inv_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_inv_dfail_incc_comp_never_back_fail_inv_pass_incc_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_keep_dfail_incc_comp_less_back_fail_decc_pass_inv_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_wrap_dfail_zero_comp_never_back_fail_keep_pass_keep_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_incc_dfail_decw_comp_less_or_equal_back_fail_keep_pass_wrap_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_inv_dfail_keep_comp_greater_or_equal_back_fail_incc_pass_incc_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decc_dfail_decw_comp_equal_back_fail_repl_pass_inv_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_incc_dfail_keep_comp_never_back_fail_inv_pass_decc_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_zero_dfail_keep_comp_greater_back_fail_repl_pass_incc_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_repl_dfail_decc_comp_never_back_fail_decw_pass_zero_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decc_dfail_repl_comp_always_back_fail_incc_pass_repl_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_keep_dfail_repl_comp_always_back_fail_incc_pass_decc_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decw_dfail_incc_comp_not_equal_back_fail_wrap_pass_keep_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decw_dfail_decw_comp_greater_back_fail_keep_pass_decw_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_inv_dfail_decc_comp_not_equal_back_fail_incc_pass_decw_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_wrap_dfail_repl_comp_greater_or_equal_back_fail_keep_pass_inv_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_inv_dfail_repl_comp_less_or_equal_back_fail_repl_pass_wrap_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_repl_dfail_decw_comp_less_or_equal_back_fail_keep_pass_inv_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_wrap_dfail_zero_comp_not_equal_back_fail_repl_pass_repl_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decw_dfail_decw_comp_never_back_fail_wrap_pass_wrap_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_keep_dfail_zero_comp_less_back_fail_decc_pass_decw_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decw_dfail_incc_comp_greater_back_fail_keep_pass_keep_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_zero_dfail_decw_comp_greater_back_fail_decw_pass_decw_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decc_dfail_incc_comp_less_back_fail_zero_pass_zero_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decc_dfail_incc_comp_less_back_fail_keep_pass_decc_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_wrap_dfail_keep_comp_less_back_fail_repl_pass_decc_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decw_dfail_repl_comp_equal_back_fail_zero_pass_wrap_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_keep_dfail_incc_comp_always_back_fail_keep_pass_decw_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decw_dfail_incc_comp_less_or_equal_back_fail_inv_pass_keep_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_inv_dfail_decc_comp_not_equal_back_fail_wrap_pass_decw_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_zero_dfail_keep_comp_equal_back_fail_repl_pass_inv_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_inv_dfail_repl_comp_greater_back_fail_zero_pass_zero_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_wrap_dfail_decc_comp_less_or_equal_back_fail_inv_pass_inv_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_zero_dfail_decc_comp_less_or_equal_back_fail_decc_pass_wrap_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_keep_dfail_decc_comp_always_back_fail_wrap_pass_zero_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_keep_dfail_keep_comp_not_equal_back_fail_keep_pass_keep_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_repl_dfail_inv_comp_equal_back_fail_zero_pass_keep_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_wrap_dfail_wrap_comp_always_back_fail_repl_pass_repl_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_inv_dfail_decc_comp_never_back_fail_repl_pass_wrap_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_repl_dfail_inv_comp_not_equal_back_fail_repl_pass_inv_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_incc_dfail_wrap_comp_never_back_fail_zero_pass_repl_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decw_dfail_decc_comp_never_back_fail_decw_pass_incc_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_incc_dfail_repl_comp_greater_or_equal_back_fail_inv_pass_decw_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_inv_dfail_inv_comp_greater_or_equal_back_fail_incc_pass_incc_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_inv_dfail_keep_comp_greater_or_equal_back_fail_decc_pass_inv_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_repl_dfail_repl_comp_never_back_fail_decw_pass_inv_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decw_dfail_incc_comp_equal_back_fail_wrap_pass_repl_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decc_dfail_repl_comp_equal_back_fail_decc_pass_decw_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_repl_dfail_repl_comp_never_back_fail_decc_pass_decc_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_keep_dfail_decw_comp_never_back_fail_keep_pass_repl_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_inv_dfail_decw_comp_not_equal_back_fail_wrap_pass_keep_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_wrap_dfail_zero_comp_greater_or_equal_back_fail_repl_pass_inv_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_inv_dfail_zero_comp_always_back_fail_zero_pass_wrap_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_inv_dfail_repl_comp_always_back_fail_decw_pass_inv_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_wrap_dfail_keep_comp_not_equal_back_fail_decw_pass_inv_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_wrap_dfail_inv_comp_equal_back_fail_zero_pass_wrap_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decw_dfail_zero_comp_equal_back_fail_decc_pass_wrap_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decw_dfail_decw_comp_greater_or_equal_back_fail_zero_pass_decw_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decc_dfail_decw_comp_never_back_fail_inv_pass_decw_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_keep_dfail_keep_comp_less_back_fail_wrap_pass_decc_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_zero_dfail_zero_comp_never_back_fail_inv_pass_keep_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_keep_dfail_incc_comp_never_back_fail_incc_pass_zero_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decw_dfail_keep_comp_less_or_equal_back_fail_keep_pass_keep_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decw_dfail_decw_comp_not_equal_back_fail_repl_pass_decw_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_repl_dfail_repl_comp_never_back_fail_incc_pass_decw_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_keep_dfail_keep_comp_always_back_fail_decw_pass_repl_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_incc_dfail_zero_comp_less_or_equal_back_fail_decw_pass_keep_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_zero_dfail_zero_comp_less_back_fail_repl_pass_incc_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decw_dfail_inv_comp_equal_back_fail_zero_pass_zero_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_zero_dfail_decc_comp_less_back_fail_inv_pass_decw_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decc_dfail_keep_comp_not_equal_back_fail_incc_pass_zero_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_wrap_dfail_keep_comp_never_back_fail_keep_pass_decc_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_keep_dfail_zero_comp_less_or_equal_back_fail_zero_pass_wrap_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decc_dfail_zero_comp_not_equal_back_fail_wrap_pass_keep_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_incc_dfail_wrap_comp_greater_or_equal_back_fail_incc_pass_decc_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_keep_dfail_inv_comp_greater_or_equal_back_fail_keep_pass_incc_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_keep_dfail_incc_comp_equal_back_fail_incc_pass_keep_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_zero_dfail_decw_comp_always_back_fail_incc_pass_keep_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_incc_dfail_wrap_comp_equal_back_fail_zero_pass_zero_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_wrap_dfail_wrap_comp_greater_or_equal_back_fail_repl_pass_incc_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_repl_dfail_wrap_comp_greater_or_equal_back_fail_decc_pass_wrap_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_wrap_dfail_zero_comp_always_back_fail_repl_pass_repl_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_wrap_dfail_inv_comp_greater_or_equal_back_fail_inv_pass_wrap_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_incc_dfail_wrap_comp_less_or_equal_back_fail_wrap_pass_wrap_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_incc_dfail_decw_comp_always_back_fail_zero_pass_incc_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_inv_dfail_keep_comp_equal_back_fail_keep_pass_incc_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_incc_dfail_decw_comp_greater_back_fail_decw_pass_inv_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_keep_dfail_zero_comp_greater_or_equal_back_fail_repl_pass_incc_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_repl_dfail_incc_comp_greater_back_fail_inv_pass_keep_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decw_dfail_repl_comp_equal_back_fail_decw_pass_repl_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_zero_dfail_decc_comp_less_or_equal_back_fail_repl_pass_decw_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_zero_dfail_decw_comp_less_or_equal_back_fail_decw_pass_zero_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decc_dfail_inv_comp_greater_back_fail_decw_pass_zero_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_incc_dfail_repl_comp_greater_or_equal_back_fail_zero_pass_decc_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_keep_dfail_repl_comp_never_back_fail_decc_pass_incc_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_repl_dfail_wrap_comp_never_back_fail_incc_pass_keep_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decc_dfail_zero_comp_always_back_fail_wrap_pass_repl_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_inv_dfail_incc_comp_always_back_fail_incc_pass_decc_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_incc_dfail_inv_comp_greater_back_fail_repl_pass_inv_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_zero_dfail_inv_comp_less_back_fail_decw_pass_incc_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decw_dfail_decw_comp_always_back_fail_zero_pass_zero_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_zero_dfail_zero_comp_not_equal_back_fail_repl_pass_decw_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_inv_dfail_keep_comp_equal_back_fail_inv_pass_zero_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_repl_dfail_wrap_comp_never_back_fail_repl_pass_inv_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_keep_dfail_repl_comp_less_or_equal_back_fail_decc_pass_repl_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_keep_dfail_decc_comp_greater_or_equal_back_fail_decc_pass_keep_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decc_dfail_decc_comp_less_or_equal_back_fail_decw_pass_keep_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_zero_dfail_decc_comp_greater_or_equal_back_fail_keep_pass_decc_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_repl_dfail_keep_comp_less_back_fail_inv_pass_zero_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_wrap_dfail_decw_comp_greater_or_equal_back_fail_zero_pass_repl_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_zero_dfail_repl_comp_always_back_fail_keep_pass_wrap_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decw_dfail_repl_comp_less_back_fail_wrap_pass_zero_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decw_dfail_incc_comp_equal_back_fail_decc_pass_decw_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decc_dfail_wrap_comp_less_back_fail_inv_pass_decw_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_wrap_dfail_decw_comp_less_back_fail_decw_pass_decc_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decc_dfail_repl_comp_greater_back_fail_repl_pass_wrap_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_incc_dfail_incc_comp_greater_or_equal_back_fail_wrap_pass_decc_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_zero_dfail_wrap_comp_greater_or_equal_back_fail_zero_pass_incc_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_incc_dfail_incc_comp_greater_back_fail_incc_pass_zero_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_incc_dfail_repl_comp_less_back_fail_inv_pass_incc_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_repl_dfail_keep_comp_equal_back_fail_decw_pass_incc_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_repl_dfail_decw_comp_greater_or_equal_back_fail_decw_pass_repl_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_keep_dfail_keep_comp_always_back_fail_keep_pass_repl_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_incc_dfail_repl_comp_never_back_fail_incc_pass_keep_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_keep_dfail_decc_comp_less_or_equal_back_fail_wrap_pass_incc_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_wrap_dfail_inv_comp_greater_or_equal_back_fail_decc_pass_keep_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_inv_dfail_decw_comp_never_back_fail_decw_pass_wrap_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decc_dfail_repl_comp_greater_back_fail_decc_pass_inv_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_zero_dfail_zero_comp_always_back_fail_inv_pass_decc_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_inv_dfail_keep_comp_greater_or_equal_back_fail_zero_pass_zero_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_keep_dfail_inv_comp_less_back_fail_zero_pass_inv_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_inv_dfail_zero_comp_always_back_fail_inv_pass_keep_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_wrap_dfail_repl_comp_greater_back_fail_incc_pass_inv_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_zero_dfail_inv_comp_not_equal_back_fail_wrap_pass_wrap_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_wrap_dfail_inv_comp_greater_or_equal_back_fail_keep_pass_zero_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decw_dfail_decw_comp_always_back_fail_zero_pass_wrap_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_wrap_dfail_zero_comp_always_back_fail_decw_pass_decw_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_keep_dfail_keep_comp_equal_back_fail_repl_pass_wrap_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_repl_dfail_keep_comp_never_back_fail_decw_pass_keep_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_repl_dfail_inv_comp_greater_or_equal_back_fail_decw_pass_repl_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_incc_dfail_decw_comp_less_or_equal_back_fail_repl_pass_repl_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decw_dfail_inv_comp_always_back_fail_decw_pass_incc_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decc_dfail_wrap_comp_always_back_fail_keep_pass_decw_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_inv_dfail_inv_comp_greater_back_fail_incc_pass_decc_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_wrap_dfail_decc_comp_never_back_fail_repl_pass_inv_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_repl_dfail_wrap_comp_never_back_fail_incc_pass_wrap_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_keep_dfail_incc_comp_less_or_equal_back_fail_keep_pass_repl_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_zero_dfail_inv_comp_greater_back_fail_wrap_pass_keep_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_incc_dfail_decc_comp_less_back_fail_inv_pass_zero_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_repl_dfail_zero_comp_less_back_fail_decc_pass_incc_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_keep_dfail_repl_comp_greater_or_equal_back_fail_decw_pass_repl_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_inv_dfail_wrap_comp_greater_or_equal_back_fail_wrap_pass_keep_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decc_dfail_decw_comp_greater_or_equal_back_fail_incc_pass_inv_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decc_dfail_repl_comp_greater_or_equal_back_fail_keep_pass_decc_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_inv_dfail_incc_comp_less_or_equal_back_fail_inv_pass_decc_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_zero_dfail_incc_comp_less_or_equal_back_fail_repl_pass_inv_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_repl_dfail_wrap_comp_not_equal_back_fail_decc_pass_zero_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_repl_dfail_incc_comp_less_back_fail_decc_pass_repl_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decc_dfail_incc_comp_equal_back_fail_zero_pass_repl_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_zero_dfail_wrap_comp_always_back_fail_keep_pass_decc_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decw_dfail_zero_comp_greater_back_fail_incc_pass_zero_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_inv_dfail_inv_comp_never_back_fail_wrap_pass_decw_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_repl_dfail_inv_comp_greater_or_equal_back_fail_wrap_pass_inv_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_repl_dfail_wrap_comp_less_back_fail_wrap_pass_repl_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decw_dfail_incc_comp_greater_or_equal_back_fail_incc_pass_repl_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_incc_dfail_incc_comp_greater_back_fail_repl_pass_decw_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_wrap_dfail_keep_comp_equal_back_fail_repl_pass_incc_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_incc_dfail_wrap_comp_greater_or_equal_back_fail_decc_pass_wrap_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decc_dfail_repl_comp_less_or_equal_back_fail_incc_pass_incc_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_inv_dfail_inv_comp_less_back_fail_wrap_pass_decc_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_wrap_dfail_decw_comp_equal_back_fail_inv_pass_inv_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_zero_dfail_wrap_comp_always_back_fail_zero_pass_wrap_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decc_dfail_decw_comp_greater_back_fail_repl_pass_zero_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_repl_dfail_decw_comp_always_back_fail_keep_pass_decc_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_zero_dfail_keep_comp_never_back_fail_inv_pass_repl_dfail_decw_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decc_dfail_wrap_comp_equal_back_fail_zero_pass_zero_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_keep_dfail_wrap_comp_never_back_fail_repl_pass_decc_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_inv_dfail_decw_comp_less_back_fail_inv_pass_keep_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_keep_dfail_inv_comp_never_back_fail_decc_pass_inv_dfail_decw_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_keep_dfail_incc_comp_less_or_equal_back_fail_decw_pass_keep_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decw_dfail_incc_comp_never_back_fail_incc_pass_keep_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_wrap_dfail_decw_comp_not_equal_back_fail_decw_pass_decw_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_zero_dfail_incc_comp_greater_back_fail_inv_pass_wrap_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_wrap_dfail_keep_comp_never_back_fail_zero_pass_zero_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_repl_dfail_wrap_comp_greater_back_fail_incc_pass_wrap_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_keep_dfail_wrap_comp_greater_back_fail_keep_pass_repl_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_inv_dfail_decw_comp_less_or_equal_back_fail_wrap_pass_keep_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decw_dfail_decw_comp_not_equal_back_fail_inv_pass_inv_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_repl_dfail_keep_comp_always_back_fail_decw_pass_decw_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_inv_dfail_decc_comp_equal_back_fail_decc_pass_repl_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_wrap_dfail_inv_comp_greater_or_equal_back_fail_wrap_pass_inv_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_wrap_dfail_keep_comp_less_back_fail_repl_pass_wrap_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_incc_dfail_keep_comp_less_or_equal_back_fail_inv_pass_wrap_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_repl_dfail_incc_comp_never_back_fail_decw_pass_incc_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_wrap_dfail_decc_comp_always_back_fail_decc_pass_repl_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_wrap_dfail_incc_comp_never_back_fail_incc_pass_wrap_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decw_dfail_incc_comp_greater_or_equal_back_fail_decc_pass_wrap_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_inv_dfail_zero_comp_equal_back_fail_inv_pass_decw_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decw_dfail_decc_comp_less_or_equal_back_fail_incc_pass_inv_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_inv_dfail_incc_comp_not_equal_back_fail_incc_pass_decw_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_wrap_dfail_decc_comp_less_or_equal_back_fail_inv_pass_inv_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_incc_dfail_repl_comp_greater_or_equal_back_fail_inv_pass_wrap_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_inv_dfail_zero_comp_less_or_equal_back_fail_zero_pass_incc_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_incc_dfail_decc_comp_always_back_fail_decc_pass_inv_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_inv_dfail_repl_comp_never_back_fail_repl_pass_incc_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_zero_dfail_zero_comp_always_back_fail_inv_pass_inv_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_zero_dfail_repl_comp_equal_back_fail_decc_pass_zero_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_repl_dfail_incc_comp_greater_or_equal_back_fail_decw_pass_zero_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_inv_dfail_keep_comp_always_back_fail_decc_pass_repl_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_repl_dfail_zero_comp_not_equal_back_fail_wrap_pass_inv_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decw_dfail_keep_comp_never_back_fail_keep_pass_repl_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decw_dfail_incc_comp_always_back_fail_zero_pass_decw_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_incc_dfail_decc_comp_less_or_equal_back_fail_decw_pass_decw_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_wrap_dfail_incc_comp_greater_back_fail_repl_pass_incc_dfail_decc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_keep_dfail_zero_comp_less_back_fail_decw_pass_wrap_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_incc_dfail_decc_comp_greater_back_fail_inv_pass_keep_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_wrap_dfail_incc_comp_less_or_equal_back_fail_repl_pass_incc_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_inv_dfail_zero_comp_always_back_fail_decw_pass_wrap_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decc_dfail_keep_comp_greater_or_equal_back_fail_zero_pass_inv_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_zero_dfail_repl_comp_less_or_equal_back_fail_wrap_pass_decc_dfail_keep_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_keep_dfail_wrap_comp_greater_back_fail_repl_pass_zero_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_repl_dfail_zero_comp_equal_back_fail_incc_pass_keep_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_repl_dfail_incc_comp_never_back_fail_repl_pass_repl_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_zero_dfail_repl_comp_greater_back_fail_wrap_pass_repl_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decw_dfail_inv_comp_less_or_equal_back_fail_keep_pass_zero_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_inv_dfail_zero_comp_equal_back_fail_wrap_pass_decw_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decc_dfail_wrap_comp_greater_or_equal_back_fail_inv_pass_inv_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_repl_dfail_repl_comp_equal_back_fail_decw_pass_decc_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decw_dfail_inv_comp_greater_or_equal_back_fail_decc_pass_repl_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decc_dfail_keep_comp_never_back_fail_repl_pass_decw_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decc_dfail_keep_comp_not_equal_back_fail_decw_pass_decc_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_repl_dfail_repl_comp_greater_back_fail_decc_pass_decc_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decw_dfail_decw_comp_less_or_equal_back_fail_decw_pass_repl_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decw_dfail_repl_comp_never_back_fail_decw_pass_decw_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_keep_dfail_incc_comp_less_or_equal_back_fail_decw_pass_decw_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_incc_dfail_wrap_comp_greater_back_fail_inv_pass_keep_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_inv_dfail_repl_comp_not_equal_back_fail_decw_pass_incc_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_incc_dfail_incc_comp_less_back_fail_incc_pass_inv_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decw_dfail_repl_comp_always_back_fail_repl_pass_incc_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decc_dfail_wrap_comp_equal_back_fail_wrap_pass_decw_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decw_dfail_decw_comp_never_back_fail_decc_pass_decc_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_zero_dfail_repl_comp_less_back_fail_zero_pass_decw_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_repl_dfail_keep_comp_not_equal_back_fail_repl_pass_zero_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_repl_dfail_decc_comp_greater_or_equal_back_fail_decc_pass_repl_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decc_dfail_incc_comp_greater_back_fail_wrap_pass_repl_dfail_decc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_zero_dfail_inv_comp_equal_back_fail_decw_pass_decc_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_wrap_dfail_keep_comp_less_or_equal_back_fail_decc_pass_zero_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decc_dfail_inv_comp_less_back_fail_decc_pass_wrap_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_zero_dfail_wrap_comp_less_or_equal_back_fail_incc_pass_decc_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decw_dfail_incc_comp_greater_or_equal_back_fail_keep_pass_zero_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decw_dfail_decc_comp_less_back_fail_incc_pass_decw_dfail_incc_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_zero_dfail_inv_comp_less_back_fail_inv_pass_decw_dfail_decc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decc_dfail_inv_comp_greater_or_equal_back_fail_keep_pass_zero_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_incc_dfail_decw_comp_not_equal_back_fail_incc_pass_decc_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decc_dfail_inv_comp_never_back_fail_incc_pass_incc_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_zero_dfail_zero_comp_less_or_equal_back_fail_repl_pass_decc_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_inv_dfail_zero_comp_greater_back_fail_decc_pass_zero_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_zero_dfail_wrap_comp_greater_back_fail_repl_pass_inv_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_inv_dfail_wrap_comp_always_back_fail_repl_pass_zero_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_inv_dfail_incc_comp_greater_back_fail_repl_pass_inv_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decc_dfail_wrap_comp_always_back_fail_wrap_pass_inv_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decw_dfail_repl_comp_greater_or_equal_back_fail_inv_pass_decc_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_repl_dfail_repl_comp_always_back_fail_zero_pass_decw_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_zero_dfail_inv_comp_always_back_fail_repl_pass_repl_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_repl_dfail_keep_comp_greater_back_fail_zero_pass_zero_dfail_inv_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_keep_dfail_zero_comp_not_equal_back_fail_keep_pass_repl_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_repl_dfail_incc_comp_never_back_fail_wrap_pass_keep_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_wrap_dfail_repl_comp_equal_back_fail_zero_pass_repl_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_keep_dfail_keep_comp_equal_back_fail_keep_pass_wrap_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_zero_dfail_incc_comp_never_back_fail_decc_pass_keep_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decc_dfail_inv_comp_equal_back_fail_wrap_pass_zero_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_repl_dfail_incc_comp_equal_back_fail_inv_pass_decc_dfail_inv_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_wrap_dfail_keep_comp_always_back_fail_zero_pass_repl_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_inv_dfail_decw_comp_not_equal_back_fail_wrap_pass_wrap_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decc_dfail_repl_comp_always_back_fail_decc_pass_inv_dfail_decw_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_zero_dfail_zero_comp_never_back_fail_decc_pass_decc_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_keep_dfail_wrap_comp_never_back_fail_inv_pass_zero_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_zero_dfail_incc_comp_equal_back_fail_repl_pass_keep_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decw_dfail_keep_comp_equal_back_fail_repl_pass_zero_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_inv_dfail_zero_comp_greater_or_equal_back_fail_zero_pass_decw_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_zero_dfail_keep_comp_never_back_fail_keep_pass_inv_dfail_zero_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_repl_dfail_keep_comp_greater_back_fail_wrap_pass_zero_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_inv_dfail_inv_comp_less_or_equal_back_fail_repl_pass_repl_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_wrap_dfail_inv_comp_less_or_equal_back_fail_decw_pass_inv_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_zero_dfail_decc_comp_greater_back_fail_wrap_pass_wrap_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_incc_dfail_decw_comp_greater_back_fail_inv_pass_zero_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decw_dfail_repl_comp_never_back_fail_decw_pass_incc_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_incc_dfail_wrap_comp_equal_back_fail_zero_pass_decw_dfail_repl_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_wrap_dfail_keep_comp_less_or_equal_back_fail_decw_pass_incc_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_zero_dfail_incc_comp_never_back_fail_incc_pass_wrap_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_incc_dfail_incc_comp_not_equal_back_fail_decc_pass_zero_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_zero_dfail_decc_comp_greater_back_fail_decc_pass_incc_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decc_dfail_decw_comp_equal_back_fail_zero_pass_zero_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_keep_dfail_decw_comp_equal_back_fail_decw_pass_decc_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decw_dfail_wrap_comp_less_back_fail_wrap_pass_keep_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_wrap_dfail_wrap_comp_never_back_fail_incc_pass_decw_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_zero_dfail_wrap_comp_always_back_fail_keep_pass_wrap_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_keep_dfail_incc_comp_always_back_fail_inv_pass_zero_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_inv_dfail_zero_comp_not_equal_back_fail_repl_pass_keep_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_wrap_dfail_inv_comp_never_back_fail_inv_pass_inv_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decc_dfail_decc_comp_never_back_fail_inv_pass_wrap_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_zero_dfail_decw_comp_greater_back_fail_decw_pass_decc_dfail_decc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_repl_dfail_wrap_comp_less_or_equal_back_fail_keep_pass_zero_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_incc_dfail_repl_comp_less_back_fail_decc_pass_repl_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_wrap_dfail_inv_comp_not_equal_back_fail_repl_pass_incc_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_zero_dfail_repl_comp_less_or_equal_back_fail_incc_pass_wrap_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_wrap_dfail_zero_comp_equal_back_fail_zero_pass_zero_dfail_repl_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_repl_dfail_zero_comp_greater_back_fail_repl_pass_wrap_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_wrap_dfail_decc_comp_equal_back_fail_decc_pass_repl_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decc_dfail_decc_comp_greater_back_fail_wrap_pass_wrap_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decw_dfail_wrap_comp_always_back_fail_decw_pass_decc_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_wrap_dfail_zero_comp_never_back_fail_keep_pass_decw_dfail_wrap_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_inv_dfail_incc_comp_never_back_fail_decw_pass_wrap_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decw_dfail_zero_comp_equal_back_fail_decw_pass_inv_dfail_incc_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_zero_dfail_zero_comp_never_back_fail_repl_pass_decw_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_incc_dfail_repl_comp_always_back_fail_zero_pass_zero_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decc_dfail_inv_comp_not_equal_back_fail_decc_pass_incc_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_zero_dfail_wrap_comp_not_equal_back_fail_wrap_pass_decc_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_keep_dfail_keep_comp_less_back_fail_incc_pass_zero_dfail_wrap_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decw_dfail_decc_comp_always_back_fail_repl_pass_keep_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_keep_dfail_decc_comp_equal_back_fail_wrap_pass_decw_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_incc_dfail_zero_comp_greater_back_fail_zero_pass_keep_dfail_decc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_inv_dfail_decc_comp_always_back_fail_decw_pass_incc_dfail_zero_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_incc_dfail_zero_comp_equal_back_fail_incc_pass_inv_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_zero_dfail_wrap_comp_less_back_fail_decw_pass_incc_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_wrap_dfail_zero_comp_equal_back_fail_repl_pass_zero_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_incc_dfail_keep_comp_always_back_fail_wrap_pass_wrap_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decw_dfail_decc_comp_always_back_fail_zero_pass_incc_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_inv_dfail_incc_comp_less_or_equal_back_fail_inv_pass_decw_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_incc_dfail_decw_comp_greater_back_fail_decw_pass_inv_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_keep_dfail_decw_comp_equal_back_fail_decc_pass_incc_dfail_decw_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decc_dfail_repl_comp_greater_or_equal_back_fail_incc_pass_keep_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_repl_dfail_inv_comp_less_or_equal_back_fail_decw_pass_decc_dfail_repl_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decw_dfail_zero_comp_less_back_fail_decw_pass_repl_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_inv_dfail_inv_comp_never_back_fail_decw_pass_decw_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decc_dfail_wrap_comp_less_or_equal_back_fail_keep_pass_inv_dfail_inv_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_inv_dfail_wrap_comp_equal_back_fail_incc_pass_decc_dfail_wrap_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decc_dfail_incc_comp_equal_back_fail_zero_pass_inv_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_wrap_dfail_wrap_comp_equal_back_fail_incc_pass_decc_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_incc_dfail_inv_comp_less_or_equal_back_fail_incc_pass_wrap_dfail_wrap_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_keep_dfail_repl_comp_equal_back_fail_incc_pass_incc_dfail_inv_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_repl_dfail_keep_comp_not_equal_back_fail_keep_pass_keep_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decw_dfail_wrap_comp_greater_back_fail_wrap_pass_repl_dfail_keep_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decw_dfail_incc_comp_less_or_equal_back_fail_keep_pass_decw_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_keep_dfail_decw_comp_less_or_equal_back_fail_decc_pass_decw_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decc_dfail_decc_comp_not_equal_back_fail_inv_pass_keep_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_repl_dfail_incc_comp_greater_back_fail_decc_pass_decc_dfail_decc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_incc_dfail_repl_comp_greater_back_fail_keep_pass_repl_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_repl_dfail_decw_comp_greater_or_equal_back_fail_repl_pass_incc_dfail_repl_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decc_dfail_incc_comp_greater_back_fail_repl_pass_repl_dfail_decw_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decc_dfail_wrap_comp_greater_or_equal_back_fail_repl_pass_decc_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_wrap_dfail_keep_comp_less_or_equal_back_fail_decc_pass_decc_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_inv_dfail_decw_comp_less_or_equal_back_fail_keep_pass_wrap_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_repl_dfail_incc_comp_not_equal_back_fail_keep_pass_inv_dfail_decw_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_inv_dfail_zero_comp_not_equal_back_fail_decw_pass_repl_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decw_dfail_zero_comp_less_back_fail_repl_pass_inv_dfail_zero_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_wrap_dfail_keep_comp_equal_back_fail_zero_pass_decw_dfail_zero_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_repl_dfail_keep_comp_never_back_fail_keep_pass_wrap_dfail_keep_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_incc_dfail_repl_comp_not_equal_back_fail_keep_pass_repl_dfail_keep_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decw_dfail_keep_comp_less_back_fail_incc_pass_incc_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_zero_dfail_zero_comp_always_back_fail_keep_pass_decw_dfail_keep_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_inv_dfail_repl_comp_less_back_fail_decw_pass_zero_dfail_zero_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_wrap_dfail_keep_comp_less_or_equal_back_fail_incc_pass_inv_dfail_repl_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_inv_dfail_wrap_comp_greater_or_equal_back_fail_inv_pass_wrap_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decc_dfail_inv_comp_not_equal_back_fail_wrap_pass_inv_dfail_wrap_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decc_dfail_repl_comp_equal_back_fail_repl_pass_decc_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_zero_dfail_incc_comp_greater_back_fail_incc_pass_decc_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decw_dfail_inv_comp_greater_or_equal_back_fail_wrap_pass_zero_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_inv_dfail_incc_comp_less_or_equal_back_fail_wrap_pass_decw_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decw_dfail_inv_comp_greater_back_fail_incc_pass_inv_dfail_incc_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_decc_dfail_incc_comp_always_back_fail_keep_pass_decw_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_decc_dfail_incc_comp_equal_back_fail_decc_pass_decc_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_repl_dfail_incc_comp_less_back_fail_repl_pass_decc_dfail_incc_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_wrap_dfail_wrap_comp_less_back_fail_incc_pass_repl_dfail_incc_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_zero_dfail_zero_comp_equal_back_fail_inv_pass_wrap_dfail_wrap_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_wrap_dfail_inv_comp_less_back_fail_wrap_pass_zero_dfail_zero_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_decw_dfail_repl_comp_always_back_fail_wrap_pass_wrap_dfail_inv_comp_less
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_keep_dfail_inv_comp_not_equal_back_fail_zero_pass_decw_dfail_repl_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_wrap_dfail_decw_comp_equal_back_fail_repl_pass_keep_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_zero_dfail_incc_comp_always_back_fail_wrap_pass_wrap_dfail_decw_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_repl_dfail_decc_comp_always_back_fail_wrap_pass_zero_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_decc_dfail_repl_comp_not_equal_back_fail_decc_pass_repl_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_repl_dfail_decc_comp_always_back_fail_incc_pass_decc_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_repl_dfail_decw_comp_never_back_fail_inv_pass_repl_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_zero_dfail_decc_comp_greater_back_fail_repl_pass_repl_dfail_decw_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decc_dfail_repl_comp_not_equal_back_fail_decw_pass_zero_dfail_decc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_keep_dfail_keep_comp_less_or_equal_back_fail_inv_pass_decc_dfail_repl_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_inv_dfail_decc_comp_always_back_fail_wrap_pass_keep_dfail_keep_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_zero_pass_wrap_dfail_keep_comp_greater_back_fail_decc_pass_inv_dfail_decc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_wrap_dfail_incc_comp_greater_back_fail_zero_pass_wrap_dfail_keep_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_repl_dfail_inv_comp_greater_back_fail_repl_pass_wrap_dfail_incc_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_wrap_dfail_zero_comp_never_back_fail_wrap_pass_repl_dfail_inv_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_repl_dfail_zero_comp_less_or_equal_back_fail_incc_pass_wrap_dfail_zero_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_decw_dfail_inv_comp_greater_or_equal_back_fail_incc_pass_repl_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_wrap_dfail_keep_comp_always_back_fail_decw_pass_decw_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_wrap_dfail_incc_comp_always_back_fail_decw_pass_wrap_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_repl_dfail_wrap_comp_never_back_fail_wrap_pass_wrap_dfail_incc_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decw_pass_incc_dfail_zero_comp_less_or_equal_back_fail_inv_pass_repl_dfail_wrap_comp_never
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_incc_dfail_repl_comp_equal_back_fail_decw_pass_incc_dfail_zero_comp_less_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_wrap_pass_decc_dfail_wrap_comp_greater_back_fail_decc_pass_incc_dfail_repl_comp_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decw_dfail_keep_comp_always_back_fail_wrap_pass_decc_dfail_wrap_comp_greater
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_incc_pass_inv_dfail_incc_comp_not_equal_back_fail_keep_pass_decw_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_repl_dfail_inv_comp_greater_or_equal_back_fail_incc_pass_inv_dfail_incc_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_repl_pass_wrap_dfail_keep_comp_always_back_fail_keep_pass_repl_dfail_inv_comp_greater_or_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_inv_pass_decc_dfail_inv_comp_not_equal_back_fail_repl_pass_wrap_dfail_keep_comp_always
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_keep_pass_decc_dfail_zero_comp_less_back_fail_inv_pass_decc_dfail_inv_comp_not_equal
-dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.front_fail_decc_pass_repl_dfail_keep_comp_less_back_fail_keep_pass_decc_dfail_zero_comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_keep.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_zero.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_repl.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_incc.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decc.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_inv.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_wrap.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_keep.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_zero.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_repl.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_incc.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decc.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_inv.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d16_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_keep.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_zero.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_repl.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_incc.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decc.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_inv.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_wrap.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_keep.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_zero.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_repl.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_incc.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decc.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_inv.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_wrap.pass_decw.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_keep.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_keep.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_keep.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_keep.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_keep.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_keep.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_keep.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_keep.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_keep.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_keep.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_keep.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_keep.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_keep.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_keep.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_keep.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_keep.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_keep.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_keep.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_keep.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_keep.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_keep.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_keep.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_keep.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_keep.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_keep.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_keep.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_keep.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_keep.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_keep.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_keep.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_keep.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_keep.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_keep.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_keep.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_keep.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_keep.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_keep.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_keep.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_keep.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_keep.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_keep.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_keep.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_keep.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_keep.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_keep.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_keep.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_keep.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_keep.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_keep.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_keep.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_keep.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_keep.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_keep.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_keep.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_keep.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_keep.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_keep.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_keep.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_keep.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_keep.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_keep.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_keep.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_keep.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_keep.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_zero.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_zero.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_zero.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_zero.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_zero.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_zero.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_zero.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_zero.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_zero.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_zero.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_zero.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_zero.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_zero.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_zero.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_zero.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_zero.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_zero.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_zero.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_zero.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_zero.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_zero.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_zero.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_zero.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_zero.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_zero.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_zero.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_zero.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_zero.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_zero.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_zero.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_zero.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_zero.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_zero.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_zero.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_zero.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_zero.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_zero.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_zero.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_zero.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_zero.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_zero.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_zero.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_zero.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_zero.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_zero.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_zero.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_zero.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_zero.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_zero.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_zero.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_zero.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_zero.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_zero.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_zero.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_zero.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_zero.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_zero.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_zero.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_zero.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_zero.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_zero.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_zero.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_zero.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_zero.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_repl.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_repl.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_repl.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_repl.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_repl.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_repl.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_repl.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_repl.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_repl.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_repl.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_repl.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_repl.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_repl.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_repl.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_repl.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_repl.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_repl.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_repl.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_repl.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_repl.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_repl.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_repl.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_repl.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_repl.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_repl.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_repl.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_repl.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_repl.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_repl.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_repl.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_repl.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_repl.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_repl.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_repl.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_repl.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_repl.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_repl.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_repl.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_repl.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_repl.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_repl.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_repl.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_repl.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_repl.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_repl.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_repl.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_repl.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_repl.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_repl.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_repl.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_repl.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_repl.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_repl.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_repl.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_repl.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_repl.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_repl.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_repl.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_repl.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_repl.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_repl.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_repl.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_repl.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_repl.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_incc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_incc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_incc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_incc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_incc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_incc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_incc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_incc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_incc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_incc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_incc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_incc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_incc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_incc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_incc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_incc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_incc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_incc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_incc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_incc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_incc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_incc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_incc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_incc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_incc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_incc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_incc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_incc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_incc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_incc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_incc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_incc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_incc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_incc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_incc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_incc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_incc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_incc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_incc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_incc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_incc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_incc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_incc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_incc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_incc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_incc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_incc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_incc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_incc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_incc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_incc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_incc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_incc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_incc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_incc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_incc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_incc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_incc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_incc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_incc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_incc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_incc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_incc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_incc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decc.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decc.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decc.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decc.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decc.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decc.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decc.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decc.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decc.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decc.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decc.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decc.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decc.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decc.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decc.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decc.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decc.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decc.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decc.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decc.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decc.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decc.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decc.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decc.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decc.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decc.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decc.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decc.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decc.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decc.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decc.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decc.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decc.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decc.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decc.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decc.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decc.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decc.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decc.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decc.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decc.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decc.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decc.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decc.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decc.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decc.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decc.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decc.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decc.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decc.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decc.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decc.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decc.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decc.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decc.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decc.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decc.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decc.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decc.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decc.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decc.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decc.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decc.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decc.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_inv.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_inv.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_inv.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_inv.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_inv.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_inv.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_inv.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_inv.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_inv.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_inv.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_inv.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_inv.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_inv.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_inv.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_inv.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_inv.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_inv.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_inv.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_inv.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_inv.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_inv.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_inv.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_inv.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_inv.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_inv.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_inv.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_inv.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_inv.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_inv.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_inv.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_inv.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_inv.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_inv.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_inv.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_inv.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_inv.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_inv.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_inv.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_inv.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_inv.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_inv.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_inv.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_inv.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_inv.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_inv.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_inv.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_inv.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_inv.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_inv.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_inv.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_inv.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_inv.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_inv.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_inv.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_inv.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_inv.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_inv.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_inv.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_inv.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_inv.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_inv.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_inv.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_inv.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_inv.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_wrap.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_wrap.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_wrap.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_wrap.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_wrap.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_wrap.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_wrap.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_wrap.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_wrap.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_wrap.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_wrap.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_wrap.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_wrap.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_wrap.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_wrap.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_wrap.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_wrap.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_wrap.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_wrap.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_wrap.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_wrap.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_wrap.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_wrap.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_wrap.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_wrap.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_wrap.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_wrap.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_wrap.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_wrap.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_wrap.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_wrap.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_wrap.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_wrap.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_wrap.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_wrap.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_wrap.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_wrap.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_wrap.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_wrap.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_wrap.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_wrap.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_wrap.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_wrap.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_wrap.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_wrap.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_wrap.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_wrap.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_wrap.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_wrap.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_wrap.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_wrap.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_wrap.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_wrap.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_wrap.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_wrap.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_wrap.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_wrap.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_wrap.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_wrap.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_wrap.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_wrap.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_wrap.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_wrap.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_wrap.dfail_decw.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_keep.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_keep.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_keep.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_keep.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_keep.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_keep.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_keep.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_keep.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_zero.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_zero.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_zero.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_zero.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_zero.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_zero.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_zero.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_zero.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_repl.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_repl.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_repl.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_repl.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_repl.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_repl.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_repl.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_repl.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_incc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_incc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_incc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_incc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_incc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_incc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_incc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_incc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_decc.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_decc.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_decc.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_decc.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_decc.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_decc.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_decc.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_decc.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_inv.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_inv.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_inv.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_inv.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_inv.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_inv.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_inv.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_inv.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_wrap.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_wrap.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_wrap.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_wrap.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_wrap.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_wrap.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_wrap.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_wrap.comp_always
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_never
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_less
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_less_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_greater
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_not_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_greater_or_equal
+dEQP-VK.pipeline.stencil.format.d32_sfloat_s8_uint.states.fail_decw.pass_decw.dfail_decw.comp_always
 dEQP-VK.pipeline.blend.format.r4g4_unorm_pack8.states.color_dc_sas_rsub_alpha_1mdc_1msc_sub-color_1msa_1msc_add_alpha_ca_da_min-color_1msc_da_sub_alpha_1mca_ca_sub-color_o_1mda_max_alpha_sa_dc_min
 dEQP-VK.pipeline.blend.format.r4g4_unorm_pack8.states.color_sas_1mda_rsub_alpha_1mda_1mcc_sub-color_1mda_1mca_min_alpha_o_cc_min-color_1mdc_da_min_alpha_1mda_da_min-color_sas_1msa_max_alpha_sas_o_min
 dEQP-VK.pipeline.blend.format.r4g4_unorm_pack8.states.color_ca_1mcc_rsub_alpha_sa_1msc_rsub-color_1mca_ca_rsub_alpha_1msc_da_rsub-color_1mcc_1mdc_sub_alpha_z_da_sub-color_sc_dc_add_alpha_1mdc_1msa_min
@@ -87765,449 +93653,893 @@ dEQP-VK.pipeline.depth.format_features.support_d16_unorm
 dEQP-VK.pipeline.depth.format_features.support_d24_unorm_or_d32_sfloat
 dEQP-VK.pipeline.depth.format_features.support_d24_unorm_s8_uint_or_d32_sfloat_s8_uint
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.not_equal_not_equal_not_equal_not_equal
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.not_equal_not_equal_not_equal_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.not_equal_equal_equal_greater
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.not_equal_equal_equal_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.not_equal_greater_greater_less_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.not_equal_greater_greater_less_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.not_equal_greater_or_equal_greater_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.not_equal_greater_or_equal_greater_or_equal_greater_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.not_equal_less_or_equal_less_or_equal_always
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.not_equal_less_or_equal_less_or_equal_always_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.not_equal_less_less_less
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.not_equal_less_less_less_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.not_equal_never_never_never
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.not_equal_never_never_never_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.equal_not_equal_equal_equal
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.equal_not_equal_equal_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.equal_equal_not_equal_less
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.equal_equal_not_equal_less_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.equal_greater_greater_or_equal_not_equal
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.equal_greater_greater_or_equal_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.equal_greater_or_equal_greater_greater
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.equal_greater_or_equal_greater_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.equal_less_or_equal_less_less_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.equal_less_or_equal_less_less_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.not_equal_always_always_equal
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.not_equal_always_always_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.equal_less_never_always
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.equal_less_never_always_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.equal_never_less_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.equal_never_less_or_equal_greater_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.greater_not_equal_greater_less
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.greater_not_equal_greater_less_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.greater_equal_greater_or_equal_always
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.greater_equal_greater_or_equal_always_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.greater_greater_not_equal_greater
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.greater_greater_not_equal_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.greater_greater_or_equal_less_or_equal_not_equal
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.greater_greater_or_equal_less_or_equal_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.greater_less_or_equal_never_greater_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.greater_less_or_equal_never_greater_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.greater_less_equal_never
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.greater_less_equal_never_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.greater_or_equal_not_equal_greater_or_equal_greater
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.greater_or_equal_not_equal_greater_or_equal_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.greater_never_always_less_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.greater_never_always_less_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.greater_or_equal_equal_greater_not_equal
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.greater_or_equal_equal_greater_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.greater_or_equal_greater_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.greater_or_equal_greater_equal_greater_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.greater_or_equal_greater_or_equal_not_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.greater_or_equal_greater_or_equal_not_equal_less_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.greater_or_equal_less_or_equal_always_less
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.greater_or_equal_less_or_equal_always_less_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.greater_or_equal_less_less_or_equal_equal
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.greater_or_equal_less_less_or_equal_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.greater_or_equal_always_less_never
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.greater_or_equal_always_less_never_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.less_or_equal_not_equal_less_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.less_or_equal_not_equal_less_or_equal_less_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.less_or_equal_equal_less_equal
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.less_or_equal_equal_less_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.less_or_equal_greater_never_less
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.less_or_equal_greater_never_less_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.less_or_equal_greater_or_equal_equal_always
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.less_or_equal_greater_or_equal_equal_always_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.less_or_equal_less_not_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.less_or_equal_less_not_equal_greater_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.less_or_equal_less_or_equal_greater_or_equal_never
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.less_or_equal_less_or_equal_greater_or_equal_never_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.less_not_equal_less_greater_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.less_not_equal_less_greater_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.less_equal_never_less_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.less_equal_never_less_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.less_greater_less_or_equal_never
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.less_greater_less_or_equal_never_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.less_less_or_equal_greater_equal
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.less_less_or_equal_greater_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.less_less_always_not_equal
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.less_less_always_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.less_never_not_equal_always
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.less_never_not_equal_always_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.never_not_equal_always_always
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.never_not_equal_always_always_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.less_always_greater_or_equal_less
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.less_always_greater_or_equal_less_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.never_greater_or_equal_never_equal
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.never_greater_or_equal_never_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.never_never_less_greater
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.never_never_less_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.never_less_or_equal_equal_not_equal
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.never_less_or_equal_equal_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.never_less_greater_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.never_less_greater_or_equal_less_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.never_always_greater_greater_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.never_always_greater_greater_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.always_equal_always_never
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.always_equal_always_never_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.always_never_equal_less
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.always_never_equal_less_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.always_greater_less_always
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.always_greater_less_always_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.always_always_never_greater
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.always_always_never_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.always_less_or_equal_not_equal_equal
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.always_less_or_equal_not_equal_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.less_or_equal_never_greater_not_equal
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.less_or_equal_never_greater_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.never_equal_less_or_equal_less
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.never_equal_less_or_equal_less_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.equal_greater_or_equal_always_never
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.equal_greater_or_equal_always_never_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.greater_always_less_not_equal
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.greater_always_less_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.greater_never_greater_or_equal_equal
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.greater_never_greater_or_equal_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.equal_always_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.equal_always_equal_less_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.less_or_equal_greater_always_greater
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.less_or_equal_greater_always_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.never_not_equal_not_equal_never
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.never_not_equal_not_equal_never_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.always_less_greater_greater
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.always_less_greater_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.always_not_equal_never_not_equal
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.always_not_equal_never_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.greater_or_equal_always_not_equal_always
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.greater_or_equal_always_not_equal_always_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.less_or_equal_always_less_or_equal_greater
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.less_or_equal_always_less_or_equal_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.less_greater_or_equal_less_greater
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.less_greater_or_equal_less_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.always_equal_less_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.always_equal_less_or_equal_greater_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.always_greater_or_equal_greater_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.always_greater_or_equal_greater_or_equal_less_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.greater_or_equal_greater_or_equal_never_less
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.greater_or_equal_greater_or_equal_never_less_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.greater_or_equal_never_greater_never
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.greater_or_equal_never_greater_never_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.less_greater_equal_equal
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.less_greater_equal_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.never_greater_always_greater_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.never_greater_always_greater_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.not_equal_not_equal_greater_always
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.not_equal_not_equal_greater_always_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.not_equal_less_or_equal_not_equal_greater
+dEQP-VK.pipeline.depth.format.d16_unorm.compare_ops.not_equal_less_or_equal_not_equal_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.not_equal_not_equal_not_equal_not_equal
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.not_equal_not_equal_not_equal_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.not_equal_equal_equal_greater
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.not_equal_equal_equal_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.not_equal_greater_greater_less_or_equal
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.not_equal_greater_greater_less_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.not_equal_greater_or_equal_greater_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.not_equal_greater_or_equal_greater_or_equal_greater_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.not_equal_less_or_equal_less_or_equal_always
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.not_equal_less_or_equal_less_or_equal_always_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.not_equal_less_less_less
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.not_equal_less_less_less_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.not_equal_never_never_never
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.not_equal_never_never_never_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.equal_not_equal_equal_equal
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.equal_not_equal_equal_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.equal_equal_not_equal_less
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.equal_equal_not_equal_less_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.equal_greater_greater_or_equal_not_equal
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.equal_greater_greater_or_equal_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.equal_greater_or_equal_greater_greater
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.equal_greater_or_equal_greater_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.equal_less_or_equal_less_less_or_equal
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.equal_less_or_equal_less_less_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.not_equal_always_always_equal
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.not_equal_always_always_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.equal_less_never_always
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.equal_less_never_always_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.equal_never_less_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.equal_never_less_or_equal_greater_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.greater_not_equal_greater_less
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.greater_not_equal_greater_less_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.greater_equal_greater_or_equal_always
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.greater_equal_greater_or_equal_always_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.greater_greater_not_equal_greater
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.greater_greater_not_equal_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.greater_greater_or_equal_less_or_equal_not_equal
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.greater_greater_or_equal_less_or_equal_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.greater_less_or_equal_never_greater_or_equal
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.greater_less_or_equal_never_greater_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.greater_less_equal_never
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.greater_less_equal_never_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.greater_or_equal_not_equal_greater_or_equal_greater
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.greater_or_equal_not_equal_greater_or_equal_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.greater_never_always_less_or_equal
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.greater_never_always_less_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.greater_or_equal_equal_greater_not_equal
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.greater_or_equal_equal_greater_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.greater_or_equal_greater_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.greater_or_equal_greater_equal_greater_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.greater_or_equal_greater_or_equal_not_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.greater_or_equal_greater_or_equal_not_equal_less_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.greater_or_equal_less_or_equal_always_less
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.greater_or_equal_less_or_equal_always_less_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.greater_or_equal_less_less_or_equal_equal
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.greater_or_equal_less_less_or_equal_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.greater_or_equal_always_less_never
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.greater_or_equal_always_less_never_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.less_or_equal_not_equal_less_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.less_or_equal_not_equal_less_or_equal_less_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.less_or_equal_equal_less_equal
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.less_or_equal_equal_less_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.less_or_equal_greater_never_less
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.less_or_equal_greater_never_less_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.less_or_equal_greater_or_equal_equal_always
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.less_or_equal_greater_or_equal_equal_always_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.less_or_equal_less_not_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.less_or_equal_less_not_equal_greater_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.less_or_equal_less_or_equal_greater_or_equal_never
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.less_or_equal_less_or_equal_greater_or_equal_never_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.less_not_equal_less_greater_or_equal
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.less_not_equal_less_greater_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.less_equal_never_less_or_equal
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.less_equal_never_less_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.less_greater_less_or_equal_never
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.less_greater_less_or_equal_never_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.less_less_or_equal_greater_equal
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.less_less_or_equal_greater_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.less_less_always_not_equal
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.less_less_always_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.less_never_not_equal_always
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.less_never_not_equal_always_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.never_not_equal_always_always
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.never_not_equal_always_always_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.less_always_greater_or_equal_less
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.less_always_greater_or_equal_less_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.never_greater_or_equal_never_equal
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.never_greater_or_equal_never_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.never_never_less_greater
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.never_never_less_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.never_less_or_equal_equal_not_equal
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.never_less_or_equal_equal_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.never_less_greater_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.never_less_greater_or_equal_less_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.never_always_greater_greater_or_equal
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.never_always_greater_greater_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.always_equal_always_never
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.always_equal_always_never_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.always_never_equal_less
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.always_never_equal_less_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.always_greater_less_always
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.always_greater_less_always_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.always_always_never_greater
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.always_always_never_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.always_less_or_equal_not_equal_equal
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.always_less_or_equal_not_equal_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.less_or_equal_never_greater_not_equal
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.less_or_equal_never_greater_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.never_equal_less_or_equal_less
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.never_equal_less_or_equal_less_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.equal_greater_or_equal_always_never
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.equal_greater_or_equal_always_never_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.greater_always_less_not_equal
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.greater_always_less_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.greater_never_greater_or_equal_equal
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.greater_never_greater_or_equal_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.equal_always_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.equal_always_equal_less_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.less_or_equal_greater_always_greater
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.less_or_equal_greater_always_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.never_not_equal_not_equal_never
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.never_not_equal_not_equal_never_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.always_less_greater_greater
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.always_less_greater_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.always_not_equal_never_not_equal
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.always_not_equal_never_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.greater_or_equal_always_not_equal_always
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.greater_or_equal_always_not_equal_always_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.less_or_equal_always_less_or_equal_greater
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.less_or_equal_always_less_or_equal_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.less_greater_or_equal_less_greater
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.less_greater_or_equal_less_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.always_equal_less_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.always_equal_less_or_equal_greater_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.always_greater_or_equal_greater_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.always_greater_or_equal_greater_or_equal_less_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.greater_or_equal_greater_or_equal_never_less
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.greater_or_equal_greater_or_equal_never_less_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.greater_or_equal_never_greater_never
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.greater_or_equal_never_greater_never_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.less_greater_equal_equal
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.less_greater_equal_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.never_greater_always_greater_or_equal
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.never_greater_always_greater_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.not_equal_not_equal_greater_always
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.not_equal_not_equal_greater_always_depth_bounds_test
 dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.not_equal_less_or_equal_not_equal_greater
+dEQP-VK.pipeline.depth.format.x8_d24_unorm_pack32.compare_ops.not_equal_less_or_equal_not_equal_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.not_equal_not_equal_not_equal_not_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.not_equal_not_equal_not_equal_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.not_equal_equal_equal_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.not_equal_equal_equal_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.not_equal_greater_greater_less_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.not_equal_greater_greater_less_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.not_equal_greater_or_equal_greater_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.not_equal_greater_or_equal_greater_or_equal_greater_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.not_equal_less_or_equal_less_or_equal_always
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.not_equal_less_or_equal_less_or_equal_always_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.not_equal_less_less_less
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.not_equal_less_less_less_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.not_equal_never_never_never
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.not_equal_never_never_never_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.equal_not_equal_equal_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.equal_not_equal_equal_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.equal_equal_not_equal_less
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.equal_equal_not_equal_less_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.equal_greater_greater_or_equal_not_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.equal_greater_greater_or_equal_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.equal_greater_or_equal_greater_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.equal_greater_or_equal_greater_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.equal_less_or_equal_less_less_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.equal_less_or_equal_less_less_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.not_equal_always_always_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.not_equal_always_always_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.equal_less_never_always
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.equal_less_never_always_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.equal_never_less_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.equal_never_less_or_equal_greater_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.greater_not_equal_greater_less
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.greater_not_equal_greater_less_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.greater_equal_greater_or_equal_always
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.greater_equal_greater_or_equal_always_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.greater_greater_not_equal_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.greater_greater_not_equal_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.greater_greater_or_equal_less_or_equal_not_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.greater_greater_or_equal_less_or_equal_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.greater_less_or_equal_never_greater_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.greater_less_or_equal_never_greater_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.greater_less_equal_never
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.greater_less_equal_never_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.greater_or_equal_not_equal_greater_or_equal_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.greater_or_equal_not_equal_greater_or_equal_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.greater_never_always_less_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.greater_never_always_less_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.greater_or_equal_equal_greater_not_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.greater_or_equal_equal_greater_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.greater_or_equal_greater_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.greater_or_equal_greater_equal_greater_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.greater_or_equal_greater_or_equal_not_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.greater_or_equal_greater_or_equal_not_equal_less_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.greater_or_equal_less_or_equal_always_less
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.greater_or_equal_less_or_equal_always_less_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.greater_or_equal_less_less_or_equal_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.greater_or_equal_less_less_or_equal_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.greater_or_equal_always_less_never
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.greater_or_equal_always_less_never_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.less_or_equal_not_equal_less_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.less_or_equal_not_equal_less_or_equal_less_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.less_or_equal_equal_less_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.less_or_equal_equal_less_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.less_or_equal_greater_never_less
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.less_or_equal_greater_never_less_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.less_or_equal_greater_or_equal_equal_always
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.less_or_equal_greater_or_equal_equal_always_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.less_or_equal_less_not_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.less_or_equal_less_not_equal_greater_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.less_or_equal_less_or_equal_greater_or_equal_never
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.less_or_equal_less_or_equal_greater_or_equal_never_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.less_not_equal_less_greater_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.less_not_equal_less_greater_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.less_equal_never_less_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.less_equal_never_less_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.less_greater_less_or_equal_never
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.less_greater_less_or_equal_never_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.less_less_or_equal_greater_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.less_less_or_equal_greater_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.less_less_always_not_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.less_less_always_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.less_never_not_equal_always
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.less_never_not_equal_always_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.never_not_equal_always_always
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.never_not_equal_always_always_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.less_always_greater_or_equal_less
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.less_always_greater_or_equal_less_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.never_greater_or_equal_never_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.never_greater_or_equal_never_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.never_never_less_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.never_never_less_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.never_less_or_equal_equal_not_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.never_less_or_equal_equal_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.never_less_greater_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.never_less_greater_or_equal_less_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.never_always_greater_greater_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.never_always_greater_greater_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.always_equal_always_never
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.always_equal_always_never_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.always_never_equal_less
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.always_never_equal_less_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.always_greater_less_always
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.always_greater_less_always_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.always_always_never_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.always_always_never_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.always_less_or_equal_not_equal_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.always_less_or_equal_not_equal_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.less_or_equal_never_greater_not_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.less_or_equal_never_greater_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.never_equal_less_or_equal_less
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.never_equal_less_or_equal_less_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.equal_greater_or_equal_always_never
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.equal_greater_or_equal_always_never_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.greater_always_less_not_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.greater_always_less_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.greater_never_greater_or_equal_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.greater_never_greater_or_equal_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.equal_always_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.equal_always_equal_less_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.less_or_equal_greater_always_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.less_or_equal_greater_always_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.never_not_equal_not_equal_never
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.never_not_equal_not_equal_never_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.always_less_greater_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.always_less_greater_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.always_not_equal_never_not_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.always_not_equal_never_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.greater_or_equal_always_not_equal_always
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.greater_or_equal_always_not_equal_always_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.less_or_equal_always_less_or_equal_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.less_or_equal_always_less_or_equal_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.less_greater_or_equal_less_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.less_greater_or_equal_less_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.always_equal_less_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.always_equal_less_or_equal_greater_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.always_greater_or_equal_greater_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.always_greater_or_equal_greater_or_equal_less_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.greater_or_equal_greater_or_equal_never_less
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.greater_or_equal_greater_or_equal_never_less_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.greater_or_equal_never_greater_never
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.greater_or_equal_never_greater_never_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.less_greater_equal_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.less_greater_equal_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.never_greater_always_greater_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.never_greater_always_greater_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.not_equal_not_equal_greater_always
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.not_equal_not_equal_greater_always_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.not_equal_less_or_equal_not_equal_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat.compare_ops.not_equal_less_or_equal_not_equal_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.not_equal_not_equal_not_equal_not_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.not_equal_not_equal_not_equal_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.not_equal_equal_equal_greater
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.not_equal_equal_equal_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.not_equal_greater_greater_less_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.not_equal_greater_greater_less_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.not_equal_greater_or_equal_greater_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.not_equal_greater_or_equal_greater_or_equal_greater_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.not_equal_less_or_equal_less_or_equal_always
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.not_equal_less_or_equal_less_or_equal_always_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.not_equal_less_less_less
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.not_equal_less_less_less_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.not_equal_never_never_never
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.not_equal_never_never_never_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.equal_not_equal_equal_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.equal_not_equal_equal_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.equal_equal_not_equal_less
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.equal_equal_not_equal_less_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.equal_greater_greater_or_equal_not_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.equal_greater_greater_or_equal_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.equal_greater_or_equal_greater_greater
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.equal_greater_or_equal_greater_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.equal_less_or_equal_less_less_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.equal_less_or_equal_less_less_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.not_equal_always_always_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.not_equal_always_always_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.equal_less_never_always
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.equal_less_never_always_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.equal_never_less_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.equal_never_less_or_equal_greater_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.greater_not_equal_greater_less
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.greater_not_equal_greater_less_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.greater_equal_greater_or_equal_always
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.greater_equal_greater_or_equal_always_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.greater_greater_not_equal_greater
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.greater_greater_not_equal_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.greater_greater_or_equal_less_or_equal_not_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.greater_greater_or_equal_less_or_equal_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.greater_less_or_equal_never_greater_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.greater_less_or_equal_never_greater_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.greater_less_equal_never
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.greater_less_equal_never_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.greater_or_equal_not_equal_greater_or_equal_greater
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.greater_or_equal_not_equal_greater_or_equal_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.greater_never_always_less_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.greater_never_always_less_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.greater_or_equal_equal_greater_not_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.greater_or_equal_equal_greater_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.greater_or_equal_greater_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.greater_or_equal_greater_equal_greater_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.greater_or_equal_greater_or_equal_not_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.greater_or_equal_greater_or_equal_not_equal_less_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.greater_or_equal_less_or_equal_always_less
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.greater_or_equal_less_or_equal_always_less_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.greater_or_equal_less_less_or_equal_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.greater_or_equal_less_less_or_equal_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.greater_or_equal_always_less_never
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.greater_or_equal_always_less_never_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.less_or_equal_not_equal_less_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.less_or_equal_not_equal_less_or_equal_less_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.less_or_equal_equal_less_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.less_or_equal_equal_less_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.less_or_equal_greater_never_less
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.less_or_equal_greater_never_less_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.less_or_equal_greater_or_equal_equal_always
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.less_or_equal_greater_or_equal_equal_always_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.less_or_equal_less_not_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.less_or_equal_less_not_equal_greater_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.less_or_equal_less_or_equal_greater_or_equal_never
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.less_or_equal_less_or_equal_greater_or_equal_never_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.less_not_equal_less_greater_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.less_not_equal_less_greater_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.less_equal_never_less_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.less_equal_never_less_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.less_greater_less_or_equal_never
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.less_greater_less_or_equal_never_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.less_less_or_equal_greater_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.less_less_or_equal_greater_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.less_less_always_not_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.less_less_always_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.less_never_not_equal_always
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.less_never_not_equal_always_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.never_not_equal_always_always
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.never_not_equal_always_always_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.less_always_greater_or_equal_less
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.less_always_greater_or_equal_less_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.never_greater_or_equal_never_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.never_greater_or_equal_never_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.never_never_less_greater
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.never_never_less_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.never_less_or_equal_equal_not_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.never_less_or_equal_equal_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.never_less_greater_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.never_less_greater_or_equal_less_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.never_always_greater_greater_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.never_always_greater_greater_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.always_equal_always_never
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.always_equal_always_never_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.always_never_equal_less
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.always_never_equal_less_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.always_greater_less_always
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.always_greater_less_always_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.always_always_never_greater
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.always_always_never_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.always_less_or_equal_not_equal_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.always_less_or_equal_not_equal_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.less_or_equal_never_greater_not_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.less_or_equal_never_greater_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.never_equal_less_or_equal_less
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.never_equal_less_or_equal_less_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.equal_greater_or_equal_always_never
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.equal_greater_or_equal_always_never_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.greater_always_less_not_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.greater_always_less_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.greater_never_greater_or_equal_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.greater_never_greater_or_equal_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.equal_always_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.equal_always_equal_less_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.less_or_equal_greater_always_greater
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.less_or_equal_greater_always_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.never_not_equal_not_equal_never
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.never_not_equal_not_equal_never_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.always_less_greater_greater
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.always_less_greater_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.always_not_equal_never_not_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.always_not_equal_never_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.greater_or_equal_always_not_equal_always
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.greater_or_equal_always_not_equal_always_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.less_or_equal_always_less_or_equal_greater
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.less_or_equal_always_less_or_equal_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.less_greater_or_equal_less_greater
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.less_greater_or_equal_less_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.always_equal_less_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.always_equal_less_or_equal_greater_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.always_greater_or_equal_greater_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.always_greater_or_equal_greater_or_equal_less_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.greater_or_equal_greater_or_equal_never_less
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.greater_or_equal_greater_or_equal_never_less_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.greater_or_equal_never_greater_never
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.greater_or_equal_never_greater_never_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.less_greater_equal_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.less_greater_equal_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.never_greater_always_greater_or_equal
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.never_greater_always_greater_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.not_equal_not_equal_greater_always
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.not_equal_not_equal_greater_always_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.not_equal_less_or_equal_not_equal_greater
+dEQP-VK.pipeline.depth.format.d16_unorm_s8_uint.compare_ops.not_equal_less_or_equal_not_equal_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.not_equal_not_equal_not_equal_not_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.not_equal_not_equal_not_equal_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.not_equal_equal_equal_greater
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.not_equal_equal_equal_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.not_equal_greater_greater_less_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.not_equal_greater_greater_less_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.not_equal_greater_or_equal_greater_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.not_equal_greater_or_equal_greater_or_equal_greater_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.not_equal_less_or_equal_less_or_equal_always
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.not_equal_less_or_equal_less_or_equal_always_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.not_equal_less_less_less
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.not_equal_less_less_less_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.not_equal_never_never_never
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.not_equal_never_never_never_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.equal_not_equal_equal_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.equal_not_equal_equal_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.equal_equal_not_equal_less
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.equal_equal_not_equal_less_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.equal_greater_greater_or_equal_not_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.equal_greater_greater_or_equal_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.equal_greater_or_equal_greater_greater
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.equal_greater_or_equal_greater_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.equal_less_or_equal_less_less_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.equal_less_or_equal_less_less_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.not_equal_always_always_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.not_equal_always_always_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.equal_less_never_always
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.equal_less_never_always_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.equal_never_less_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.equal_never_less_or_equal_greater_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.greater_not_equal_greater_less
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.greater_not_equal_greater_less_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.greater_equal_greater_or_equal_always
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.greater_equal_greater_or_equal_always_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.greater_greater_not_equal_greater
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.greater_greater_not_equal_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.greater_greater_or_equal_less_or_equal_not_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.greater_greater_or_equal_less_or_equal_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.greater_less_or_equal_never_greater_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.greater_less_or_equal_never_greater_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.greater_less_equal_never
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.greater_less_equal_never_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.greater_or_equal_not_equal_greater_or_equal_greater
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.greater_or_equal_not_equal_greater_or_equal_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.greater_never_always_less_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.greater_never_always_less_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.greater_or_equal_equal_greater_not_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.greater_or_equal_equal_greater_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.greater_or_equal_greater_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.greater_or_equal_greater_equal_greater_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.greater_or_equal_greater_or_equal_not_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.greater_or_equal_greater_or_equal_not_equal_less_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.greater_or_equal_less_or_equal_always_less
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.greater_or_equal_less_or_equal_always_less_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.greater_or_equal_less_less_or_equal_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.greater_or_equal_less_less_or_equal_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.greater_or_equal_always_less_never
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.greater_or_equal_always_less_never_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.less_or_equal_not_equal_less_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.less_or_equal_not_equal_less_or_equal_less_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.less_or_equal_equal_less_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.less_or_equal_equal_less_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.less_or_equal_greater_never_less
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.less_or_equal_greater_never_less_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.less_or_equal_greater_or_equal_equal_always
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.less_or_equal_greater_or_equal_equal_always_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.less_or_equal_less_not_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.less_or_equal_less_not_equal_greater_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.less_or_equal_less_or_equal_greater_or_equal_never
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.less_or_equal_less_or_equal_greater_or_equal_never_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.less_not_equal_less_greater_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.less_not_equal_less_greater_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.less_equal_never_less_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.less_equal_never_less_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.less_greater_less_or_equal_never
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.less_greater_less_or_equal_never_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.less_less_or_equal_greater_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.less_less_or_equal_greater_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.less_less_always_not_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.less_less_always_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.less_never_not_equal_always
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.less_never_not_equal_always_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.never_not_equal_always_always
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.never_not_equal_always_always_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.less_always_greater_or_equal_less
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.less_always_greater_or_equal_less_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.never_greater_or_equal_never_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.never_greater_or_equal_never_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.never_never_less_greater
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.never_never_less_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.never_less_or_equal_equal_not_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.never_less_or_equal_equal_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.never_less_greater_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.never_less_greater_or_equal_less_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.never_always_greater_greater_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.never_always_greater_greater_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.always_equal_always_never
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.always_equal_always_never_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.always_never_equal_less
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.always_never_equal_less_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.always_greater_less_always
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.always_greater_less_always_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.always_always_never_greater
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.always_always_never_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.always_less_or_equal_not_equal_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.always_less_or_equal_not_equal_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.less_or_equal_never_greater_not_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.less_or_equal_never_greater_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.never_equal_less_or_equal_less
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.never_equal_less_or_equal_less_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.equal_greater_or_equal_always_never
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.equal_greater_or_equal_always_never_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.greater_always_less_not_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.greater_always_less_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.greater_never_greater_or_equal_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.greater_never_greater_or_equal_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.equal_always_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.equal_always_equal_less_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.less_or_equal_greater_always_greater
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.less_or_equal_greater_always_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.never_not_equal_not_equal_never
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.never_not_equal_not_equal_never_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.always_less_greater_greater
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.always_less_greater_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.always_not_equal_never_not_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.always_not_equal_never_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.greater_or_equal_always_not_equal_always
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.greater_or_equal_always_not_equal_always_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.less_or_equal_always_less_or_equal_greater
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.less_or_equal_always_less_or_equal_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.less_greater_or_equal_less_greater
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.less_greater_or_equal_less_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.always_equal_less_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.always_equal_less_or_equal_greater_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.always_greater_or_equal_greater_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.always_greater_or_equal_greater_or_equal_less_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.greater_or_equal_greater_or_equal_never_less
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.greater_or_equal_greater_or_equal_never_less_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.greater_or_equal_never_greater_never
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.greater_or_equal_never_greater_never_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.less_greater_equal_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.less_greater_equal_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.never_greater_always_greater_or_equal
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.never_greater_always_greater_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.not_equal_not_equal_greater_always
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.not_equal_not_equal_greater_always_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.not_equal_less_or_equal_not_equal_greater
+dEQP-VK.pipeline.depth.format.d24_unorm_s8_uint.compare_ops.not_equal_less_or_equal_not_equal_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.not_equal_not_equal_not_equal_not_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.not_equal_not_equal_not_equal_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.not_equal_equal_equal_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.not_equal_equal_equal_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.not_equal_greater_greater_less_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.not_equal_greater_greater_less_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.not_equal_greater_or_equal_greater_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.not_equal_greater_or_equal_greater_or_equal_greater_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.not_equal_less_or_equal_less_or_equal_always
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.not_equal_less_or_equal_less_or_equal_always_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.not_equal_less_less_less
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.not_equal_less_less_less_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.not_equal_never_never_never
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.not_equal_never_never_never_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.equal_not_equal_equal_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.equal_not_equal_equal_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.equal_equal_not_equal_less
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.equal_equal_not_equal_less_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.equal_greater_greater_or_equal_not_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.equal_greater_greater_or_equal_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.equal_greater_or_equal_greater_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.equal_greater_or_equal_greater_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.equal_less_or_equal_less_less_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.equal_less_or_equal_less_less_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.not_equal_always_always_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.not_equal_always_always_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.equal_less_never_always
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.equal_less_never_always_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.equal_never_less_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.equal_never_less_or_equal_greater_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.greater_not_equal_greater_less
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.greater_not_equal_greater_less_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.greater_equal_greater_or_equal_always
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.greater_equal_greater_or_equal_always_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.greater_greater_not_equal_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.greater_greater_not_equal_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.greater_greater_or_equal_less_or_equal_not_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.greater_greater_or_equal_less_or_equal_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.greater_less_or_equal_never_greater_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.greater_less_or_equal_never_greater_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.greater_less_equal_never
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.greater_less_equal_never_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.greater_or_equal_not_equal_greater_or_equal_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.greater_or_equal_not_equal_greater_or_equal_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.greater_never_always_less_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.greater_never_always_less_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.greater_or_equal_equal_greater_not_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.greater_or_equal_equal_greater_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.greater_or_equal_greater_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.greater_or_equal_greater_equal_greater_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.greater_or_equal_greater_or_equal_not_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.greater_or_equal_greater_or_equal_not_equal_less_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.greater_or_equal_less_or_equal_always_less
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.greater_or_equal_less_or_equal_always_less_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.greater_or_equal_less_less_or_equal_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.greater_or_equal_less_less_or_equal_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.greater_or_equal_always_less_never
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.greater_or_equal_always_less_never_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.less_or_equal_not_equal_less_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.less_or_equal_not_equal_less_or_equal_less_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.less_or_equal_equal_less_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.less_or_equal_equal_less_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.less_or_equal_greater_never_less
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.less_or_equal_greater_never_less_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.less_or_equal_greater_or_equal_equal_always
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.less_or_equal_greater_or_equal_equal_always_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.less_or_equal_less_not_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.less_or_equal_less_not_equal_greater_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.less_or_equal_less_or_equal_greater_or_equal_never
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.less_or_equal_less_or_equal_greater_or_equal_never_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.less_not_equal_less_greater_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.less_not_equal_less_greater_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.less_equal_never_less_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.less_equal_never_less_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.less_greater_less_or_equal_never
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.less_greater_less_or_equal_never_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.less_less_or_equal_greater_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.less_less_or_equal_greater_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.less_less_always_not_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.less_less_always_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.less_never_not_equal_always
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.less_never_not_equal_always_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.never_not_equal_always_always
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.never_not_equal_always_always_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.less_always_greater_or_equal_less
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.less_always_greater_or_equal_less_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.never_greater_or_equal_never_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.never_greater_or_equal_never_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.never_never_less_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.never_never_less_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.never_less_or_equal_equal_not_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.never_less_or_equal_equal_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.never_less_greater_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.never_less_greater_or_equal_less_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.never_always_greater_greater_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.never_always_greater_greater_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.always_equal_always_never
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.always_equal_always_never_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.always_never_equal_less
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.always_never_equal_less_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.always_greater_less_always
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.always_greater_less_always_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.always_always_never_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.always_always_never_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.always_less_or_equal_not_equal_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.always_less_or_equal_not_equal_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.less_or_equal_never_greater_not_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.less_or_equal_never_greater_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.never_equal_less_or_equal_less
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.never_equal_less_or_equal_less_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.equal_greater_or_equal_always_never
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.equal_greater_or_equal_always_never_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.greater_always_less_not_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.greater_always_less_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.greater_never_greater_or_equal_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.greater_never_greater_or_equal_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.equal_always_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.equal_always_equal_less_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.less_or_equal_greater_always_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.less_or_equal_greater_always_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.never_not_equal_not_equal_never
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.never_not_equal_not_equal_never_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.always_less_greater_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.always_less_greater_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.always_not_equal_never_not_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.always_not_equal_never_not_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.greater_or_equal_always_not_equal_always
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.greater_or_equal_always_not_equal_always_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.less_or_equal_always_less_or_equal_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.less_or_equal_always_less_or_equal_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.less_greater_or_equal_less_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.less_greater_or_equal_less_greater_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.always_equal_less_or_equal_greater_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.always_equal_less_or_equal_greater_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.always_greater_or_equal_greater_or_equal_less_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.always_greater_or_equal_greater_or_equal_less_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.greater_or_equal_greater_or_equal_never_less
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.greater_or_equal_greater_or_equal_never_less_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.greater_or_equal_never_greater_never
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.greater_or_equal_never_greater_never_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.less_greater_equal_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.less_greater_equal_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.never_greater_always_greater_or_equal
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.never_greater_always_greater_or_equal_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.not_equal_not_equal_greater_always
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.not_equal_not_equal_greater_always_depth_bounds_test
 dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.not_equal_less_or_equal_not_equal_greater
+dEQP-VK.pipeline.depth.format.d32_sfloat_s8_uint.compare_ops.not_equal_less_or_equal_not_equal_greater_depth_bounds_test
 dEQP-VK.pipeline.image.suballocation.sampling_type.combined.view_type.1d.format.r4g4_unorm_pack8.count_1.size.1x1
 dEQP-VK.pipeline.image.suballocation.sampling_type.combined.view_type.1d.format.r4g4_unorm_pack8.count_1.size.2x1
 dEQP-VK.pipeline.image.suballocation.sampling_type.combined.view_type.1d.format.r4g4_unorm_pack8.count_1.size.32x1
@@ -162101,6 +168433,18 @@ dEQP-VK.binding_model.shader_access.secondary_cmd_buf.with_push_template.storage
 dEQP-VK.binding_model.shader_access.secondary_cmd_buf.with_push_template.storage_buffer.vertex_fragment.multiple_arbitrary_descriptors.offset_view_nonzero
 dEQP-VK.binding_model.shader_access.secondary_cmd_buf.with_push_template.storage_buffer.vertex_fragment.descriptor_array.offset_view_zero
 dEQP-VK.binding_model.shader_access.secondary_cmd_buf.with_push_template.storage_buffer.vertex_fragment.descriptor_array.offset_view_nonzero
+dEQP-VK.spirv_assembly.instruction.compute.localsize.literal_localsize
+dEQP-VK.spirv_assembly.instruction.compute.localsize.literal_and_specid_localsize
+dEQP-VK.spirv_assembly.instruction.compute.localsize.specid_localsize
+dEQP-VK.spirv_assembly.instruction.compute.localsize.literal_localsize_x
+dEQP-VK.spirv_assembly.instruction.compute.localsize.literal_and_specid_localsize_x
+dEQP-VK.spirv_assembly.instruction.compute.localsize.specid_localsize_x
+dEQP-VK.spirv_assembly.instruction.compute.localsize.literal_localsize_y
+dEQP-VK.spirv_assembly.instruction.compute.localsize.literal_and_specid_localsize_y
+dEQP-VK.spirv_assembly.instruction.compute.localsize.specid_localsize_y
+dEQP-VK.spirv_assembly.instruction.compute.localsize.literal_localsize_z
+dEQP-VK.spirv_assembly.instruction.compute.localsize.literal_and_specid_localsize_z
+dEQP-VK.spirv_assembly.instruction.compute.localsize.specid_localsize_z
 dEQP-VK.spirv_assembly.instruction.compute.opnop.all
 dEQP-VK.spirv_assembly.instruction.compute.opatomic.iadd
 dEQP-VK.spirv_assembly.instruction.compute.opatomic.isub
@@ -162165,6 +168509,8 @@ dEQP-VK.spirv_assembly.instruction.compute.opspecconstantop.snegate
 dEQP-VK.spirv_assembly.instruction.compute.opspecconstantop.not
 dEQP-VK.spirv_assembly.instruction.compute.opspecconstantop.logicalnot
 dEQP-VK.spirv_assembly.instruction.compute.opspecconstantop.select
+dEQP-VK.spirv_assembly.instruction.compute.opspecconstantop.sconvert
+dEQP-VK.spirv_assembly.instruction.compute.opspecconstantop.fconvert
 dEQP-VK.spirv_assembly.instruction.compute.opspecconstantop.vector_related
 dEQP-VK.spirv_assembly.instruction.compute.opsource.unknown_source
 dEQP-VK.spirv_assembly.instruction.compute.opsource.wrong_source
@@ -162189,6 +168535,14 @@ dEQP-VK.spirv_assembly.instruction.compute.decoration_group.all
 dEQP-VK.spirv_assembly.instruction.compute.opphi.block
 dEQP-VK.spirv_assembly.instruction.compute.opphi.induction
 dEQP-VK.spirv_assembly.instruction.compute.opphi.swap
+dEQP-VK.spirv_assembly.instruction.compute.opphi.wide
+dEQP-VK.spirv_assembly.instruction.compute.opphi.nested
+dEQP-VK.spirv_assembly.instruction.compute.opphi.vartype_int
+dEQP-VK.spirv_assembly.instruction.compute.opphi.vartype_float
+dEQP-VK.spirv_assembly.instruction.compute.opphi.vartype_vec3
+dEQP-VK.spirv_assembly.instruction.compute.opphi.vartype_mat4
+dEQP-VK.spirv_assembly.instruction.compute.opphi.vartype_array
+dEQP-VK.spirv_assembly.instruction.compute.opphi.vartype_struct
 dEQP-VK.spirv_assembly.instruction.compute.loop_control.none
 dEQP-VK.spirv_assembly.instruction.compute.loop_control.unroll
 dEQP-VK.spirv_assembly.instruction.compute.loop_control.dont_unroll
@@ -162649,6 +169003,18 @@ dEQP-VK.spirv_assembly.instruction.compute.variable_pointers.complex_types_compu
 dEQP-VK.spirv_assembly.instruction.compute.variable_pointers.complex_types_compute.opptraccesschain_float_single_buffer_first_input
 dEQP-VK.spirv_assembly.instruction.compute.variable_pointers.nullptr_compute.opvariable_initialized_null
 dEQP-VK.spirv_assembly.instruction.compute.variable_pointers.nullptr_compute.opselect_null_or_valid_ptr
+dEQP-VK.spirv_assembly.instruction.compute.image_sampler.imageread.storage_image.all_local_variables
+dEQP-VK.spirv_assembly.instruction.compute.image_sampler.imageread.storage_image.pass_image_to_function
+dEQP-VK.spirv_assembly.instruction.compute.image_sampler.imagefetch.sampled_image.all_local_variables
+dEQP-VK.spirv_assembly.instruction.compute.image_sampler.imagefetch.sampled_image.pass_image_to_function
+dEQP-VK.spirv_assembly.instruction.compute.image_sampler.imagefetch.sampled_image.pass_sampler_to_function
+dEQP-VK.spirv_assembly.instruction.compute.image_sampler.imagefetch.sampled_image.pass_image_and_sampler_to_function
+dEQP-VK.spirv_assembly.instruction.compute.image_sampler.imagefetch.combined_image_sampler.all_local_variables
+dEQP-VK.spirv_assembly.instruction.compute.image_sampler.imagesample.sampled_image.all_local_variables
+dEQP-VK.spirv_assembly.instruction.compute.image_sampler.imagesample.sampled_image.pass_image_to_function
+dEQP-VK.spirv_assembly.instruction.compute.image_sampler.imagesample.sampled_image.pass_sampler_to_function
+dEQP-VK.spirv_assembly.instruction.compute.image_sampler.imagesample.sampled_image.pass_image_and_sampler_to_function
+dEQP-VK.spirv_assembly.instruction.compute.image_sampler.imagesample.combined_image_sampler.all_local_variables
 dEQP-VK.spirv_assembly.instruction.graphics.opnop.opnop_vert
 dEQP-VK.spirv_assembly.instruction.graphics.opnop.opnop_tessc
 dEQP-VK.spirv_assembly.instruction.graphics.opnop.opnop_tesse
@@ -163322,6 +169688,16 @@ dEQP-VK.spirv_assembly.instruction.graphics.opspecconstantop.select_tessc
 dEQP-VK.spirv_assembly.instruction.graphics.opspecconstantop.select_tesse
 dEQP-VK.spirv_assembly.instruction.graphics.opspecconstantop.select_geom
 dEQP-VK.spirv_assembly.instruction.graphics.opspecconstantop.select_frag
+dEQP-VK.spirv_assembly.instruction.graphics.opspecconstantop.sconvert_vert
+dEQP-VK.spirv_assembly.instruction.graphics.opspecconstantop.sconvert_tessc
+dEQP-VK.spirv_assembly.instruction.graphics.opspecconstantop.sconvert_tesse
+dEQP-VK.spirv_assembly.instruction.graphics.opspecconstantop.sconvert_geom
+dEQP-VK.spirv_assembly.instruction.graphics.opspecconstantop.sconvert_frag
+dEQP-VK.spirv_assembly.instruction.graphics.opspecconstantop.fconvert_vert
+dEQP-VK.spirv_assembly.instruction.graphics.opspecconstantop.fconvert_tessc
+dEQP-VK.spirv_assembly.instruction.graphics.opspecconstantop.fconvert_tesse
+dEQP-VK.spirv_assembly.instruction.graphics.opspecconstantop.fconvert_geom
+dEQP-VK.spirv_assembly.instruction.graphics.opspecconstantop.fconvert_frag
 dEQP-VK.spirv_assembly.instruction.graphics.opspecconstantop.vector_related_vert
 dEQP-VK.spirv_assembly.instruction.graphics.opspecconstantop.vector_related_tessc
 dEQP-VK.spirv_assembly.instruction.graphics.opspecconstantop.vector_related_tesse
@@ -165422,6 +171798,66 @@ dEQP-VK.spirv_assembly.instruction.graphics.variable_pointers.nullptr_graphics.o
 dEQP-VK.spirv_assembly.instruction.graphics.variable_pointers.nullptr_graphics.opselect_null_or_valid_ptr_tesse
 dEQP-VK.spirv_assembly.instruction.graphics.variable_pointers.nullptr_graphics.opselect_null_or_valid_ptr_geom
 dEQP-VK.spirv_assembly.instruction.graphics.variable_pointers.nullptr_graphics.opselect_null_or_valid_ptr_frag
+dEQP-VK.spirv_assembly.instruction.graphics.image_sampler.imageread.storage_image.all_local_variables.shader_vert
+dEQP-VK.spirv_assembly.instruction.graphics.image_sampler.imageread.storage_image.all_local_variables.shader_tessc
+dEQP-VK.spirv_assembly.instruction.graphics.image_sampler.imageread.storage_image.all_local_variables.shader_tesse
+dEQP-VK.spirv_assembly.instruction.graphics.image_sampler.imageread.storage_image.all_local_variables.shader_geom
+dEQP-VK.spirv_assembly.instruction.graphics.image_sampler.imageread.storage_image.all_local_variables.shader_frag
+dEQP-VK.spirv_assembly.instruction.graphics.image_sampler.imageread.storage_image.pass_image_to_function.shader_vert
+dEQP-VK.spirv_assembly.instruction.graphics.image_sampler.imageread.storage_image.pass_image_to_function.shader_tessc
+dEQP-VK.spirv_assembly.instruction.graphics.image_sampler.imageread.storage_image.pass_image_to_function.shader_tesse
+dEQP-VK.spirv_assembly.instruction.graphics.image_sampler.imageread.storage_image.pass_image_to_function.shader_geom
+dEQP-VK.spirv_assembly.instruction.graphics.image_sampler.imageread.storage_image.pass_image_to_function.shader_frag
+dEQP-VK.spirv_assembly.instruction.graphics.image_sampler.imagefetch.sampled_image.all_local_variables.shader_vert
+dEQP-VK.spirv_assembly.instruction.graphics.image_sampler.imagefetch.sampled_image.all_local_variables.shader_tessc
+dEQP-VK.spirv_assembly.instruction.graphics.image_sampler.imagefetch.sampled_image.all_local_variables.shader_tesse
+dEQP-VK.spirv_assembly.instruction.graphics.image_sampler.imagefetch.sampled_image.all_local_variables.shader_geom
+dEQP-VK.spirv_assembly.instruction.graphics.image_sampler.imagefetch.sampled_image.all_local_variables.shader_frag
+dEQP-VK.spirv_assembly.instruction.graphics.image_sampler.imagefetch.sampled_image.pass_image_to_function.shader_vert
+dEQP-VK.spirv_assembly.instruction.graphics.image_sampler.imagefetch.sampled_image.pass_image_to_function.shader_tessc
+dEQP-VK.spirv_assembly.instruction.graphics.image_sampler.imagefetch.sampled_image.pass_image_to_function.shader_tesse
+dEQP-VK.spirv_assembly.instruction.graphics.image_sampler.imagefetch.sampled_image.pass_image_to_function.shader_geom
+dEQP-VK.spirv_assembly.instruction.graphics.image_sampler.imagefetch.sampled_image.pass_image_to_function.shader_frag
+dEQP-VK.spirv_assembly.instruction.graphics.image_sampler.imagefetch.sampled_image.pass_sampler_to_function.shader_vert
+dEQP-VK.spirv_assembly.instruction.graphics.image_sampler.imagefetch.sampled_image.pass_sampler_to_function.shader_tessc
+dEQP-VK.spirv_assembly.instruction.graphics.image_sampler.imagefetch.sampled_image.pass_sampler_to_function.shader_tesse
+dEQP-VK.spirv_assembly.instruction.graphics.image_sampler.imagefetch.sampled_image.pass_sampler_to_function.shader_geom
+dEQP-VK.spirv_assembly.instruction.graphics.image_sampler.imagefetch.sampled_image.pass_sampler_to_function.shader_frag
+dEQP-VK.spirv_assembly.instruction.graphics.image_sampler.imagefetch.sampled_image.pass_image_and_sampler_to_function.shader_vert
+dEQP-VK.spirv_assembly.instruction.graphics.image_sampler.imagefetch.sampled_image.pass_image_and_sampler_to_function.shader_tessc
+dEQP-VK.spirv_assembly.instruction.graphics.image_sampler.imagefetch.sampled_image.pass_image_and_sampler_to_function.shader_tesse
+dEQP-VK.spirv_assembly.instruction.graphics.image_sampler.imagefetch.sampled_image.pass_image_and_sampler_to_function.shader_geom
+dEQP-VK.spirv_assembly.instruction.graphics.image_sampler.imagefetch.sampled_image.pass_image_and_sampler_to_function.shader_frag
+dEQP-VK.spirv_assembly.instruction.graphics.image_sampler.imagefetch.combined_image_sampler.all_local_variables.shader_vert
+dEQP-VK.spirv_assembly.instruction.graphics.image_sampler.imagefetch.combined_image_sampler.all_local_variables.shader_tessc
+dEQP-VK.spirv_assembly.instruction.graphics.image_sampler.imagefetch.combined_image_sampler.all_local_variables.shader_tesse
+dEQP-VK.spirv_assembly.instruction.graphics.image_sampler.imagefetch.combined_image_sampler.all_local_variables.shader_geom
+dEQP-VK.spirv_assembly.instruction.graphics.image_sampler.imagefetch.combined_image_sampler.all_local_variables.shader_frag
+dEQP-VK.spirv_assembly.instruction.graphics.image_sampler.imagesample.sampled_image.all_local_variables.shader_vert
+dEQP-VK.spirv_assembly.instruction.graphics.image_sampler.imagesample.sampled_image.all_local_variables.shader_tessc
+dEQP-VK.spirv_assembly.instruction.graphics.image_sampler.imagesample.sampled_image.all_local_variables.shader_tesse
+dEQP-VK.spirv_assembly.instruction.graphics.image_sampler.imagesample.sampled_image.all_local_variables.shader_geom
+dEQP-VK.spirv_assembly.instruction.graphics.image_sampler.imagesample.sampled_image.all_local_variables.shader_frag
+dEQP-VK.spirv_assembly.instruction.graphics.image_sampler.imagesample.sampled_image.pass_image_to_function.shader_vert
+dEQP-VK.spirv_assembly.instruction.graphics.image_sampler.imagesample.sampled_image.pass_image_to_function.shader_tessc
+dEQP-VK.spirv_assembly.instruction.graphics.image_sampler.imagesample.sampled_image.pass_image_to_function.shader_tesse
+dEQP-VK.spirv_assembly.instruction.graphics.image_sampler.imagesample.sampled_image.pass_image_to_function.shader_geom
+dEQP-VK.spirv_assembly.instruction.graphics.image_sampler.imagesample.sampled_image.pass_image_to_function.shader_frag
+dEQP-VK.spirv_assembly.instruction.graphics.image_sampler.imagesample.sampled_image.pass_sampler_to_function.shader_vert
+dEQP-VK.spirv_assembly.instruction.graphics.image_sampler.imagesample.sampled_image.pass_sampler_to_function.shader_tessc
+dEQP-VK.spirv_assembly.instruction.graphics.image_sampler.imagesample.sampled_image.pass_sampler_to_function.shader_tesse
+dEQP-VK.spirv_assembly.instruction.graphics.image_sampler.imagesample.sampled_image.pass_sampler_to_function.shader_geom
+dEQP-VK.spirv_assembly.instruction.graphics.image_sampler.imagesample.sampled_image.pass_sampler_to_function.shader_frag
+dEQP-VK.spirv_assembly.instruction.graphics.image_sampler.imagesample.sampled_image.pass_image_and_sampler_to_function.shader_vert
+dEQP-VK.spirv_assembly.instruction.graphics.image_sampler.imagesample.sampled_image.pass_image_and_sampler_to_function.shader_tessc
+dEQP-VK.spirv_assembly.instruction.graphics.image_sampler.imagesample.sampled_image.pass_image_and_sampler_to_function.shader_tesse
+dEQP-VK.spirv_assembly.instruction.graphics.image_sampler.imagesample.sampled_image.pass_image_and_sampler_to_function.shader_geom
+dEQP-VK.spirv_assembly.instruction.graphics.image_sampler.imagesample.sampled_image.pass_image_and_sampler_to_function.shader_frag
+dEQP-VK.spirv_assembly.instruction.graphics.image_sampler.imagesample.combined_image_sampler.all_local_variables.shader_vert
+dEQP-VK.spirv_assembly.instruction.graphics.image_sampler.imagesample.combined_image_sampler.all_local_variables.shader_tessc
+dEQP-VK.spirv_assembly.instruction.graphics.image_sampler.imagesample.combined_image_sampler.all_local_variables.shader_tesse
+dEQP-VK.spirv_assembly.instruction.graphics.image_sampler.imagesample.combined_image_sampler.all_local_variables.shader_geom
+dEQP-VK.spirv_assembly.instruction.graphics.image_sampler.imagesample.combined_image_sampler.all_local_variables.shader_frag
 dEQP-VK.glsl.arrays.constructor.float3_vertex
 dEQP-VK.glsl.arrays.constructor.float3_fragment
 dEQP-VK.glsl.arrays.constructor.float4_vertex
@@ -167683,6 +174119,68 @@ dEQP-VK.glsl.swizzles.vector_swizzles.mediump_bvec4_rgrr_vertex
 dEQP-VK.glsl.swizzles.vector_swizzles.mediump_bvec4_rgrr_fragment
 dEQP-VK.glsl.swizzles.vector_swizzles.mediump_bvec4_bbab_vertex
 dEQP-VK.glsl.swizzles.vector_swizzles.mediump_bvec4_bbab_fragment
+dEQP-VK.glsl.440.linkage.varying.component.vert_in.vec2.as_float_float
+dEQP-VK.glsl.440.linkage.varying.component.vert_in.vec2.as_float_float_unused
+dEQP-VK.glsl.440.linkage.varying.component.vert_in.vec3.as_float_float_float
+dEQP-VK.glsl.440.linkage.varying.component.vert_in.vec3.as_float_float_float_unused
+dEQP-VK.glsl.440.linkage.varying.component.vert_in.vec3.as_float_vec2
+dEQP-VK.glsl.440.linkage.varying.component.vert_in.vec3.as_float_vec2_unused
+dEQP-VK.glsl.440.linkage.varying.component.vert_in.vec3.as_vec2_float
+dEQP-VK.glsl.440.linkage.varying.component.vert_in.vec3.as_vec2_float_unused
+dEQP-VK.glsl.440.linkage.varying.component.vert_in.vec4.as_float_float_float_float
+dEQP-VK.glsl.440.linkage.varying.component.vert_in.vec4.as_float_float_vec2
+dEQP-VK.glsl.440.linkage.varying.component.vert_in.vec4.as_float_vec2_float
+dEQP-VK.glsl.440.linkage.varying.component.vert_in.vec4.as_float_vec3
+dEQP-VK.glsl.440.linkage.varying.component.vert_in.vec4.as_vec2_float_float
+dEQP-VK.glsl.440.linkage.varying.component.vert_in.vec4.as_vec2_vec2
+dEQP-VK.glsl.440.linkage.varying.component.vert_in.vec4.as_vec3_float
+dEQP-VK.glsl.440.linkage.varying.component.vert_in.ivec2.as_int_int
+dEQP-VK.glsl.440.linkage.varying.component.vert_in.ivec2.as_int_int_unused
+dEQP-VK.glsl.440.linkage.varying.component.vert_in.ivec4.as_int_int_int_int
+dEQP-VK.glsl.440.linkage.varying.component.vert_in.ivec4.as_int_int_ivec2
+dEQP-VK.glsl.440.linkage.varying.component.vert_in.ivec4.as_int_ivec2_int
+dEQP-VK.glsl.440.linkage.varying.component.vert_in.ivec4.as_int_ivec3
+dEQP-VK.glsl.440.linkage.varying.component.vert_in.ivec4.as_ivec2_int_int
+dEQP-VK.glsl.440.linkage.varying.component.vert_in.ivec4.as_ivec2_ivec2
+dEQP-VK.glsl.440.linkage.varying.component.vert_in.ivec4.as_ivec3_int
+dEQP-VK.glsl.440.linkage.varying.component.vert_out_frag_in.vec2.as_float_float
+dEQP-VK.glsl.440.linkage.varying.component.vert_out_frag_in.vec3.as_float_float_float
+dEQP-VK.glsl.440.linkage.varying.component.vert_out_frag_in.vec3.as_float_vec2
+dEQP-VK.glsl.440.linkage.varying.component.vert_out_frag_in.vec3.as_vec2_float
+dEQP-VK.glsl.440.linkage.varying.component.vert_out_frag_in.vec4.as_float_float_float_float
+dEQP-VK.glsl.440.linkage.varying.component.vert_out_frag_in.vec4.as_float_float_vec2
+dEQP-VK.glsl.440.linkage.varying.component.vert_out_frag_in.vec4.as_float_vec2_float
+dEQP-VK.glsl.440.linkage.varying.component.vert_out_frag_in.vec4.as_float_vec3
+dEQP-VK.glsl.440.linkage.varying.component.vert_out_frag_in.vec4.as_vec2_float_float
+dEQP-VK.glsl.440.linkage.varying.component.vert_out_frag_in.vec4.as_vec2_vec2
+dEQP-VK.glsl.440.linkage.varying.component.vert_out_frag_in.vec4.as_vec3_float
+dEQP-VK.glsl.440.linkage.varying.component.vert_out_frag_in.ivec2.as_int_int
+dEQP-VK.glsl.440.linkage.varying.component.vert_out_frag_in.ivec4.as_int_int_int_int
+dEQP-VK.glsl.440.linkage.varying.component.vert_out_frag_in.ivec4.as_int_int_ivec2
+dEQP-VK.glsl.440.linkage.varying.component.vert_out_frag_in.ivec4.as_int_ivec2_int
+dEQP-VK.glsl.440.linkage.varying.component.vert_out_frag_in.ivec4.as_int_ivec3
+dEQP-VK.glsl.440.linkage.varying.component.vert_out_frag_in.ivec4.as_ivec2_int_int
+dEQP-VK.glsl.440.linkage.varying.component.vert_out_frag_in.ivec4.as_ivec2_ivec2
+dEQP-VK.glsl.440.linkage.varying.component.vert_out_frag_in.ivec4.as_ivec3_int
+dEQP-VK.glsl.440.linkage.varying.component.frag_out.vec2.as_float_float
+dEQP-VK.glsl.440.linkage.varying.component.frag_out.vec3.as_float_float_float
+dEQP-VK.glsl.440.linkage.varying.component.frag_out.vec3.as_float_vec2
+dEQP-VK.glsl.440.linkage.varying.component.frag_out.vec3.as_vec2_float
+dEQP-VK.glsl.440.linkage.varying.component.frag_out.vec4.as_float_float_float_float
+dEQP-VK.glsl.440.linkage.varying.component.frag_out.vec4.as_float_float_vec2
+dEQP-VK.glsl.440.linkage.varying.component.frag_out.vec4.as_float_vec2_float
+dEQP-VK.glsl.440.linkage.varying.component.frag_out.vec4.as_float_vec3
+dEQP-VK.glsl.440.linkage.varying.component.frag_out.vec4.as_vec2_float_float
+dEQP-VK.glsl.440.linkage.varying.component.frag_out.vec4.as_vec2_vec2
+dEQP-VK.glsl.440.linkage.varying.component.frag_out.vec4.as_vec3_float
+dEQP-VK.glsl.440.linkage.varying.component.frag_out.ivec2.as_int_int
+dEQP-VK.glsl.440.linkage.varying.component.frag_out.ivec4.as_int_int_int_int
+dEQP-VK.glsl.440.linkage.varying.component.frag_out.ivec4.as_int_int_ivec2
+dEQP-VK.glsl.440.linkage.varying.component.frag_out.ivec4.as_int_ivec2_int
+dEQP-VK.glsl.440.linkage.varying.component.frag_out.ivec4.as_int_ivec3
+dEQP-VK.glsl.440.linkage.varying.component.frag_out.ivec4.as_ivec2_int_int
+dEQP-VK.glsl.440.linkage.varying.component.frag_out.ivec4.as_ivec2_ivec2
+dEQP-VK.glsl.440.linkage.varying.component.frag_out.ivec4.as_ivec3_int
 dEQP-VK.glsl.derivate.dfdx.constant.float
 dEQP-VK.glsl.derivate.dfdx.constant.vec2
 dEQP-VK.glsl.derivate.dfdx.constant.vec3
@@ -181620,6 +188118,7 @@ dEQP-VK.renderpass.suballocation.simple.depth_stencil
 dEQP-VK.renderpass.suballocation.simple.color_depth
 dEQP-VK.renderpass.suballocation.simple.color_stencil
 dEQP-VK.renderpass.suballocation.simple.color_depth_stencil
+dEQP-VK.renderpass.suballocation.simple.no_attachments
 dEQP-VK.renderpass.suballocation.formats.r5g6b5_unorm_pack16.clear.clear
 dEQP-VK.renderpass.suballocation.formats.r5g6b5_unorm_pack16.clear.draw
 dEQP-VK.renderpass.suballocation.formats.r5g6b5_unorm_pack16.clear.clear_draw
@@ -187963,6 +194462,7 @@ dEQP-VK.renderpass.dedicated_allocation.simple.depth_stencil
 dEQP-VK.renderpass.dedicated_allocation.simple.color_depth
 dEQP-VK.renderpass.dedicated_allocation.simple.color_stencil
 dEQP-VK.renderpass.dedicated_allocation.simple.color_depth_stencil
+dEQP-VK.renderpass.dedicated_allocation.simple.no_attachments
 dEQP-VK.renderpass.dedicated_allocation.formats.r5g6b5_unorm_pack16.clear.clear
 dEQP-VK.renderpass.dedicated_allocation.formats.r5g6b5_unorm_pack16.clear.draw
 dEQP-VK.renderpass.dedicated_allocation.formats.r5g6b5_unorm_pack16.clear.clear_draw
@@ -194299,6 +200799,73 @@ dEQP-VK.renderpass.multisample_resolve.r32g32b32a32_sint.samples_8
 dEQP-VK.renderpass.multisample_resolve.r32g32b32a32_sfloat.samples_2
 dEQP-VK.renderpass.multisample_resolve.r32g32b32a32_sfloat.samples_4
 dEQP-VK.renderpass.multisample_resolve.r32g32b32a32_sfloat.samples_8
+dEQP-VK.renderpass.sampleread.numsamples_2_add
+dEQP-VK.renderpass.sampleread.numsamples_2_selected_sample_0
+dEQP-VK.renderpass.sampleread.numsamples_2_selected_sample_1
+dEQP-VK.renderpass.sampleread.numsamples_4_add
+dEQP-VK.renderpass.sampleread.numsamples_4_selected_sample_0
+dEQP-VK.renderpass.sampleread.numsamples_4_selected_sample_1
+dEQP-VK.renderpass.sampleread.numsamples_4_selected_sample_2
+dEQP-VK.renderpass.sampleread.numsamples_4_selected_sample_3
+dEQP-VK.renderpass.sampleread.numsamples_8_add
+dEQP-VK.renderpass.sampleread.numsamples_8_selected_sample_0
+dEQP-VK.renderpass.sampleread.numsamples_8_selected_sample_1
+dEQP-VK.renderpass.sampleread.numsamples_8_selected_sample_2
+dEQP-VK.renderpass.sampleread.numsamples_8_selected_sample_3
+dEQP-VK.renderpass.sampleread.numsamples_8_selected_sample_4
+dEQP-VK.renderpass.sampleread.numsamples_8_selected_sample_5
+dEQP-VK.renderpass.sampleread.numsamples_8_selected_sample_6
+dEQP-VK.renderpass.sampleread.numsamples_8_selected_sample_7
+dEQP-VK.renderpass.sampleread.numsamples_16_add
+dEQP-VK.renderpass.sampleread.numsamples_16_selected_sample_0
+dEQP-VK.renderpass.sampleread.numsamples_16_selected_sample_1
+dEQP-VK.renderpass.sampleread.numsamples_16_selected_sample_2
+dEQP-VK.renderpass.sampleread.numsamples_16_selected_sample_3
+dEQP-VK.renderpass.sampleread.numsamples_16_selected_sample_4
+dEQP-VK.renderpass.sampleread.numsamples_16_selected_sample_5
+dEQP-VK.renderpass.sampleread.numsamples_16_selected_sample_6
+dEQP-VK.renderpass.sampleread.numsamples_16_selected_sample_7
+dEQP-VK.renderpass.sampleread.numsamples_16_selected_sample_8
+dEQP-VK.renderpass.sampleread.numsamples_16_selected_sample_9
+dEQP-VK.renderpass.sampleread.numsamples_16_selected_sample_10
+dEQP-VK.renderpass.sampleread.numsamples_16_selected_sample_11
+dEQP-VK.renderpass.sampleread.numsamples_16_selected_sample_12
+dEQP-VK.renderpass.sampleread.numsamples_16_selected_sample_13
+dEQP-VK.renderpass.sampleread.numsamples_16_selected_sample_14
+dEQP-VK.renderpass.sampleread.numsamples_16_selected_sample_15
+dEQP-VK.renderpass.sampleread.numsamples_32_add
+dEQP-VK.renderpass.sampleread.numsamples_32_selected_sample_0
+dEQP-VK.renderpass.sampleread.numsamples_32_selected_sample_1
+dEQP-VK.renderpass.sampleread.numsamples_32_selected_sample_2
+dEQP-VK.renderpass.sampleread.numsamples_32_selected_sample_3
+dEQP-VK.renderpass.sampleread.numsamples_32_selected_sample_4
+dEQP-VK.renderpass.sampleread.numsamples_32_selected_sample_5
+dEQP-VK.renderpass.sampleread.numsamples_32_selected_sample_6
+dEQP-VK.renderpass.sampleread.numsamples_32_selected_sample_7
+dEQP-VK.renderpass.sampleread.numsamples_32_selected_sample_8
+dEQP-VK.renderpass.sampleread.numsamples_32_selected_sample_9
+dEQP-VK.renderpass.sampleread.numsamples_32_selected_sample_10
+dEQP-VK.renderpass.sampleread.numsamples_32_selected_sample_11
+dEQP-VK.renderpass.sampleread.numsamples_32_selected_sample_12
+dEQP-VK.renderpass.sampleread.numsamples_32_selected_sample_13
+dEQP-VK.renderpass.sampleread.numsamples_32_selected_sample_14
+dEQP-VK.renderpass.sampleread.numsamples_32_selected_sample_15
+dEQP-VK.renderpass.sampleread.numsamples_32_selected_sample_16
+dEQP-VK.renderpass.sampleread.numsamples_32_selected_sample_17
+dEQP-VK.renderpass.sampleread.numsamples_32_selected_sample_18
+dEQP-VK.renderpass.sampleread.numsamples_32_selected_sample_19
+dEQP-VK.renderpass.sampleread.numsamples_32_selected_sample_20
+dEQP-VK.renderpass.sampleread.numsamples_32_selected_sample_21
+dEQP-VK.renderpass.sampleread.numsamples_32_selected_sample_22
+dEQP-VK.renderpass.sampleread.numsamples_32_selected_sample_23
+dEQP-VK.renderpass.sampleread.numsamples_32_selected_sample_24
+dEQP-VK.renderpass.sampleread.numsamples_32_selected_sample_25
+dEQP-VK.renderpass.sampleread.numsamples_32_selected_sample_26
+dEQP-VK.renderpass.sampleread.numsamples_32_selected_sample_27
+dEQP-VK.renderpass.sampleread.numsamples_32_selected_sample_28
+dEQP-VK.renderpass.sampleread.numsamples_32_selected_sample_29
+dEQP-VK.renderpass.sampleread.numsamples_32_selected_sample_30
+dEQP-VK.renderpass.sampleread.numsamples_32_selected_sample_31
 dEQP-VK.ubo.2_level_array.std140.float.vertex
 dEQP-VK.ubo.2_level_array.std140.float.fragment
 dEQP-VK.ubo.2_level_array.std140.float.both
@@ -196597,7 +203164,8 @@ dEQP-VK.dynamic_state.rs_state.depth_bias
 dEQP-VK.dynamic_state.rs_state.depth_bias_clamp
 dEQP-VK.dynamic_state.rs_state.line_width
 dEQP-VK.dynamic_state.cb_state.blend_constants
-dEQP-VK.dynamic_state.ds_state.depth_bounds
+dEQP-VK.dynamic_state.ds_state.depth_bounds_1
+dEQP-VK.dynamic_state.ds_state.depth_bounds_2
 dEQP-VK.dynamic_state.ds_state.stencil_params_basic_1
 dEQP-VK.dynamic_state.ds_state.stencil_params_basic_2
 dEQP-VK.dynamic_state.ds_state.stencil_params_advanced
@@ -198308,21 +204876,37 @@ dEQP-VK.query_pool.occlusion_query.get_results_conservative_size_64_wait_query_w
 dEQP-VK.query_pool.occlusion_query.copy_results_conservative_size_64_wait_query_without_availability_draw_points
 dEQP-VK.query_pool.occlusion_query.copy_results_conservative_size_64_wait_query_with_availability_draw_points
 dEQP-VK.query_pool.occlusion_query.get_results_conservative_size_32_wait_queue_without_availability_draw_triangles
+dEQP-VK.query_pool.occlusion_query.get_results_conservative_size_32_wait_queue_without_availability_draw_triangles_discard
 dEQP-VK.query_pool.occlusion_query.get_results_conservative_size_32_wait_queue_with_availability_draw_triangles
+dEQP-VK.query_pool.occlusion_query.get_results_conservative_size_32_wait_queue_with_availability_draw_triangles_discard
 dEQP-VK.query_pool.occlusion_query.copy_results_conservative_size_32_wait_queue_without_availability_draw_triangles
+dEQP-VK.query_pool.occlusion_query.copy_results_conservative_size_32_wait_queue_without_availability_draw_triangles_discard
 dEQP-VK.query_pool.occlusion_query.copy_results_conservative_size_32_wait_queue_with_availability_draw_triangles
+dEQP-VK.query_pool.occlusion_query.copy_results_conservative_size_32_wait_queue_with_availability_draw_triangles_discard
 dEQP-VK.query_pool.occlusion_query.get_results_conservative_size_32_wait_query_without_availability_draw_triangles
+dEQP-VK.query_pool.occlusion_query.get_results_conservative_size_32_wait_query_without_availability_draw_triangles_discard
 dEQP-VK.query_pool.occlusion_query.get_results_conservative_size_32_wait_query_with_availability_draw_triangles
+dEQP-VK.query_pool.occlusion_query.get_results_conservative_size_32_wait_query_with_availability_draw_triangles_discard
 dEQP-VK.query_pool.occlusion_query.copy_results_conservative_size_32_wait_query_without_availability_draw_triangles
+dEQP-VK.query_pool.occlusion_query.copy_results_conservative_size_32_wait_query_without_availability_draw_triangles_discard
 dEQP-VK.query_pool.occlusion_query.copy_results_conservative_size_32_wait_query_with_availability_draw_triangles
+dEQP-VK.query_pool.occlusion_query.copy_results_conservative_size_32_wait_query_with_availability_draw_triangles_discard
 dEQP-VK.query_pool.occlusion_query.get_results_conservative_size_64_wait_queue_without_availability_draw_triangles
+dEQP-VK.query_pool.occlusion_query.get_results_conservative_size_64_wait_queue_without_availability_draw_triangles_discard
 dEQP-VK.query_pool.occlusion_query.get_results_conservative_size_64_wait_queue_with_availability_draw_triangles
+dEQP-VK.query_pool.occlusion_query.get_results_conservative_size_64_wait_queue_with_availability_draw_triangles_discard
 dEQP-VK.query_pool.occlusion_query.copy_results_conservative_size_64_wait_queue_without_availability_draw_triangles
+dEQP-VK.query_pool.occlusion_query.copy_results_conservative_size_64_wait_queue_without_availability_draw_triangles_discard
 dEQP-VK.query_pool.occlusion_query.copy_results_conservative_size_64_wait_queue_with_availability_draw_triangles
+dEQP-VK.query_pool.occlusion_query.copy_results_conservative_size_64_wait_queue_with_availability_draw_triangles_discard
 dEQP-VK.query_pool.occlusion_query.get_results_conservative_size_64_wait_query_without_availability_draw_triangles
+dEQP-VK.query_pool.occlusion_query.get_results_conservative_size_64_wait_query_without_availability_draw_triangles_discard
 dEQP-VK.query_pool.occlusion_query.get_results_conservative_size_64_wait_query_with_availability_draw_triangles
+dEQP-VK.query_pool.occlusion_query.get_results_conservative_size_64_wait_query_with_availability_draw_triangles_discard
 dEQP-VK.query_pool.occlusion_query.copy_results_conservative_size_64_wait_query_without_availability_draw_triangles
+dEQP-VK.query_pool.occlusion_query.copy_results_conservative_size_64_wait_query_without_availability_draw_triangles_discard
 dEQP-VK.query_pool.occlusion_query.copy_results_conservative_size_64_wait_query_with_availability_draw_triangles
+dEQP-VK.query_pool.occlusion_query.copy_results_conservative_size_64_wait_query_with_availability_draw_triangles_discard
 dEQP-VK.query_pool.occlusion_query.get_results_precise_size_32_wait_queue_without_availability_draw_points
 dEQP-VK.query_pool.occlusion_query.get_results_precise_size_32_wait_queue_with_availability_draw_points
 dEQP-VK.query_pool.occlusion_query.copy_results_precise_size_32_wait_queue_without_availability_draw_points
@@ -198340,21 +204924,37 @@ dEQP-VK.query_pool.occlusion_query.get_results_precise_size_64_wait_query_with_a
 dEQP-VK.query_pool.occlusion_query.copy_results_precise_size_64_wait_query_without_availability_draw_points
 dEQP-VK.query_pool.occlusion_query.copy_results_precise_size_64_wait_query_with_availability_draw_points
 dEQP-VK.query_pool.occlusion_query.get_results_precise_size_32_wait_queue_without_availability_draw_triangles
+dEQP-VK.query_pool.occlusion_query.get_results_precise_size_32_wait_queue_without_availability_draw_triangles_discard
 dEQP-VK.query_pool.occlusion_query.get_results_precise_size_32_wait_queue_with_availability_draw_triangles
+dEQP-VK.query_pool.occlusion_query.get_results_precise_size_32_wait_queue_with_availability_draw_triangles_discard
 dEQP-VK.query_pool.occlusion_query.copy_results_precise_size_32_wait_queue_without_availability_draw_triangles
+dEQP-VK.query_pool.occlusion_query.copy_results_precise_size_32_wait_queue_without_availability_draw_triangles_discard
 dEQP-VK.query_pool.occlusion_query.copy_results_precise_size_32_wait_queue_with_availability_draw_triangles
+dEQP-VK.query_pool.occlusion_query.copy_results_precise_size_32_wait_queue_with_availability_draw_triangles_discard
 dEQP-VK.query_pool.occlusion_query.get_results_precise_size_32_wait_query_without_availability_draw_triangles
+dEQP-VK.query_pool.occlusion_query.get_results_precise_size_32_wait_query_without_availability_draw_triangles_discard
 dEQP-VK.query_pool.occlusion_query.get_results_precise_size_32_wait_query_with_availability_draw_triangles
+dEQP-VK.query_pool.occlusion_query.get_results_precise_size_32_wait_query_with_availability_draw_triangles_discard
 dEQP-VK.query_pool.occlusion_query.copy_results_precise_size_32_wait_query_without_availability_draw_triangles
+dEQP-VK.query_pool.occlusion_query.copy_results_precise_size_32_wait_query_without_availability_draw_triangles_discard
 dEQP-VK.query_pool.occlusion_query.copy_results_precise_size_32_wait_query_with_availability_draw_triangles
+dEQP-VK.query_pool.occlusion_query.copy_results_precise_size_32_wait_query_with_availability_draw_triangles_discard
 dEQP-VK.query_pool.occlusion_query.get_results_precise_size_64_wait_queue_without_availability_draw_triangles
+dEQP-VK.query_pool.occlusion_query.get_results_precise_size_64_wait_queue_without_availability_draw_triangles_discard
 dEQP-VK.query_pool.occlusion_query.get_results_precise_size_64_wait_queue_with_availability_draw_triangles
+dEQP-VK.query_pool.occlusion_query.get_results_precise_size_64_wait_queue_with_availability_draw_triangles_discard
 dEQP-VK.query_pool.occlusion_query.copy_results_precise_size_64_wait_queue_without_availability_draw_triangles
+dEQP-VK.query_pool.occlusion_query.copy_results_precise_size_64_wait_queue_without_availability_draw_triangles_discard
 dEQP-VK.query_pool.occlusion_query.copy_results_precise_size_64_wait_queue_with_availability_draw_triangles
+dEQP-VK.query_pool.occlusion_query.copy_results_precise_size_64_wait_queue_with_availability_draw_triangles_discard
 dEQP-VK.query_pool.occlusion_query.get_results_precise_size_64_wait_query_without_availability_draw_triangles
+dEQP-VK.query_pool.occlusion_query.get_results_precise_size_64_wait_query_without_availability_draw_triangles_discard
 dEQP-VK.query_pool.occlusion_query.get_results_precise_size_64_wait_query_with_availability_draw_triangles
+dEQP-VK.query_pool.occlusion_query.get_results_precise_size_64_wait_query_with_availability_draw_triangles_discard
 dEQP-VK.query_pool.occlusion_query.copy_results_precise_size_64_wait_query_without_availability_draw_triangles
+dEQP-VK.query_pool.occlusion_query.copy_results_precise_size_64_wait_query_without_availability_draw_triangles_discard
 dEQP-VK.query_pool.occlusion_query.copy_results_precise_size_64_wait_query_with_availability_draw_triangles
+dEQP-VK.query_pool.occlusion_query.copy_results_precise_size_64_wait_query_with_availability_draw_triangles_discard
 dEQP-VK.query_pool.occlusion_query.get_results_size_32_stride_4_without_availability
 dEQP-VK.query_pool.occlusion_query.get_results_size_32_stride_8_without_availability
 dEQP-VK.query_pool.occlusion_query.get_results_size_32_stride_12_without_availability
@@ -198935,6 +205535,13 @@ dEQP-VK.draw.negative_viewport_height.front_cw_cull_none
 dEQP-VK.draw.negative_viewport_height.front_cw_cull_front
 dEQP-VK.draw.negative_viewport_height.front_cw_cull_back
 dEQP-VK.draw.negative_viewport_height.front_cw_cull_both
+dEQP-VK.draw.inverted_depth_ranges.depthclamp_deltazero
+dEQP-VK.draw.inverted_depth_ranges.depthclamp_deltasmall
+dEQP-VK.draw.inverted_depth_ranges.depthclamp_deltaone
+dEQP-VK.draw.inverted_depth_ranges.depthclamp_depth_range_unrestricted
+dEQP-VK.draw.inverted_depth_ranges.nodepthclamp_deltasmall
+dEQP-VK.draw.inverted_depth_ranges.nodepthclamp_deltaone
+dEQP-VK.draw.inverted_depth_ranges.nodepthclamp_depth_range_unrestricted
 dEQP-VK.compute.basic.empty_shader
 dEQP-VK.compute.basic.ubo_to_ssbo_single_invocation
 dEQP-VK.compute.basic.ubo_to_ssbo_single_group
@@ -198995,6 +205602,11 @@ dEQP-VK.compute.builtin_var.work_group_size
 dEQP-VK.compute.builtin_var.work_group_id
 dEQP-VK.compute.builtin_var.local_invocation_id
 dEQP-VK.compute.builtin_var.global_invocation_id
+dEQP-VK.compute.builtin_var.num_work_groups_component
+dEQP-VK.compute.builtin_var.work_group_size_component
+dEQP-VK.compute.builtin_var.work_group_id_component
+dEQP-VK.compute.builtin_var.local_invocation_id_component
+dEQP-VK.compute.builtin_var.global_invocation_id_component
 dEQP-VK.compute.builtin_var.local_invocation_index
 dEQP-VK.image.store.with_format.1d.r32g32b32a32_sfloat
 dEQP-VK.image.store.with_format.1d.r16g16b16a16_sfloat
@@ -234541,6 +241153,276 @@ dEQP-VK.sparse_resources.image_sparse_residency.3d.rgba16ui.11_137_3
 dEQP-VK.sparse_resources.image_sparse_residency.3d.rgba8ui.512_256_16
 dEQP-VK.sparse_resources.image_sparse_residency.3d.rgba8ui.1024_128_8
 dEQP-VK.sparse_resources.image_sparse_residency.3d.rgba8ui.11_137_3
+dEQP-VK.sparse_resources.aligned_mip_size.2d.r32i
+dEQP-VK.sparse_resources.aligned_mip_size.2d.r16i
+dEQP-VK.sparse_resources.aligned_mip_size.2d.r8i
+dEQP-VK.sparse_resources.aligned_mip_size.2d.rg32i
+dEQP-VK.sparse_resources.aligned_mip_size.2d.rg16i
+dEQP-VK.sparse_resources.aligned_mip_size.2d.rg8i
+dEQP-VK.sparse_resources.aligned_mip_size.2d.rgba32ui
+dEQP-VK.sparse_resources.aligned_mip_size.2d.rgba16ui
+dEQP-VK.sparse_resources.aligned_mip_size.2d.rgba8ui
+dEQP-VK.sparse_resources.aligned_mip_size.2d_array.r32i
+dEQP-VK.sparse_resources.aligned_mip_size.2d_array.r16i
+dEQP-VK.sparse_resources.aligned_mip_size.2d_array.r8i
+dEQP-VK.sparse_resources.aligned_mip_size.2d_array.rg32i
+dEQP-VK.sparse_resources.aligned_mip_size.2d_array.rg16i
+dEQP-VK.sparse_resources.aligned_mip_size.2d_array.rg8i
+dEQP-VK.sparse_resources.aligned_mip_size.2d_array.rgba32ui
+dEQP-VK.sparse_resources.aligned_mip_size.2d_array.rgba16ui
+dEQP-VK.sparse_resources.aligned_mip_size.2d_array.rgba8ui
+dEQP-VK.sparse_resources.aligned_mip_size.cube.r32i
+dEQP-VK.sparse_resources.aligned_mip_size.cube.r16i
+dEQP-VK.sparse_resources.aligned_mip_size.cube.r8i
+dEQP-VK.sparse_resources.aligned_mip_size.cube.rg32i
+dEQP-VK.sparse_resources.aligned_mip_size.cube.rg16i
+dEQP-VK.sparse_resources.aligned_mip_size.cube.rg8i
+dEQP-VK.sparse_resources.aligned_mip_size.cube.rgba32ui
+dEQP-VK.sparse_resources.aligned_mip_size.cube.rgba16ui
+dEQP-VK.sparse_resources.aligned_mip_size.cube.rgba8ui
+dEQP-VK.sparse_resources.aligned_mip_size.cube_array.r32i
+dEQP-VK.sparse_resources.aligned_mip_size.cube_array.r16i
+dEQP-VK.sparse_resources.aligned_mip_size.cube_array.r8i
+dEQP-VK.sparse_resources.aligned_mip_size.cube_array.rg32i
+dEQP-VK.sparse_resources.aligned_mip_size.cube_array.rg16i
+dEQP-VK.sparse_resources.aligned_mip_size.cube_array.rg8i
+dEQP-VK.sparse_resources.aligned_mip_size.cube_array.rgba32ui
+dEQP-VK.sparse_resources.aligned_mip_size.cube_array.rgba16ui
+dEQP-VK.sparse_resources.aligned_mip_size.cube_array.rgba8ui
+dEQP-VK.sparse_resources.aligned_mip_size.3d.r32i
+dEQP-VK.sparse_resources.aligned_mip_size.3d.r16i
+dEQP-VK.sparse_resources.aligned_mip_size.3d.r8i
+dEQP-VK.sparse_resources.aligned_mip_size.3d.rg32i
+dEQP-VK.sparse_resources.aligned_mip_size.3d.rg16i
+dEQP-VK.sparse_resources.aligned_mip_size.3d.rg8i
+dEQP-VK.sparse_resources.aligned_mip_size.3d.rgba32ui
+dEQP-VK.sparse_resources.aligned_mip_size.3d.rgba16ui
+dEQP-VK.sparse_resources.aligned_mip_size.3d.rgba8ui
+dEQP-VK.sparse_resources.image_block_shapes.2d.r32i.samples_1
+dEQP-VK.sparse_resources.image_block_shapes.2d.r32i.samples_2
+dEQP-VK.sparse_resources.image_block_shapes.2d.r32i.samples_4
+dEQP-VK.sparse_resources.image_block_shapes.2d.r32i.samples_8
+dEQP-VK.sparse_resources.image_block_shapes.2d.r32i.samples_16
+dEQP-VK.sparse_resources.image_block_shapes.2d.r16i.samples_1
+dEQP-VK.sparse_resources.image_block_shapes.2d.r16i.samples_2
+dEQP-VK.sparse_resources.image_block_shapes.2d.r16i.samples_4
+dEQP-VK.sparse_resources.image_block_shapes.2d.r16i.samples_8
+dEQP-VK.sparse_resources.image_block_shapes.2d.r16i.samples_16
+dEQP-VK.sparse_resources.image_block_shapes.2d.r8i.samples_1
+dEQP-VK.sparse_resources.image_block_shapes.2d.r8i.samples_2
+dEQP-VK.sparse_resources.image_block_shapes.2d.r8i.samples_4
+dEQP-VK.sparse_resources.image_block_shapes.2d.r8i.samples_8
+dEQP-VK.sparse_resources.image_block_shapes.2d.r8i.samples_16
+dEQP-VK.sparse_resources.image_block_shapes.2d.rg32i.samples_1
+dEQP-VK.sparse_resources.image_block_shapes.2d.rg32i.samples_2
+dEQP-VK.sparse_resources.image_block_shapes.2d.rg32i.samples_4
+dEQP-VK.sparse_resources.image_block_shapes.2d.rg32i.samples_8
+dEQP-VK.sparse_resources.image_block_shapes.2d.rg32i.samples_16
+dEQP-VK.sparse_resources.image_block_shapes.2d.rg16i.samples_1
+dEQP-VK.sparse_resources.image_block_shapes.2d.rg16i.samples_2
+dEQP-VK.sparse_resources.image_block_shapes.2d.rg16i.samples_4
+dEQP-VK.sparse_resources.image_block_shapes.2d.rg16i.samples_8
+dEQP-VK.sparse_resources.image_block_shapes.2d.rg16i.samples_16
+dEQP-VK.sparse_resources.image_block_shapes.2d.rg8i.samples_1
+dEQP-VK.sparse_resources.image_block_shapes.2d.rg8i.samples_2
+dEQP-VK.sparse_resources.image_block_shapes.2d.rg8i.samples_4
+dEQP-VK.sparse_resources.image_block_shapes.2d.rg8i.samples_8
+dEQP-VK.sparse_resources.image_block_shapes.2d.rg8i.samples_16
+dEQP-VK.sparse_resources.image_block_shapes.2d.rgba32ui.samples_1
+dEQP-VK.sparse_resources.image_block_shapes.2d.rgba32ui.samples_2
+dEQP-VK.sparse_resources.image_block_shapes.2d.rgba32ui.samples_4
+dEQP-VK.sparse_resources.image_block_shapes.2d.rgba32ui.samples_8
+dEQP-VK.sparse_resources.image_block_shapes.2d.rgba32ui.samples_16
+dEQP-VK.sparse_resources.image_block_shapes.2d.rgba16ui.samples_1
+dEQP-VK.sparse_resources.image_block_shapes.2d.rgba16ui.samples_2
+dEQP-VK.sparse_resources.image_block_shapes.2d.rgba16ui.samples_4
+dEQP-VK.sparse_resources.image_block_shapes.2d.rgba16ui.samples_8
+dEQP-VK.sparse_resources.image_block_shapes.2d.rgba16ui.samples_16
+dEQP-VK.sparse_resources.image_block_shapes.2d.rgba8ui.samples_1
+dEQP-VK.sparse_resources.image_block_shapes.2d.rgba8ui.samples_2
+dEQP-VK.sparse_resources.image_block_shapes.2d.rgba8ui.samples_4
+dEQP-VK.sparse_resources.image_block_shapes.2d.rgba8ui.samples_8
+dEQP-VK.sparse_resources.image_block_shapes.2d.rgba8ui.samples_16
+dEQP-VK.sparse_resources.image_block_shapes.2d_array.r32i.samples_1
+dEQP-VK.sparse_resources.image_block_shapes.2d_array.r32i.samples_2
+dEQP-VK.sparse_resources.image_block_shapes.2d_array.r32i.samples_4
+dEQP-VK.sparse_resources.image_block_shapes.2d_array.r32i.samples_8
+dEQP-VK.sparse_resources.image_block_shapes.2d_array.r32i.samples_16
+dEQP-VK.sparse_resources.image_block_shapes.2d_array.r16i.samples_1
+dEQP-VK.sparse_resources.image_block_shapes.2d_array.r16i.samples_2
+dEQP-VK.sparse_resources.image_block_shapes.2d_array.r16i.samples_4
+dEQP-VK.sparse_resources.image_block_shapes.2d_array.r16i.samples_8
+dEQP-VK.sparse_resources.image_block_shapes.2d_array.r16i.samples_16
+dEQP-VK.sparse_resources.image_block_shapes.2d_array.r8i.samples_1
+dEQP-VK.sparse_resources.image_block_shapes.2d_array.r8i.samples_2
+dEQP-VK.sparse_resources.image_block_shapes.2d_array.r8i.samples_4
+dEQP-VK.sparse_resources.image_block_shapes.2d_array.r8i.samples_8
+dEQP-VK.sparse_resources.image_block_shapes.2d_array.r8i.samples_16
+dEQP-VK.sparse_resources.image_block_shapes.2d_array.rg32i.samples_1
+dEQP-VK.sparse_resources.image_block_shapes.2d_array.rg32i.samples_2
+dEQP-VK.sparse_resources.image_block_shapes.2d_array.rg32i.samples_4
+dEQP-VK.sparse_resources.image_block_shapes.2d_array.rg32i.samples_8
+dEQP-VK.sparse_resources.image_block_shapes.2d_array.rg32i.samples_16
+dEQP-VK.sparse_resources.image_block_shapes.2d_array.rg16i.samples_1
+dEQP-VK.sparse_resources.image_block_shapes.2d_array.rg16i.samples_2
+dEQP-VK.sparse_resources.image_block_shapes.2d_array.rg16i.samples_4
+dEQP-VK.sparse_resources.image_block_shapes.2d_array.rg16i.samples_8
+dEQP-VK.sparse_resources.image_block_shapes.2d_array.rg16i.samples_16
+dEQP-VK.sparse_resources.image_block_shapes.2d_array.rg8i.samples_1
+dEQP-VK.sparse_resources.image_block_shapes.2d_array.rg8i.samples_2
+dEQP-VK.sparse_resources.image_block_shapes.2d_array.rg8i.samples_4
+dEQP-VK.sparse_resources.image_block_shapes.2d_array.rg8i.samples_8
+dEQP-VK.sparse_resources.image_block_shapes.2d_array.rg8i.samples_16
+dEQP-VK.sparse_resources.image_block_shapes.2d_array.rgba32ui.samples_1
+dEQP-VK.sparse_resources.image_block_shapes.2d_array.rgba32ui.samples_2
+dEQP-VK.sparse_resources.image_block_shapes.2d_array.rgba32ui.samples_4
+dEQP-VK.sparse_resources.image_block_shapes.2d_array.rgba32ui.samples_8
+dEQP-VK.sparse_resources.image_block_shapes.2d_array.rgba32ui.samples_16
+dEQP-VK.sparse_resources.image_block_shapes.2d_array.rgba16ui.samples_1
+dEQP-VK.sparse_resources.image_block_shapes.2d_array.rgba16ui.samples_2
+dEQP-VK.sparse_resources.image_block_shapes.2d_array.rgba16ui.samples_4
+dEQP-VK.sparse_resources.image_block_shapes.2d_array.rgba16ui.samples_8
+dEQP-VK.sparse_resources.image_block_shapes.2d_array.rgba16ui.samples_16
+dEQP-VK.sparse_resources.image_block_shapes.2d_array.rgba8ui.samples_1
+dEQP-VK.sparse_resources.image_block_shapes.2d_array.rgba8ui.samples_2
+dEQP-VK.sparse_resources.image_block_shapes.2d_array.rgba8ui.samples_4
+dEQP-VK.sparse_resources.image_block_shapes.2d_array.rgba8ui.samples_8
+dEQP-VK.sparse_resources.image_block_shapes.2d_array.rgba8ui.samples_16
+dEQP-VK.sparse_resources.image_block_shapes.cube.r32i.samples_1
+dEQP-VK.sparse_resources.image_block_shapes.cube.r32i.samples_2
+dEQP-VK.sparse_resources.image_block_shapes.cube.r32i.samples_4
+dEQP-VK.sparse_resources.image_block_shapes.cube.r32i.samples_8
+dEQP-VK.sparse_resources.image_block_shapes.cube.r32i.samples_16
+dEQP-VK.sparse_resources.image_block_shapes.cube.r16i.samples_1
+dEQP-VK.sparse_resources.image_block_shapes.cube.r16i.samples_2
+dEQP-VK.sparse_resources.image_block_shapes.cube.r16i.samples_4
+dEQP-VK.sparse_resources.image_block_shapes.cube.r16i.samples_8
+dEQP-VK.sparse_resources.image_block_shapes.cube.r16i.samples_16
+dEQP-VK.sparse_resources.image_block_shapes.cube.r8i.samples_1
+dEQP-VK.sparse_resources.image_block_shapes.cube.r8i.samples_2
+dEQP-VK.sparse_resources.image_block_shapes.cube.r8i.samples_4
+dEQP-VK.sparse_resources.image_block_shapes.cube.r8i.samples_8
+dEQP-VK.sparse_resources.image_block_shapes.cube.r8i.samples_16
+dEQP-VK.sparse_resources.image_block_shapes.cube.rg32i.samples_1
+dEQP-VK.sparse_resources.image_block_shapes.cube.rg32i.samples_2
+dEQP-VK.sparse_resources.image_block_shapes.cube.rg32i.samples_4
+dEQP-VK.sparse_resources.image_block_shapes.cube.rg32i.samples_8
+dEQP-VK.sparse_resources.image_block_shapes.cube.rg32i.samples_16
+dEQP-VK.sparse_resources.image_block_shapes.cube.rg16i.samples_1
+dEQP-VK.sparse_resources.image_block_shapes.cube.rg16i.samples_2
+dEQP-VK.sparse_resources.image_block_shapes.cube.rg16i.samples_4
+dEQP-VK.sparse_resources.image_block_shapes.cube.rg16i.samples_8
+dEQP-VK.sparse_resources.image_block_shapes.cube.rg16i.samples_16
+dEQP-VK.sparse_resources.image_block_shapes.cube.rg8i.samples_1
+dEQP-VK.sparse_resources.image_block_shapes.cube.rg8i.samples_2
+dEQP-VK.sparse_resources.image_block_shapes.cube.rg8i.samples_4
+dEQP-VK.sparse_resources.image_block_shapes.cube.rg8i.samples_8
+dEQP-VK.sparse_resources.image_block_shapes.cube.rg8i.samples_16
+dEQP-VK.sparse_resources.image_block_shapes.cube.rgba32ui.samples_1
+dEQP-VK.sparse_resources.image_block_shapes.cube.rgba32ui.samples_2
+dEQP-VK.sparse_resources.image_block_shapes.cube.rgba32ui.samples_4
+dEQP-VK.sparse_resources.image_block_shapes.cube.rgba32ui.samples_8
+dEQP-VK.sparse_resources.image_block_shapes.cube.rgba32ui.samples_16
+dEQP-VK.sparse_resources.image_block_shapes.cube.rgba16ui.samples_1
+dEQP-VK.sparse_resources.image_block_shapes.cube.rgba16ui.samples_2
+dEQP-VK.sparse_resources.image_block_shapes.cube.rgba16ui.samples_4
+dEQP-VK.sparse_resources.image_block_shapes.cube.rgba16ui.samples_8
+dEQP-VK.sparse_resources.image_block_shapes.cube.rgba16ui.samples_16
+dEQP-VK.sparse_resources.image_block_shapes.cube.rgba8ui.samples_1
+dEQP-VK.sparse_resources.image_block_shapes.cube.rgba8ui.samples_2
+dEQP-VK.sparse_resources.image_block_shapes.cube.rgba8ui.samples_4
+dEQP-VK.sparse_resources.image_block_shapes.cube.rgba8ui.samples_8
+dEQP-VK.sparse_resources.image_block_shapes.cube.rgba8ui.samples_16
+dEQP-VK.sparse_resources.image_block_shapes.cube_array.r32i.samples_1
+dEQP-VK.sparse_resources.image_block_shapes.cube_array.r32i.samples_2
+dEQP-VK.sparse_resources.image_block_shapes.cube_array.r32i.samples_4
+dEQP-VK.sparse_resources.image_block_shapes.cube_array.r32i.samples_8
+dEQP-VK.sparse_resources.image_block_shapes.cube_array.r32i.samples_16
+dEQP-VK.sparse_resources.image_block_shapes.cube_array.r16i.samples_1
+dEQP-VK.sparse_resources.image_block_shapes.cube_array.r16i.samples_2
+dEQP-VK.sparse_resources.image_block_shapes.cube_array.r16i.samples_4
+dEQP-VK.sparse_resources.image_block_shapes.cube_array.r16i.samples_8
+dEQP-VK.sparse_resources.image_block_shapes.cube_array.r16i.samples_16
+dEQP-VK.sparse_resources.image_block_shapes.cube_array.r8i.samples_1
+dEQP-VK.sparse_resources.image_block_shapes.cube_array.r8i.samples_2
+dEQP-VK.sparse_resources.image_block_shapes.cube_array.r8i.samples_4
+dEQP-VK.sparse_resources.image_block_shapes.cube_array.r8i.samples_8
+dEQP-VK.sparse_resources.image_block_shapes.cube_array.r8i.samples_16
+dEQP-VK.sparse_resources.image_block_shapes.cube_array.rg32i.samples_1
+dEQP-VK.sparse_resources.image_block_shapes.cube_array.rg32i.samples_2
+dEQP-VK.sparse_resources.image_block_shapes.cube_array.rg32i.samples_4
+dEQP-VK.sparse_resources.image_block_shapes.cube_array.rg32i.samples_8
+dEQP-VK.sparse_resources.image_block_shapes.cube_array.rg32i.samples_16
+dEQP-VK.sparse_resources.image_block_shapes.cube_array.rg16i.samples_1
+dEQP-VK.sparse_resources.image_block_shapes.cube_array.rg16i.samples_2
+dEQP-VK.sparse_resources.image_block_shapes.cube_array.rg16i.samples_4
+dEQP-VK.sparse_resources.image_block_shapes.cube_array.rg16i.samples_8
+dEQP-VK.sparse_resources.image_block_shapes.cube_array.rg16i.samples_16
+dEQP-VK.sparse_resources.image_block_shapes.cube_array.rg8i.samples_1
+dEQP-VK.sparse_resources.image_block_shapes.cube_array.rg8i.samples_2
+dEQP-VK.sparse_resources.image_block_shapes.cube_array.rg8i.samples_4
+dEQP-VK.sparse_resources.image_block_shapes.cube_array.rg8i.samples_8
+dEQP-VK.sparse_resources.image_block_shapes.cube_array.rg8i.samples_16
+dEQP-VK.sparse_resources.image_block_shapes.cube_array.rgba32ui.samples_1
+dEQP-VK.sparse_resources.image_block_shapes.cube_array.rgba32ui.samples_2
+dEQP-VK.sparse_resources.image_block_shapes.cube_array.rgba32ui.samples_4
+dEQP-VK.sparse_resources.image_block_shapes.cube_array.rgba32ui.samples_8
+dEQP-VK.sparse_resources.image_block_shapes.cube_array.rgba32ui.samples_16
+dEQP-VK.sparse_resources.image_block_shapes.cube_array.rgba16ui.samples_1
+dEQP-VK.sparse_resources.image_block_shapes.cube_array.rgba16ui.samples_2
+dEQP-VK.sparse_resources.image_block_shapes.cube_array.rgba16ui.samples_4
+dEQP-VK.sparse_resources.image_block_shapes.cube_array.rgba16ui.samples_8
+dEQP-VK.sparse_resources.image_block_shapes.cube_array.rgba16ui.samples_16
+dEQP-VK.sparse_resources.image_block_shapes.cube_array.rgba8ui.samples_1
+dEQP-VK.sparse_resources.image_block_shapes.cube_array.rgba8ui.samples_2
+dEQP-VK.sparse_resources.image_block_shapes.cube_array.rgba8ui.samples_4
+dEQP-VK.sparse_resources.image_block_shapes.cube_array.rgba8ui.samples_8
+dEQP-VK.sparse_resources.image_block_shapes.cube_array.rgba8ui.samples_16
+dEQP-VK.sparse_resources.image_block_shapes.3d.r32i.samples_1
+dEQP-VK.sparse_resources.image_block_shapes.3d.r32i.samples_2
+dEQP-VK.sparse_resources.image_block_shapes.3d.r32i.samples_4
+dEQP-VK.sparse_resources.image_block_shapes.3d.r32i.samples_8
+dEQP-VK.sparse_resources.image_block_shapes.3d.r32i.samples_16
+dEQP-VK.sparse_resources.image_block_shapes.3d.r16i.samples_1
+dEQP-VK.sparse_resources.image_block_shapes.3d.r16i.samples_2
+dEQP-VK.sparse_resources.image_block_shapes.3d.r16i.samples_4
+dEQP-VK.sparse_resources.image_block_shapes.3d.r16i.samples_8
+dEQP-VK.sparse_resources.image_block_shapes.3d.r16i.samples_16
+dEQP-VK.sparse_resources.image_block_shapes.3d.r8i.samples_1
+dEQP-VK.sparse_resources.image_block_shapes.3d.r8i.samples_2
+dEQP-VK.sparse_resources.image_block_shapes.3d.r8i.samples_4
+dEQP-VK.sparse_resources.image_block_shapes.3d.r8i.samples_8
+dEQP-VK.sparse_resources.image_block_shapes.3d.r8i.samples_16
+dEQP-VK.sparse_resources.image_block_shapes.3d.rg32i.samples_1
+dEQP-VK.sparse_resources.image_block_shapes.3d.rg32i.samples_2
+dEQP-VK.sparse_resources.image_block_shapes.3d.rg32i.samples_4
+dEQP-VK.sparse_resources.image_block_shapes.3d.rg32i.samples_8
+dEQP-VK.sparse_resources.image_block_shapes.3d.rg32i.samples_16
+dEQP-VK.sparse_resources.image_block_shapes.3d.rg16i.samples_1
+dEQP-VK.sparse_resources.image_block_shapes.3d.rg16i.samples_2
+dEQP-VK.sparse_resources.image_block_shapes.3d.rg16i.samples_4
+dEQP-VK.sparse_resources.image_block_shapes.3d.rg16i.samples_8
+dEQP-VK.sparse_resources.image_block_shapes.3d.rg16i.samples_16
+dEQP-VK.sparse_resources.image_block_shapes.3d.rg8i.samples_1
+dEQP-VK.sparse_resources.image_block_shapes.3d.rg8i.samples_2
+dEQP-VK.sparse_resources.image_block_shapes.3d.rg8i.samples_4
+dEQP-VK.sparse_resources.image_block_shapes.3d.rg8i.samples_8
+dEQP-VK.sparse_resources.image_block_shapes.3d.rg8i.samples_16
+dEQP-VK.sparse_resources.image_block_shapes.3d.rgba32ui.samples_1
+dEQP-VK.sparse_resources.image_block_shapes.3d.rgba32ui.samples_2
+dEQP-VK.sparse_resources.image_block_shapes.3d.rgba32ui.samples_4
+dEQP-VK.sparse_resources.image_block_shapes.3d.rgba32ui.samples_8
+dEQP-VK.sparse_resources.image_block_shapes.3d.rgba32ui.samples_16
+dEQP-VK.sparse_resources.image_block_shapes.3d.rgba16ui.samples_1
+dEQP-VK.sparse_resources.image_block_shapes.3d.rgba16ui.samples_2
+dEQP-VK.sparse_resources.image_block_shapes.3d.rgba16ui.samples_4
+dEQP-VK.sparse_resources.image_block_shapes.3d.rgba16ui.samples_8
+dEQP-VK.sparse_resources.image_block_shapes.3d.rgba16ui.samples_16
+dEQP-VK.sparse_resources.image_block_shapes.3d.rgba8ui.samples_1
+dEQP-VK.sparse_resources.image_block_shapes.3d.rgba8ui.samples_2
+dEQP-VK.sparse_resources.image_block_shapes.3d.rgba8ui.samples_4
+dEQP-VK.sparse_resources.image_block_shapes.3d.rgba8ui.samples_8
+dEQP-VK.sparse_resources.image_block_shapes.3d.rgba8ui.samples_16
 dEQP-VK.sparse_resources.mipmap_sparse_residency.2d.r32i.512_256_1
 dEQP-VK.sparse_resources.mipmap_sparse_residency.2d.r32i.1024_128_1
 dEQP-VK.sparse_resources.mipmap_sparse_residency.2d.r32i.11_137_1
@@ -235098,30 +241980,54 @@ dEQP-VK.tessellation.tesscoord.quads_fractional_even_spacing
 dEQP-VK.tessellation.tesscoord.isolines_equal_spacing
 dEQP-VK.tessellation.tesscoord.isolines_fractional_odd_spacing
 dEQP-VK.tessellation.tesscoord.isolines_fractional_even_spacing
-dEQP-VK.tessellation.winding.default_domain.triangles_ccw
-dEQP-VK.tessellation.winding.default_domain.triangles_ccw_yflip
-dEQP-VK.tessellation.winding.default_domain.triangles_cw
-dEQP-VK.tessellation.winding.default_domain.triangles_cw_yflip
-dEQP-VK.tessellation.winding.default_domain.quads_ccw
-dEQP-VK.tessellation.winding.default_domain.quads_ccw_yflip
-dEQP-VK.tessellation.winding.default_domain.quads_cw
-dEQP-VK.tessellation.winding.default_domain.quads_cw_yflip
-dEQP-VK.tessellation.winding.lower_left_domain.triangles_ccw
-dEQP-VK.tessellation.winding.lower_left_domain.triangles_ccw_yflip
-dEQP-VK.tessellation.winding.lower_left_domain.triangles_cw
-dEQP-VK.tessellation.winding.lower_left_domain.triangles_cw_yflip
-dEQP-VK.tessellation.winding.lower_left_domain.quads_ccw
-dEQP-VK.tessellation.winding.lower_left_domain.quads_ccw_yflip
-dEQP-VK.tessellation.winding.lower_left_domain.quads_cw
-dEQP-VK.tessellation.winding.lower_left_domain.quads_cw_yflip
-dEQP-VK.tessellation.winding.upper_left_domain.triangles_ccw
-dEQP-VK.tessellation.winding.upper_left_domain.triangles_ccw_yflip
-dEQP-VK.tessellation.winding.upper_left_domain.triangles_cw
-dEQP-VK.tessellation.winding.upper_left_domain.triangles_cw_yflip
-dEQP-VK.tessellation.winding.upper_left_domain.quads_ccw
-dEQP-VK.tessellation.winding.upper_left_domain.quads_ccw_yflip
-dEQP-VK.tessellation.winding.upper_left_domain.quads_cw
-dEQP-VK.tessellation.winding.upper_left_domain.quads_cw_yflip
+dEQP-VK.tessellation.winding.default_domain.glsl_triangles_ccw
+dEQP-VK.tessellation.winding.default_domain.glsl_triangles_ccw_yflip
+dEQP-VK.tessellation.winding.default_domain.glsl_triangles_cw
+dEQP-VK.tessellation.winding.default_domain.glsl_triangles_cw_yflip
+dEQP-VK.tessellation.winding.default_domain.hlsl_triangles_ccw
+dEQP-VK.tessellation.winding.default_domain.hlsl_triangles_ccw_yflip
+dEQP-VK.tessellation.winding.default_domain.hlsl_triangles_cw
+dEQP-VK.tessellation.winding.default_domain.hlsl_triangles_cw_yflip
+dEQP-VK.tessellation.winding.default_domain.glsl_quads_ccw
+dEQP-VK.tessellation.winding.default_domain.glsl_quads_ccw_yflip
+dEQP-VK.tessellation.winding.default_domain.glsl_quads_cw
+dEQP-VK.tessellation.winding.default_domain.glsl_quads_cw_yflip
+dEQP-VK.tessellation.winding.default_domain.hlsl_quads_ccw
+dEQP-VK.tessellation.winding.default_domain.hlsl_quads_ccw_yflip
+dEQP-VK.tessellation.winding.default_domain.hlsl_quads_cw
+dEQP-VK.tessellation.winding.default_domain.hlsl_quads_cw_yflip
+dEQP-VK.tessellation.winding.lower_left_domain.glsl_triangles_ccw
+dEQP-VK.tessellation.winding.lower_left_domain.glsl_triangles_ccw_yflip
+dEQP-VK.tessellation.winding.lower_left_domain.glsl_triangles_cw
+dEQP-VK.tessellation.winding.lower_left_domain.glsl_triangles_cw_yflip
+dEQP-VK.tessellation.winding.lower_left_domain.hlsl_triangles_ccw
+dEQP-VK.tessellation.winding.lower_left_domain.hlsl_triangles_ccw_yflip
+dEQP-VK.tessellation.winding.lower_left_domain.hlsl_triangles_cw
+dEQP-VK.tessellation.winding.lower_left_domain.hlsl_triangles_cw_yflip
+dEQP-VK.tessellation.winding.lower_left_domain.glsl_quads_ccw
+dEQP-VK.tessellation.winding.lower_left_domain.glsl_quads_ccw_yflip
+dEQP-VK.tessellation.winding.lower_left_domain.glsl_quads_cw
+dEQP-VK.tessellation.winding.lower_left_domain.glsl_quads_cw_yflip
+dEQP-VK.tessellation.winding.lower_left_domain.hlsl_quads_ccw
+dEQP-VK.tessellation.winding.lower_left_domain.hlsl_quads_ccw_yflip
+dEQP-VK.tessellation.winding.lower_left_domain.hlsl_quads_cw
+dEQP-VK.tessellation.winding.lower_left_domain.hlsl_quads_cw_yflip
+dEQP-VK.tessellation.winding.upper_left_domain.glsl_triangles_ccw
+dEQP-VK.tessellation.winding.upper_left_domain.glsl_triangles_ccw_yflip
+dEQP-VK.tessellation.winding.upper_left_domain.glsl_triangles_cw
+dEQP-VK.tessellation.winding.upper_left_domain.glsl_triangles_cw_yflip
+dEQP-VK.tessellation.winding.upper_left_domain.hlsl_triangles_ccw
+dEQP-VK.tessellation.winding.upper_left_domain.hlsl_triangles_ccw_yflip
+dEQP-VK.tessellation.winding.upper_left_domain.hlsl_triangles_cw
+dEQP-VK.tessellation.winding.upper_left_domain.hlsl_triangles_cw_yflip
+dEQP-VK.tessellation.winding.upper_left_domain.glsl_quads_ccw
+dEQP-VK.tessellation.winding.upper_left_domain.glsl_quads_ccw_yflip
+dEQP-VK.tessellation.winding.upper_left_domain.glsl_quads_cw
+dEQP-VK.tessellation.winding.upper_left_domain.glsl_quads_cw_yflip
+dEQP-VK.tessellation.winding.upper_left_domain.hlsl_quads_ccw
+dEQP-VK.tessellation.winding.upper_left_domain.hlsl_quads_ccw_yflip
+dEQP-VK.tessellation.winding.upper_left_domain.hlsl_quads_cw
+dEQP-VK.tessellation.winding.upper_left_domain.hlsl_quads_cw_yflip
 dEQP-VK.tessellation.shader_input_output.patch_vertices_5_in_10_out
 dEQP-VK.tessellation.shader_input_output.patch_vertices_10_in_5_out
 dEQP-VK.tessellation.shader_input_output.primitive_id_tcs
@@ -235165,8 +242071,10 @@ dEQP-VK.tessellation.common_edge.quads_fractional_even_spacing
 dEQP-VK.tessellation.common_edge.quads_equal_spacing_precise
 dEQP-VK.tessellation.common_edge.quads_fractional_odd_spacing_precise
 dEQP-VK.tessellation.common_edge.quads_fractional_even_spacing_precise
-dEQP-VK.tessellation.fractional_spacing.odd
-dEQP-VK.tessellation.fractional_spacing.even
+dEQP-VK.tessellation.fractional_spacing.glsl_odd
+dEQP-VK.tessellation.fractional_spacing.glsl_even
+dEQP-VK.tessellation.fractional_spacing.hlsl_odd
+dEQP-VK.tessellation.fractional_spacing.hlsl_even
 dEQP-VK.tessellation.primitive_discard.triangles_equal_spacing_ccw
 dEQP-VK.tessellation.primitive_discard.triangles_equal_spacing_ccw_point_mode
 dEQP-VK.tessellation.primitive_discard.triangles_equal_spacing_cw
@@ -238825,869 +245733,1733 @@ dEQP-VK.texture.mipmap.3d.max_level.linear_nearest
 dEQP-VK.texture.mipmap.3d.max_level.nearest_linear
 dEQP-VK.texture.mipmap.3d.max_level.linear_linear
 dEQP-VK.texture.shadow.2d.nearest.less_or_equal_d16_unorm
+dEQP-VK.texture.shadow.2d.nearest.sparse_less_or_equal_d16_unorm
 dEQP-VK.texture.shadow.2d.nearest.less_or_equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d.nearest.sparse_less_or_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d.nearest.less_or_equal_d32_sfloat
+dEQP-VK.texture.shadow.2d.nearest.sparse_less_or_equal_d32_sfloat
 dEQP-VK.texture.shadow.2d.nearest.less_or_equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.nearest.sparse_less_or_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.nearest.less_or_equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.nearest.sparse_less_or_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.nearest.less_or_equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d.nearest.sparse_less_or_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d.nearest.greater_or_equal_d16_unorm
+dEQP-VK.texture.shadow.2d.nearest.sparse_greater_or_equal_d16_unorm
 dEQP-VK.texture.shadow.2d.nearest.greater_or_equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d.nearest.sparse_greater_or_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d.nearest.greater_or_equal_d32_sfloat
+dEQP-VK.texture.shadow.2d.nearest.sparse_greater_or_equal_d32_sfloat
 dEQP-VK.texture.shadow.2d.nearest.greater_or_equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.nearest.sparse_greater_or_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.nearest.greater_or_equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.nearest.sparse_greater_or_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.nearest.greater_or_equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d.nearest.sparse_greater_or_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d.nearest.less_d16_unorm
+dEQP-VK.texture.shadow.2d.nearest.sparse_less_d16_unorm
 dEQP-VK.texture.shadow.2d.nearest.less_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d.nearest.sparse_less_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d.nearest.less_d32_sfloat
+dEQP-VK.texture.shadow.2d.nearest.sparse_less_d32_sfloat
 dEQP-VK.texture.shadow.2d.nearest.less_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.nearest.sparse_less_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.nearest.less_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.nearest.sparse_less_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.nearest.less_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d.nearest.sparse_less_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d.nearest.greater_d16_unorm
+dEQP-VK.texture.shadow.2d.nearest.sparse_greater_d16_unorm
 dEQP-VK.texture.shadow.2d.nearest.greater_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d.nearest.sparse_greater_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d.nearest.greater_d32_sfloat
+dEQP-VK.texture.shadow.2d.nearest.sparse_greater_d32_sfloat
 dEQP-VK.texture.shadow.2d.nearest.greater_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.nearest.sparse_greater_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.nearest.greater_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.nearest.sparse_greater_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.nearest.greater_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d.nearest.sparse_greater_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d.nearest.equal_d16_unorm
+dEQP-VK.texture.shadow.2d.nearest.sparse_equal_d16_unorm
 dEQP-VK.texture.shadow.2d.nearest.equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d.nearest.sparse_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d.nearest.equal_d32_sfloat
+dEQP-VK.texture.shadow.2d.nearest.sparse_equal_d32_sfloat
 dEQP-VK.texture.shadow.2d.nearest.equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.nearest.sparse_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.nearest.equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.nearest.sparse_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.nearest.equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d.nearest.sparse_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d.nearest.not_equal_d16_unorm
+dEQP-VK.texture.shadow.2d.nearest.sparse_not_equal_d16_unorm
 dEQP-VK.texture.shadow.2d.nearest.not_equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d.nearest.sparse_not_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d.nearest.not_equal_d32_sfloat
+dEQP-VK.texture.shadow.2d.nearest.sparse_not_equal_d32_sfloat
 dEQP-VK.texture.shadow.2d.nearest.not_equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.nearest.sparse_not_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.nearest.not_equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.nearest.sparse_not_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.nearest.not_equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d.nearest.sparse_not_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d.nearest.always_d16_unorm
+dEQP-VK.texture.shadow.2d.nearest.sparse_always_d16_unorm
 dEQP-VK.texture.shadow.2d.nearest.always_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d.nearest.sparse_always_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d.nearest.always_d32_sfloat
+dEQP-VK.texture.shadow.2d.nearest.sparse_always_d32_sfloat
 dEQP-VK.texture.shadow.2d.nearest.always_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.nearest.sparse_always_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.nearest.always_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.nearest.sparse_always_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.nearest.always_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d.nearest.sparse_always_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d.nearest.never_d16_unorm
+dEQP-VK.texture.shadow.2d.nearest.sparse_never_d16_unorm
 dEQP-VK.texture.shadow.2d.nearest.never_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d.nearest.sparse_never_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d.nearest.never_d32_sfloat
+dEQP-VK.texture.shadow.2d.nearest.sparse_never_d32_sfloat
 dEQP-VK.texture.shadow.2d.nearest.never_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.nearest.sparse_never_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.nearest.never_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.nearest.sparse_never_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.nearest.never_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d.nearest.sparse_never_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d.linear.less_or_equal_d16_unorm
+dEQP-VK.texture.shadow.2d.linear.sparse_less_or_equal_d16_unorm
 dEQP-VK.texture.shadow.2d.linear.less_or_equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d.linear.sparse_less_or_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d.linear.less_or_equal_d32_sfloat
+dEQP-VK.texture.shadow.2d.linear.sparse_less_or_equal_d32_sfloat
 dEQP-VK.texture.shadow.2d.linear.less_or_equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.linear.sparse_less_or_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.linear.less_or_equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.linear.sparse_less_or_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.linear.less_or_equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d.linear.sparse_less_or_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d.linear.greater_or_equal_d16_unorm
+dEQP-VK.texture.shadow.2d.linear.sparse_greater_or_equal_d16_unorm
 dEQP-VK.texture.shadow.2d.linear.greater_or_equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d.linear.sparse_greater_or_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d.linear.greater_or_equal_d32_sfloat
+dEQP-VK.texture.shadow.2d.linear.sparse_greater_or_equal_d32_sfloat
 dEQP-VK.texture.shadow.2d.linear.greater_or_equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.linear.sparse_greater_or_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.linear.greater_or_equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.linear.sparse_greater_or_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.linear.greater_or_equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d.linear.sparse_greater_or_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d.linear.less_d16_unorm
+dEQP-VK.texture.shadow.2d.linear.sparse_less_d16_unorm
 dEQP-VK.texture.shadow.2d.linear.less_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d.linear.sparse_less_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d.linear.less_d32_sfloat
+dEQP-VK.texture.shadow.2d.linear.sparse_less_d32_sfloat
 dEQP-VK.texture.shadow.2d.linear.less_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.linear.sparse_less_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.linear.less_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.linear.sparse_less_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.linear.less_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d.linear.sparse_less_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d.linear.greater_d16_unorm
+dEQP-VK.texture.shadow.2d.linear.sparse_greater_d16_unorm
 dEQP-VK.texture.shadow.2d.linear.greater_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d.linear.sparse_greater_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d.linear.greater_d32_sfloat
+dEQP-VK.texture.shadow.2d.linear.sparse_greater_d32_sfloat
 dEQP-VK.texture.shadow.2d.linear.greater_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.linear.sparse_greater_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.linear.greater_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.linear.sparse_greater_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.linear.greater_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d.linear.sparse_greater_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d.linear.equal_d16_unorm
+dEQP-VK.texture.shadow.2d.linear.sparse_equal_d16_unorm
 dEQP-VK.texture.shadow.2d.linear.equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d.linear.sparse_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d.linear.equal_d32_sfloat
+dEQP-VK.texture.shadow.2d.linear.sparse_equal_d32_sfloat
 dEQP-VK.texture.shadow.2d.linear.equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.linear.sparse_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.linear.equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.linear.sparse_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.linear.equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d.linear.sparse_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d.linear.not_equal_d16_unorm
+dEQP-VK.texture.shadow.2d.linear.sparse_not_equal_d16_unorm
 dEQP-VK.texture.shadow.2d.linear.not_equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d.linear.sparse_not_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d.linear.not_equal_d32_sfloat
+dEQP-VK.texture.shadow.2d.linear.sparse_not_equal_d32_sfloat
 dEQP-VK.texture.shadow.2d.linear.not_equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.linear.sparse_not_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.linear.not_equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.linear.sparse_not_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.linear.not_equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d.linear.sparse_not_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d.linear.always_d16_unorm
+dEQP-VK.texture.shadow.2d.linear.sparse_always_d16_unorm
 dEQP-VK.texture.shadow.2d.linear.always_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d.linear.sparse_always_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d.linear.always_d32_sfloat
+dEQP-VK.texture.shadow.2d.linear.sparse_always_d32_sfloat
 dEQP-VK.texture.shadow.2d.linear.always_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.linear.sparse_always_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.linear.always_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.linear.sparse_always_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.linear.always_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d.linear.sparse_always_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d.linear.never_d16_unorm
+dEQP-VK.texture.shadow.2d.linear.sparse_never_d16_unorm
 dEQP-VK.texture.shadow.2d.linear.never_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d.linear.sparse_never_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d.linear.never_d32_sfloat
+dEQP-VK.texture.shadow.2d.linear.sparse_never_d32_sfloat
 dEQP-VK.texture.shadow.2d.linear.never_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.linear.sparse_never_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.linear.never_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.linear.sparse_never_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.linear.never_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d.linear.sparse_never_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.less_or_equal_d16_unorm
+dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.sparse_less_or_equal_d16_unorm
 dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.less_or_equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.sparse_less_or_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.less_or_equal_d32_sfloat
+dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.sparse_less_or_equal_d32_sfloat
 dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.less_or_equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.sparse_less_or_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.less_or_equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.sparse_less_or_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.less_or_equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.sparse_less_or_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.greater_or_equal_d16_unorm
+dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.sparse_greater_or_equal_d16_unorm
 dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.greater_or_equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.sparse_greater_or_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.greater_or_equal_d32_sfloat
+dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.sparse_greater_or_equal_d32_sfloat
 dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.greater_or_equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.sparse_greater_or_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.greater_or_equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.sparse_greater_or_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.greater_or_equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.sparse_greater_or_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.less_d16_unorm
+dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.sparse_less_d16_unorm
 dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.less_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.sparse_less_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.less_d32_sfloat
+dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.sparse_less_d32_sfloat
 dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.less_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.sparse_less_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.less_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.sparse_less_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.less_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.sparse_less_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.greater_d16_unorm
+dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.sparse_greater_d16_unorm
 dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.greater_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.sparse_greater_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.greater_d32_sfloat
+dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.sparse_greater_d32_sfloat
 dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.greater_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.sparse_greater_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.greater_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.sparse_greater_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.greater_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.sparse_greater_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.equal_d16_unorm
+dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.sparse_equal_d16_unorm
 dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.sparse_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.equal_d32_sfloat
+dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.sparse_equal_d32_sfloat
 dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.sparse_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.sparse_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.sparse_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.not_equal_d16_unorm
+dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.sparse_not_equal_d16_unorm
 dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.not_equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.sparse_not_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.not_equal_d32_sfloat
+dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.sparse_not_equal_d32_sfloat
 dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.not_equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.sparse_not_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.not_equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.sparse_not_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.not_equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.sparse_not_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.always_d16_unorm
+dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.sparse_always_d16_unorm
 dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.always_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.sparse_always_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.always_d32_sfloat
+dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.sparse_always_d32_sfloat
 dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.always_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.sparse_always_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.always_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.sparse_always_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.always_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.sparse_always_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.never_d16_unorm
+dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.sparse_never_d16_unorm
 dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.never_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.sparse_never_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.never_d32_sfloat
+dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.sparse_never_d32_sfloat
 dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.never_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.sparse_never_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.never_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.sparse_never_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.never_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d.nearest_mipmap_nearest.sparse_never_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.less_or_equal_d16_unorm
+dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.sparse_less_or_equal_d16_unorm
 dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.less_or_equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.sparse_less_or_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.less_or_equal_d32_sfloat
+dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.sparse_less_or_equal_d32_sfloat
 dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.less_or_equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.sparse_less_or_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.less_or_equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.sparse_less_or_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.less_or_equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.sparse_less_or_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.greater_or_equal_d16_unorm
+dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.sparse_greater_or_equal_d16_unorm
 dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.greater_or_equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.sparse_greater_or_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.greater_or_equal_d32_sfloat
+dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.sparse_greater_or_equal_d32_sfloat
 dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.greater_or_equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.sparse_greater_or_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.greater_or_equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.sparse_greater_or_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.greater_or_equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.sparse_greater_or_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.less_d16_unorm
+dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.sparse_less_d16_unorm
 dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.less_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.sparse_less_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.less_d32_sfloat
+dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.sparse_less_d32_sfloat
 dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.less_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.sparse_less_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.less_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.sparse_less_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.less_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.sparse_less_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.greater_d16_unorm
+dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.sparse_greater_d16_unorm
 dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.greater_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.sparse_greater_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.greater_d32_sfloat
+dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.sparse_greater_d32_sfloat
 dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.greater_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.sparse_greater_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.greater_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.sparse_greater_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.greater_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.sparse_greater_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.equal_d16_unorm
+dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.sparse_equal_d16_unorm
 dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.sparse_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.equal_d32_sfloat
+dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.sparse_equal_d32_sfloat
 dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.sparse_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.sparse_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.sparse_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.not_equal_d16_unorm
+dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.sparse_not_equal_d16_unorm
 dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.not_equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.sparse_not_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.not_equal_d32_sfloat
+dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.sparse_not_equal_d32_sfloat
 dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.not_equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.sparse_not_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.not_equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.sparse_not_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.not_equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.sparse_not_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.always_d16_unorm
+dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.sparse_always_d16_unorm
 dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.always_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.sparse_always_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.always_d32_sfloat
+dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.sparse_always_d32_sfloat
 dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.always_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.sparse_always_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.always_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.sparse_always_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.always_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.sparse_always_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.never_d16_unorm
+dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.sparse_never_d16_unorm
 dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.never_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.sparse_never_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.never_d32_sfloat
+dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.sparse_never_d32_sfloat
 dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.never_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.sparse_never_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.never_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.sparse_never_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.never_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d.linear_mipmap_nearest.sparse_never_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.less_or_equal_d16_unorm
+dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.sparse_less_or_equal_d16_unorm
 dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.less_or_equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.sparse_less_or_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.less_or_equal_d32_sfloat
+dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.sparse_less_or_equal_d32_sfloat
 dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.less_or_equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.sparse_less_or_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.less_or_equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.sparse_less_or_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.less_or_equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.sparse_less_or_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.greater_or_equal_d16_unorm
+dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.sparse_greater_or_equal_d16_unorm
 dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.greater_or_equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.sparse_greater_or_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.greater_or_equal_d32_sfloat
+dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.sparse_greater_or_equal_d32_sfloat
 dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.greater_or_equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.sparse_greater_or_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.greater_or_equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.sparse_greater_or_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.greater_or_equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.sparse_greater_or_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.less_d16_unorm
+dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.sparse_less_d16_unorm
 dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.less_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.sparse_less_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.less_d32_sfloat
+dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.sparse_less_d32_sfloat
 dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.less_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.sparse_less_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.less_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.sparse_less_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.less_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.sparse_less_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.greater_d16_unorm
+dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.sparse_greater_d16_unorm
 dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.greater_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.sparse_greater_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.greater_d32_sfloat
+dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.sparse_greater_d32_sfloat
 dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.greater_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.sparse_greater_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.greater_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.sparse_greater_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.greater_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.sparse_greater_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.equal_d16_unorm
+dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.sparse_equal_d16_unorm
 dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.sparse_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.equal_d32_sfloat
+dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.sparse_equal_d32_sfloat
 dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.sparse_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.sparse_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.sparse_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.not_equal_d16_unorm
+dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.sparse_not_equal_d16_unorm
 dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.not_equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.sparse_not_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.not_equal_d32_sfloat
+dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.sparse_not_equal_d32_sfloat
 dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.not_equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.sparse_not_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.not_equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.sparse_not_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.not_equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.sparse_not_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.always_d16_unorm
+dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.sparse_always_d16_unorm
 dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.always_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.sparse_always_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.always_d32_sfloat
+dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.sparse_always_d32_sfloat
 dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.always_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.sparse_always_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.always_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.sparse_always_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.always_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.sparse_always_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.never_d16_unorm
+dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.sparse_never_d16_unorm
 dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.never_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.sparse_never_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.never_d32_sfloat
+dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.sparse_never_d32_sfloat
 dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.never_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.sparse_never_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.never_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.sparse_never_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.never_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d.nearest_mipmap_linear.sparse_never_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d.linear_mipmap_linear.less_or_equal_d16_unorm
+dEQP-VK.texture.shadow.2d.linear_mipmap_linear.sparse_less_or_equal_d16_unorm
 dEQP-VK.texture.shadow.2d.linear_mipmap_linear.less_or_equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d.linear_mipmap_linear.sparse_less_or_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d.linear_mipmap_linear.less_or_equal_d32_sfloat
+dEQP-VK.texture.shadow.2d.linear_mipmap_linear.sparse_less_or_equal_d32_sfloat
 dEQP-VK.texture.shadow.2d.linear_mipmap_linear.less_or_equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.linear_mipmap_linear.sparse_less_or_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.linear_mipmap_linear.less_or_equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.linear_mipmap_linear.sparse_less_or_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.linear_mipmap_linear.less_or_equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d.linear_mipmap_linear.sparse_less_or_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d.linear_mipmap_linear.greater_or_equal_d16_unorm
+dEQP-VK.texture.shadow.2d.linear_mipmap_linear.sparse_greater_or_equal_d16_unorm
 dEQP-VK.texture.shadow.2d.linear_mipmap_linear.greater_or_equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d.linear_mipmap_linear.sparse_greater_or_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d.linear_mipmap_linear.greater_or_equal_d32_sfloat
+dEQP-VK.texture.shadow.2d.linear_mipmap_linear.sparse_greater_or_equal_d32_sfloat
 dEQP-VK.texture.shadow.2d.linear_mipmap_linear.greater_or_equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.linear_mipmap_linear.sparse_greater_or_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.linear_mipmap_linear.greater_or_equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.linear_mipmap_linear.sparse_greater_or_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.linear_mipmap_linear.greater_or_equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d.linear_mipmap_linear.sparse_greater_or_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d.linear_mipmap_linear.less_d16_unorm
+dEQP-VK.texture.shadow.2d.linear_mipmap_linear.sparse_less_d16_unorm
 dEQP-VK.texture.shadow.2d.linear_mipmap_linear.less_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d.linear_mipmap_linear.sparse_less_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d.linear_mipmap_linear.less_d32_sfloat
+dEQP-VK.texture.shadow.2d.linear_mipmap_linear.sparse_less_d32_sfloat
 dEQP-VK.texture.shadow.2d.linear_mipmap_linear.less_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.linear_mipmap_linear.sparse_less_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.linear_mipmap_linear.less_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.linear_mipmap_linear.sparse_less_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.linear_mipmap_linear.less_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d.linear_mipmap_linear.sparse_less_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d.linear_mipmap_linear.greater_d16_unorm
+dEQP-VK.texture.shadow.2d.linear_mipmap_linear.sparse_greater_d16_unorm
 dEQP-VK.texture.shadow.2d.linear_mipmap_linear.greater_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d.linear_mipmap_linear.sparse_greater_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d.linear_mipmap_linear.greater_d32_sfloat
+dEQP-VK.texture.shadow.2d.linear_mipmap_linear.sparse_greater_d32_sfloat
 dEQP-VK.texture.shadow.2d.linear_mipmap_linear.greater_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.linear_mipmap_linear.sparse_greater_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.linear_mipmap_linear.greater_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.linear_mipmap_linear.sparse_greater_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.linear_mipmap_linear.greater_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d.linear_mipmap_linear.sparse_greater_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d.linear_mipmap_linear.equal_d16_unorm
+dEQP-VK.texture.shadow.2d.linear_mipmap_linear.sparse_equal_d16_unorm
 dEQP-VK.texture.shadow.2d.linear_mipmap_linear.equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d.linear_mipmap_linear.sparse_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d.linear_mipmap_linear.equal_d32_sfloat
+dEQP-VK.texture.shadow.2d.linear_mipmap_linear.sparse_equal_d32_sfloat
 dEQP-VK.texture.shadow.2d.linear_mipmap_linear.equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.linear_mipmap_linear.sparse_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.linear_mipmap_linear.equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.linear_mipmap_linear.sparse_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.linear_mipmap_linear.equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d.linear_mipmap_linear.sparse_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d.linear_mipmap_linear.not_equal_d16_unorm
+dEQP-VK.texture.shadow.2d.linear_mipmap_linear.sparse_not_equal_d16_unorm
 dEQP-VK.texture.shadow.2d.linear_mipmap_linear.not_equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d.linear_mipmap_linear.sparse_not_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d.linear_mipmap_linear.not_equal_d32_sfloat
+dEQP-VK.texture.shadow.2d.linear_mipmap_linear.sparse_not_equal_d32_sfloat
 dEQP-VK.texture.shadow.2d.linear_mipmap_linear.not_equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.linear_mipmap_linear.sparse_not_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.linear_mipmap_linear.not_equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.linear_mipmap_linear.sparse_not_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.linear_mipmap_linear.not_equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d.linear_mipmap_linear.sparse_not_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d.linear_mipmap_linear.always_d16_unorm
+dEQP-VK.texture.shadow.2d.linear_mipmap_linear.sparse_always_d16_unorm
 dEQP-VK.texture.shadow.2d.linear_mipmap_linear.always_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d.linear_mipmap_linear.sparse_always_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d.linear_mipmap_linear.always_d32_sfloat
+dEQP-VK.texture.shadow.2d.linear_mipmap_linear.sparse_always_d32_sfloat
 dEQP-VK.texture.shadow.2d.linear_mipmap_linear.always_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.linear_mipmap_linear.sparse_always_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.linear_mipmap_linear.always_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.linear_mipmap_linear.sparse_always_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.linear_mipmap_linear.always_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d.linear_mipmap_linear.sparse_always_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d.linear_mipmap_linear.never_d16_unorm
+dEQP-VK.texture.shadow.2d.linear_mipmap_linear.sparse_never_d16_unorm
 dEQP-VK.texture.shadow.2d.linear_mipmap_linear.never_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d.linear_mipmap_linear.sparse_never_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d.linear_mipmap_linear.never_d32_sfloat
+dEQP-VK.texture.shadow.2d.linear_mipmap_linear.sparse_never_d32_sfloat
 dEQP-VK.texture.shadow.2d.linear_mipmap_linear.never_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.linear_mipmap_linear.sparse_never_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.linear_mipmap_linear.never_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d.linear_mipmap_linear.sparse_never_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d.linear_mipmap_linear.never_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d.linear_mipmap_linear.sparse_never_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.cube.nearest.less_or_equal_d16_unorm
+dEQP-VK.texture.shadow.cube.nearest.sparse_less_or_equal_d16_unorm
 dEQP-VK.texture.shadow.cube.nearest.less_or_equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.cube.nearest.sparse_less_or_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.cube.nearest.less_or_equal_d32_sfloat
+dEQP-VK.texture.shadow.cube.nearest.sparse_less_or_equal_d32_sfloat
 dEQP-VK.texture.shadow.cube.nearest.less_or_equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.nearest.sparse_less_or_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.nearest.less_or_equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.nearest.sparse_less_or_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.nearest.less_or_equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.cube.nearest.sparse_less_or_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.cube.nearest.greater_or_equal_d16_unorm
+dEQP-VK.texture.shadow.cube.nearest.sparse_greater_or_equal_d16_unorm
 dEQP-VK.texture.shadow.cube.nearest.greater_or_equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.cube.nearest.sparse_greater_or_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.cube.nearest.greater_or_equal_d32_sfloat
+dEQP-VK.texture.shadow.cube.nearest.sparse_greater_or_equal_d32_sfloat
 dEQP-VK.texture.shadow.cube.nearest.greater_or_equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.nearest.sparse_greater_or_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.nearest.greater_or_equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.nearest.sparse_greater_or_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.nearest.greater_or_equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.cube.nearest.sparse_greater_or_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.cube.nearest.less_d16_unorm
+dEQP-VK.texture.shadow.cube.nearest.sparse_less_d16_unorm
 dEQP-VK.texture.shadow.cube.nearest.less_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.cube.nearest.sparse_less_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.cube.nearest.less_d32_sfloat
+dEQP-VK.texture.shadow.cube.nearest.sparse_less_d32_sfloat
 dEQP-VK.texture.shadow.cube.nearest.less_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.nearest.sparse_less_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.nearest.less_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.nearest.sparse_less_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.nearest.less_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.cube.nearest.sparse_less_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.cube.nearest.greater_d16_unorm
+dEQP-VK.texture.shadow.cube.nearest.sparse_greater_d16_unorm
 dEQP-VK.texture.shadow.cube.nearest.greater_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.cube.nearest.sparse_greater_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.cube.nearest.greater_d32_sfloat
+dEQP-VK.texture.shadow.cube.nearest.sparse_greater_d32_sfloat
 dEQP-VK.texture.shadow.cube.nearest.greater_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.nearest.sparse_greater_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.nearest.greater_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.nearest.sparse_greater_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.nearest.greater_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.cube.nearest.sparse_greater_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.cube.nearest.equal_d16_unorm
+dEQP-VK.texture.shadow.cube.nearest.sparse_equal_d16_unorm
 dEQP-VK.texture.shadow.cube.nearest.equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.cube.nearest.sparse_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.cube.nearest.equal_d32_sfloat
+dEQP-VK.texture.shadow.cube.nearest.sparse_equal_d32_sfloat
 dEQP-VK.texture.shadow.cube.nearest.equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.nearest.sparse_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.nearest.equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.nearest.sparse_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.nearest.equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.cube.nearest.sparse_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.cube.nearest.not_equal_d16_unorm
+dEQP-VK.texture.shadow.cube.nearest.sparse_not_equal_d16_unorm
 dEQP-VK.texture.shadow.cube.nearest.not_equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.cube.nearest.sparse_not_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.cube.nearest.not_equal_d32_sfloat
+dEQP-VK.texture.shadow.cube.nearest.sparse_not_equal_d32_sfloat
 dEQP-VK.texture.shadow.cube.nearest.not_equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.nearest.sparse_not_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.nearest.not_equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.nearest.sparse_not_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.nearest.not_equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.cube.nearest.sparse_not_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.cube.nearest.always_d16_unorm
+dEQP-VK.texture.shadow.cube.nearest.sparse_always_d16_unorm
 dEQP-VK.texture.shadow.cube.nearest.always_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.cube.nearest.sparse_always_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.cube.nearest.always_d32_sfloat
+dEQP-VK.texture.shadow.cube.nearest.sparse_always_d32_sfloat
 dEQP-VK.texture.shadow.cube.nearest.always_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.nearest.sparse_always_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.nearest.always_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.nearest.sparse_always_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.nearest.always_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.cube.nearest.sparse_always_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.cube.nearest.never_d16_unorm
+dEQP-VK.texture.shadow.cube.nearest.sparse_never_d16_unorm
 dEQP-VK.texture.shadow.cube.nearest.never_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.cube.nearest.sparse_never_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.cube.nearest.never_d32_sfloat
+dEQP-VK.texture.shadow.cube.nearest.sparse_never_d32_sfloat
 dEQP-VK.texture.shadow.cube.nearest.never_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.nearest.sparse_never_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.nearest.never_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.nearest.sparse_never_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.nearest.never_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.cube.nearest.sparse_never_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.cube.linear.less_or_equal_d16_unorm
+dEQP-VK.texture.shadow.cube.linear.sparse_less_or_equal_d16_unorm
 dEQP-VK.texture.shadow.cube.linear.less_or_equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.cube.linear.sparse_less_or_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.cube.linear.less_or_equal_d32_sfloat
+dEQP-VK.texture.shadow.cube.linear.sparse_less_or_equal_d32_sfloat
 dEQP-VK.texture.shadow.cube.linear.less_or_equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.linear.sparse_less_or_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.linear.less_or_equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.linear.sparse_less_or_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.linear.less_or_equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.cube.linear.sparse_less_or_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.cube.linear.greater_or_equal_d16_unorm
+dEQP-VK.texture.shadow.cube.linear.sparse_greater_or_equal_d16_unorm
 dEQP-VK.texture.shadow.cube.linear.greater_or_equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.cube.linear.sparse_greater_or_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.cube.linear.greater_or_equal_d32_sfloat
+dEQP-VK.texture.shadow.cube.linear.sparse_greater_or_equal_d32_sfloat
 dEQP-VK.texture.shadow.cube.linear.greater_or_equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.linear.sparse_greater_or_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.linear.greater_or_equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.linear.sparse_greater_or_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.linear.greater_or_equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.cube.linear.sparse_greater_or_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.cube.linear.less_d16_unorm
+dEQP-VK.texture.shadow.cube.linear.sparse_less_d16_unorm
 dEQP-VK.texture.shadow.cube.linear.less_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.cube.linear.sparse_less_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.cube.linear.less_d32_sfloat
+dEQP-VK.texture.shadow.cube.linear.sparse_less_d32_sfloat
 dEQP-VK.texture.shadow.cube.linear.less_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.linear.sparse_less_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.linear.less_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.linear.sparse_less_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.linear.less_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.cube.linear.sparse_less_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.cube.linear.greater_d16_unorm
+dEQP-VK.texture.shadow.cube.linear.sparse_greater_d16_unorm
 dEQP-VK.texture.shadow.cube.linear.greater_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.cube.linear.sparse_greater_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.cube.linear.greater_d32_sfloat
+dEQP-VK.texture.shadow.cube.linear.sparse_greater_d32_sfloat
 dEQP-VK.texture.shadow.cube.linear.greater_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.linear.sparse_greater_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.linear.greater_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.linear.sparse_greater_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.linear.greater_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.cube.linear.sparse_greater_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.cube.linear.equal_d16_unorm
+dEQP-VK.texture.shadow.cube.linear.sparse_equal_d16_unorm
 dEQP-VK.texture.shadow.cube.linear.equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.cube.linear.sparse_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.cube.linear.equal_d32_sfloat
+dEQP-VK.texture.shadow.cube.linear.sparse_equal_d32_sfloat
 dEQP-VK.texture.shadow.cube.linear.equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.linear.sparse_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.linear.equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.linear.sparse_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.linear.equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.cube.linear.sparse_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.cube.linear.not_equal_d16_unorm
+dEQP-VK.texture.shadow.cube.linear.sparse_not_equal_d16_unorm
 dEQP-VK.texture.shadow.cube.linear.not_equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.cube.linear.sparse_not_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.cube.linear.not_equal_d32_sfloat
+dEQP-VK.texture.shadow.cube.linear.sparse_not_equal_d32_sfloat
 dEQP-VK.texture.shadow.cube.linear.not_equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.linear.sparse_not_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.linear.not_equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.linear.sparse_not_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.linear.not_equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.cube.linear.sparse_not_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.cube.linear.always_d16_unorm
+dEQP-VK.texture.shadow.cube.linear.sparse_always_d16_unorm
 dEQP-VK.texture.shadow.cube.linear.always_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.cube.linear.sparse_always_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.cube.linear.always_d32_sfloat
+dEQP-VK.texture.shadow.cube.linear.sparse_always_d32_sfloat
 dEQP-VK.texture.shadow.cube.linear.always_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.linear.sparse_always_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.linear.always_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.linear.sparse_always_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.linear.always_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.cube.linear.sparse_always_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.cube.linear.never_d16_unorm
+dEQP-VK.texture.shadow.cube.linear.sparse_never_d16_unorm
 dEQP-VK.texture.shadow.cube.linear.never_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.cube.linear.sparse_never_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.cube.linear.never_d32_sfloat
+dEQP-VK.texture.shadow.cube.linear.sparse_never_d32_sfloat
 dEQP-VK.texture.shadow.cube.linear.never_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.linear.sparse_never_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.linear.never_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.linear.sparse_never_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.linear.never_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.cube.linear.sparse_never_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.less_or_equal_d16_unorm
+dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.sparse_less_or_equal_d16_unorm
 dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.less_or_equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.sparse_less_or_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.less_or_equal_d32_sfloat
+dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.sparse_less_or_equal_d32_sfloat
 dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.less_or_equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.sparse_less_or_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.less_or_equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.sparse_less_or_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.less_or_equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.sparse_less_or_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.greater_or_equal_d16_unorm
+dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.sparse_greater_or_equal_d16_unorm
 dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.greater_or_equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.sparse_greater_or_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.greater_or_equal_d32_sfloat
+dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.sparse_greater_or_equal_d32_sfloat
 dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.greater_or_equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.sparse_greater_or_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.greater_or_equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.sparse_greater_or_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.greater_or_equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.sparse_greater_or_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.less_d16_unorm
+dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.sparse_less_d16_unorm
 dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.less_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.sparse_less_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.less_d32_sfloat
+dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.sparse_less_d32_sfloat
 dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.less_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.sparse_less_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.less_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.sparse_less_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.less_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.sparse_less_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.greater_d16_unorm
+dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.sparse_greater_d16_unorm
 dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.greater_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.sparse_greater_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.greater_d32_sfloat
+dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.sparse_greater_d32_sfloat
 dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.greater_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.sparse_greater_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.greater_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.sparse_greater_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.greater_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.sparse_greater_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.equal_d16_unorm
+dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.sparse_equal_d16_unorm
 dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.sparse_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.equal_d32_sfloat
+dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.sparse_equal_d32_sfloat
 dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.sparse_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.sparse_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.sparse_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.not_equal_d16_unorm
+dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.sparse_not_equal_d16_unorm
 dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.not_equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.sparse_not_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.not_equal_d32_sfloat
+dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.sparse_not_equal_d32_sfloat
 dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.not_equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.sparse_not_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.not_equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.sparse_not_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.not_equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.sparse_not_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.always_d16_unorm
+dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.sparse_always_d16_unorm
 dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.always_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.sparse_always_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.always_d32_sfloat
+dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.sparse_always_d32_sfloat
 dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.always_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.sparse_always_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.always_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.sparse_always_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.always_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.sparse_always_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.never_d16_unorm
+dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.sparse_never_d16_unorm
 dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.never_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.sparse_never_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.never_d32_sfloat
+dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.sparse_never_d32_sfloat
 dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.never_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.sparse_never_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.never_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.sparse_never_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.never_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.cube.nearest_mipmap_nearest.sparse_never_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.less_or_equal_d16_unorm
+dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.sparse_less_or_equal_d16_unorm
 dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.less_or_equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.sparse_less_or_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.less_or_equal_d32_sfloat
+dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.sparse_less_or_equal_d32_sfloat
 dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.less_or_equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.sparse_less_or_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.less_or_equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.sparse_less_or_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.less_or_equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.sparse_less_or_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.greater_or_equal_d16_unorm
+dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.sparse_greater_or_equal_d16_unorm
 dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.greater_or_equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.sparse_greater_or_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.greater_or_equal_d32_sfloat
+dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.sparse_greater_or_equal_d32_sfloat
 dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.greater_or_equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.sparse_greater_or_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.greater_or_equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.sparse_greater_or_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.greater_or_equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.sparse_greater_or_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.less_d16_unorm
+dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.sparse_less_d16_unorm
 dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.less_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.sparse_less_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.less_d32_sfloat
+dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.sparse_less_d32_sfloat
 dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.less_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.sparse_less_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.less_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.sparse_less_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.less_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.sparse_less_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.greater_d16_unorm
+dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.sparse_greater_d16_unorm
 dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.greater_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.sparse_greater_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.greater_d32_sfloat
+dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.sparse_greater_d32_sfloat
 dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.greater_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.sparse_greater_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.greater_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.sparse_greater_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.greater_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.sparse_greater_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.equal_d16_unorm
+dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.sparse_equal_d16_unorm
 dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.sparse_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.equal_d32_sfloat
+dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.sparse_equal_d32_sfloat
 dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.sparse_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.sparse_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.sparse_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.not_equal_d16_unorm
+dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.sparse_not_equal_d16_unorm
 dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.not_equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.sparse_not_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.not_equal_d32_sfloat
+dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.sparse_not_equal_d32_sfloat
 dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.not_equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.sparse_not_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.not_equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.sparse_not_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.not_equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.sparse_not_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.always_d16_unorm
+dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.sparse_always_d16_unorm
 dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.always_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.sparse_always_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.always_d32_sfloat
+dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.sparse_always_d32_sfloat
 dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.always_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.sparse_always_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.always_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.sparse_always_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.always_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.sparse_always_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.never_d16_unorm
+dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.sparse_never_d16_unorm
 dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.never_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.sparse_never_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.never_d32_sfloat
+dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.sparse_never_d32_sfloat
 dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.never_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.sparse_never_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.never_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.sparse_never_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.never_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.cube.linear_mipmap_nearest.sparse_never_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.less_or_equal_d16_unorm
+dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.sparse_less_or_equal_d16_unorm
 dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.less_or_equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.sparse_less_or_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.less_or_equal_d32_sfloat
+dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.sparse_less_or_equal_d32_sfloat
 dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.less_or_equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.sparse_less_or_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.less_or_equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.sparse_less_or_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.less_or_equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.sparse_less_or_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.greater_or_equal_d16_unorm
+dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.sparse_greater_or_equal_d16_unorm
 dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.greater_or_equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.sparse_greater_or_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.greater_or_equal_d32_sfloat
+dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.sparse_greater_or_equal_d32_sfloat
 dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.greater_or_equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.sparse_greater_or_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.greater_or_equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.sparse_greater_or_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.greater_or_equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.sparse_greater_or_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.less_d16_unorm
+dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.sparse_less_d16_unorm
 dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.less_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.sparse_less_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.less_d32_sfloat
+dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.sparse_less_d32_sfloat
 dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.less_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.sparse_less_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.less_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.sparse_less_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.less_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.sparse_less_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.greater_d16_unorm
+dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.sparse_greater_d16_unorm
 dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.greater_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.sparse_greater_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.greater_d32_sfloat
+dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.sparse_greater_d32_sfloat
 dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.greater_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.sparse_greater_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.greater_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.sparse_greater_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.greater_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.sparse_greater_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.equal_d16_unorm
+dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.sparse_equal_d16_unorm
 dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.sparse_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.equal_d32_sfloat
+dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.sparse_equal_d32_sfloat
 dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.sparse_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.sparse_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.sparse_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.not_equal_d16_unorm
+dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.sparse_not_equal_d16_unorm
 dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.not_equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.sparse_not_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.not_equal_d32_sfloat
+dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.sparse_not_equal_d32_sfloat
 dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.not_equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.sparse_not_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.not_equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.sparse_not_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.not_equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.sparse_not_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.always_d16_unorm
+dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.sparse_always_d16_unorm
 dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.always_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.sparse_always_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.always_d32_sfloat
+dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.sparse_always_d32_sfloat
 dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.always_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.sparse_always_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.always_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.sparse_always_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.always_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.sparse_always_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.never_d16_unorm
+dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.sparse_never_d16_unorm
 dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.never_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.sparse_never_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.never_d32_sfloat
+dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.sparse_never_d32_sfloat
 dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.never_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.sparse_never_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.never_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.sparse_never_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.never_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.cube.nearest_mipmap_linear.sparse_never_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.cube.linear_mipmap_linear.less_or_equal_d16_unorm
+dEQP-VK.texture.shadow.cube.linear_mipmap_linear.sparse_less_or_equal_d16_unorm
 dEQP-VK.texture.shadow.cube.linear_mipmap_linear.less_or_equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.cube.linear_mipmap_linear.sparse_less_or_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.cube.linear_mipmap_linear.less_or_equal_d32_sfloat
+dEQP-VK.texture.shadow.cube.linear_mipmap_linear.sparse_less_or_equal_d32_sfloat
 dEQP-VK.texture.shadow.cube.linear_mipmap_linear.less_or_equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.linear_mipmap_linear.sparse_less_or_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.linear_mipmap_linear.less_or_equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.linear_mipmap_linear.sparse_less_or_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.linear_mipmap_linear.less_or_equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.cube.linear_mipmap_linear.sparse_less_or_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.cube.linear_mipmap_linear.greater_or_equal_d16_unorm
+dEQP-VK.texture.shadow.cube.linear_mipmap_linear.sparse_greater_or_equal_d16_unorm
 dEQP-VK.texture.shadow.cube.linear_mipmap_linear.greater_or_equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.cube.linear_mipmap_linear.sparse_greater_or_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.cube.linear_mipmap_linear.greater_or_equal_d32_sfloat
+dEQP-VK.texture.shadow.cube.linear_mipmap_linear.sparse_greater_or_equal_d32_sfloat
 dEQP-VK.texture.shadow.cube.linear_mipmap_linear.greater_or_equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.linear_mipmap_linear.sparse_greater_or_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.linear_mipmap_linear.greater_or_equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.linear_mipmap_linear.sparse_greater_or_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.linear_mipmap_linear.greater_or_equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.cube.linear_mipmap_linear.sparse_greater_or_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.cube.linear_mipmap_linear.less_d16_unorm
+dEQP-VK.texture.shadow.cube.linear_mipmap_linear.sparse_less_d16_unorm
 dEQP-VK.texture.shadow.cube.linear_mipmap_linear.less_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.cube.linear_mipmap_linear.sparse_less_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.cube.linear_mipmap_linear.less_d32_sfloat
+dEQP-VK.texture.shadow.cube.linear_mipmap_linear.sparse_less_d32_sfloat
 dEQP-VK.texture.shadow.cube.linear_mipmap_linear.less_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.linear_mipmap_linear.sparse_less_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.linear_mipmap_linear.less_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.linear_mipmap_linear.sparse_less_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.linear_mipmap_linear.less_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.cube.linear_mipmap_linear.sparse_less_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.cube.linear_mipmap_linear.greater_d16_unorm
+dEQP-VK.texture.shadow.cube.linear_mipmap_linear.sparse_greater_d16_unorm
 dEQP-VK.texture.shadow.cube.linear_mipmap_linear.greater_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.cube.linear_mipmap_linear.sparse_greater_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.cube.linear_mipmap_linear.greater_d32_sfloat
+dEQP-VK.texture.shadow.cube.linear_mipmap_linear.sparse_greater_d32_sfloat
 dEQP-VK.texture.shadow.cube.linear_mipmap_linear.greater_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.linear_mipmap_linear.sparse_greater_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.linear_mipmap_linear.greater_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.linear_mipmap_linear.sparse_greater_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.linear_mipmap_linear.greater_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.cube.linear_mipmap_linear.sparse_greater_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.cube.linear_mipmap_linear.equal_d16_unorm
+dEQP-VK.texture.shadow.cube.linear_mipmap_linear.sparse_equal_d16_unorm
 dEQP-VK.texture.shadow.cube.linear_mipmap_linear.equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.cube.linear_mipmap_linear.sparse_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.cube.linear_mipmap_linear.equal_d32_sfloat
+dEQP-VK.texture.shadow.cube.linear_mipmap_linear.sparse_equal_d32_sfloat
 dEQP-VK.texture.shadow.cube.linear_mipmap_linear.equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.linear_mipmap_linear.sparse_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.linear_mipmap_linear.equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.linear_mipmap_linear.sparse_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.linear_mipmap_linear.equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.cube.linear_mipmap_linear.sparse_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.cube.linear_mipmap_linear.not_equal_d16_unorm
+dEQP-VK.texture.shadow.cube.linear_mipmap_linear.sparse_not_equal_d16_unorm
 dEQP-VK.texture.shadow.cube.linear_mipmap_linear.not_equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.cube.linear_mipmap_linear.sparse_not_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.cube.linear_mipmap_linear.not_equal_d32_sfloat
+dEQP-VK.texture.shadow.cube.linear_mipmap_linear.sparse_not_equal_d32_sfloat
 dEQP-VK.texture.shadow.cube.linear_mipmap_linear.not_equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.linear_mipmap_linear.sparse_not_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.linear_mipmap_linear.not_equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.linear_mipmap_linear.sparse_not_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.linear_mipmap_linear.not_equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.cube.linear_mipmap_linear.sparse_not_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.cube.linear_mipmap_linear.always_d16_unorm
+dEQP-VK.texture.shadow.cube.linear_mipmap_linear.sparse_always_d16_unorm
 dEQP-VK.texture.shadow.cube.linear_mipmap_linear.always_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.cube.linear_mipmap_linear.sparse_always_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.cube.linear_mipmap_linear.always_d32_sfloat
+dEQP-VK.texture.shadow.cube.linear_mipmap_linear.sparse_always_d32_sfloat
 dEQP-VK.texture.shadow.cube.linear_mipmap_linear.always_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.linear_mipmap_linear.sparse_always_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.linear_mipmap_linear.always_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.linear_mipmap_linear.sparse_always_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.linear_mipmap_linear.always_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.cube.linear_mipmap_linear.sparse_always_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.cube.linear_mipmap_linear.never_d16_unorm
+dEQP-VK.texture.shadow.cube.linear_mipmap_linear.sparse_never_d16_unorm
 dEQP-VK.texture.shadow.cube.linear_mipmap_linear.never_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.cube.linear_mipmap_linear.sparse_never_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.cube.linear_mipmap_linear.never_d32_sfloat
+dEQP-VK.texture.shadow.cube.linear_mipmap_linear.sparse_never_d32_sfloat
 dEQP-VK.texture.shadow.cube.linear_mipmap_linear.never_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.linear_mipmap_linear.sparse_never_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.linear_mipmap_linear.never_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.cube.linear_mipmap_linear.sparse_never_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.cube.linear_mipmap_linear.never_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.cube.linear_mipmap_linear.sparse_never_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest.less_or_equal_d16_unorm
+dEQP-VK.texture.shadow.2d_array.nearest.sparse_less_or_equal_d16_unorm
 dEQP-VK.texture.shadow.2d_array.nearest.less_or_equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d_array.nearest.sparse_less_or_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d_array.nearest.less_or_equal_d32_sfloat
+dEQP-VK.texture.shadow.2d_array.nearest.sparse_less_or_equal_d32_sfloat
 dEQP-VK.texture.shadow.2d_array.nearest.less_or_equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest.sparse_less_or_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest.less_or_equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest.sparse_less_or_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest.less_or_equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest.sparse_less_or_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest.greater_or_equal_d16_unorm
+dEQP-VK.texture.shadow.2d_array.nearest.sparse_greater_or_equal_d16_unorm
 dEQP-VK.texture.shadow.2d_array.nearest.greater_or_equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d_array.nearest.sparse_greater_or_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d_array.nearest.greater_or_equal_d32_sfloat
+dEQP-VK.texture.shadow.2d_array.nearest.sparse_greater_or_equal_d32_sfloat
 dEQP-VK.texture.shadow.2d_array.nearest.greater_or_equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest.sparse_greater_or_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest.greater_or_equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest.sparse_greater_or_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest.greater_or_equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest.sparse_greater_or_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest.less_d16_unorm
+dEQP-VK.texture.shadow.2d_array.nearest.sparse_less_d16_unorm
 dEQP-VK.texture.shadow.2d_array.nearest.less_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d_array.nearest.sparse_less_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d_array.nearest.less_d32_sfloat
+dEQP-VK.texture.shadow.2d_array.nearest.sparse_less_d32_sfloat
 dEQP-VK.texture.shadow.2d_array.nearest.less_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest.sparse_less_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest.less_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest.sparse_less_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest.less_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest.sparse_less_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest.greater_d16_unorm
+dEQP-VK.texture.shadow.2d_array.nearest.sparse_greater_d16_unorm
 dEQP-VK.texture.shadow.2d_array.nearest.greater_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d_array.nearest.sparse_greater_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d_array.nearest.greater_d32_sfloat
+dEQP-VK.texture.shadow.2d_array.nearest.sparse_greater_d32_sfloat
 dEQP-VK.texture.shadow.2d_array.nearest.greater_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest.sparse_greater_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest.greater_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest.sparse_greater_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest.greater_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest.sparse_greater_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest.equal_d16_unorm
+dEQP-VK.texture.shadow.2d_array.nearest.sparse_equal_d16_unorm
 dEQP-VK.texture.shadow.2d_array.nearest.equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d_array.nearest.sparse_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d_array.nearest.equal_d32_sfloat
+dEQP-VK.texture.shadow.2d_array.nearest.sparse_equal_d32_sfloat
 dEQP-VK.texture.shadow.2d_array.nearest.equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest.sparse_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest.equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest.sparse_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest.equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest.sparse_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest.not_equal_d16_unorm
+dEQP-VK.texture.shadow.2d_array.nearest.sparse_not_equal_d16_unorm
 dEQP-VK.texture.shadow.2d_array.nearest.not_equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d_array.nearest.sparse_not_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d_array.nearest.not_equal_d32_sfloat
+dEQP-VK.texture.shadow.2d_array.nearest.sparse_not_equal_d32_sfloat
 dEQP-VK.texture.shadow.2d_array.nearest.not_equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest.sparse_not_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest.not_equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest.sparse_not_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest.not_equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest.sparse_not_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest.always_d16_unorm
+dEQP-VK.texture.shadow.2d_array.nearest.sparse_always_d16_unorm
 dEQP-VK.texture.shadow.2d_array.nearest.always_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d_array.nearest.sparse_always_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d_array.nearest.always_d32_sfloat
+dEQP-VK.texture.shadow.2d_array.nearest.sparse_always_d32_sfloat
 dEQP-VK.texture.shadow.2d_array.nearest.always_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest.sparse_always_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest.always_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest.sparse_always_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest.always_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest.sparse_always_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest.never_d16_unorm
+dEQP-VK.texture.shadow.2d_array.nearest.sparse_never_d16_unorm
 dEQP-VK.texture.shadow.2d_array.nearest.never_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d_array.nearest.sparse_never_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d_array.nearest.never_d32_sfloat
+dEQP-VK.texture.shadow.2d_array.nearest.sparse_never_d32_sfloat
 dEQP-VK.texture.shadow.2d_array.nearest.never_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest.sparse_never_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest.never_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest.sparse_never_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest.never_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest.sparse_never_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear.less_or_equal_d16_unorm
+dEQP-VK.texture.shadow.2d_array.linear.sparse_less_or_equal_d16_unorm
 dEQP-VK.texture.shadow.2d_array.linear.less_or_equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d_array.linear.sparse_less_or_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d_array.linear.less_or_equal_d32_sfloat
+dEQP-VK.texture.shadow.2d_array.linear.sparse_less_or_equal_d32_sfloat
 dEQP-VK.texture.shadow.2d_array.linear.less_or_equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear.sparse_less_or_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear.less_or_equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear.sparse_less_or_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear.less_or_equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear.sparse_less_or_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear.greater_or_equal_d16_unorm
+dEQP-VK.texture.shadow.2d_array.linear.sparse_greater_or_equal_d16_unorm
 dEQP-VK.texture.shadow.2d_array.linear.greater_or_equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d_array.linear.sparse_greater_or_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d_array.linear.greater_or_equal_d32_sfloat
+dEQP-VK.texture.shadow.2d_array.linear.sparse_greater_or_equal_d32_sfloat
 dEQP-VK.texture.shadow.2d_array.linear.greater_or_equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear.sparse_greater_or_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear.greater_or_equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear.sparse_greater_or_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear.greater_or_equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear.sparse_greater_or_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear.less_d16_unorm
+dEQP-VK.texture.shadow.2d_array.linear.sparse_less_d16_unorm
 dEQP-VK.texture.shadow.2d_array.linear.less_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d_array.linear.sparse_less_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d_array.linear.less_d32_sfloat
+dEQP-VK.texture.shadow.2d_array.linear.sparse_less_d32_sfloat
 dEQP-VK.texture.shadow.2d_array.linear.less_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear.sparse_less_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear.less_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear.sparse_less_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear.less_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear.sparse_less_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear.greater_d16_unorm
+dEQP-VK.texture.shadow.2d_array.linear.sparse_greater_d16_unorm
 dEQP-VK.texture.shadow.2d_array.linear.greater_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d_array.linear.sparse_greater_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d_array.linear.greater_d32_sfloat
+dEQP-VK.texture.shadow.2d_array.linear.sparse_greater_d32_sfloat
 dEQP-VK.texture.shadow.2d_array.linear.greater_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear.sparse_greater_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear.greater_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear.sparse_greater_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear.greater_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear.sparse_greater_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear.equal_d16_unorm
+dEQP-VK.texture.shadow.2d_array.linear.sparse_equal_d16_unorm
 dEQP-VK.texture.shadow.2d_array.linear.equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d_array.linear.sparse_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d_array.linear.equal_d32_sfloat
+dEQP-VK.texture.shadow.2d_array.linear.sparse_equal_d32_sfloat
 dEQP-VK.texture.shadow.2d_array.linear.equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear.sparse_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear.equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear.sparse_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear.equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear.sparse_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear.not_equal_d16_unorm
+dEQP-VK.texture.shadow.2d_array.linear.sparse_not_equal_d16_unorm
 dEQP-VK.texture.shadow.2d_array.linear.not_equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d_array.linear.sparse_not_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d_array.linear.not_equal_d32_sfloat
+dEQP-VK.texture.shadow.2d_array.linear.sparse_not_equal_d32_sfloat
 dEQP-VK.texture.shadow.2d_array.linear.not_equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear.sparse_not_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear.not_equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear.sparse_not_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear.not_equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear.sparse_not_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear.always_d16_unorm
+dEQP-VK.texture.shadow.2d_array.linear.sparse_always_d16_unorm
 dEQP-VK.texture.shadow.2d_array.linear.always_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d_array.linear.sparse_always_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d_array.linear.always_d32_sfloat
+dEQP-VK.texture.shadow.2d_array.linear.sparse_always_d32_sfloat
 dEQP-VK.texture.shadow.2d_array.linear.always_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear.sparse_always_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear.always_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear.sparse_always_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear.always_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear.sparse_always_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear.never_d16_unorm
+dEQP-VK.texture.shadow.2d_array.linear.sparse_never_d16_unorm
 dEQP-VK.texture.shadow.2d_array.linear.never_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d_array.linear.sparse_never_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d_array.linear.never_d32_sfloat
+dEQP-VK.texture.shadow.2d_array.linear.sparse_never_d32_sfloat
 dEQP-VK.texture.shadow.2d_array.linear.never_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear.sparse_never_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear.never_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear.sparse_never_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear.never_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear.sparse_never_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.less_or_equal_d16_unorm
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.sparse_less_or_equal_d16_unorm
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.less_or_equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.sparse_less_or_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.less_or_equal_d32_sfloat
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.sparse_less_or_equal_d32_sfloat
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.less_or_equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.sparse_less_or_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.less_or_equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.sparse_less_or_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.less_or_equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.sparse_less_or_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.greater_or_equal_d16_unorm
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.sparse_greater_or_equal_d16_unorm
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.greater_or_equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.sparse_greater_or_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.greater_or_equal_d32_sfloat
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.sparse_greater_or_equal_d32_sfloat
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.greater_or_equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.sparse_greater_or_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.greater_or_equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.sparse_greater_or_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.greater_or_equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.sparse_greater_or_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.less_d16_unorm
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.sparse_less_d16_unorm
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.less_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.sparse_less_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.less_d32_sfloat
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.sparse_less_d32_sfloat
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.less_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.sparse_less_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.less_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.sparse_less_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.less_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.sparse_less_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.greater_d16_unorm
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.sparse_greater_d16_unorm
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.greater_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.sparse_greater_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.greater_d32_sfloat
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.sparse_greater_d32_sfloat
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.greater_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.sparse_greater_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.greater_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.sparse_greater_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.greater_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.sparse_greater_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.equal_d16_unorm
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.sparse_equal_d16_unorm
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.sparse_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.equal_d32_sfloat
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.sparse_equal_d32_sfloat
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.sparse_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.sparse_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.sparse_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.not_equal_d16_unorm
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.sparse_not_equal_d16_unorm
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.not_equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.sparse_not_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.not_equal_d32_sfloat
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.sparse_not_equal_d32_sfloat
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.not_equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.sparse_not_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.not_equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.sparse_not_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.not_equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.sparse_not_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.always_d16_unorm
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.sparse_always_d16_unorm
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.always_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.sparse_always_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.always_d32_sfloat
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.sparse_always_d32_sfloat
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.always_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.sparse_always_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.always_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.sparse_always_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.always_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.sparse_always_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.never_d16_unorm
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.sparse_never_d16_unorm
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.never_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.sparse_never_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.never_d32_sfloat
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.sparse_never_d32_sfloat
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.never_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.sparse_never_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.never_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.sparse_never_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.never_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_nearest.sparse_never_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.less_or_equal_d16_unorm
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.sparse_less_or_equal_d16_unorm
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.less_or_equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.sparse_less_or_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.less_or_equal_d32_sfloat
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.sparse_less_or_equal_d32_sfloat
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.less_or_equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.sparse_less_or_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.less_or_equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.sparse_less_or_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.less_or_equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.sparse_less_or_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.greater_or_equal_d16_unorm
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.sparse_greater_or_equal_d16_unorm
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.greater_or_equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.sparse_greater_or_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.greater_or_equal_d32_sfloat
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.sparse_greater_or_equal_d32_sfloat
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.greater_or_equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.sparse_greater_or_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.greater_or_equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.sparse_greater_or_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.greater_or_equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.sparse_greater_or_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.less_d16_unorm
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.sparse_less_d16_unorm
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.less_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.sparse_less_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.less_d32_sfloat
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.sparse_less_d32_sfloat
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.less_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.sparse_less_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.less_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.sparse_less_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.less_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.sparse_less_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.greater_d16_unorm
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.sparse_greater_d16_unorm
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.greater_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.sparse_greater_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.greater_d32_sfloat
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.sparse_greater_d32_sfloat
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.greater_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.sparse_greater_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.greater_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.sparse_greater_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.greater_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.sparse_greater_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.equal_d16_unorm
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.sparse_equal_d16_unorm
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.sparse_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.equal_d32_sfloat
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.sparse_equal_d32_sfloat
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.sparse_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.sparse_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.sparse_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.not_equal_d16_unorm
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.sparse_not_equal_d16_unorm
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.not_equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.sparse_not_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.not_equal_d32_sfloat
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.sparse_not_equal_d32_sfloat
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.not_equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.sparse_not_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.not_equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.sparse_not_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.not_equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.sparse_not_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.always_d16_unorm
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.sparse_always_d16_unorm
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.always_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.sparse_always_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.always_d32_sfloat
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.sparse_always_d32_sfloat
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.always_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.sparse_always_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.always_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.sparse_always_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.always_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.sparse_always_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.never_d16_unorm
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.sparse_never_d16_unorm
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.never_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.sparse_never_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.never_d32_sfloat
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.sparse_never_d32_sfloat
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.never_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.sparse_never_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.never_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.sparse_never_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.never_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_nearest.sparse_never_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.less_or_equal_d16_unorm
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.sparse_less_or_equal_d16_unorm
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.less_or_equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.sparse_less_or_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.less_or_equal_d32_sfloat
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.sparse_less_or_equal_d32_sfloat
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.less_or_equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.sparse_less_or_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.less_or_equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.sparse_less_or_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.less_or_equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.sparse_less_or_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.greater_or_equal_d16_unorm
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.sparse_greater_or_equal_d16_unorm
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.greater_or_equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.sparse_greater_or_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.greater_or_equal_d32_sfloat
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.sparse_greater_or_equal_d32_sfloat
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.greater_or_equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.sparse_greater_or_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.greater_or_equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.sparse_greater_or_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.greater_or_equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.sparse_greater_or_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.less_d16_unorm
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.sparse_less_d16_unorm
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.less_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.sparse_less_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.less_d32_sfloat
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.sparse_less_d32_sfloat
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.less_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.sparse_less_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.less_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.sparse_less_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.less_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.sparse_less_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.greater_d16_unorm
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.sparse_greater_d16_unorm
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.greater_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.sparse_greater_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.greater_d32_sfloat
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.sparse_greater_d32_sfloat
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.greater_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.sparse_greater_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.greater_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.sparse_greater_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.greater_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.sparse_greater_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.equal_d16_unorm
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.sparse_equal_d16_unorm
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.sparse_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.equal_d32_sfloat
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.sparse_equal_d32_sfloat
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.sparse_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.sparse_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.sparse_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.not_equal_d16_unorm
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.sparse_not_equal_d16_unorm
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.not_equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.sparse_not_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.not_equal_d32_sfloat
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.sparse_not_equal_d32_sfloat
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.not_equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.sparse_not_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.not_equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.sparse_not_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.not_equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.sparse_not_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.always_d16_unorm
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.sparse_always_d16_unorm
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.always_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.sparse_always_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.always_d32_sfloat
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.sparse_always_d32_sfloat
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.always_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.sparse_always_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.always_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.sparse_always_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.always_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.sparse_always_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.never_d16_unorm
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.sparse_never_d16_unorm
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.never_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.sparse_never_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.never_d32_sfloat
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.sparse_never_d32_sfloat
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.never_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.sparse_never_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.never_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.sparse_never_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.never_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d_array.nearest_mipmap_linear.sparse_never_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.less_or_equal_d16_unorm
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.sparse_less_or_equal_d16_unorm
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.less_or_equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.sparse_less_or_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.less_or_equal_d32_sfloat
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.sparse_less_or_equal_d32_sfloat
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.less_or_equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.sparse_less_or_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.less_or_equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.sparse_less_or_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.less_or_equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.sparse_less_or_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.greater_or_equal_d16_unorm
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.sparse_greater_or_equal_d16_unorm
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.greater_or_equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.sparse_greater_or_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.greater_or_equal_d32_sfloat
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.sparse_greater_or_equal_d32_sfloat
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.greater_or_equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.sparse_greater_or_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.greater_or_equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.sparse_greater_or_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.greater_or_equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.sparse_greater_or_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.less_d16_unorm
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.sparse_less_d16_unorm
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.less_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.sparse_less_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.less_d32_sfloat
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.sparse_less_d32_sfloat
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.less_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.sparse_less_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.less_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.sparse_less_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.less_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.sparse_less_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.greater_d16_unorm
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.sparse_greater_d16_unorm
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.greater_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.sparse_greater_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.greater_d32_sfloat
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.sparse_greater_d32_sfloat
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.greater_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.sparse_greater_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.greater_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.sparse_greater_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.greater_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.sparse_greater_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.equal_d16_unorm
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.sparse_equal_d16_unorm
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.sparse_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.equal_d32_sfloat
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.sparse_equal_d32_sfloat
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.sparse_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.sparse_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.sparse_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.not_equal_d16_unorm
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.sparse_not_equal_d16_unorm
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.not_equal_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.sparse_not_equal_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.not_equal_d32_sfloat
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.sparse_not_equal_d32_sfloat
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.not_equal_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.sparse_not_equal_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.not_equal_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.sparse_not_equal_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.not_equal_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.sparse_not_equal_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.always_d16_unorm
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.sparse_always_d16_unorm
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.always_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.sparse_always_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.always_d32_sfloat
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.sparse_always_d32_sfloat
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.always_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.sparse_always_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.always_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.sparse_always_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.always_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.sparse_always_d32_sfloat_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.never_d16_unorm
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.sparse_never_d16_unorm
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.never_x8_d24_unorm_pack32
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.sparse_never_x8_d24_unorm_pack32
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.never_d32_sfloat
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.sparse_never_d32_sfloat
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.never_d16_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.sparse_never_d16_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.never_d24_unorm_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.sparse_never_d24_unorm_s8_uint
 dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.never_d32_sfloat_s8_uint
+dEQP-VK.texture.shadow.2d_array.linear_mipmap_linear.sparse_never_d32_sfloat_s8_uint
 dEQP-VK.texture.filtering_anisotropy.basic.anisotropy_2.mag_nearest_min_nearest
 dEQP-VK.texture.filtering_anisotropy.basic.anisotropy_2.mag_linear_min_nearest
 dEQP-VK.texture.filtering_anisotropy.basic.anisotropy_2.mag_nearest_min_linear