platform/kernel/u-boot.git
2 years agoPrepare v2022.01 v2022.01
Tom Rini [Mon, 10 Jan 2022 18:46:34 +0000 (13:46 -0500)]
Prepare v2022.01

Signed-off-by: Tom Rini <trini@konsulko.com>
2 years ago.mailmap: add Atish Patra, Anup Patel
Heinrich Schuchardt [Sun, 9 Jan 2022 17:51:27 +0000 (18:51 +0100)]
.mailmap: add Atish Patra, Anup Patel

Both have left Western Digital.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2 years agolib/rsa: avoid -Wdiscarded-qualifiers
Heinrich Schuchardt [Sun, 9 Jan 2022 14:39:40 +0000 (15:39 +0100)]
lib/rsa: avoid -Wdiscarded-qualifiers

The return type of EVP_PKEY_get0_RSA() is const struct rsa_st *.
Our code drops the const qualifier leading to

In file included from tools/lib/rsa/rsa-sign.c:1:
./tools/../lib/rsa/rsa-sign.c: In function ‘rsa_add_verify_data’:
./tools/../lib/rsa/rsa-sign.c:631:13: warning:
assignment discards ‘const’ qualifier from pointer target type
[-Wdiscarded-qualifiers]
  631 |         rsa = EVP_PKEY_get0_RSA(pkey);
      |             ^

Add a type conversion.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2 years agoMerge branch '2022-01-08-further-important-updates'
Tom Rini [Sun, 9 Jan 2022 01:26:19 +0000 (20:26 -0500)]
Merge branch '2022-01-08-further-important-updates'

- Further udoo_neo fixes, nitrogen6x mmc pinctrl fix
- dwc2_udc_otg fix
- Make imx8mq be consistent with yesterdays imx8 fixes

2 years agoimx8mq: Generate a single bootable flash.bin again
Patrick Wildt [Sat, 8 Jan 2022 15:34:17 +0000 (16:34 +0100)]
imx8mq: Generate a single bootable flash.bin again

All i.MX8MQ boards have been converted to binman, which makes it
necessary to flash both flash.bin and u-boot.itb to get a bootable
system. Prior to the conversion, only flash.bin was needed.

Such new requirement breaks existing distro mechanisms to generate the
final binary because the extra u-boot.itb is now required.

Generate a final flash.bin that can be used again as a single bootable
binary to keep the original behavior.

After this change the SPL binary is called spl.bin, which is a more
descriptive name for its purpose, and can still be used standalone (for
example, for secure boot purposes).

Also update imx8mq_evk.rst to remove the u-boot.itb copy step.

This is a cherry-pick of 028abfd9b157 ("imx8mm-evk: Generate a single
bootable flash.bin again") adjusted to apply to i.MX8MQ.

Signed-off-by: Patrick Wildt <patrick@blueri.se>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2 years agonitrogen6x: add missing pinctrl to fix mmc
Gary Bisson [Wed, 5 Jan 2022 13:17:53 +0000 (14:17 +0100)]
nitrogen6x: add missing pinctrl to fix mmc

Since commit f7ac30b042d, the pin muxing for mmc was removed from the
board file to be managed by DM_MMC which requires PINCTRL to work. It
made the change for sabrelite but nitrogen configs were forgotten.

Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Troy Kisky <troy.kisky@boundarydevices.com>
2 years agousb: gadget: dwc2_udc_otg: set ep's desc during enable/disable
Gary Bisson [Thu, 6 Jan 2022 15:02:08 +0000 (16:02 +0100)]
usb: gadget: dwc2_udc_otg: set ep's desc during enable/disable

Fastboot support has been broken on platforms using dwc2 controller
since the gadget gets its max packet size from it.
This patch is the equivalent of 723fd5668ff which fixed the same issue
but for the chipidea controller.

Fixes: 27c9141b111 ("usb: gadget: fastboot: use correct max packet size")

Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
2 years agoudoo: Select CMD_DM
Fabio Estevam [Sat, 18 Dec 2021 21:10:25 +0000 (18:10 -0300)]
udoo: Select CMD_DM

CMD_DM is useful for showing the whole DM tree.

Enable it via "imply CMD_DM".

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
2 years agoudoo: Increase CONFIG_ENV_OFFSET
Fabio Estevam [Sat, 18 Dec 2021 21:10:24 +0000 (18:10 -0300)]
udoo: Increase CONFIG_ENV_OFFSET

Increase CONFIG_ENV_OFFSET to avoid the environment region to
overlap with U-Boot proper.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
2 years agoudoo: Adjust the SD card device numbering
Fabio Estevam [Sat, 18 Dec 2021 21:10:23 +0000 (18:10 -0300)]
udoo: Adjust the SD card device numbering

After the conversion to DM the SD card shows up as 'mmc 2'
device.

Adjust the 'mmcdev' and the distro command 'func' accordingly.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
2 years agoudoo: Call gpio_request()
Fabio Estevam [Sat, 18 Dec 2021 21:10:22 +0000 (18:10 -0300)]
udoo: Call gpio_request()

Calling gpio_request() prior to its usage is now mandatory.

This fixes the following GPIO errors:

U-Boot SPL 2022.01-rc3-00067-g7a5be871c0ec (Dec 18 2021 - 17:45:07 -0300)
Trying to boot from MMC1

U-Boot 2022.01-rc3-00067-g7a5be871c0ec (Dec 18 2021 - 17:45:07 -0300)

CPU:   Freescale i.MX6Q rev1.2 at 792 MHz
Reset cause: WDOG
Model: Udoo i.MX6 Quad Board
Board: Udoo Quad
DRAM:  1 GiB
MMC:   FSL_SDHC: 2
Loading Environment from MMC... OK
In:    serial
Out:   serial
Err:   serial
gpio@20a0000: set_dir_flags: error: gpio GPIO2_31 not reserved
gpio@20a4000: set_dir_flags: error: gpio GPIO3_23 not reserved
gpio@20b0000: set_dir_flags: error: gpio GPIO6_24 not reserved
gpio@20b0000: set_dir_flags: error: gpio GPIO6_25 not reserved
gpio@20b0000: set_dir_flags: error: gpio GPIO6_27 not reserved
gpio@20b0000: set_dir_flags: error: gpio GPIO6_28 not reserved
gpio@20b0000: set_dir_flags: error: gpio GPIO6_29 not reserved
gpio@20a4000: set_value: error: gpio GPIO3_23 not reserved
Net:   Could not get PHY for FEC0: addr -2
No ethernet found.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
2 years agoARM: dts: imx6qdl-udoo: Properly describe the SD card detect
Fabio Estevam [Sat, 18 Dec 2021 21:10:21 +0000 (18:10 -0300)]
ARM: dts: imx6qdl-udoo: Properly describe the SD card detect

GPIO7_IO00 is used as SD card detect.

Properly describe this in the devicetree.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2 years agoudoo_spl: Initialize the eSDHC controller in SPL
Fabio Estevam [Sat, 18 Dec 2021 21:10:20 +0000 (18:10 -0300)]
udoo_spl: Initialize the eSDHC controller in SPL

Currently, imx6q udoo board fails to boot like this:

U-Boot SPL 2022.01-rc3-00061-g95ca715adad3 (Dec 18 2021 - 18:04:40 -0300)
Trying to boot from MMC1

The reason is that the eSDHC controller is not initialized in SPL.

Initialize the eSDHC controller in SPL via C code as DM is not
used in SPL.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
2 years agoMerge branch '2022-01-07-imx8-and-buildman-updates'
Tom Rini [Sat, 8 Jan 2022 00:11:58 +0000 (19:11 -0500)]
Merge branch '2022-01-07-imx8-and-buildman-updates'

- A large number of updates for i.MX8 platforms.  We update buildman /
  binman to be able to fake binaries if needed, for CI, and tell the user
  the binary won't work.  Update platforms to build again with these
  changes.

2 years agoimx: imx8mm: imx8mm-kontron-n801x-s: Fix binman error
Adam Ford [Fri, 7 Jan 2022 21:16:12 +0000 (15:16 -0600)]
imx: imx8mm: imx8mm-kontron-n801x-s: Fix binman error

The binman node is part of the imx8mm-u-boot.dtsi file which
is duplicated in imx8mm-kontron-n801x-s-u-boot.dtsi and causes
a build error.  Remove the duplicate.

Fixes: 3cbb31f0e848 ("arm64: dts: imx8mm: use common binman configuration")
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2 years agoboard: phytec: imx8mm-phycore: Remove duplicate binman node
Adam Ford [Fri, 7 Jan 2022 21:16:11 +0000 (15:16 -0600)]
board: phytec: imx8mm-phycore: Remove duplicate binman node

The binman node is part of the imx8mm-u-boot.dtsi file which
is duplicated in phycore-imx8mm-u-boot.dtsi and causes a build
error.  Remove the duplicate.

Fixes: 3cbb31f0e848 ("arm64: dts: imx8mm: use common binman configuration")
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2 years agoimx8mm_venice: switch to use binman to pack images
Tim Harvey [Fri, 7 Jan 2022 20:41:35 +0000 (12:41 -0800)]
imx8mm_venice: switch to use binman to pack images

Use binman to pack images.

Note that imx8mm_venice supports several boards via multiple DTB's thus
in the fit node we must use:
- fit,fdt-list = "of-list"
- fdt-SEQ
- config-SEQ

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2 years agoarm64: dts: imx8mm-u-boot.dtsi: improve odd blob-ext naming
Marcel Ziswiler [Fri, 22 Oct 2021 23:15:16 +0000 (01:15 +0200)]
arm64: dts: imx8mm-u-boot.dtsi: improve odd blob-ext naming

Rather than using odd implicit blob-ext naming, explicitly specify the
type to be of blob-ext and therefore also simplify the node naming.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2 years agoarm64: dts: imx8mm-u-boot.dtsi: explicitly add spl filename
Marcel Ziswiler [Fri, 22 Oct 2021 23:15:15 +0000 (01:15 +0200)]
arm64: dts: imx8mm-u-boot.dtsi: explicitly add spl filename

Explicitly add SPL aka u-boot-spl.bin filename.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2 years agoarm64: dts: imx8mm-u-boot.dtsi: alphabetically re-order properties
Marcel Ziswiler [Fri, 22 Oct 2021 23:15:14 +0000 (01:15 +0200)]
arm64: dts: imx8mm-u-boot.dtsi: alphabetically re-order properties

Alphabetically re-order properties.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2 years agoarm64: dts: imx8mm: use common binman configuration
Marcel Ziswiler [Fri, 22 Oct 2021 23:15:13 +0000 (01:15 +0200)]
arm64: dts: imx8mm: use common binman configuration

With the move to using binman to generate SPL aka u-boot-spl-ddr.bin and
U-Boot proper aka u-boot.itb every board now covers such configuration
in its own U-Boot specific device tree include. Move the comon part of
that configuration to the common imx8mm-u-boot.dtsi include file.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2 years agoarm64: dts: imx8mm-cl-iot-gate-u-boot.dtsi: use common imx8mm-u-boot.dtsi
Marcel Ziswiler [Fri, 22 Oct 2021 23:15:12 +0000 (01:15 +0200)]
arm64: dts: imx8mm-cl-iot-gate-u-boot.dtsi: use common imx8mm-u-boot.dtsi

Use common imx8mm-u-boot.dtsi.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2 years agoarm64: dts: imx8mm-cl-iot-gate-u-boot.dtsi: alphabetically re-order
Marcel Ziswiler [Fri, 22 Oct 2021 23:15:11 +0000 (01:15 +0200)]
arm64: dts: imx8mm-cl-iot-gate-u-boot.dtsi: alphabetically re-order

Alphabetically re-order nodes and properties.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2 years agoimx8mm-cl-iot-gate: fix imximage intermediate binary naming
Marcel Ziswiler [Fri, 22 Oct 2021 23:15:10 +0000 (01:15 +0200)]
imx8mm-cl-iot-gate: fix imximage intermediate binary naming

This fixes the following build time issue:

...
  BINMAN  all
binman: Error 1 running 'mkimage -d ./mkimage.spl.mkimage -n
 spl/u-boot-spl.cfgout -T imx8mimage -e 0x7e1000
 ./mkimage-out.spl.mkimage': mkimage.flash.mkimage: Can't open: No such
 file or directory

make: *** [Makefile:1094: all] Error 1

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2 years agodoc: imx8mq_evk: update doc after using binman
Peng Fan [Fri, 22 Oct 2021 02:42:20 +0000 (10:42 +0800)]
doc: imx8mq_evk: update doc after using binman

Update doc after using binman to pack images

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2 years agoimx: imx8mq use common imximage.cfg
Peng Fan [Fri, 22 Oct 2021 02:42:19 +0000 (10:42 +0800)]
imx: imx8mq use common imximage.cfg

After all these board switch to binman, we could use common imximage.cfg

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Patrick Wildt <patrick@blueri.se>
2 years agoimx: pico-imx8mq: switch to use binman
Peng Fan [Fri, 22 Oct 2021 02:42:18 +0000 (10:42 +0800)]
imx: pico-imx8mq: switch to use binman

Switch to use binman to pack images

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Patrick Wildt <patrick@blueri.se>
2 years agoimx: imx8mq_phanbell: switch to binman
Peng Fan [Fri, 22 Oct 2021 02:42:17 +0000 (10:42 +0800)]
imx: imx8mq_phanbell: switch to binman

Switch to binman to pack images

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Patrick Wildt <patrick@blueri.se>
2 years agoimx: imx8mq_evk: switch to binman
Peng Fan [Fri, 22 Oct 2021 02:42:16 +0000 (10:42 +0800)]
imx: imx8mq_evk: switch to binman

Switch to use binman to pack images

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2 years agoimx8mn_beacon_2g: Switch to binman
Adam Ford [Fri, 7 Jan 2022 20:39:04 +0000 (14:39 -0600)]
imx8mn_beacon_2g: Switch to binman

The standard 1GB Nano was converted to binman, but the 2G version
was neglected.  Convert it to binman as well.

Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Adam Ford <aford173@gmail.com>
2 years agoimx8mn_beacon: Fix booting hang and switch to binman
Adam Ford [Fri, 10 Sep 2021 20:19:22 +0000 (15:19 -0500)]
imx8mn_beacon: Fix booting hang and switch to binman

Somewhere along the line, the board stopped being able to boot.
Rather than just fixing the issue, let's fix the issue and migrate
to binman to eliminate a warning when using custom imx tools for
generating the binary.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2 years agoimx8mm_beacon: Switch to binman for generating image
Adam Ford [Fri, 22 Oct 2021 21:43:40 +0000 (23:43 +0200)]
imx8mm_beacon: Switch to binman for generating image

To eliminate a warning when using custom imx tools for generating
a binary, use binman to generate flash.bin.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2 years agobinman: add support for creating dummy files for external blobs
Heiko Thiery [Thu, 6 Jan 2022 10:49:41 +0000 (11:49 +0100)]
binman: add support for creating dummy files for external blobs

While converting to binman for an imx8mq board, it has been found that
building in the u-boot CI fails. This is because an imx8mq requires an
external binary (signed_hdmi_imx8m.bin). If this file cannot be found
mkimage fails.
To be able to build this board in the u-boot CI a binman option
(--fake-ext-blobs) is introduced that can be switched on via the u-boot
makefile option BINMAN_FAKE_EXT_BLOBS. With that the needed dummy files are
created.

Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2 years agoMerge branch '2022-01-06-assorted-important-fixes'
Tom Rini [Fri, 7 Jan 2022 14:30:59 +0000 (09:30 -0500)]
Merge branch '2022-01-06-assorted-important-fixes'

- Revert a clk change, to enable some platforms to work again
- Updates to the udoo NEO family of boards to work correctly
- Fix SiFive Unleashes/Unmatched boards booting
- Update rockchip maintainer entry

2 years agoRevert "clk: Detect failure to set defaults"
Marek Vasut [Sat, 1 Jan 2022 18:51:39 +0000 (19:51 +0100)]
Revert "clk: Detect failure to set defaults"

This reverts commit 92f1e9a4b31c0bf0f4f61ab823a6a88657323646.
The aforementioned patch causes massive breakage on all platforms which
have 'assigned-clock' DT property in their DT which references any clock
that are not supported by the platform clock driver. That can easily
happen either in SPL, or because the clock driver is reduced. Currently
it seems all iMX8M are affected and fail to boot altogether.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Peng Fan <peng.fan@oss.nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2 years agoudoo: neo: Do not print the Model information
Fabio Estevam [Mon, 3 Jan 2022 15:15:12 +0000 (12:15 -0300)]
udoo: neo: Do not print the Model information

By default the Model information from DT is printed:

CPU:   Freescale i.MX6SX rev1.2 996 MHz (running at 792 MHz)
CPU:   Extended Commercial temperature grade (-20C to 105C) at 63C
Reset cause: POR
Model: UDOO Neo Basic
Board: UDOO Neo FULL
I2C:   ready

As the udoo basic DT is used, such output may be confusing.

Improve it by only printing the Board model instead, which is
read from the board identification GPIOs.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Tommaso Merciai <tomm.merciai@gmail.com>
Tested-by: Tommaso Merciai <tomm.merciai@gmail.com>
2 years agoudoo: neo: Fix the board model printing
Fabio Estevam [Mon, 3 Jan 2022 15:15:11 +0000 (12:15 -0300)]
udoo: neo: Fix the board model printing

Currently, the board model is not printed correctly:

Board: UDOO Neo UNDEFINED

Read the model type in SPL and store it the internal OCRAM, so that
U-Boot proper can retrieve it correctly.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2 years agoudoo_neo: Enable support for USB and storage
Peter Robinson [Tue, 21 Dec 2021 12:32:49 +0000 (12:32 +0000)]
udoo_neo: Enable support for USB and storage

Enable support for USB and USB storage on the UDOO Neo.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2 years agoudoo_neo: Fix ethernet
Peter Robinson [Tue, 21 Dec 2021 12:32:48 +0000 (12:32 +0000)]
udoo_neo: Fix ethernet

The ethernet has a RMII not RGMII, also needs DM_MDIO and finally
initialise it later in the process as it's not needed that early on
and not everything is ready so it locks up the device.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2 years agoudoo_neo: Fixes for booting from the mSD card
Peter Robinson [Tue, 21 Dec 2021 12:32:47 +0000 (12:32 +0000)]
udoo_neo: Fixes for booting from the mSD card

This fixes booting from the mSD card from both SPL and when
using it for the OS booting. It also cleans up a few mmc
booting bits that are no longer needed.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2 years agoudoo_neo: Call gpio_request()
Peter Robinson [Tue, 21 Dec 2021 12:32:46 +0000 (12:32 +0000)]
udoo_neo: Call gpio_request()

Calling gpio_request() prior to its usage is now mandatory.

This fixes the following GPIO errors:
gpio@20a8000: set_dir_flags: error: gpio GPIO4_16 not reserved
gpio@20a8000: set_dir_flags: error: gpio GPIO4_13 not reserved
gpio@20a8000: set_dir_flags: error: gpio GPIO4_0 not reserved
gpio@20a8000: get_value: error: gpio GPIO4_13 not reserved
gpio@20a8000: get_value: error: gpio GPIO4_0 not reserved
gpio@20a0000: set_dir_flags: error: gpio GPIO2_1 not reserved
gpio@20a0000: set_value: error: gpio GPIO2_1 not reserved

Fixes: 191840ae99 ("ARM: imx: udoo_neo: Enable OF_CONTROL and DM gpio/pin control")
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2 years agoriscv: sifive: Fix OF_BOARD boot failure
Bin Meng [Wed, 5 Jan 2022 01:07:57 +0000 (09:07 +0800)]
riscv: sifive: Fix OF_BOARD boot failure

When using QEMU to have a quick test of booting U-Boot S-mode payload
directly without the needs of preparing the SPI flash or SD card images
for SiFive Unleashed board, as per the instructions [1], it currently
does not boot any more.

This was caused by the OF_PRIOR_STAGE removal, as gd->fdt_blob no longer
points to a valid DTB. OF_BOARD is supposed to replace OF_PRIOR_STAGE,
hence we need to add the OF_BOARD logic in board_fdt_blob_setup().

[1] https://qemu.readthedocs.io/en/latest/system/riscv/sifive_u.html#running-u-boot

Fixes: 2e8d2f88439d ("riscv: Remove OF_PRIOR_STAGE from RISC-V boards")
Fixes: d6f8ab30a2af ("treewide: Remove OF_PRIOR_STAGE")
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2 years agorockchip: puma/lion: update MAINTAINERS file
Quentin Schulz [Mon, 3 Jan 2022 12:04:18 +0000 (13:04 +0100)]
rockchip: puma/lion: update MAINTAINERS file

Philipp does not work at Theobroma Systems anymore so let's swap
Philipp's address with mine.

Cc: Philipp Tomsich <philipp.tomsich@vrull.eu>
Cc: Quentin Schulz <foss+u-boot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
2 years agoMerge https://source.denx.de/u-boot/custodians/u-boot-marvell
Tom Rini [Wed, 5 Jan 2022 18:08:45 +0000 (13:08 -0500)]
Merge https://source.denx.de/u-boot/custodians/u-boot-marvell

- kwbimage: Fix checksum calculation for v1 images (Pierre)

2 years agotools: kwbimage: Fix checksum calculation for v1 images
Pierre Bourdon [Sat, 25 Dec 2021 19:50:19 +0000 (20:50 +0100)]
tools: kwbimage: Fix checksum calculation for v1 images

Recent changes caused fields in the image main header to be modified
after the header checksum had already been computed. Move the checksum
computation to once again be the last operation performed on the header.

Fixes: 2b0980c24027 ("tools: kwbimage: Fill the real header size into the main header")

Signed-off-by: Pierre Bourdon <delroth@gmail.com>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2 years agoMerge tag 'video-20211228' of https://source.denx.de/u-boot/custodians/u-boot-video
Tom Rini [Tue, 28 Dec 2021 16:19:26 +0000 (11:19 -0500)]
Merge tag 'video-20211228' of https://source.denx.de/u-boot/custodians/u-boot-video

- mxsfb axi/disp_axi clock enable fix

2 years agoMerge tag 'efi-2022-01-rc4-4' of https://source.denx.de/u-boot/custodians/u-boot-efi
Tom Rini [Tue, 28 Dec 2021 12:59:43 +0000 (07:59 -0500)]
Merge tag 'efi-2022-01-rc4-4' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request for efi-2022-01-rc4-4

UEFI:

* allow for more than 16 KiB UEFI variable size when using StMM

Others:

* make watchdog sysreset compatible with separate poweroff driver
* avoid OpenSSL deprecation warnings

2 years agodoc: Fix usage of CFG_RPMB_WRITE_KEY
Ilias Apalodimas [Mon, 27 Dec 2021 08:08:15 +0000 (10:08 +0200)]
doc: Fix usage of CFG_RPMB_WRITE_KEY

This is a 'y/n' selection, so fix it.
While at it remove the duplicate usage of CFG_CORE_HEAP_SIZE

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Acked-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2 years agovideo: mxsfb: fix clk_get_by_name() return value check
Giulio Benetti [Sat, 23 Oct 2021 22:34:42 +0000 (00:34 +0200)]
video: mxsfb: fix clk_get_by_name() return value check

If clk_get_by_name() returns 0 it means it executed successfully while now
we consider it as an error. So let's check if return value is negative to
be an error. Otherwise this prevents "axi" and "disp_axi" to be enabled.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2 years agoMerge https://source.denx.de/u-boot/custodians/u-boot-spi
Tom Rini [Sun, 26 Dec 2021 19:07:41 +0000 (14:07 -0500)]
Merge https://source.denx.de/u-boot/custodians/u-boot-spi

2 years agoMerge tag 'u-boot-rockchip-20211226' of https://source.denx.de/u-boot/custodians...
Tom Rini [Sun, 26 Dec 2021 12:57:54 +0000 (07:57 -0500)]
Merge tag 'u-boot-rockchip-20211226' of https://source.denx.de/u-boot/custodians/u-boot-rockchip

- Add kaslrseed support;
- rk3568 spl and image tool support;
- px30 dts sync from kernel;
- rk3399 emmc fix;
- rockchip fastboot cmd fix;

2 years agotools: avoid OpenSSL deprecation warnings
Heinrich Schuchardt [Sat, 18 Dec 2021 10:25:12 +0000 (11:25 +0100)]
tools: avoid OpenSSL deprecation warnings

Our Gitlab CI buildsystem is set up to treat warnings as errors.
With OpenSSL 3.0 a lot of deprecation warnings occur.

With the patch compatibility with OpenSSL 1.1.1 is declared.
In the long run we should upgrade our code to use the current API.

A -Wdiscarded-qualifiers warning is muted by casting.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2 years agosysreset: watchdog: watchdog cannot power off
Heinrich Schuchardt [Thu, 4 Nov 2021 09:31:17 +0000 (10:31 +0100)]
sysreset: watchdog: watchdog cannot power off

The watchdog system reset driver can reboot the device but it cannot power
it off. If power off is requested, the driver should not reset the system
but leave powering off to one of the other system reset drivers.

As power cycling is typically not a feature of a watchdog driver the reset
types SYSRESET_POWER and SYSRESET_POWER_OFF shall both be excluded.

Fixes: 17a0c14164dc ("dm: sysreset: add watchdog-reboot driver")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2 years agoefi_loader: Don't limit the StMM buffer size explicitly
Ilias Apalodimas [Fri, 24 Dec 2021 08:08:41 +0000 (10:08 +0200)]
efi_loader: Don't limit the StMM buffer size explicitly

Currently we allow and explicitly check a single shared page with
StandAloneMM.  This is dictated by OP-TEE which runs the application.
However there's no way for us dynamically discover the number of pages we
are allowed to use.  Since writing big EFI signature list variable
requires more than a page, OP-TEE has bumped the number of shared pages to
four.

Let's remove our explicit check and allow the request to reach OP-TEE even
if it's bigger than what it supports.  There's no need to sanitize the
number of pages internally.  OP-TEE will fail if we try to write more
than it's allowed. The error will just trigger later on,  during the
StMM access.

While at it add an error message to help users figure out what failed.

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Tested-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Signed-off-by: Ilias Apalodimas <apalos@gmail.com>
2 years agoefi: fix typo in description of struct efi_entry_hdr
Heinrich Schuchardt [Tue, 21 Dec 2021 08:09:48 +0000 (09:09 +0100)]
efi: fix typo in description of struct efi_entry_hdr

Add missing colon.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2 years agorockchip: mkimage: Add support for rk3568 SoC
Kever Yang [Fri, 24 Dec 2021 10:21:50 +0000 (18:21 +0800)]
rockchip: mkimage: Add support for rk3568 SoC

rk3568 is the first SoC which supports idb header v2.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2 years agorockchip: mkimage: Add support for idb header V2
Yi Liu [Tue, 18 May 2021 02:13:40 +0000 (10:13 +0800)]
rockchip: mkimage: Add support for idb header V2

Rockchip BootRom supports new idb header v2 instead of legacy version.
Add support for it so that we can generate image for new SoCs.

Signed-off-by: Yi Liu <liuyi@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2 years agorockchip: mkimage: Add image header version
Kever Yang [Fri, 24 Dec 2021 10:00:36 +0000 (18:00 +0800)]
rockchip: mkimage: Add image header version

We are going to have more than one version header, add the version in the
header info.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2 years agorockchip: mkimage: rename RK_SIGNATURE to RK_MAGIC
Kever Yang [Fri, 24 Dec 2021 09:58:32 +0000 (17:58 +0800)]
rockchip: mkimage: rename RK_SIGNATURE to RK_MAGIC

The first 4byte of idbimage is a magic number instead of signature,
correct it.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2 years agoconfigs: rock-pi-4: Enable rockchip efuse support
Sjoerd Simons [Thu, 25 Nov 2021 19:52:30 +0000 (20:52 +0100)]
configs: rock-pi-4: Enable rockchip efuse support

Enable efuse support for reading the cpuid#, serial# and generate a
board unique mac address

Signed-off-by: Sjoerd Simons <sjoerd@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 years agorockchip: boot_mode: fix fastboot command
John Keeping [Thu, 25 Nov 2021 18:05:22 +0000 (18:05 +0000)]
rockchip: boot_mode: fix fastboot command

The USB controller index must be separated from the type argument,
otherwise the preboot command fails with the error:

Error: Wrong USB controller index format

Add the missing space to fix fastboot mode here.

Signed-off-by: John Keeping <john@metanate.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 years agopower: pmic/fan53555: allow dm be omitted by SPL
Quentin Schulz [Fri, 12 Nov 2021 14:10:47 +0000 (15:10 +0100)]
power: pmic/fan53555: allow dm be omitted by SPL

Allow the dm driver be omitted by SPL.

Cc: Quentin Schulz <foss+u-boot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 years agoengicam: px30: Add Engicam PX30.Core C.TOUCH 2.0 10.1" OF
Jagan Teki [Mon, 15 Nov 2021 17:38:21 +0000 (23:08 +0530)]
engicam: px30: Add Engicam PX30.Core C.TOUCH 2.0 10.1" OF

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

10.1" OF is a capacitive touch 10.1" Open Frame panel solutions.

PX30.Core needs to mount on top of C.TOUCH 2.0 carrier with pluged
10.1" OF for creating complete PX30.Core C.TOUCH 2.0 10.1" Open Frame.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 years agoarm64: dts: rockchip: Sync px30 from linux-next
Jagan Teki [Mon, 15 Nov 2021 17:38:20 +0000 (23:08 +0530)]
arm64: dts: rockchip: Sync px30 from linux-next

Sync the px30 devicetree files from linux-next tree.

commit <14ce8069f48b> ("lib/stackdepot: allow optional init and
stack_table allocation by kvmalloc() - fixup3")

Note, this path even sync rk3326 files as it depends on px30.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 years agoarm64: dts: rockchip: px30: Move dmc into -u-boot.dtsi
Jagan Teki [Mon, 15 Nov 2021 17:38:19 +0000 (23:08 +0530)]
arm64: dts: rockchip: px30: Move dmc into -u-boot.dtsi

dmc node is specific to U-Boot, it is always better practice
to maintain U-Boot specific nodes into -u-boot.dtsi files
in order to maintain Linux dts file sync compatibility.

Move the dmc into px30-u-boot.dtsi, also add dmc node
explicitly in rk3326-odroid-go2-u-boot.dtsi since it is
using px30.dts.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 years agodoc: rockchip: puma: update build and flash instructions
Quentin Schulz [Fri, 12 Nov 2021 14:15:50 +0000 (15:15 +0100)]
doc: rockchip: puma: update build and flash instructions

Long gone is the time a custom TF-A was needed for Puma, upstream TF-A
works just fine now.

The flashing instructions are updated to match how newer rkdeveloptool
and rkbin work.

Finally, rkbin provides a way to flash SPI via USB OTG interface so
let's document that.

Cc: Quentin Schulz <foss+u-boot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 years agodts: rockchip: rk3399: enable emmc phy for spl
Yifeng Zhao [Mon, 1 Nov 2021 04:43:47 +0000 (12:43 +0800)]
dts: rockchip: rk3399: enable emmc phy for spl

adapting commit ac804143cf ("mmc: rockchip_sdhci: add phy and clock
config for rk3399") to fix the issue "Not found emmc phy device".

Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com> - on a Rock960
Reviewed-by: Patrick Wildt <patrick@blueri.se>
Tested-by: Patrick Wildt <patrick@blueri.se> - on a Pinebook Pro
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 years agorockchip: rk3568: add arch_cpu_init()
Nico Cheng [Tue, 26 Oct 2021 02:42:21 +0000 (10:42 +0800)]
rockchip: rk3568: add arch_cpu_init()

We configured the drive strength and security of EMMC in
arch_cpu_init().

Signed-off-by: Nico Cheng <nico.cheng@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 years agoarm: dts: rockchip: rk3568: Enable sdhci and sdmmc0 node
Nico Cheng [Tue, 26 Oct 2021 02:42:20 +0000 (10:42 +0800)]
arm: dts: rockchip: rk3568: Enable sdhci and sdmmc0 node

Enable sdhci and sdmmc0 node in rk3568-u-boot.dtsi

Signed-off-by: Nico Cheng <nico.cheng@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 years agorockchip: Kconfig: Enable SPL support for rk3568
Nico Cheng [Tue, 26 Oct 2021 02:42:19 +0000 (10:42 +0800)]
rockchip: Kconfig: Enable SPL support for rk3568

Enable SPL support in Kconfig and add some related option in
rk3568_common.h

Signed-off-by: Nico Cheng <nico.cheng@rock-chips.com>
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 years agorockchip: px30: add support for HW RNG for Odroid Go Advance
Chris Morgan [Wed, 25 Aug 2021 16:23:57 +0000 (11:23 -0500)]
rockchip: px30: add support for HW RNG for Odroid Go Advance

The Odroid Go Advance has a hardware random number generator present.
The device does not have an upstream Linux driver, but does have a
U-Boot driver. Add the appropriate node so that the hardware RNG can be
used in U-Boot.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 years agocmd: kaslrseed: add command to generate value from hwrng
Chris Morgan [Wed, 25 Aug 2021 16:22:57 +0000 (11:22 -0500)]
cmd: kaslrseed: add command to generate value from hwrng

Allow the kaslr-seed value in the chosen node to be set from a hardware
rng source.

Tested on a Rockchip PX30 (Odroid Go Advance), you must have loaded
the devicetree first and prepared it for editing. On my device the
workflow goes as follows:

setenv dtb_loadaddr "0x01f00000"
load mmc 0:1 ${dtb_loadaddr} rk3326-odroid-go2.dtb
fdt addr ${dtb_loadaddr}
fdt resize
kaslrseed

and the output can be seen here:
fdt print /chosen
chosen {
        kaslr-seed = <0x6f61df74 0x6f7b996c>;
        stdout-path = "serial2:115200n8";
};

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2 years agoPrepare v2022.01-rc4
Tom Rini [Mon, 20 Dec 2021 16:15:15 +0000 (11:15 -0500)]
Prepare v2022.01-rc4

Signed-off-by: Tom Rini <trini@konsulko.com>
2 years agoRevert "image: Remove #ifdefs from select_ramdisk()"
Tom Rini [Mon, 20 Dec 2021 14:36:32 +0000 (09:36 -0500)]
Revert "image: Remove #ifdefs from select_ramdisk()"

This reverts commit f33a2c1bd0fb371511a485cac1f182ba50db51be.

This causes a crash on some platforms as seen here:
https://lore.kernel.org/r/f153017b-c41a-0d32-67b9-f288e695f900@baylibre.com/

Reported-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2 years agofw_setenv: Unbreak fw_setenv caused by buggy MEMISLOCKED use
Joakim Tjernlund [Wed, 8 Dec 2021 14:33:11 +0000 (15:33 +0100)]
fw_setenv: Unbreak fw_setenv caused by buggy MEMISLOCKED use

Commit "fw_setenv: lock the flash only if it was locked before"
checks for Locked status with uninitialized erase data.
Address by moving the test for MEMISLOCKED.

Fixes: 8a726b852502 ("fw_setenv: lock the flash only if it was locked before")
Signed-off-by: Joakim Tjernlund <joakim.tjernlund@infinera.com>
2 years agoMerge tag '20211220-fixes-for-2022.01' of https://source.denx.de/u-boot/custodians...
Tom Rini [Mon, 20 Dec 2021 13:51:53 +0000 (08:51 -0500)]
Merge tag '20211220-fixes-for-2022.01' of https://source.denx.de/u-boot/custodians/u-boot-i2c

i2c changes for 20211220-fixes-for-2022.01

- mvtwsi: Swab the register address if its size is > 1

2 years agoi2c: mvtwsi: Swab the register address if its size is > 1
Stefan Roese [Thu, 18 Nov 2021 08:18:41 +0000 (09:18 +0100)]
i2c: mvtwsi: Swab the register address if its size is > 1

Testing on Armada XP with an EEPROM using register address with size
of 2 has shown, that the register address bytes are sent to the I2C
EEPROM in the incorrect order. This patch swabs the address bytes so
that the correct address is transferred to the I2C device.

BTW: This worked without any issues before migrating Armada XP to
DM I2C.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Samuel Holland <samuel@sholland.org>
Cc: Baruch Siach <baruch@tkos.co.il>
Cc: Pali Rohár <pali@kernel.org>
Cc: Marek Behún <marek.behun@nic.cz>
Tested-by: Marek Behún <marek.behun@nic.cz>
2 years agoMerge tag 'efi-2022-01-rc4-3' of https://source.denx.de/u-boot/custodians/u-boot-efi
Tom Rini [Sat, 18 Dec 2021 19:39:21 +0000 (14:39 -0500)]
Merge tag 'efi-2022-01-rc4-3' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request for efi-2022-01-rc4-3

Documentation:

* add Calxeda Highbank/Midway board documentation

Bug fixes:

* call part_init() in blk_get_device_by_str() only for MMC
* fix an 'undefined' error in some driver model macros

2 years agodm: fix an 'undefined' error in some macros
AKASHI Takahiro [Fri, 10 Dec 2021 06:49:36 +0000 (15:49 +0900)]
dm: fix an 'undefined' error in some macros

Due to a non-existing parameter name in macro's, use of those macro's will
cause a compiler error of "undefined reference".
Unfortunately, dm test doesn't fail because a wrong name ("&dev", hence it
is accidentally a valid name in the context of a caller site) is passed on.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Fixes: f262d4ca4b2b ("dm: core: Add a way to read platdata for all
child devices")
Fixes: 903e83ee8464 ("dm: core: Add a way to iterate through children,
probing each")
Reviewed-by: Simon Glass <sjg@chromium.org>
2 years agoblk: add a helper function, blk_probe_or_unbind()
AKASHI Takahiro [Fri, 10 Dec 2021 06:49:29 +0000 (15:49 +0900)]
blk: add a helper function, blk_probe_or_unbind()

This function will be commonly used in block device drivers
in the succeeding patches.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2 years agopart: call part_init() in blk_get_device_by_str() only for MMC
AKASHI Takahiro [Fri, 10 Dec 2021 06:49:28 +0000 (15:49 +0900)]
part: call part_init() in blk_get_device_by_str() only for MMC

In blk_get_device_by_str(), the comment says: "Updates the partition table
for the specified hw partition."
Since hw partition is supported only on MMC, it makes no sense to do so
for other devices.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2 years agodoc: board: Add Calxeda Highbank/Midway documentation
Andre Przywara [Tue, 14 Dec 2021 17:47:00 +0000 (17:47 +0000)]
doc: board: Add Calxeda Highbank/Midway documentation

The Calxeda servers are using U-Boot as the primary bootloader, which
was shipped as part of a firmware upgrade package.
Even though the machines are considered legacy at this point, the port
still works, so deserves some documentation.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2 years agoMerge commit '4720b83d2c711062cfb55f03591b8f12c897d7cb' of https://github.com/tienfon...
Tom Rini [Fri, 17 Dec 2021 12:24:56 +0000 (07:24 -0500)]
Merge commit '4720b83d2c711062cfb55f03591b8f12c897d7cb' of https://github.com/tienfong/uboot_mainline

2 years agoarm: socfpga: arria10: Enable double peripheral RBF configuration
Tien Fong Chee [Sun, 7 Nov 2021 15:08:56 +0000 (23:08 +0800)]
arm: socfpga: arria10: Enable double peripheral RBF configuration

Double peripheral RBF configuration are needed on some devices or boards
to stabilize the IO configuration system.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Sin Hui Kho <sin.hui.kho@intel.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
2 years agoarm: socfpga: arria10: Reset MPFE NoC after program periph / combined RBF
Tien Fong Chee [Sun, 7 Nov 2021 15:08:55 +0000 (23:08 +0800)]
arm: socfpga: arria10: Reset MPFE NoC after program periph / combined RBF

This patch triggers warm reset to recover the MPFE NoC from corruption
due to high frequency transient clock output from HPS EMIF IOPLL at
VCO startup after peripheral RBF is programmed.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Sin Hui Kho <sin.hui.kho@intel.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
2 years agoarm: socfpga: arria10: Setting image magic value to romcode initswstate reg
Tien Fong Chee [Sun, 7 Nov 2021 15:08:54 +0000 (23:08 +0800)]
arm: socfpga: arria10: Setting image magic value to romcode initswstate reg

The romcode_initswstate register need to be set with FSBL_IMAGE_IS_VALID
value if the current FSBL image is found valid, otherwise BootROM will
look for next subsequent valid FSBL image when warm reset is triggered.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Sin Hui Kho <sin.hui.kho@intel.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
2 years agomtd: spi-nor-ids: Add support for W25Q01JV
Ram Narayanan [Tue, 30 Nov 2021 05:54:58 +0000 (21:54 -0800)]
mtd: spi-nor-ids: Add support for W25Q01JV

Adds support for Winbond's new 128MB spi nor flash.

datasheet: https://www.winbond.com/resource-files/W25Q01JV%20SPI%20RevC%2005032021%20Plus%20dummy.pdf

Signed-off-by: Ram Narayanan <ramnara@linux.microsoft.com>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2 years agoMerge tag 'clk-2022.01-rc3' of https://source.denx.de/u-boot/custodians/u-boot-clk
Tom Rini [Wed, 15 Dec 2021 19:51:44 +0000 (14:51 -0500)]
Merge tag 'clk-2022.01-rc3' of https://source.denx.de/u-boot/custodians/u-boot-clk

Clock patches for v2022.01-rc3

This adds better logging support for many CCF drivers, and clarifies some
documentation regarding clk_get_rate.

2 years agoclk: define LOG_CATEGORY for generic and ccf clocks
Patrick Delaunay [Fri, 19 Nov 2021 14:12:07 +0000 (15:12 +0100)]
clk: define LOG_CATEGORY for generic and ccf clocks

Define LOG_CATEGORY to allow filtering with log command
for generic clock and CCF clocks.

This patch also change existing printf, debug and pr_ macro
to log_ or dev_ macro.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
2 years agoclk: cosmetic: reorder include files
Patrick Delaunay [Fri, 19 Nov 2021 14:12:06 +0000 (15:12 +0100)]
clk: cosmetic: reorder include files

Reorder include files in the U-Boot expected order:

the common.h header should always be first,
followed by other headers in order,
then headers with directories,
then local files.

It is a preliminary step for next patch.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
2 years agoclk: fix clk_get_rate() documentation
Giulio Benetti [Sun, 14 Feb 2021 02:17:18 +0000 (03:17 +0100)]
clk: fix clk_get_rate() documentation

Improve clk_get_rate() @return documentation that otherwise is a bit
ambiguous. At the moment I expect to return 0 as error since the return
type is 'ulong', instead the function really returns negative value in
case the corresponding function pointer is null and returns 0 if the clock
is invalid.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
2 years agoMerge tag 'rpi-next-2022.01' of https://source.denx.de/u-boot/custodians/u-boot-raspb...
Tom Rini [Wed, 15 Dec 2021 16:49:30 +0000 (11:49 -0500)]
Merge tag 'rpi-next-2022.01' of https://source.denx.de/u-boot/custodians/u-boot-raspberrypi

- enable RPi Zero 2 W
- fix MMC numbering issue
- Update link to documentation

2 years agoMerge https://source.denx.de/u-boot/custodians/u-boot-marvell
Tom Rini [Wed, 15 Dec 2021 12:14:20 +0000 (07:14 -0500)]
Merge https://source.denx.de/u-boot/custodians/u-boot-marvell

- Marvell/PCI: Fix size of the configuration cache and disallow ROM BAR
  setting in pci_mvebu.c & pci-aardvark.c (Pali & Marek)

2 years agoarm: a37xx: pci: Do not allow setting ROM BAR on PCI Bridge
Pali Rohár [Thu, 11 Nov 2021 15:35:48 +0000 (16:35 +0100)]
arm: a37xx: pci: Do not allow setting ROM BAR on PCI Bridge

PCI Bridge which represents aardvark PCIe Root Port has Expansion ROM Base
Address register at offset 0x30 but its meaning is different than PCI's
Expansion ROM BAR register. Only address format of register is same.

In reality, this device does not have any configurable PCI BARs. So ensure
that write operation into BARs (including Expansion ROM BAR) is noop and
registers always contain zero address which indicates that bars are
unsupported.

Fixes: cb056005dc67 ("arm: a37xx: pci: Add support for accessing PCI Bridge on root bus")
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2 years agopci: pci_mvebu: Do not allow setting ROM BAR on PCI Bridge
Pali Rohár [Thu, 11 Nov 2021 15:35:45 +0000 (16:35 +0100)]
pci: pci_mvebu: Do not allow setting ROM BAR on PCI Bridge

The PCI Bridge which represents mvebu PCIe Root Port has Expansion ROM
Base Address register at offset 0x30 but its meaning is different that
of PCI's Expansion ROM BAR register, although the address format of
the register is the same.

In reality, this device does not have any configurable PCI BARs. So
ensure that write operation into BARs (including Expansion ROM BAR) is a
noop and registers always contain zero address which indicates that BARs
are unsupported.

Fixes: a7b61ab58d5d ("pci: pci_mvebu: Properly configure and use PCI Bridge (PCIe Root Port)")
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2 years agopci: pci_mvebu, pci_aardvark: Fix size of configuration cache
Marek Behún [Thu, 11 Nov 2021 15:35:44 +0000 (16:35 +0100)]
pci: pci_mvebu, pci_aardvark: Fix size of configuration cache

Since u32 takes up 4 bytes, we need to divide the number of u32s by 4
for cfgcache.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2 years agoMerge tag 'u-boot-stm32-20211213' of https://source.denx.de/u-boot/custodians/u-boot-stm
Tom Rini [Mon, 13 Dec 2021 15:20:25 +0000 (10:20 -0500)]
Merge tag 'u-boot-stm32-20211213' of https://source.denx.de/u-boot/custodians/u-boot-stm

- enable KSZ90x1 PHY driver on DHCOR
- DHSOM boards:
  - increase USB power-good delay
  - add update_sf script to install U-Boot into SF
  - increase PHY auto-negotiation timeout to 20 seconds
  - fix SoM and board coding strap GPIO handling

# gpg verification failed.

2 years agoARM: stm32: Enable KSZ90x1 PHY driver on DHCOR
Marek Vasut [Sat, 13 Nov 2021 02:28:03 +0000 (03:28 +0100)]
ARM: stm32: Enable KSZ90x1 PHY driver on DHCOR

Enable KSZ9x01 PHY driver in DHCOR common configuration, since the
AV96 board has this PHY populated on the PCB.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2 years agoARM: dts: stm32: Add custom PHY reset bindings on AV96
Marek Vasut [Sat, 13 Nov 2021 02:27:37 +0000 (03:27 +0100)]
ARM: dts: stm32: Add custom PHY reset bindings on AV96

The ethernet PHY must be reset on AV96, however DWMAC currently does
not support the MDIO-bus PHY GPIO reset bindings and the ethernet MAC
PHY reset property is going away on next DT sync. Add PHY specific
reset bindings to trigger the PHY reset and fix sporadic ethernet
malfunctions, until the next DT sync.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2 years agoARM: stm32: Fix SoM and board coding strap GPIO handling on DHSOM
Marek Vasut [Sat, 13 Nov 2021 02:26:39 +0000 (03:26 +0100)]
ARM: stm32: Fix SoM and board coding strap GPIO handling on DHSOM

The variables retaining the strap values have to be initialized, always,
make it so. Moreover, free the requested GPIO list at the end to avoid
wasting memory.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>