platform/kernel/u-boot.git
7 years agoPrepare v2016.11-rc3 v2016.11-rc3
Tom Rini [Mon, 31 Oct 2016 20:36:10 +0000 (16:36 -0400)]
Prepare v2016.11-rc3

Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agoREADME: fix typo candiate -> candidate
Jelle van der Waa [Sun, 30 Oct 2016 16:30:30 +0000 (17:30 +0100)]
README: fix typo candiate -> candidate

Signed-off-by: Jelle van der Waa <jelle@vdwaa.nl>
7 years agotravis.yml: Add in uniphier as a job, modify aarch64 builds a bit
Tom Rini [Sat, 29 Oct 2016 21:11:17 +0000 (17:11 -0400)]
travis.yml: Add in uniphier as a job, modify aarch64 builds a bit

- Add in system aarch64-linux-gnu toolchain
- Now that all VMs will have aarch64 available, don't exclude them from
  other jobs but instead exclude them from the catch-all aarch64 build
- Add JOB= to the Freescale/ARM build to be clear about what it does.
- Add uniphier as a stand-alone job

Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agomkimage: Fix missing free() in show_valid_options()
Simon Glass [Thu, 27 Oct 2016 23:54:03 +0000 (17:54 -0600)]
mkimage: Fix missing free() in show_valid_options()

The allocated memory should be freed. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Coverity (CID: 150963)
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agocmd: load: align cache flush
Chris Packham [Tue, 25 Oct 2016 07:22:48 +0000 (20:22 +1300)]
cmd: load: align cache flush

Prevent cache misalignment message by ensuring that a whole cache line
is flushed.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
7 years agoFix spelling of "resetting".
Vagrant Cascadian [Mon, 24 Oct 2016 03:45:19 +0000 (20:45 -0700)]
Fix spelling of "resetting".

Cover-Letter: Fixes several spelling errors for the words "resetting",
  "extended", "occur", and "multiple".

Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoFix spelling of "extended".
Vagrant Cascadian [Mon, 24 Oct 2016 03:45:18 +0000 (20:45 -0700)]
Fix spelling of "extended".

Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoFix spelling of "occur".
Vagrant Cascadian [Mon, 24 Oct 2016 03:45:17 +0000 (20:45 -0700)]
Fix spelling of "occur".

Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
Acked-by: Angelo Dureghello <angelo@sysam.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoFix spelling of "multiple".
Vagrant Cascadian [Mon, 24 Oct 2016 03:45:16 +0000 (20:45 -0700)]
Fix spelling of "multiple".

Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoomap3logic: Fix Auto detect Logic PD Models
Adam Ford [Sun, 23 Oct 2016 12:39:01 +0000 (07:39 -0500)]
omap3logic: Fix Auto detect Logic PD Models

The autodetect feature doesn't allow users to specify the device tree.
This fix will make it only autodetect if 'fdtimage' is not defined.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoOMAP3: omap3_logic: Add scripts to boot over network.
Adam Ford [Sat, 15 Oct 2016 13:16:27 +0000 (08:16 -0500)]
OMAP3: omap3_logic: Add scripts to boot over network.

Not all networks have a DHCP server configured properly, so these
scripts make it easier to boot in that scenario.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoOMAP3: omap3_logic: Remove LCD preboot info
Adam Ford [Sat, 15 Oct 2016 11:23:11 +0000 (06:23 -0500)]
OMAP3: omap3_logic: Remove LCD preboot info

The LCD isn't supported in U-Boot and the LCD is now configured in
the device tree, so this code is pointless.

V2: Eliminiate erroneous newline.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoti: common: board_detect: Return a valid empty string for un-initialized eeprom
Nishanth Menon [Tue, 11 Oct 2016 17:39:05 +0000 (12:39 -0500)]
ti: common: board_detect: Return a valid empty string for un-initialized eeprom

Current logic for query of revision, board_name, config returns
NULL. Users of these functions do a direct strncmp to compare.
Unfortunately, as per conventions require two valid strings to compare
against and the current implementation causes a crash when compared
with NULL.

We'd still like to maintain the simplistic usage of these APIs instead
of redundant if (string) res=strncmp(fn(),"cmp",n); flowing all over
the place.

Hence, since the version, name and config is already pre-initialized
with empty string, just dont check for invalid header in the first
place and return the empty string to the caller.

Reported-by: Brad Griffis <bgriffis@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Correct was'nt -> wasn't typo]
Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agoti: common: board_detect: Setup initial default value for config as well
Nishanth Menon [Tue, 11 Oct 2016 17:39:04 +0000 (12:39 -0500)]
ti: common: board_detect: Setup initial default value for config as well

config should have been initialized along with others as defaults.

Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoti: common: board_detect: Replace hardcoded value with macro
Nishanth Menon [Tue, 11 Oct 2016 17:39:03 +0000 (12:39 -0500)]
ti: common: board_detect: Replace hardcoded value with macro

We should have used TI_DEAD_EEPROM_MAGIC in the first place.

Fixes: d3b98a9eb941 ("ti: common: dra7: Add standard access for board description EEPROM")
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agocosmetic: Fix indentation in README
Alexander von Gernler [Fri, 7 Oct 2016 17:44:14 +0000 (19:44 +0200)]
cosmetic: Fix indentation in README

Signed-off-by: Alexander von Gernler <grunk@pestilenz.org>
7 years agoMerge branch 'sun9i-a80-spl' of http://git.denx.de/u-boot-sunxi
Tom Rini [Sun, 30 Oct 2016 12:12:00 +0000 (08:12 -0400)]
Merge branch 'sun9i-a80-spl' of git.denx.de/u-boot-sunxi

7 years agoMerge branch 'master' of http://git.denx.de/u-boot-sunxi
Tom Rini [Sun, 30 Oct 2016 12:11:50 +0000 (08:11 -0400)]
Merge branch 'master' of git.denx.de/u-boot-sunxi

7 years agosunxi: Add support for Cubieboard4
Chen-Yu Tsai [Fri, 28 Oct 2016 10:21:38 +0000 (18:21 +0800)]
sunxi: Add support for Cubieboard4

The Cubieboard4 is an A80 SoC based development board from Cubietech.

This board has a UART port, 4 USB host ports, a USB 3.0 OTG connector,
HDMI and VGA outputs, a micro SD slot, 8G eMMC flash, 2G DRAM, a WiFi/BT
combo chip, headphone and microphone jacks, IR receiver, and GPIO headers.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
7 years agotools: add mksunxiboot to tools-all target
Stefan Brüns [Sat, 29 Oct 2016 10:23:18 +0000 (12:23 +0200)]
tools: add mksunxiboot to tools-all target

mksunxiboot is useful outside of u-boot, it is e.g. used by sunxi-tools.

Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
7 years agosunxi: Enable SPL support for A80 Optimus board
Chen-Yu Tsai [Fri, 28 Oct 2016 10:21:37 +0000 (18:21 +0800)]
sunxi: Enable SPL support for A80 Optimus board

The A80 Optimus Board was launched with the Allwinner A80 SoC.
It was jointly developed by Allwinner and Merrii.

This board has a UART port, a JTAG connector, 2 USB host ports, a USB
3.0 OTG connector, an HDMI output, a micro SD slot, 16G eMMC flash,
2G DRAM, a camera sensor interface, a WiFi/BT combo chip, a headphone
jack, IR receiver, and additional GPIO headers.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
[hdegoede@redhat.com: update existing Merrii_A80_Optimus_defconfig
 instead of adding a new defconfig]
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
7 years agosunxi: A64: enable USB support
Amit Singh Tomar [Fri, 21 Oct 2016 01:24:30 +0000 (02:24 +0100)]
sunxi: A64: enable USB support

Mostly by adding MACH_SUN50I to some existing #ifdefs enable support
for the the HCI0 USB host controller on the A64.
Fix up some minor 64-bit hiccups on the way.
Add the bare minimum DT bits to the A64 .dtsi and enable the controllers
and the PHY on the Pine64.
This is limited to the first USB controller at the moment, which is
connected to the lower USB socket on the Pine64 board.
[Andre: remove unneeded defines, enable OHCI, add commit message]

Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
7 years agosunxi: Add default zq value for sun9i (A80)
Chen-Yu Tsai [Fri, 28 Oct 2016 10:21:36 +0000 (18:21 +0800)]
sunxi: Add default zq value for sun9i (A80)

Both the A80 Optimus board and the Cubieboard 4 use a zq value of
4145117, or 0x3f3fdd.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
7 years agosunxi: Update DRAM clock for Olimex A20 boards
Stefan Mavrodiev [Sat, 29 Oct 2016 12:34:07 +0000 (14:34 +0200)]
sunxi: Update DRAM clock for Olimex A20 boards

Originally dram clock was set to 480MHz, but this behaves
unstable. To improve stability the clock is reduced to 384MHz

Signed-off-by: Stefan Mavrodiev <stefan.mavrodiev@gmail.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
7 years agosunxi: Add support for SID e-fuses on sun9i
Chen-Yu Tsai [Fri, 28 Oct 2016 10:21:35 +0000 (18:21 +0800)]
sunxi: Add support for SID e-fuses on sun9i

The A80 has SID e-fuses. Like other newer SoCs, the actual e-fuses
are at an offset of 0x200 within the SID address space.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
7 years agosunxi: dts: Pine64: add Ethernet alias
Andre Przywara [Fri, 21 Oct 2016 00:11:46 +0000 (01:11 +0100)]
sunxi: dts: Pine64: add Ethernet alias

The sun8i-emac driver works fine with the A64 Ethernet IP, but we are
missing an alias entry to trigger the driver instantiation by U-Boot.
Add the line to point U-Boot to the Ethernet DT node.
This enables TFTP boot on the Pine64.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
7 years agosunxi: Set default CPU clock rate to 1008 MHz for sun9i (A80)
Chen-Yu Tsai [Fri, 28 Oct 2016 10:21:34 +0000 (18:21 +0800)]
sunxi: Set default CPU clock rate to 1008 MHz for sun9i (A80)

In Allwinner's SDK the A80 is clocked to 1008 MHz by default.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
7 years agosunxi: remove unneeded CONFIG_USB_MAX_CONTROLLER_COUNT defines
Masahiro Yamada [Thu, 13 Oct 2016 15:40:01 +0000 (00:40 +0900)]
sunxi: remove unneeded CONFIG_USB_MAX_CONTROLLER_COUNT defines

ARCH_SUNXI selects DM_USB, where CONFIG_USB_MAX_CONTROLLER_COUNT
is not used.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
7 years agosunxi: add MMC pinmux setup for SDC2 on sun9i
Philipp Tomsich [Fri, 28 Oct 2016 10:21:33 +0000 (18:21 +0800)]
sunxi: add MMC pinmux setup for SDC2 on sun9i

The A80 can support 8-bit eMMC with reset on the PC pingroups.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
7 years agosunxi: Rename CONFIG_SUNXI to CONFIG_ARCH_SUNXI
Jagan Teki [Thu, 13 Oct 2016 08:49:35 +0000 (14:19 +0530)]
sunxi: Rename CONFIG_SUNXI to CONFIG_ARCH_SUNXI

CONFIG_SUNXI -> CONFIG_ARCH_SUNXI
and removed CONFIG_SUNIX from config_whitelist.txt

Cc: Simon Glass <sjg@chromium.org>
Cc: Ian Campbell <ijc@hellion.org.uk>
Cc: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
7 years agosunxi: enable SPL for sun9i
Philipp Tomsich [Fri, 28 Oct 2016 10:21:32 +0000 (18:21 +0800)]
sunxi: enable SPL for sun9i

Now that DRAM initialization and clock setup is supported,
we can enable SPL for the A80.

[wens@csie.org: Added commit message]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
7 years agosunxi: add initial clock setup for sun9i for SPL
Philipp Tomsich [Fri, 28 Oct 2016 10:21:31 +0000 (18:21 +0800)]
sunxi: add initial clock setup for sun9i for SPL

This is a cleaned up version set_pll() from Allwinner's boot0 source
(bootloader/basic_loader/bsp/bsp_for_a80/common/common.c).

[wens@csie.org: Added commit message; style cleanup]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
7 years agosunxi: Enable SMP mode for the boot CPU on sun9i (A80)
Philipp Tomsich [Fri, 28 Oct 2016 10:21:30 +0000 (18:21 +0800)]
sunxi: Enable SMP mode for the boot CPU on sun9i (A80)

Since the A80 has many cores which we intend to use in SMP fashion,
we should set the SMP bit for the boot CPU.

[wens@csie.org: Added commit message]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
7 years agosunxi: add gtbus-initialisation for sun9i
Philipp Tomsich [Fri, 28 Oct 2016 10:21:29 +0000 (18:21 +0800)]
sunxi: add gtbus-initialisation for sun9i

On sun9i, the GTBUS manages transaction priority and bandwidth
for multiple read ports when accessing DRAM. The initialisation
mirrors the settings from Allwinner's boot0 for now, even though
this may not be optimal for all applications (e.g. headless
systems might want to give priority to IO modules).

Adding a common callout to gtbus_init() from the SPL clock init
with a weakly defined implementation in sunxi/clock.c to fallback
to for platforms that don't require this.

[wens@csie.org: Moved gtbus_sun9i.c to arch/arm/mach-sunxi/; style cleanup]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
7 years agosunxi: DRAM initialisation for sun9i
Philipp Tomsich [Fri, 28 Oct 2016 10:21:28 +0000 (18:21 +0800)]
sunxi: DRAM initialisation for sun9i

This adds DRAM initialisation code for sun9i, which calculates the
appropriate timings based on timing information for the supplied
DDR3 bin and the clock speeds used.

With this DRAM setup, we have verified DDR3 clocks of up to 792MHz
(i.e. DDR3-1600) on the A80-Q7 using a dual-channel configuration.

[wens@csie.org: Moved dram_sun9i.c to arch/arm/mach-sunxi/; style cleanup]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
[hdegoede@redhat.com: Drop some huge non-documenting #if 0 ... #endif blocks]
[hdegoede@redhat.com: Fix checkpatch warnings]
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
7 years agoMerge branch 'master' of git://git.denx.de/u-boot-socfpga
Tom Rini [Sat, 29 Oct 2016 21:16:00 +0000 (17:16 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-socfpga

7 years agoMerge branch 'master' of git://git.denx.de/u-boot-usb
Tom Rini [Sat, 29 Oct 2016 21:15:37 +0000 (17:15 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-usb

7 years agoMerge branch 'master' of git://git.denx.de/u-boot-uniphier
Tom Rini [Sat, 29 Oct 2016 21:15:24 +0000 (17:15 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-uniphier

7 years agodrivers: USB: OHCI: allow compilation for 64-bit targets
Andre Przywara [Fri, 21 Oct 2016 01:24:29 +0000 (02:24 +0100)]
drivers: USB: OHCI: allow compilation for 64-bit targets

OHCI has a known limitation of allowing only 32-bit DMA buffer
addresses, so we have a lot of u32 variables around, which are assigned
to pointers and vice versa. This obviously creates issues with 64-bit
systems, so the compiler complains here and there.
To allow compilation for 64-bit boards which use only memory below 4GB
anyway (and to avoid more invasive fixes), adjust some casts and types
and assume that the EDs and TDs are all located in the lower 4GB.
This fixes compilation of the OHCI driver for the Pine64.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
7 years agoconfigs/chromebox_panther_defconfig: Re-enable CONFIG_DM_PCI
Tom Rini [Sat, 29 Oct 2016 12:41:45 +0000 (08:41 -0400)]
configs/chromebox_panther_defconfig: Re-enable CONFIG_DM_PCI

This was turned off by accident, re-enble.

Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agoMAINTAINERS: Update Jagan's email
Jagan Teki [Fri, 28 Oct 2016 17:57:34 +0000 (23:27 +0530)]
MAINTAINERS: Update Jagan's email

Signed-off-by: Jagan Teki <jagan@openedev.com>
7 years agotravis-ci: build Tegra boards
Stephen Warren [Wed, 26 Oct 2016 19:05:52 +0000 (13:05 -0600)]
travis-ci: build Tegra boards

ARMv7 Tegra boards aren't currently covered by any other travis-ci jobs.
Add a new job to build them.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
7 years agotravis-ci: compile with buildman when running test/py
Stephen Warren [Wed, 26 Oct 2016 17:05:36 +0000 (11:05 -0600)]
travis-ci: compile with buildman when running test/py

Use buildman to compile any U-Boot binary tested by test/py. This
re-uses all the work done elsewhere to make buildman work within
Travis-CI, in particular related to toolchain downloading and buildman
config file creation.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
7 years agoARM: uniphier: update DRAM init code for LD11 SoC
Masahiro Yamada [Thu, 27 Oct 2016 14:47:10 +0000 (23:47 +0900)]
ARM: uniphier: update DRAM init code for LD11 SoC

Introduce run-time DDR PHY training.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
7 years agoARM: uniphier: support DDR PHY parameter dump command for LD11
Masahiro Yamada [Thu, 27 Oct 2016 14:47:09 +0000 (23:47 +0900)]
ARM: uniphier: support DDR PHY parameter dump command for LD11

Add the LD11 SoC data and adjuts the printf() format because this is
a 64-bit SoC.  Otherwise, 16-digits pointer addresses would break
the log format.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
7 years agoARM: uniphier: refactor DDR PHY parameter dump command
Masahiro Yamada [Thu, 27 Oct 2016 14:47:08 +0000 (23:47 +0900)]
ARM: uniphier: refactor DDR PHY parameter dump command

Do not hard-code the number of DX blocks because it is a different
value for LD11 SoC.

Move the macro NR_DATX8_PER_DDRPHY to ddrphy-training.c since it
is the last user.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
7 years agoARM: uniphier: rework existing DDR PHY code to reuse for LD11 SoC
Masahiro Yamada [Thu, 27 Oct 2016 14:47:07 +0000 (23:47 +0900)]
ARM: uniphier: rework existing DDR PHY code to reuse for LD11 SoC

The DDR PHY register view of LD11 is slightly different from that
of LD4/Pro4/sLD8, but it will be possible to share the register
macros (and I want to re-use as much code as possible).  Change
the code in the more flexible form.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
7 years agoARM: uniphier: do not run harmful code for USB boot mode of LD11 ES3
Masahiro Yamada [Thu, 27 Oct 2016 14:47:06 +0000 (23:47 +0900)]
ARM: uniphier: do not run harmful code for USB boot mode of LD11 ES3

The USB boot without the stand-by MPU is available on ES3 or later
of LD11 SoC, but the code in this if-conditional block must not be
run when booting from USB.  Check if the boot device is USB, and
skip the code in the case.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
7 years agoARM: uniphier: enable clocks to MIO/STDMAC on LD11 if USB is enabled
Masahiro Yamada [Thu, 27 Oct 2016 14:47:05 +0000 (23:47 +0900)]
ARM: uniphier: enable clocks to MIO/STDMAC on LD11 if USB is enabled

At the moment, the clk driver is not clever enough to automatically
enable parent clocks like Linux.  Enable the STDMAC clock explicitly
if USB is enabled.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
7 years agoARM: uniphier: fix DRAM init poll address for LD4, Pro4, sLD8
Masahiro Yamada [Thu, 27 Oct 2016 14:47:04 +0000 (23:47 +0900)]
ARM: uniphier: fix DRAM init poll address for LD4, Pro4, sLD8

The status register should be polled.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
7 years agoARM: uniphier: rename ddrphy-ld20-regs.h to ddruqphy-regs.h
Masahiro Yamada [Thu, 27 Oct 2016 14:47:03 +0000 (23:47 +0900)]
ARM: uniphier: rename ddrphy-ld20-regs.h to ddruqphy-regs.h

This PHY might be used for other SoCs in the future.
Avoid including the SoC name in the header name.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
7 years agoARM: uniphier: update DRAM init code for LD20 SoC (3rd)
Masahiro Yamada [Thu, 27 Oct 2016 14:47:02 +0000 (23:47 +0900)]
ARM: uniphier: update DRAM init code for LD20 SoC (3rd)

  - Constify UMC setting data arrays
  - Merge data arrays *_d0 and *_d1.
  - Add PHY parameters for LD20 C1 board

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
7 years agoARM: uniphier: remove unused board attribute macros
Masahiro Yamada [Thu, 27 Oct 2016 14:47:01 +0000 (23:47 +0900)]
ARM: uniphier: remove unused board attribute macros

After SoC evaluation, they turned out unnecessary.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
7 years agoARM: uniphier: enable SSC for more PLLs for LD20 SoC
Masahiro Yamada [Thu, 27 Oct 2016 14:47:00 +0000 (23:47 +0900)]
ARM: uniphier: enable SSC for more PLLs for LD20 SoC

For Electro-Magnetic Compatibility.

Set CPLL, SPLL2, MPLL, VPPLL, GPPLL, DPLL* to SSC rate 1 percent.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
7 years agoARM: uniphier: remove unneeded mdelay() in PLL setting function
Masahiro Yamada [Wed, 19 Oct 2016 07:26:49 +0000 (16:26 +0900)]
ARM: uniphier: remove unneeded mdelay() in PLL setting function

This delay is already cared by the callers of this function.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
7 years agoARM: uniphier: adjust fdt_file environment handling to latest Linux
Masahiro Yamada [Mon, 17 Oct 2016 13:18:02 +0000 (22:18 +0900)]
ARM: uniphier: adjust fdt_file environment handling to latest Linux

The environment fdt_file is useful to remember the appropriate DTB
file name.  Adjust it to the recent renaming in the upstream kernel.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
7 years agotravis-ci: don't invoke exit on success
Stephen Warren [Wed, 26 Oct 2016 17:05:35 +0000 (11:05 -0600)]
travis-ci: don't invoke exit on success

Invoking exit prevents any subsequent build commands from running, and
future patches will add extra commands.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
7 years agotravis-ci: use buildman -P everywhere
Stephen Warren [Wed, 26 Oct 2016 17:05:34 +0000 (11:05 -0600)]
travis-ci: use buildman -P everywhere

This places build results into a board-specific directory rather than a
buildman-thread-specific directory. This is required so that we can
access the directory from test.py, and there's no risk of a particular
build's results being over-written by another build performed by the
same thread.

In theory, this can lead to slower builds when building many different
boards in a single buildman thread, since it removes the possibility of
incremental builds between boards. In practice however I didn't notice
longer build times when when enabling this option; if anything build
times decreased although I suspect that's simply due to general
variations in build performance across different machines within the
Travis CI infra-structure.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
7 years agotravis-ci: centralize ~/.buildman editing
Stephen Warren [Wed, 26 Oct 2016 17:05:33 +0000 (11:05 -0600)]
travis-ci: centralize ~/.buildman editing

Any time an x86 toolchain is used, we need to edit ~/.buildman to
reference it. Move the editing logic into a central place so that it
doesn't have to be duplicated everywhere that uses the x86 toolchain;
future patches will add additional cases where it's used.

It would be nice if we could unconditionally write all of ~/.buildman at
once. Unfortunately, buildman fails if any toolchain mentioned in a
toolchain-prefix entry doesn't exist, even if it doesn't need to use it
for the current build.

The sandbox/x86 build definition currently does nothing more than edit
~/.buildman; no builds are run. Fix this by not defining a custom script
for this build, and hence preventing that stanza from replacing the
default script.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
7 years agotravis-ci: use correct exit code on errors
Stephen Warren [Wed, 26 Oct 2016 17:05:32 +0000 (11:05 -0600)]
travis-ci: use correct exit code on errors

The phrase "if [ $? -ne 0 ]; then exit $?; fi" doesn't work correctly;
by the time the "exit" statement runs, $? has already been over-written
by the result of the [ command. Fix this by explicitly storing $? and
then using that stored value in both the test and the error-case exit
statement.

This change also converts from textual comparison to integer comparison,
since the exit code is an integer and there's no need to convert it to
a string for comparison.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
7 years agotravis-ci: Use = not : when writing ~/.buildman
Stephen Warren [Wed, 26 Oct 2016 17:05:31 +0000 (11:05 -0600)]
travis-ci: Use = not : when writing ~/.buildman

Travis CI seems to be confused when there's a colon in an echo command,
and this is currently worked around using a variable that contains the
text we want to echo. Use = syntax instead so that we can remove the
work-around; it's rather confusing until you find out what it's for.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
7 years agotravis-ci: remove duplicate build
Stephen Warren [Mon, 24 Oct 2016 22:41:49 +0000 (16:41 -0600)]
travis-ci: remove duplicate build

There were two sub-jobs to build arm1136. Remove the duplicate.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agotravis-ci: set env vars to name jobs
Stephen Warren [Mon, 24 Oct 2016 22:41:48 +0000 (16:41 -0600)]
travis-ci: set env vars to name jobs

Travis CI names sub-jobs after the first environment variable that is set
for a script. This doesn't produce meaningful results for any of the non-
buildman jobs. Add a dummy variable to give the jobs meaningful names.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoMerge branch 'master' of git://git.denx.de/u-boot-atmel
Tom Rini [Fri, 28 Oct 2016 18:14:18 +0000 (14:14 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-atmel

7 years agodm: at91: Add driver model support for the spi driver
Wenyou Yang [Fri, 28 Oct 2016 06:17:49 +0000 (14:17 +0800)]
dm: at91: Add driver model support for the spi driver

Add driver model support while retaining the existing legacy code.
This allows the driver to support boards that have converted to
driver model as well as those that have not.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
7 years agoboard: sama5d2_xplained: Enable an early debug UART
Wenyou Yang [Mon, 17 Oct 2016 01:55:26 +0000 (09:55 +0800)]
board: sama5d2_xplained: Enable an early debug UART

Enable an early debug UART to debug problems when an ICE or other
debug mechanism is not available.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
7 years agoboard: sama5d2_xplained: Set 'ethaddr' got from AT24MAC
Wenyou Yang [Mon, 17 Oct 2016 01:55:25 +0000 (09:55 +0800)]
board: sama5d2_xplained: Set 'ethaddr' got from AT24MAC

If 'ethaddr' is not set, we will get the ethernet address from AT24MAC,
and set it to 'ethaddr' variable.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Signed-off-by: Songjun Wu <songjun.wu@microchip.com>
Reviewed-by: Andreas Bießmann <biessmann@corscience.de>
7 years agoboard: sama5d2_xplained: Clean up code
Wenyou Yang [Mon, 17 Oct 2016 01:55:24 +0000 (09:55 +0800)]
board: sama5d2_xplained: Clean up code

Since the introduction of pinctrl and clk driver, and the dts file,
remove unneeded the pin configurations and the clock enabling code.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
7 years agoboard: sama5d2_xplained: Move config options to defconfigs
Wenyou Yang [Mon, 17 Oct 2016 01:55:23 +0000 (09:55 +0800)]
board: sama5d2_xplained: Move config options to defconfigs

Move the config options from the include/configs/sama5d2_xplained.h
to configs/sama5d2_xplained_*_defconfig.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
7 years agoserial: atmel_usart: Support enable an early debug UART
Wenyou Yang [Mon, 17 Oct 2016 01:49:55 +0000 (09:49 +0800)]
serial: atmel_usart: Support enable an early debug UART

Add support to enable an early debug UART for debugging.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
7 years agoserial: Kconfig: Add ATMEL_USART option
Wenyou Yang [Mon, 17 Oct 2016 01:49:54 +0000 (09:49 +0800)]
serial: Kconfig: Add ATMEL_USART option

Add ATMEL_USART option to support to enable the Atmel usart driver
from Kconfig.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
7 years agommc: atmel_sdhci: Remove unnecessary clock calling
Wenyou Yang [Tue, 27 Sep 2016 03:00:34 +0000 (11:00 +0800)]
mmc: atmel_sdhci: Remove unnecessary clock calling

Due to the peripheral and generated clock driver improvement,
remove the unnecessary clock calling.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
7 years agousb: ehci-atmel: Remove unnecessary clock calling
Wenyou Yang [Tue, 27 Sep 2016 03:00:33 +0000 (11:00 +0800)]
usb: ehci-atmel: Remove unnecessary clock calling

Due to the peripheral clock driver improvement, remove the
unnecessary clock calling.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
7 years agoi2c: at91_i2c: Change error return -ENODEV to -EINVAL
Wenyou Yang [Tue, 27 Sep 2016 03:00:32 +0000 (11:00 +0800)]
i2c: at91_i2c: Change error return -ENODEV to -EINVAL

Change the error return value -ENODEV from to -EINVAL for more
reasonable.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
7 years agoi2c: at91_i2c: Remove unnecessary clock calling
Wenyou Yang [Tue, 27 Sep 2016 03:00:31 +0000 (11:00 +0800)]
i2c: at91_i2c: Remove unnecessary clock calling

Due to the peripheral clock driver improvement, remove the
unnecessary clock calling.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
7 years agogpio: atmel_pio4: Remove unnecessary clock calling
Wenyou Yang [Tue, 27 Sep 2016 03:00:30 +0000 (11:00 +0800)]
gpio: atmel_pio4: Remove unnecessary clock calling

Due to the peripheral clock driver improvement, remove the
unnecessary clock calling.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
7 years agoclk: at91: Improve the clock implementation
Wenyou Yang [Tue, 27 Sep 2016 03:00:29 +0000 (11:00 +0800)]
clk: at91: Improve the clock implementation

For the peripheral clock, provide the clock ops for the clock
provider, such as spi0_clk. The .of_xlate is to get the clk->id,
the .enable is to enable the spi0 peripheral clock, the .get_rate
is to get the clock frequency.

The driver for periph32ck node is responsible for recursively
binding its children as clk devices, not provide the clock ops.

So do the generated clock and system clock.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
7 years agoclk: clk-uclass: Assign clk->dev before call .of_xlate
Wenyou Yang [Tue, 27 Sep 2016 03:00:28 +0000 (11:00 +0800)]
clk: clk-uclass: Assign clk->dev before call .of_xlate

In order to make clk->dev available in ops->of_xlate() to get the
clock ID from the 'reg' property of the clock node, assign the
clk->dev before calling ops->of_xlate().

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
7 years agoARM: at91/dt: sama5d2: Fix the warning from dtc
Wenyou Yang [Sun, 18 Sep 2016 07:37:47 +0000 (15:37 +0800)]
ARM: at91/dt: sama5d2: Fix the warning from dtc

Fix the warning from dtc like,
---8<----
Warning (unit_address_vs_reg): Node /ahb/apb/pmc@f0014000/periph64ck/sdmmc0_hclk has a reg or ranges property, but no unit name
--->8----

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
7 years agoclk: at91: Fix at91-pmc and at91-sckc's class ID
Wenyou Yang [Tue, 13 Sep 2016 02:25:55 +0000 (10:25 +0800)]
clk: at91: Fix at91-pmc and at91-sckc's class ID

The at91-pmc and at91-sckc aren't the clock providers, change their
class ID from UCLASS_CLK to UCLASS_SIMPLE_BUS, they also don't
need to bind the child nodes explicitly, the .post_bind callback
of simple_bus uclass will do it for them.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoAT91: Correct misspelling of "redundent" in partition names
Robert P. J. Day [Thu, 1 Sep 2016 13:49:14 +0000 (09:49 -0400)]
AT91: Correct misspelling of "redundent" in partition names

Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
7 years agoarm, at91: add icache support
Heiko Schocher [Wed, 17 Aug 2016 07:13:25 +0000 (09:13 +0200)]
arm, at91: add icache support

add at least icache support for at91 based boards.
This speeds up NOR flash access on an at91sam9g15
based board from 15.2 seconds reading 8 MiB from
a SPI NOR flash to 5.7 seconds.

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
7 years agoARM: at91: clock: correct PRES offset for at91sam9x5
Heiko Schocher [Wed, 17 Aug 2016 07:13:24 +0000 (09:13 +0200)]
ARM: at91: clock: correct PRES offset for at91sam9x5

on at91sam9x5 PRES offset is 4 in the PMC master
clock register.

Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Wenyou Yang <wenyou.yang@atmel.com>
Acked-by: Andreas Bießmann <andreas@biessmann.org>
7 years agoarm: at91: mpddrc: add missing MPDDRC_MD defines
Heiko Schocher [Wed, 17 Aug 2016 07:13:23 +0000 (09:13 +0200)]
arm: at91: mpddrc: add missing MPDDRC_MD defines

add missing MPDDRC_MD defines

Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
7 years agoMerge branch 'master' of git://www.denx.de/git/u-boot-imx
Tom Rini [Fri, 28 Oct 2016 15:12:03 +0000 (11:12 -0400)]
Merge branch 'master' of git://denx.de/git/u-boot-imx

Signed-off-by: Tom Rini <trini@konsulko.com>
Conflicts:
common/Kconfig
configs/dms-ba16_defconfig

7 years agoMerge branch 'master' of http://git.denx.de/u-boot-mmc
Tom Rini [Fri, 28 Oct 2016 13:08:13 +0000 (09:08 -0400)]
Merge branch 'master' of git.denx.de/u-boot-mmc

7 years agopci: Move CONFIG_PCI_PNP to Kconfig
Bin Meng [Mon, 17 Oct 2016 06:35:18 +0000 (23:35 -0700)]
pci: Move CONFIG_PCI_PNP to Kconfig

Introduce CONFIG_PCI_PNP in Kconfig and move over boards' defconfig
to use that.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Re-generate configs and include/configs/ changes]
Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agodm: mmc: socfpga: fix MMC_OPS support
Sylvain Lesne [Mon, 24 Oct 2016 16:24:37 +0000 (18:24 +0200)]
dm: mmc: socfpga: fix MMC_OPS support

Now that CONFIG_BLK and CONFIG_MMC_OPS are enabled by default with
CONFIG_DM_MMC, the DWMMC driver on the socfpga platform fails at
runtime.

This adds the missing fields in the driver declaration.

Signed-off-by: Sylvain Lesne <lesne@alse-fr.com>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agommc: sdhci: assign to clk_mul when host version is upper than SD3.0
Jaehoon Chung [Fri, 21 Oct 2016 11:52:35 +0000 (20:52 +0900)]
mmc: sdhci: assign to clk_mul when host version is upper than SD3.0

To prevent the wrong value check the SD version.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
7 years agommc: add the device name in debugging message for supplying vmmc
Jaehoon Chung [Mon, 24 Oct 2016 06:22:22 +0000 (15:22 +0900)]
mmc: add the device name in debugging message for supplying vmmc

If vmmc didn't supply, we didn't know which card didn't supply vmmc.
And changed from "put" to "debug".

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
7 years agodm: mmc: socfpga: fix MMC_OPS support
Sylvain Lesne [Mon, 24 Oct 2016 16:24:37 +0000 (18:24 +0200)]
dm: mmc: socfpga: fix MMC_OPS support

Now that CONFIG_BLK and CONFIG_MMC_OPS are enabled by default with
CONFIG_DM_MMC, the DWMMC driver on the socfpga platform fails at
runtime.

This adds the missing fields in the driver declaration.

Signed-off-by: Sylvain Lesne <lesne@alse-fr.com>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agommc: refactor two core functions
Masahiro Yamada [Thu, 13 Oct 2016 15:13:18 +0000 (00:13 +0900)]
mmc: refactor two core functions

Drop unneeded variables and assignments.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
7 years agommc: sdhci: fix the "misaligned operation at range" for cache
Jaehoon Chung [Thu, 13 Oct 2016 01:33:06 +0000 (10:33 +0900)]
mmc: sdhci: fix the "misaligned operation at range" for cache

This pathc is fixed the below thing.
If misaligned the cache range, Just flush to CACHLINE_SIZE.
"CACHE: Misaligned operation at range [7ae55b007ae55b08]"

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
7 years agommc: introduce mmc_power_init
Peng Fan [Tue, 11 Oct 2016 07:08:43 +0000 (15:08 +0800)]
mmc: introduce mmc_power_init

In device tree, there is vmmc-supply property for SD/MMC.
Introduce mmc_power_init function to handle vmmc-supply.

mmc_power_init will first invoke board_mmc_power_init to
avoid break boards which already implement board_mmc_power_init.

If DM_MMC and DM_REGULATOR is defined, the regulator
will be enabled to power up the device.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
7 years agodrivers/pci/Kconfig: Add PCI
Tom Rini [Wed, 26 Oct 2016 21:15:37 +0000 (17:15 -0400)]
drivers/pci/Kconfig: Add PCI

Add 'PCI' as a menu option and migrate all existing users.

Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
7 years agoarm: socfpga: sockit: Adding handoff for SDRAM ctrlcfg.extratime1
Chin Liang See [Wed, 21 Sep 2016 02:26:04 +0000 (10:26 +0800)]
arm: socfpga: sockit: Adding handoff for SDRAM ctrlcfg.extratime1

Adding new handoff for SDRAM ctrcfg.extratime1 which is
required for stable LPDDR2 operation. Since the board is
using DDR3, the handoff is set to default value 0.

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
7 years agoarm: socfpga: de0-nano-soc: Adding handoff for SDRAM ctrlcfg.extratime1
Chin Liang See [Wed, 21 Sep 2016 02:26:03 +0000 (10:26 +0800)]
arm: socfpga: de0-nano-soc: Adding handoff for SDRAM ctrlcfg.extratime1

Adding new handoff for SDRAM ctrcfg.extratime1 which is
required for stable LPDDR2 operation. Since the board is
using DDR3, the handoff is set to default value 0.

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
7 years agoarm: socfpga: sr1500: Adding handoff for SDRAM ctrlcfg.extratime1
Chin Liang See [Wed, 21 Sep 2016 02:26:02 +0000 (10:26 +0800)]
arm: socfpga: sr1500: Adding handoff for SDRAM ctrlcfg.extratime1

Adding new handoff for SDRAM ctrcfg.extratime1 which is
required for stable LPDDR2 operation. Since the board is
using DDR3, the handoff is set to default value 0.

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
7 years agoarm: socfpga: vining_fpga: Adding handoff for SDRAM ctrlcfg.extratime1
Chin Liang See [Wed, 21 Sep 2016 02:26:01 +0000 (10:26 +0800)]
arm: socfpga: vining_fpga: Adding handoff for SDRAM ctrlcfg.extratime1

Adding new handoff for SDRAM ctrcfg.extratime1 which is
required for stable LPDDR2 operation. Since the board is
using DDR3, the handoff is set to default value 0.

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
7 years agoarm: socfpga: is1: Adding handoff for SDRAM ctrlcfg.extratime1
Chin Liang See [Wed, 21 Sep 2016 02:26:00 +0000 (10:26 +0800)]
arm: socfpga: is1: Adding handoff for SDRAM ctrlcfg.extratime1

Adding new handoff for SDRAM ctrcfg.extratime1 which is
required for stable LPDDR2 operation. Since the board is
using DDR3, the handoff is set to default value 0.

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>