From: Stefan Roese Date: Wed, 15 Aug 2007 19:06:27 +0000 (+0200) Subject: Merge with git://www.denx.de/git/u-boot.git X-Git-Tag: v2008.10-rc1~874^2~40^2~6^2~8^2~1^2~1 X-Git-Url: http://review.tizen.org/git/?p=platform%2Fkernel%2Fu-boot.git;a=commitdiff_plain;h=b706d63559aeec352bc72dd86d7d5423c15f6a60 Merge with git://www.denx.de/git/u-boot.git --- b706d63559aeec352bc72dd86d7d5423c15f6a60 diff --cc board/esd/ash405/ash405.c index 0151d74,f41eb7b..8a5b03b --- a/board/esd/ash405/ash405.c +++ b/board/esd/ash405/ash405.c @@@ -219,13 -228,25 +219,12 @@@ long int initdram (int board_type /* ------------------------------------------------------------------------- */ -int testdram (void) +void reset_phy(void) { - /* TODO: XXX XXX XXX */ - printf ("test: 16 MB - ok\n"); - - return (0); -} - -/* ------------------------------------------------------------------------- */ - -#if defined(CONFIG_CMD_NAND) -#include -extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE]; - -void nand_init(void) -{ - nand_probe(CFG_NAND_BASE); - if (nand_dev_desc[0].ChipID != NAND_ChipID_UNKNOWN) { - print_size(nand_dev_desc[0].totlen, "\n"); - } -} +#ifdef CONFIG_LXT971_NO_SLEEP - + /* + * Disable sleep mode in LXT971 + */ + lxt971_no_sleep(); #endif +} diff --cc board/esd/common/esd405ep_nand.c index 7ac4b83,0000000..7bf6847 mode 100644,000000..100644 --- a/board/esd/common/esd405ep_nand.c +++ b/board/esd/common/esd405ep_nand.c @@@ -1,87 -1,0 +1,87 @@@ +/* + * (C) Copyright 2007 + * Matthias Fuchs, esd gmbh germany, matthias.fuchs@esd-electronics.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include + - #if (CONFIG_COMMANDS & CFG_CMD_NAND) ++#if defined(CONFIG_CMD_NAND) +#include +#include + +/* + * hardware specific access to control-lines + */ +static void esd405ep_nand_hwcontrol(struct mtd_info *mtdinfo, int cmd) +{ + switch(cmd) { + case NAND_CTL_SETCLE: + out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) | CFG_NAND_CLE); + break; + case NAND_CTL_CLRCLE: + out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) & ~CFG_NAND_CLE); + break; + case NAND_CTL_SETALE: + out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) | CFG_NAND_ALE); + break; + case NAND_CTL_CLRALE: + out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) & ~CFG_NAND_ALE); + break; + case NAND_CTL_SETNCE: + out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) & ~CFG_NAND_CE); + break; + case NAND_CTL_CLRNCE: + out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) | CFG_NAND_CE); + break; + } +} + + +/* + * read device ready pin + */ +static int esd405ep_nand_device_ready(struct mtd_info *mtdinfo) +{ + if (in_be32((void *)GPIO0_IR) & CFG_NAND_RDY) + return 1; + return 0; +} + + +int board_nand_init(struct nand_chip *nand) +{ + /* + * Set NAND-FLASH GPIO signals to defaults + */ + out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) & ~(CFG_NAND_CLE | CFG_NAND_ALE)); + out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) | CFG_NAND_CE); + + /* + * Initialize nand_chip structure + */ + nand->hwcontrol = esd405ep_nand_hwcontrol; + nand->dev_ready = esd405ep_nand_device_ready; + nand->eccmode = NAND_ECC_SOFT; + nand->chip_delay = NAND_BIG_DELAY_US; + nand->options = NAND_SAMSUNG_LP_OPTIONS; + return 0; +} - #endif /* (CONFIG_COMMANDS & CFG_CMD_NAND) */ ++#endif diff --cc board/esd/wuh405/wuh405.c index 5fde8d6,61d1d6c..dba3ce8 --- a/board/esd/wuh405/wuh405.c +++ b/board/esd/wuh405/wuh405.c @@@ -212,7 -218,35 +212,5 @@@ long int initdram (int board_type mtdcr(memcfga, mem_mb0cf); val = mfdcr(memcfgd); -#if 0 - printf("\nmb0cf=%x\n", val); /* test-only */ - printf("strap=%x\n", mfdcr(strap)); /* test-only */ -#endif - return (4*1024*1024 << ((val & 0x000e0000) >> 17)); } - -/* ------------------------------------------------------------------------- */ - -int testdram (void) -{ - /* TODO: XXX XXX XXX */ - printf ("test: 16 MB - ok\n"); - - return (0); -} -- --/* ------------------------------------------------------------------------- */ - -#if defined(CONFIG_CMD_NAND) -#include -extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE]; - -void nand_init(void) -{ - nand_probe(CFG_NAND_BASE); - if (nand_dev_desc[0].ChipID != NAND_ChipID_UNKNOWN) { - print_size(nand_dev_desc[0].totlen, "\n"); - } -} -#endif diff --cc common/cmd_nand.c index 9ef31d4,c72612d..254a775 --- a/common/cmd_nand.c +++ b/common/cmd_nand.c @@@ -489,23 -475,13 +481,24 @@@ static int nand_load_image(cmd_tbl_t *c printf("\nLoading from %s, offset 0x%lx\n", nand->name, offset); cnt = nand->oobblock; - r = nand_read(nand, offset, &cnt, (u_char *) addr); + if (jffs2) { + nand_read_options_t opts; + memset(&opts, 0, sizeof(opts)); + opts.buffer = (u_char*) addr; + opts.length = cnt; + opts.offset = offset; + opts.quiet = 1; + r = nand_read_opts(nand, &opts); + } else { + r = nand_read(nand, offset, &cnt, (u_char *) addr); + } + if (r) { puts("** Read error\n"); - SHOW_BOOT_PROGRESS(-1); + show_boot_progress (-56); return 1; } + show_boot_progress (56); hdr = (image_header_t *) addr; @@@ -518,23 -495,14 +512,24 @@@ print_image_hdr(hdr); cnt = (ntohl(hdr->ih_size) + sizeof (image_header_t)); + if (jffs2) { + nand_read_options_t opts; + memset(&opts, 0, sizeof(opts)); + opts.buffer = (u_char*) addr; + opts.length = cnt; + opts.offset = offset; + opts.quiet = 1; + r = nand_read_opts(nand, &opts); + } else { + r = nand_read(nand, offset, &cnt, (u_char *) addr); + } - r = nand_read(nand, offset, &cnt, (u_char *) addr); if (r) { puts("** Read error\n"); - SHOW_BOOT_PROGRESS(-1); + show_boot_progress (-58); return 1; } + show_boot_progress (58); /* Loading ok, update default load address */ @@@ -632,9 -604,9 +631,9 @@@ usage U_BOOT_CMD(nboot, 4, 1, do_nandboot, "nboot - boot from NAND device\n", - "[partition] | [[[loadAddr] dev] offset]\n"); + "[.jffs2] [partition] | [[[loadAddr] dev] offset]\n"); - #endif /* (CONFIG_COMMANDS & CFG_CMD_NAND) */ + #endif #else /* CFG_NAND_LEGACY */ /* diff --cc include/configs/CMS700.h index 9695211,08ef9b5..1fd2b53 --- a/include/configs/CMS700.h +++ b/include/configs/CMS700.h @@@ -60,27 -60,38 +60,36 @@@ #define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */ #define CONFIG_RESET_PHY_R 1 /* use reset_phy() to disable phy sleep mode */ - #define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | \ - CONFIG_BOOTP_DNS | \ - CONFIG_BOOTP_DNS2 | \ - CONFIG_BOOTP_SEND_HOSTNAME ) - - #define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \ - CFG_CMD_DHCP | \ - CFG_CMD_BSP | \ - CFG_CMD_PCI | \ - CFG_CMD_IRQ | \ - CFG_CMD_ELF | \ - CFG_CMD_NAND | \ - CFG_CMD_I2C | \ - CFG_CMD_DATE | \ - CFG_CMD_MII | \ - CFG_CMD_PING | \ - CFG_CMD_EEPROM ) - - /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ - #include + /* + * BOOTP options + */ + #define CONFIG_BOOTP_SUBNETMASK + #define CONFIG_BOOTP_GATEWAY + #define CONFIG_BOOTP_HOSTNAME + #define CONFIG_BOOTP_BOOTPATH + #define CONFIG_BOOTP_DNS + #define CONFIG_BOOTP_DNS2 + #define CONFIG_BOOTP_SEND_HOSTNAME + + + /* + * Command line configuration. + */ + #include + + #define CONFIG_CMD_DHCP + #define CONFIG_CMD_BSP + #define CONFIG_CMD_PCI + #define CONFIG_CMD_IRQ + #define CONFIG_CMD_ELF + #define CONFIG_CMD_NAND + #define CONFIG_CMD_I2C + #define CONFIG_CMD_DATE + #define CONFIG_CMD_MII + #define CONFIG_CMD_PING + #define CONFIG_CMD_EEPROM + -#define CFG_NAND_LEGACY - #undef CONFIG_WATCHDOG /* watchdog disabled */ #define CONFIG_SDRAM_BANK0 1 /* init onboard SDRAM bank 0 */ diff --cc include/configs/CPCI405.h index 9c04129,0a4e1e9..1b948f6 --- a/include/configs/CPCI405.h +++ b/include/configs/CPCI405.h @@@ -80,9 -92,8 +92,6 @@@ #define CONFIG_SUPPORT_VFAT - /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ - #include -#define CFG_NAND_LEGACY -- #undef CONFIG_WATCHDOG /* watchdog disabled */ #define CONFIG_SDRAM_BANK0 1 /* init onboard SDRAM bank 0 */ diff --cc include/configs/CPCI4052.h index 2a328a6,ceeba6e..fb71c5f --- a/include/configs/CPCI4052.h +++ b/include/configs/CPCI4052.h @@@ -102,9 -114,8 +114,6 @@@ #define CONFIG_AUTO_UPDATE 1 /* autoupdate via compactflash */ #endif - /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ - #include -#define CFG_NAND_LEGACY -- #undef CONFIG_WATCHDOG /* watchdog disabled */ #define CONFIG_SDRAM_BANK0 1 /* init onboard SDRAM bank 0 */ diff --cc include/configs/CPCI405AB.h index 6946686,1aefbba..4994319 --- a/include/configs/CPCI405AB.h +++ b/include/configs/CPCI405AB.h @@@ -88,9 -100,9 +100,6 @@@ #define CONFIG_SUPPORT_VFAT - /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ - #include -#define CFG_NAND_LEGACY - -- #undef CONFIG_WATCHDOG /* watchdog disabled */ #define CONFIG_SDRAM_BANK0 1 /* init onboard SDRAM bank 0 */ diff --cc include/configs/CPCI405DT.h index 4ae240e,e2652e6..29f9292 --- a/include/configs/CPCI405DT.h +++ b/include/configs/CPCI405DT.h @@@ -99,9 -111,8 +111,6 @@@ #undef CONFIG_AUTO_UPDATE /* autoupdate via compactflash */ - /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ - #include -#define CFG_NAND_LEGACY -- #undef CONFIG_WATCHDOG /* watchdog disabled */ #define CONFIG_SDRAM_BANK0 1 /* init onboard SDRAM bank 0 */ diff --cc include/configs/HH405.h index f36777a,00f481c..ea8e61a --- a/include/configs/HH405.h +++ b/include/configs/HH405.h @@@ -127,9 -141,8 +141,6 @@@ #define CONFIG_AUTO_UPDATE 1 /* autoupdate via compactflash */ #undef CONFIG_AUTO_UPDATE_SHOW /* use board show routine */ - /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ - #include -#define CFG_NAND_LEGACY -- #undef CONFIG_BZIP2 /* include support for bzip2 compressed images */ #undef CONFIG_WATCHDOG /* watchdog disabled */ diff --cc include/configs/PLU405.h index ef5ecba,5470373..4acbcd5 --- a/include/configs/PLU405.h +++ b/include/configs/PLU405.h @@@ -81,10 -96,8 +96,7 @@@ #define CONFIG_SUPPORT_VFAT #define CONFIG_AUTO_UPDATE 1 /* autoupdate via compactflash */ -#define CONFIG_AUTO_UPDATE_SHOW 1 /* use board show routine */ - /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ - #include - #undef CONFIG_WATCHDOG /* watchdog disabled */ #define CONFIG_RTC_MC146818 /* DS1685 is MC146818 compatible*/