stm32mp1: ram: remove the support of calibration result
authorPatrick Delaunay <patrick.delaunay@foss.st.com>
Mon, 15 Nov 2021 14:32:29 +0000 (15:32 +0100)
committerPatrice Chotard <patrice.chotard@foss.st.com>
Tue, 30 Nov 2021 15:43:28 +0000 (16:43 +0100)
commit9819fe345cc9de8ab1ca8c53999b5d460a8d0e7d
treeac6b9cc85315f37be4055d3c66e35510073da371
parent4831ba2903d886d233400423c2a425fde170b367
stm32mp1: ram: remove the support of calibration result

The support of a predefined DDR PHY tuning result is removed for
STM32MP1 driver because it is not needed at the supported frequency
when built-in calibration is executed.

The calibration parameters were provided in the device tree by the
optional node "st,phy-cal", activated in ddr helper file by the
compilation flag DDR_PHY_CAL_SKIP and filled with values generated
by the CubeMX DDR utilities.

This patch
- updates the binding file to remove "st,phy-cal" support
- updates the device trees and remove the associated defines
- simplifies the STM32MP1 DDR driver and remove the support of
  the optional parameter "st,phy-cal"

After this patch, the built-in calibration is always executed
and the calibration registers are moved in the phy dynamic part;
that allows manual tests.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
12 files changed:
arch/arm/dts/stm32mp15-ddr.dtsi
arch/arm/dts/stm32mp15-ddr3-1x4Gb-1066-binG.dtsi
arch/arm/dts/stm32mp15-ddr3-2x4Gb-1066-binG.dtsi
arch/arm/dts/stm32mp15-ddr3-dhsom-2x1Gb-1066-binG.dtsi
arch/arm/dts/stm32mp15-ddr3-dhsom-2x2Gb-1066-binG.dtsi
arch/arm/dts/stm32mp15-ddr3-dhsom-2x4Gb-1066-binG.dtsi
arch/arm/dts/stm32mp15-ddr3-icore-1x4Gb-1066-binG.dtsi
doc/device-tree-bindings/memory-controllers/st,stm32mp1-ddr.txt
drivers/ram/stm32mp1/stm32mp1_ddr.c
drivers/ram/stm32mp1/stm32mp1_ddr.h
drivers/ram/stm32mp1/stm32mp1_interactive.c
drivers/ram/stm32mp1/stm32mp1_ram.c