i2c: designware_i2c: adjust timing calculation

i2c: designware_i2c: adjust timing calculation

In SPL probing of the designware_i2c device on the StarFive VisionFive 2
board fails with

    dw_i2c: mode 0, ic_clk 1000000, speed 100000,
    period 10 rise 1 fall 1 tlow 5 thigh 4 spk 0
    dw_i2c: bad counts. hcnt = -4 lcnt = 4
    device_probe: i2c@12050000 failed to probe -22

When changing the offset for the high phase from 7 to 3 the device is
probed correctly. This now matches the value from the Linux driver.

Without this fix the memory size of the StarFive VisionFive 2 board cannot
be read from EEPROM.

Fixes: e71b6f6622d6 ("i2c: designware_i2c: Rewrite timing calculation")

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
[cherry picked from mainline commit 35e8007ef382cb1f0523a9106fbc8d4d4404cb27]
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Change-Id: Iebbce724f9db2102ec2743dbf749352013c8e400