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riscv: dts: jh7110: Add initial StarFive JH7110 device tree 62/291962/1
authorYanhong Wang <yanhong.wang@starfivetech.com>
Wed, 29 Mar 2023 03:42:21 +0000 (11:42 +0800)
committerJaehoon Chung <jh80.chung@samsung.com>
Tue, 25 Apr 2023 06:28:30 +0000 (15:28 +0900)
commit0cad61a61bbc80691a5ec54c74cb19c850dc2f5b
treef6051c94404af9967833bf2be762056f062e41a4tree | snapshot
parentfcff4ba0dd53fabac450490f9ba00413d77b2f69commit | diff
riscv: dts: jh7110: Add initial StarFive JH7110 device tree

Add initial device tree for the JH7110 RISC-V SoC.

Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Tested-by: Conor Dooley <conor.dooley@microchip.com>
(cherry picked from commit 9087a6ae79e24ecbb98e3376fe4ef42705f9dd0c)
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Change-Id: Ia9acd00f478e4837dcda647aae9dd972413d77dd
arch/riscv/dts/jh7110.dtsi [new file with mode: 0644] blob
Domain: System / Kernel;